Added the SPI port controller.

diff --git a/firm/sample1/bootload/Makefile b/firm/sample1/bootload/Makefile
index 01fa904..888f5cf 100644 (file)
--- a/firm/sample1/bootload/Makefile
+++ b/firm/sample1/bootload/Makefile
@@ -20,7 +20,7 @@ H8WRITE = ../../tools/kz_h8write/kz_h8write
 H8WRITE_SERDEV = /dev/ttyUSB0
 
 OBJS  = vector.o startup.o intr.o main.o interrupt.o
-OBJS += lib.o serial.o xmodem.o elf.o dram.o spreg.o
+OBJS += lib.o serial.o xmodem.o elf.o dram.o spreg.o spi.o
 OBJS += led.o re.o sw.o lcd.o vs1011e.o
 OBJS += mmc.o pff.o
 

diff --git a/firm/sample1/bootload/spi.c b/firm/sample1/bootload/spi.c
new file mode 100644 (file)
index 0000000..58345cc
--- /dev/null
+++ b/firm/sample1/bootload/spi.c
@@ -0,0 +1,60 @@
+
+#include "spi.h"
+#include "portconf.h"
+
+#define CK_H()  do { *PORTCONF_PBDR |=  PORTCONF_PBBIT_SCLK; } while (0)    /* Set MMC SCLK "high" */
+#define CK_L()  do { *PORTCONF_PBDR &= ~PORTCONF_PBBIT_SCLK; } while (0)    /* Set MMC SCLK "low" */
+#define DI_H()  do { *PORTCONF_PBDR |=  PORTCONF_PBBIT_MOSI; } while (0)    /* Set MMC DI "high" */
+#define DI_L()  do { *PORTCONF_PBDR &= ~PORTCONF_PBBIT_MOSI; } while (0)    /* Set MMC DI "low" */
+#define DO      ((*PORTCONF_PBDR & PORTCONF_PBBIT_MISO) ? 1 : 0)            /* Get MMC DO value (high:true, low:false) */
+
+void spi_init(void)
+{
+}
+
+void spi_tx(uint8 d)
+{
+    if (d & 0x80) DI_H(); else DI_L(); /* bit7 */
+    CK_H(); CK_L();
+    if (d & 0x40) DI_H(); else DI_L(); /* bit6 */
+    CK_H(); CK_L();
+    if (d & 0x20) DI_H(); else DI_L(); /* bit5 */
+    CK_H(); CK_L();
+    if (d & 0x10) DI_H(); else DI_L(); /* bit4 */
+    CK_H(); CK_L();
+    if (d & 0x08) DI_H(); else DI_L(); /* bit3 */
+    CK_H(); CK_L();
+    if (d & 0x04) DI_H(); else DI_L(); /* bit2 */
+    CK_H(); CK_L();
+    if (d & 0x02) DI_H(); else DI_L(); /* bit1 */
+    CK_H(); CK_L();
+    if (d & 0x01) DI_H(); else DI_L(); /* bit0 */
+    CK_H(); CK_L();
+}
+
+uint8 spi_rx(void)
+{
+    uint8 r;
+
+    DI_H();    /* Send 0xFF */
+
+    r = 0;   if (DO) r++;      /* bit7 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit6 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit5 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit4 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit3 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit2 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit1 */
+    CK_H(); CK_L();
+    r <<= 1; if (DO) r++;      /* bit0 */
+    CK_H(); CK_L();
+
+    return r;
+}
+

diff --git a/firm/sample1/bootload/spi.h b/firm/sample1/bootload/spi.h
new file mode 100644 (file)
index 0000000..e17aa06
--- /dev/null
+++ b/firm/sample1/bootload/spi.h
@@ -0,0 +1,12 @@
+
+#ifndef SPI_H
+#define SPI_H
+
+#include "defines.h"
+
+void spi_init(void);
+void spi_tx(uint8 d);
+uint8 spi_rx(void);
+
+#endif
+

diff --git a/firm/sample1/bootload/vs1011e.c b/firm/sample1/bootload/vs1011e.c
index 5d2b975..c24a90d 100644 (file)
--- a/firm/sample1/bootload/vs1011e.c
+++ b/firm/sample1/bootload/vs1011e.c
@@ -1,6 +1,7 @@
 
 #include "vs1011e.h"
 #include "portconf.h"
+#include "spi.h"
 
 #define VS1011E_OPCODE_READ    0x03
 #define VS1011E_OPCODE_WRITE   0x02
@@ -53,12 +54,6 @@
 
 #define VS1011E_CHK_DREQ()  (((*PORTCONF_P4DR) & PORTCONF_P4BIT_VSDREQ) ? 0 : 1)
 
-#define CK_H()         do { *PORTCONF_PBDR |=  PORTCONF_PBBIT_SCLK; } while (0)    /* Set MMC SCLK "high" */
-#define CK_L()         do { *PORTCONF_PBDR &= ~PORTCONF_PBBIT_SCLK; } while (0)    /* Set MMC SCLK "low" */
-#define DI_H()         do { *PORTCONF_PBDR |=  PORTCONF_PBBIT_MOSI; } while (0)    /* Set MMC DI "high" */
-#define DI_L()         do { *PORTCONF_PBDR &= ~PORTCONF_PBBIT_MOSI; } while (0)    /* Set MMC DI "low" */
-#define DO             ((*PORTCONF_PBDR & PORTCONF_PBBIT_MISO) ? 1 : 0)            /* Get MMC DO value (high:true, low:false) */
-
 static void _delay_ms(int ms)
 {
     int i;
@@ -73,51 +68,6 @@ static void _delay_us(int us)
     }
 }
 
-static void SPI_TX(uint8 d)
-{
-    if (d & 0x80) DI_H(); else DI_L(); /* bit7 */
-    CK_H(); CK_L();
-    if (d & 0x40) DI_H(); else DI_L(); /* bit6 */
-    CK_H(); CK_L();
-    if (d & 0x20) DI_H(); else DI_L(); /* bit5 */
-    CK_H(); CK_L();
-    if (d & 0x10) DI_H(); else DI_L(); /* bit4 */
-    CK_H(); CK_L();
-    if (d & 0x08) DI_H(); else DI_L(); /* bit3 */
-    CK_H(); CK_L();
-    if (d & 0x04) DI_H(); else DI_L(); /* bit2 */
-    CK_H(); CK_L();
-    if (d & 0x02) DI_H(); else DI_L(); /* bit1 */
-    CK_H(); CK_L();
-    if (d & 0x01) DI_H(); else DI_L(); /* bit0 */
-    CK_H(); CK_L();
-}
-static uint8 SPI_RX()
-{
-    uint8 r;
-
-    DI_H();    /* Send 0xFF */
-
-    r = 0;   if (DO) r++;      /* bit7 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit6 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit5 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit4 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit3 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit2 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit1 */
-    CK_H(); CK_L();
-    r <<= 1; if (DO) r++;      /* bit0 */
-    CK_H(); CK_L();
-
-    return r;
-}
-
 static void vs1011e_read(uint8 addr, uint16 * stat);
 static void vs1011e_write(uint8 addr, uint16 stat);
 
@@ -176,13 +126,13 @@ void vs1011e_reset_by_software()
     while (VS1011E_CHK_DREQ()) {
     }
     // Send 0x53 to SPI
-    SPI_TX(0x53);
+    spi_tx(0x53);
     // Send 1024 nulls
     for (i = 0; i < 1024; i++) {
         // Check the DREQ.
         while (VS1011E_CHK_DREQ()) {
         }
-        SPI_TX(0x00);
+        spi_tx(0x00);
     }
     // Deassert DCS
     VS1011E_VSDAT1();
@@ -198,7 +148,7 @@ void vs1011e_cancel_data()
     for (i = 0; i < 2048; i++) {
         while (VS1011E_CHK_DREQ()) {
         }
-        SPI_TX(0x00);
+        spi_tx(0x00);
     }
     VS1011E_VSDAT1();
 }
@@ -260,7 +210,7 @@ void vs1011e_play(int8(*func) (uint8 * buf, const uint16 len))
         for (i = 0; i < UNITBYTE; i++) {
             while (VS1011E_CHK_DREQ()) { }
             VS1011E_VSDAT0();
-            SPI_TX(*(buf + i));
+            spi_tx(*(buf + i));
             VS1011E_VSDAT1();
         }
     }
@@ -282,14 +232,14 @@ void vs1011e_sinetest_init()
     }
 
     VS1011E_VSDAT0();
-    SPI_TX(0x53);
-    SPI_TX(0xEF);
-    SPI_TX(0x6E);
-    SPI_TX(0xF0);
-    SPI_TX(0x00);
-    SPI_TX(0x00);
-    SPI_TX(0x00);
-    SPI_TX(0x00);
+    spi_tx(0x53);
+    spi_tx(0xEF);
+    spi_tx(0x6E);
+    spi_tx(0xF0);
+    spi_tx(0x00);
+    spi_tx(0x00);
+    spi_tx(0x00);
+    spi_tx(0x00);
     VS1011E_VSDAT1();
 }
 
@@ -299,14 +249,14 @@ void vs1011e_sinetest_fini()
     }
 
     VS1011E_VSDAT0();
-    SPI_TX(0x45);
-    SPI_TX(0x78);
-    SPI_TX(0x69);
-    SPI_TX(0x74);
-    SPI_TX(0x00);
-    SPI_TX(0x00);
-    SPI_TX(0x00);
-    SPI_TX(0x00);
+    spi_tx(0x45);
+    spi_tx(0x78);
+    spi_tx(0x69);
+    spi_tx(0x74);
+    spi_tx(0x00);
+    spi_tx(0x00);
+    spi_tx(0x00);
+    spi_tx(0x00);
     VS1011E_VSDAT1();
 
     vs1011e_cancel_data();
@@ -333,12 +283,12 @@ static void vs1011e_read(uint8 addr, uint16 * stat)
 
     VS1011E_VSCTL0();
 
-    SPI_TX(VS1011E_OPCODE_READ);
-    SPI_TX(addr);
+    spi_tx(VS1011E_OPCODE_READ);
+    spi_tx(addr);
 
     *stat = 0;
-    *stat |= SPI_RX() << 8;
-    *stat |= SPI_RX();
+    *stat |= spi_rx() << 8;
+    *stat |= spi_rx();
 
     VS1011E_VSCTL1();
 }
@@ -350,11 +300,11 @@ static void vs1011e_write(uint8 addr, uint16 stat)
 
     VS1011E_VSCTL0();
 
-    SPI_TX(VS1011E_OPCODE_WRITE);
-    SPI_TX(addr);
+    spi_tx(VS1011E_OPCODE_WRITE);
+    spi_tx(addr);
 
-    SPI_TX(stat >> 8);
-    SPI_TX(stat >> 0);
+    spi_tx(stat >> 8);
+    spi_tx(stat >> 0);
 
     VS1011E_VSCTL1();
 }