+2009-06-24 Ian Lance Taylor <iant@google.com>
+
+ * config/arc/arc.c: Include "df.h".
+ (arc_attribute_table): Make static. Move higher in file.
+ (arc_address_cost): Call SMALL_INT on INTVAL, not rtx.
+ (output_shift): Initialize n later to avoid warning.
+ * config/arm/arm.c (arm_attribute_table): Make static. Move
+ higher in file.
+ * config/avr/avr.c (avr_attribute_table): Make static. Move
+ higher in file.
+ (reg_class_tab): Change array type from int to enum reg_class.
+ (avr_jump_mode): Change GET_MODE to GET_CODE when checking for
+ LABEL_REF.
+ (out_tsthi, ashlhi3_out): Don't use AS2 with "or" or "and".
+ (lshrhi3_out): Likewise.
+ (class_likely_spilled_p): Change return type to bool.
+ (avr_rtx_costs): Use local code variable with enum type.
+ * config/avr/avr.md (movmemhi): Use add_reg_note.
+ (andhi3, andsi3): Don't use AS2 with "and".
+ (iorhi3, iorsi3): Don't use AS2 with "or".
+ * config/avr/avr-protos.h (class_likely_spilled_p): Update
+ declaration.
+ * config/crx/crx.c: Include "df.h".
+ (crx_attribute_table): Make static.
+ * config/m32r/m32r.c: Include "df.h".
+ (m32r_attribute_table): Make static. Move higher in file.
+ (pop): Use add_reg_note.
+ (block_move_call): Change 0 to LCT_NORMAL in function call.
+ * config/m32r/m32r.md (movsi_insn): Remove unused local value.
+ * config/m32r/m32r.h (INITIALIZE_TRAMPOLINE): Likewise.
+ * config/m32r/m32r-protos.h (m32r_compute_function_type): Always
+ declare, not just when TREE_CODE is defined.
+ * config/m68hc11/m68hc11.c: Include "expr.h".
+ (m68hc11_attribute_table): Make static. Move higher in file.
+ (m68hc11_small_indexed_indirect_p): Change 0 to VOIDmode in
+ function call.
+ (m68hc11_register_indirect_p): Likewise.
+ (m68hc11_function_arg_padding): Change return type to enum
+ direction.
+ (emit_move_after_reload): Use add_reg_note.
+ (m68hc11_emit_logical): Change code parameter to enum rtx_code.
+ (m68hc11_split_logical): Likewise.
+ (m68hc11_rtx_costs): Add local code_and outer_code variables with
+ enum type.
+ * config/m68hc11/predicates.md (reg_or_some_mem_operand): Change 0
+ to VOIDmode in function call.
+ * config/m68hc11/m68hc11-protos.h: Don't check TREE_CODE to see if
+ tree is defined.
+ (m68hc11_split_logical): Update declaration.
+ (m68hc11_function_arg_padding): Update declaration.
+ * config/mcore/mcore.c (regno_reg_class): Change form array of int
+ to array of enum reg_class.
+ (mcore_attribute_table): Make static. Move higher in file.
+ (mcore_rtx_costs): Add cast to enum type.
+ * config/mcore/mcore.h (regno_reg_class): Update declaration.
+ (GO_IF_LEGITIMATE_INDEX): Add cast to avoid warning.
+ * config/sh/sh.c (sh_attribute_table): Make static. Move higher
+ in file.
+ * config/sh/predicates.md (trapping_target_operand): Rename and to
+ and_expr.
+ * config/sparc/sparc.c (sparc_attribute_table): Make static. Move
+ higher in file.
+ * config/spu/spu.c (spu_attribute_table): Make static. Move
+ higher in file.
+ * config/v850/v850.c (v850_attribute_table): Make static. Move
+ higher in file.
+ (v850_rtx_costs): Use local code with enum type.
+ (expand_epilogue): Add cast.
+ * config/v850/v850-c.c (ghs_pragma_section): Initialize repeat.
+
2009-06-23 Takashi YOSHII <yoshii.takashi@renesas.com>
PR target/40515
#include "expr.h"
#include "recog.h"
#include "toplev.h"
+#include "df.h"
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
static void record_cc_ref (rtx);
static void arc_init_reg_tables (void);
static int get_arc_condition_code (rtx);
-EXPORTED_CONST struct attribute_spec arc_attribute_table[];
static tree arc_handle_interrupt_attribute (tree *, tree, tree, int, bool *);
static bool arc_assemble_integer (rtx, unsigned int, int);
static void arc_output_function_prologue (FILE *, HOST_WIDE_INT);
static bool arc_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
const_tree, bool);
\f
+/* ARC specific attributs. */
+
+static const struct attribute_spec arc_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "interrupt", 1, 1, true, false, false, arc_handle_interrupt_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
+\f
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
interrupt - for interrupt functions
*/
-const struct attribute_spec arc_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "interrupt", 1, 1, true, false, false, arc_handle_interrupt_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Handle an "interrupt" attribute; arguments as in
struct attribute_spec.handler. */
static tree
switch (GET_CODE (plus1))
{
case CONST_INT :
- return SMALL_INT (plus1) ? 1 : 2;
+ return SMALL_INT (INTVAL (plus1)) ? 1 : 2;
case CONST :
case SYMBOL_REF :
case LABEL_REF :
}
else
{
- int n = INTVAL (operands[2]);
+ int n;
/* If the count is negative, make it 0. */
+ n = INTVAL (operands[2]);
if (n < 0)
n = 0;
/* If the count is too big, truncate it.
typedef struct minipool_node Mnode;
typedef struct minipool_fixup Mfix;
-EXPORTED_CONST struct attribute_spec arm_attribute_table[];
-
void (*arm_lang_output_object_attributes_hook)(void);
/* Forward function declarations. */
static tree arm_promoted_type (const_tree t);
static tree arm_convert_to_type (tree type, tree expr);
static bool arm_scalar_mode_supported_p (enum machine_mode);
+\f
+/* Table of machine attributes. */
+static const struct attribute_spec arm_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ /* Function calls made to this symbol must be done indirectly, because
+ it may lie outside of the 26 bit addressing range of a normal function
+ call. */
+ { "long_call", 0, 0, false, true, true, NULL },
+ /* Whereas these functions are always known to reside within the 26 bit
+ addressing range. */
+ { "short_call", 0, 0, false, true, true, NULL },
+ /* Interrupt Service Routines have special prologue and epilogue requirements. */
+ { "isr", 0, 1, false, false, false, arm_handle_isr_attribute },
+ { "interrupt", 0, 1, false, false, false, arm_handle_isr_attribute },
+ { "naked", 0, 0, true, false, false, arm_handle_fndecl_attribute },
+#ifdef ARM_PE
+ /* ARM/PE has three new attributes:
+ interfacearm - ?
+ dllexport - for exporting a function/variable that will live in a dll
+ dllimport - for importing a function/variable from a dll
+ Microsoft allows multiple declspecs in one __declspec, separating
+ them with spaces. We do NOT support this. Instead, use __declspec
+ multiple times.
+ */
+ { "dllimport", 0, 0, true, false, false, NULL },
+ { "dllexport", 0, 0, true, false, false, NULL },
+ { "interfacearm", 0, 0, true, false, false, arm_handle_fndecl_attribute },
+#elif TARGET_DLLIMPORT_DECL_ATTRIBUTES
+ { "dllimport", 0, 0, false, false, false, handle_dll_attribute },
+ { "dllexport", 0, 0, false, false, false, handle_dll_attribute },
+ { "notshared", 0, 0, false, true, false, arm_handle_notshared_attribute },
+#endif
+ { NULL, 0, 0, false, false, false, NULL }
+};
\f
/* Initialize the GCC target structure. */
#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
arm_pragma_long_calls = OFF;
}
\f
-/* Table of machine attributes. */
-const struct attribute_spec arm_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- /* Function calls made to this symbol must be done indirectly, because
- it may lie outside of the 26 bit addressing range of a normal function
- call. */
- { "long_call", 0, 0, false, true, true, NULL },
- /* Whereas these functions are always known to reside within the 26 bit
- addressing range. */
- { "short_call", 0, 0, false, true, true, NULL },
- /* Interrupt Service Routines have special prologue and epilogue requirements. */
- { "isr", 0, 1, false, false, false, arm_handle_isr_attribute },
- { "interrupt", 0, 1, false, false, false, arm_handle_isr_attribute },
- { "naked", 0, 0, true, false, false, arm_handle_fndecl_attribute },
-#ifdef ARM_PE
- /* ARM/PE has three new attributes:
- interfacearm - ?
- dllexport - for exporting a function/variable that will live in a dll
- dllimport - for importing a function/variable from a dll
-
- Microsoft allows multiple declspecs in one __declspec, separating
- them with spaces. We do NOT support this. Instead, use __declspec
- multiple times.
- */
- { "dllimport", 0, 0, true, false, false, NULL },
- { "dllexport", 0, 0, true, false, false, NULL },
- { "interfacearm", 0, 0, true, false, false, arm_handle_fndecl_attribute },
-#elif TARGET_DLLIMPORT_DECL_ATTRIBUTES
- { "dllimport", 0, 0, false, false, false, handle_dll_attribute },
- { "dllexport", 0, 0, false, false, false, handle_dll_attribute },
- { "notshared", 0, 0, false, true, false, arm_handle_notshared_attribute },
-#endif
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Handle an attribute requiring a FUNCTION_DECL;
arguments as in struct attribute_spec.handler. */
static tree
extern void avr_optimization_options (int level, int size);
extern char *avr_change_section (char *sect_name);
extern int avr_ret_register (void);
-extern enum reg_class class_likely_spilled_p (int c);
+extern bool class_likely_spilled_p (int c);
extern enum reg_class avr_regno_reg_class (int r);
extern enum reg_class avr_reg_class_from_letter (int c);
extern bool avr_frame_pointer_required_p (void);
static tree avr_handle_progmem_attribute (tree *, tree, tree, int, bool *);
static tree avr_handle_fndecl_attribute (tree *, tree, tree, int, bool *);
static tree avr_handle_fntype_attribute (tree *, tree, tree, int, bool *);
-EXPORTED_CONST struct attribute_spec avr_attribute_table[];
static bool avr_assemble_integer (rtx, unsigned int, int);
static void avr_file_start (void);
static void avr_file_end (void);
section *progmem_section;
+/* AVR attributes. */
+static const struct attribute_spec avr_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
+ { "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
+ { "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
+ { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
\f
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
/* return register class from register number. */
-static const int reg_class_tab[]={
+static const enum reg_class reg_class_tab[]={
GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
int
avr_jump_mode (rtx x, rtx insn)
{
- int dest_addr = INSN_ADDRESSES (INSN_UID (GET_MODE (x) == LABEL_REF
+ int dest_addr = INSN_ADDRESSES (INSN_UID (GET_CODE (x) == LABEL_REF
? XEXP (x, 0) : x));
int cur_addr = INSN_ADDRESSES (INSN_UID (insn));
int jump_distance = cur_addr - dest_addr;
{
/* Faster than sbiw if we can clobber the operand. */
if (l) *l = 1;
- return AS2 (or,%A0,%B0);
+ return "or %A0,%B0";
}
if (test_hard_reg_class (ADDW_REGS, op))
{
return (AS1 (swap,%A0) CR_TAB
AS1 (swap,%B0) CR_TAB
AS2 (ldi,%3,0xf0) CR_TAB
- AS2 (and,%B0,%3) CR_TAB
+ "and %B0,%3" CR_TAB
AS2 (eor,%B0,%A0) CR_TAB
- AS2 (and,%A0,%3) CR_TAB
+ "and %A0,%3" CR_TAB
AS2 (eor,%B0,%A0));
}
break; /* optimize_size ? 6 : 8 */
AS1 (swap,%A0) CR_TAB
AS1 (swap,%B0) CR_TAB
AS2 (ldi,%3,0xf0) CR_TAB
- AS2 (and,%B0,%3) CR_TAB
+ "and %B0,%3" CR_TAB
AS2 (eor,%B0,%A0) CR_TAB
- AS2 (and,%A0,%3) CR_TAB
+ "and %A0,%3" CR_TAB
AS2 (eor,%B0,%A0));
}
break; /* 10 */
AS1 (clr,%A0) CR_TAB
AS1 (swap,%B0) CR_TAB
AS2 (ldi,%3,0xf0) CR_TAB
- AS2 (and,%B0,%3));
+ "and %B0,%3");
}
*len = 6;
return (AS2 (mov,%B0,%A0) CR_TAB
AS1 (swap,%B0) CR_TAB
AS1 (lsl,%B0) CR_TAB
AS2 (ldi,%3,0xe0) CR_TAB
- AS2 (and,%B0,%3));
+ "and %B0,%3");
}
if (AVR_HAVE_MUL)
{
return (AS1 (swap,%B0) CR_TAB
AS1 (swap,%A0) CR_TAB
AS2 (ldi,%3,0x0f) CR_TAB
- AS2 (and,%A0,%3) CR_TAB
+ "and %A0,%3" CR_TAB
AS2 (eor,%A0,%B0) CR_TAB
- AS2 (and,%B0,%3) CR_TAB
+ "and %B0,%3" CR_TAB
AS2 (eor,%A0,%B0));
}
break; /* optimize_size ? 6 : 8 */
AS1 (swap,%B0) CR_TAB
AS1 (swap,%A0) CR_TAB
AS2 (ldi,%3,0x0f) CR_TAB
- AS2 (and,%A0,%3) CR_TAB
+ "and %A0,%3" CR_TAB
AS2 (eor,%A0,%B0) CR_TAB
- AS2 (and,%B0,%3) CR_TAB
+ "and %B0,%3" CR_TAB
AS2 (eor,%A0,%B0));
}
break; /* 10 */
AS1 (clr,%B0) CR_TAB
AS1 (swap,%A0) CR_TAB
AS2 (ldi,%3,0x0f) CR_TAB
- AS2 (and,%A0,%3));
+ "and %A0,%3");
}
*len = 6;
return (AS2 (mov,%A0,%B0) CR_TAB
AS1 (swap,%A0) CR_TAB
AS1 (lsr,%A0) CR_TAB
AS2 (ldi,%3,0x07) CR_TAB
- AS2 (and,%A0,%3));
+ "and %A0,%3");
}
if (AVR_HAVE_MUL)
{
assigned to registers of class CLASS would likely be spilled
because registers of CLASS are needed for spill registers. */
-enum reg_class
+bool
class_likely_spilled_p (int c)
{
return (c != ALL_REGS && c != ADDW_REGS);
Only `progmem' attribute valid for type. */
-const struct attribute_spec avr_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
- { "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
- { "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
- { "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
- { "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
- { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Handle a "progmem" attribute; arguments as in
struct attribute_spec.handler. */
static tree
case, *TOTAL contains the cost result. */
static bool
-avr_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int *total,
+avr_rtx_costs (rtx x, int codearg, int outer_code ATTRIBUTE_UNUSED, int *total,
bool speed)
{
+ enum rtx_code code = (enum rtx_code) codearg;
enum machine_mode mode = GET_MODE (x);
HOST_WIDE_INT val;
;; -*- Mode: Scheme -*-
;; Machine description for GNU compiler,
;; for ATMEL AVR micro controllers.
-;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008
-;; Free Software Foundation, Inc.
+;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008,
+;; 2009 Free Software Foundation, Inc.
;; Contributed by Denis Chertykov (chertykov@gmail.com)
;; This file is part of GCC.
label);
/* Set jump probability based on loop count. */
jump = get_last_insn ();
- REG_NOTES (jump) = gen_rtx_EXPR_LIST (REG_BR_PROB,
- GEN_INT (prob),
- REG_NOTES (jump));
+ add_reg_note (jump, REG_BR_PROB, GEN_INT (prob));
DONE;
}")
(match_operand:HI 2 "nonmemory_operand" "r,i,M")))
(clobber (match_scratch:QI 3 "=X,X,&d"))]
""
- "*{
+{
if (which_alternative==0)
- return (AS2 (and,%A0,%A2) CR_TAB
- AS2 (and,%B0,%B2));
+ return ("and %A0,%A2" CR_TAB
+ "and %B0,%B2");
else if (which_alternative==1)
{
if (GET_CODE (operands[2]) == CONST_INT)
output_asm_insn (AS2 (andi,%A0,lo8(%2)), operands);
if ((mask & 0xff00) != 0xff00)
output_asm_insn (AS2 (andi,%B0,hi8(%2)), operands);
- return \"\";
+ return "";
}
return (AS2 (andi,%A0,lo8(%2)) CR_TAB
AS2 (andi,%B0,hi8(%2)));
}
return (AS2 (ldi,%3,lo8(%2)) CR_TAB
- AS2 (and,%A0,%3) CR_TAB
+ "and %A0,%3" CR_TAB
AS1 (clr,%B0));
-}"
+}
[(set_attr "length" "2,2,3")
(set_attr "cc" "set_n,clobber,set_n")])
(and:SI (match_operand:SI 1 "register_operand" "%0,0")
(match_operand:SI 2 "nonmemory_operand" "r,i")))]
""
- "*{
+{
if (which_alternative==0)
- return (AS2 (and, %0,%2) CR_TAB
- AS2 (and, %B0,%B2) CR_TAB
- AS2 (and, %C0,%C2) CR_TAB
- AS2 (and, %D0,%D2));
+ return ("and %0,%2" CR_TAB
+ "and %B0,%B2" CR_TAB
+ "and %C0,%C2" CR_TAB
+ "and %D0,%D2");
else if (which_alternative==1)
{
if (GET_CODE (operands[2]) == CONST_INT)
output_asm_insn (AS2 (andi,%C0,hlo8(%2)), operands);
if ((mask & 0xff000000L) != 0xff000000L)
output_asm_insn (AS2 (andi,%D0,hhi8(%2)), operands);
- return \"\";
+ return "";
}
return (AS2 (andi, %A0,lo8(%2)) CR_TAB
AS2 (andi, %B0,hi8(%2)) CR_TAB
AS2 (andi, %C0,hlo8(%2)) CR_TAB
AS2 (andi, %D0,hhi8(%2)));
}
- return \"bug\";
-}"
+ return "bug";
+}
[(set_attr "length" "4,4")
(set_attr "cc" "set_n,clobber")])
(ior:HI (match_operand:HI 1 "register_operand" "%0,0")
(match_operand:HI 2 "nonmemory_operand" "r,i")))]
""
- "*{
+{
if (which_alternative==0)
- return (AS2 (or,%A0,%A2) CR_TAB
- AS2 (or,%B0,%B2));
+ return ("or %A0,%A2" CR_TAB
+ "or %B0,%B2");
if (GET_CODE (operands[2]) == CONST_INT)
{
int mask = INTVAL (operands[2]);
output_asm_insn (AS2 (ori,%A0,lo8(%2)), operands);
if (mask & 0xff00)
output_asm_insn (AS2 (ori,%B0,hi8(%2)), operands);
- return \"\";
+ return "";
}
return (AS2 (ori,%0,lo8(%2)) CR_TAB
AS2 (ori,%B0,hi8(%2)));
-}"
+}
[(set_attr "length" "2,2")
(set_attr "cc" "set_n,clobber")])
(ior:SI (match_operand:SI 1 "register_operand" "%0,0")
(match_operand:SI 2 "nonmemory_operand" "r,i")))]
""
- "*{
+{
if (which_alternative==0)
- return (AS2 (or, %0,%2) CR_TAB
- AS2 (or, %B0,%B2) CR_TAB
- AS2 (or, %C0,%C2) CR_TAB
- AS2 (or, %D0,%D2));
+ return ("or %0,%2" CR_TAB
+ "or %B0,%B2" CR_TAB
+ "or %C0,%C2" CR_TAB
+ "or %D0,%D2");
if (GET_CODE (operands[2]) == CONST_INT)
{
HOST_WIDE_INT mask = INTVAL (operands[2]);
output_asm_insn (AS2 (ori,%C0,hlo8(%2)), operands);
if (mask & 0xff000000L)
output_asm_insn (AS2 (ori,%D0,hhi8(%2)), operands);
- return \"\";
+ return "";
}
return (AS2 (ori, %A0,lo8(%2)) CR_TAB
AS2 (ori, %B0,hi8(%2)) CR_TAB
AS2 (ori, %C0,hlo8(%2)) CR_TAB
AS2 (ori, %D0,hhi8(%2)));
-}"
+}
[(set_attr "length" "4,4")
(set_attr "cc" "set_n,clobber")])
#include "optabs.h"
#include "toplev.h"
#include "basic-block.h"
+#include "df.h"
#include "target.h"
#include "target-def.h"
static enum machine_mode output_memory_reference_mode;
/*****************************************************************************/
-/* GLOBAL VARIABLES */
-/*****************************************************************************/
-
-/* Table of machine attributes. */
-EXPORTED_CONST struct attribute_spec crx_attribute_table[];
-
-/*****************************************************************************/
/* TARGETM FUNCTION PROTOTYPES */
/*****************************************************************************/
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE crx_attribute_table
-const struct attribute_spec crx_attribute_table[] = {
+static const struct attribute_spec crx_attribute_table[] = {
/* ISRs have special prologue and epilogue requirements. */
{"interrupt", 0, 0, false, true, true, NULL},
{NULL, 0, 0, false, false, false, NULL}
/* Prototypes for m32r.c functions used in the md file & elsewhere.
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009
Free Software Foundation, Inc.
This file is part of GCC.
extern void m32r_expand_epilogue (void);
extern int direct_return (void);
extern void m32r_load_pic_register (void);
-
-#ifdef TREE_CODE
extern enum m32r_function_type m32r_compute_function_type (tree);
-#endif /* TREE_CODE */
#ifdef RTX_CODE
extern int easy_di_const (rtx);
#include "toplev.h"
#include "ggc.h"
#include "integrate.h"
+#include "df.h"
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
static void init_reg_tables (void);
static void block_move_call (rtx, rtx, rtx);
static int m32r_is_insn (rtx);
-EXPORTED_CONST struct attribute_spec m32r_attribute_table[];
static rtx m32r_legitimize_address (rtx, rtx, enum machine_mode);
static tree m32r_handle_model_attribute (tree *, tree, tree, int, bool *);
static void m32r_output_function_prologue (FILE *, HOST_WIDE_INT);
static int m32r_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
tree, bool);
\f
+/* M32R specific attributes. */
+
+static const struct attribute_spec m32r_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "interrupt", 0, 0, true, false, false, NULL },
+ { "model", 1, 1, true, false, false, m32r_handle_model_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
+\f
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE m32r_attribute_table
}
}
-const struct attribute_spec m32r_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "interrupt", 0, 0, true, false, false, NULL },
- { "model", 1, 1, true, false, false, m32r_handle_model_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
-
/* Handle an "model" attribute; arguments as in
struct attribute_spec.handler. */
static tree
x = emit_insn (gen_movsi_pop (gen_rtx_REG (Pmode, regno),
stack_pointer_rtx));
- REG_NOTES (x)
- = gen_rtx_EXPR_LIST (REG_INC, stack_pointer_rtx, 0);
+ add_reg_note (x, REG_INC, stack_pointer_rtx);
}
/* Expand the m32r epilogue as a series of insns. */
&& GET_MODE (bytes_rtx) != Pmode)
bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1);
- emit_library_call (m32r_function_symbol ("memcpy"), 0,
+ emit_library_call (m32r_function_symbol ("memcpy"), LCT_NORMAL,
VOIDmode, 3, dest_reg, Pmode, src_reg, Pmode,
convert_to_mode (TYPE_MODE (sizetype), bytes_rtx,
TYPE_UNSIGNED (sizetype)),
/* Definitions of target machine for GNU compiler, Renesas M32R cpu.
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
- 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+ 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
This file is part of GCC.
gen_int_mode (m32r_cache_flush_trap, SImode))); \
else if (m32r_cache_flush_func && m32r_cache_flush_func[0]) \
emit_library_call (m32r_function_symbol (m32r_cache_flush_func), \
- 0, VOIDmode, 3, TRAMP, Pmode, \
+ LCT_NORMAL, VOIDmode, 3, TRAMP, Pmode, \
gen_int_mode (TRAMPOLINE_SIZE, SImode), SImode, \
GEN_INT (3), SImode); \
} \
;; Machine description of the Renesas M32R cpu for GNU C compiler
;; Copyright (C) 1996, 1997, 1998, 1999, 2001, 2003, 2004, 2005,
-; 2007, 2008 Free Software Foundation, Inc.
+; 2007, 2008, 2009 Free Software Foundation, Inc.
;; This file is part of GCC.
{
switch (GET_CODE (operands[1]))
{
- HOST_WIDE_INT value;
-
default:
break;
/* Prototypes for exported functions defined in m68hc11.c
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009
Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
extern int reg_or_indexed_operand (rtx,enum machine_mode);
extern int memory_indexed_operand (rtx, enum machine_mode);
-extern void m68hc11_split_logical (enum machine_mode, int, rtx*);
+#ifdef RTX_CODE
+extern void m68hc11_split_logical (enum machine_mode, enum rtx_code, rtx*);
+#endif
extern int m68hc11_register_indirect_p (rtx, enum machine_mode);
extern int m68hc11_valid_addressing_p (rtx, enum machine_mode, int);
extern int arith_src_operand (rtx, enum machine_mode);
extern int soft_reg_operand (rtx, enum machine_mode);
-#if defined TREE_CODE
extern void m68hc11_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx);
extern rtx m68hc11_function_arg (const CUMULATIVE_ARGS* ,
enum machine_mode,
tree, int);
-extern int m68hc11_function_arg_padding (enum machine_mode, const_tree);
+#ifdef ARGS_SIZE_RTX
+extern enum direction m68hc11_function_arg_padding (enum machine_mode,
+ const_tree);
+#endif
extern void m68hc11_function_epilogue (FILE*,int);
extern int m68hc11_is_trap_symbol (rtx);
extern int m68hc11_page0_symbol_p (rtx x);
-#endif /* TREE_CODE */
-
extern HOST_WIDE_INT m68hc11_min_offset;
extern HOST_WIDE_INT m68hc11_max_offset;
extern int m68hc11_addr_mode;
#endif /* HAVE_MACHINE_MODES */
#endif /* RTX_CODE */
-
#include "tm.h"
#include "rtl.h"
#include "tree.h"
+#include "expr.h"
#include "tm_p.h"
#include "regs.h"
#include "hard-reg-set.h"
static void emit_move_after_reload (rtx, rtx, rtx);
static rtx simplify_logical (enum machine_mode, int, rtx, rtx *);
-static void m68hc11_emit_logical (enum machine_mode, int, rtx *);
+static void m68hc11_emit_logical (enum machine_mode, enum rtx_code, rtx *);
static void m68hc11_reorg (void);
static bool m68hc11_legitimate_address_p_1 (enum machine_mode, rtx, bool);
static bool m68hc11_legitimate_address_p (enum machine_mode, rtx, bool);
static int m68hc11_rtx_costs_1 (rtx, enum rtx_code, enum rtx_code);
static bool m68hc11_rtx_costs (rtx, int, int, int *, bool);
static tree m68hc11_handle_fntype_attribute (tree *, tree, tree, int, bool *);
-EXPORTED_CONST struct attribute_spec m68hc11_attribute_table[];
+static tree m68hc11_handle_page0_attribute (tree *, tree, tree, int, bool *);
void create_regs_rtx (void);
COSTS_N_INSNS (100)
};
\f
+/* M68HC11 specific attributes. */
+
+static const struct attribute_spec m68hc11_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "interrupt", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
+ { "trap", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
+ { "far", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
+ { "near", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
+ { "page0", 0, 0, false, false, false, m68hc11_handle_page0_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
+\f
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE m68hc11_attribute_table
&& reg_equiv_memory_loc[REGNO (operand)])
{
operand = reg_equiv_memory_loc[REGNO (operand)];
- operand = eliminate_regs (operand, 0, NULL_RTX);
+ operand = eliminate_regs (operand, VOIDmode, NULL_RTX);
}
if (GET_CODE (operand) != MEM)
&& reg_equiv_memory_loc[REGNO (operand)])
{
operand = reg_equiv_memory_loc[REGNO (operand)];
- operand = eliminate_regs (operand, 0, NULL_RTX);
+ operand = eliminate_regs (operand, VOIDmode, NULL_RTX);
}
if (GET_CODE (operand) != MEM)
return 0;
return NULL_TREE;
}
-const struct attribute_spec m68hc11_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "interrupt", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
- { "trap", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
- { "far", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
- { "near", 0, 0, false, true, true, m68hc11_handle_fntype_attribute },
- { "page0", 0, 0, false, false, false, m68hc11_handle_page0_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Keep track of the symbol which has a `trap' attribute and which uses
the `swi' calling convention. Since there is only one trap, we only
record one such symbol. If there are several, a warning is reported. */
`downward' to pad below, or `none' to inhibit padding.
Structures are stored left shifted in their argument slot. */
-int
+enum direction
m68hc11_function_arg_padding (enum machine_mode mode, const_tree type)
{
if (type != 0 && AGGREGATE_TYPE_P (type))
/* Put a REG_INC note to tell the flow analysis that the instruction
is necessary. */
if (IS_STACK_PUSH (to))
- {
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
- XEXP (XEXP (to, 0), 0),
- REG_NOTES (insn));
- }
+ add_reg_note (insn, REG_INC, XEXP (XEXP (to, 0), 0));
else if (IS_STACK_POP (from))
- {
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
- XEXP (XEXP (from, 0), 0),
- REG_NOTES (insn));
- }
+ add_reg_note (insn, REG_INC, XEXP (XEXP (from, 0), 0));
/* For 68HC11, put a REG_INC note on `sts _.frame' to prevent the cse-reg
to think that sp == _.frame and later replace a x = sp with x = _.frame.
The problem is that we are lying to gcc and use `txs' for x = sp
(which is not really true because txs is really x = sp + 1). */
else if (TARGET_M6811 && SP_REG_P (from))
- {
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
- from,
- REG_NOTES (insn));
- }
+ add_reg_note (insn, REG_INC, from);
}
int
}
static void
-m68hc11_emit_logical (enum machine_mode mode, int code, rtx *operands)
+m68hc11_emit_logical (enum machine_mode mode, enum rtx_code code, rtx *operands)
{
rtx result;
int need_copy;
}
void
-m68hc11_split_logical (enum machine_mode mode, int code, rtx *operands)
+m68hc11_split_logical (enum machine_mode mode, enum rtx_code code,
+ rtx *operands)
{
rtx low[4];
rtx high[4];
}
static bool
-m68hc11_rtx_costs (rtx x, int code, int outer_code, int *total,
+m68hc11_rtx_costs (rtx x, int codearg, int outer_code_arg, int *total,
bool speed ATTRIBUTE_UNUSED)
{
+ enum rtx_code code = (enum rtx_code) codearg;
+ enum rtx_code outer_code = (enum rtx_code) outer_code_arg;
+
switch (code)
{
/* Constants are cheap. Moving them in registers must be avoided
;; Predicate definitions for Motorola 68HC11 and 68HC12.
-;; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+;; Copyright (C) 2005, 2007, 2009 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
&& reg_equiv_memory_loc[REGNO (op)])
{
op = reg_equiv_memory_loc[REGNO (op)];
- op = eliminate_regs (op, 0, NULL_RTX);
+ op = eliminate_regs (op, VOIDmode, NULL_RTX);
}
if (GET_CODE (op) != MEM)
return 0;
/* Provides the class number of the smallest class containing
reg number. */
-const int regno_reg_class[FIRST_PSEUDO_REGISTER] =
+const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER] =
{
GENERAL_REGS, ONLYR1_REGS, LRW_REGS, LRW_REGS,
LRW_REGS, LRW_REGS, LRW_REGS, LRW_REGS,
static void mcore_mark_dllimport (tree);
static int mcore_dllexport_p (tree);
static int mcore_dllimport_p (tree);
-EXPORTED_CONST struct attribute_spec mcore_attribute_table[];
static tree mcore_handle_naked_attribute (tree *, tree, tree, int, bool *);
#ifdef OBJECT_FORMAT_ELF
static void mcore_asm_named_section (const char *,
tree, bool);
\f
+/* MCore specific attributes. */
+
+static const struct attribute_spec mcore_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "dllexport", 0, 0, true, false, false, NULL },
+ { "dllimport", 0, 0, true, false, false, NULL },
+ { "naked", 0, 0, true, false, false, mcore_handle_naked_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
+\f
/* Initialize the GCC target structure. */
#undef TARGET_ASM_EXTERNAL_LIBCALL
#define TARGET_ASM_EXTERNAL_LIBCALL mcore_external_libcall
switch (code)
{
case CONST_INT:
- *total = mcore_const_costs (x, outer_code);
+ *total = mcore_const_costs (x, (enum rtx_code) outer_code);
return true;
case CONST:
case LABEL_REF:
dllimport - for importing a function/variable from a dll
naked - do not create a function prologue/epilogue. */
-const struct attribute_spec mcore_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "dllexport", 0, 0, true, false, false, NULL },
- { "dllimport", 0, 0, true, false, false, NULL },
- { "naked", 0, 0, true, false, false, mcore_handle_naked_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Handle a "naked" attribute; arguments as in
struct attribute_spec.handler. */
/* Definitions of target machine for GNU compiler,
for Motorola M*CORE Processor.
Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
- 2008 Free Software Foundation, Inc.
+ 2008, 2009 Free Software Foundation, Inc.
This file is part of GCC.
reg number REGNO. This could be a conditional expression
or could index an array. */
-extern const int regno_reg_class[FIRST_PSEUDO_REGISTER];
+extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
/* When defined, the compiler allows registers explicitly used in the
{ \
if (GET_MODE_SIZE (MODE) >= 4 \
&& (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \
- && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \
+ && ((unsigned HOST_WIDE_INT) INTVAL (OP)) \
+ <= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE)) \
goto LABEL; \
if (GET_MODE_SIZE (MODE) == 2 \
&& (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \
(define_predicate "trapping_target_operand"
(match_code "if_then_else")
{
- rtx cond, mem, res, tar, and;
+ rtx cond, mem, res, tar, and_expr;
if (GET_MODE (op) != PDImode)
return 0;
return 0;
if (GET_CODE (cond) != EQ)
return 0;
- and = XEXP (cond, 0);
- return (GET_CODE (and) == AND
- && rtx_equal_p (XEXP (and, 0), tar)
- && CONST_INT_P (XEXP (and, 1))
+ and_expr = XEXP (cond, 0);
+ return (GET_CODE (and_expr) == AND
+ && rtx_equal_p (XEXP (and_expr, 0), tar)
+ && CONST_INT_P (XEXP (and_expr, 1))
&& CONST_INT_P (XEXP (cond, 1))
- && INTVAL (XEXP (and, 1)) == 3
+ && INTVAL (XEXP (and_expr, 1)) == 3
&& INTVAL (XEXP (cond, 1)) == 3);
})
static int calc_live_regs (HARD_REG_SET *);
static HOST_WIDE_INT rounded_frame_size (int);
static rtx mark_constant_pool_use (rtx);
-EXPORTED_CONST struct attribute_spec sh_attribute_table[];
static tree sh_handle_interrupt_handler_attribute (tree *, tree, tree, int, bool *);
static tree sh_handle_resbank_handler_attribute (tree *, tree,
tree, int, bool *);
static int sh_dwarf_calling_convention (const_tree);
static void sh_encode_section_info (tree, rtx, int);
static int sh2a_function_vector_p (tree);
+\f
+static const struct attribute_spec sh_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "interrupt_handler", 0, 0, true, false, false, sh_handle_interrupt_handler_attribute },
+ { "sp_switch", 1, 1, true, false, false, sh_handle_sp_switch_attribute },
+ { "trap_exit", 1, 1, true, false, false, sh_handle_trap_exit_attribute },
+ { "renesas", 0, 0, false, true, false, sh_handle_renesas_attribute },
+ { "trapa_handler", 0, 0, true, false, false, sh_handle_interrupt_handler_attribute },
+ { "nosave_low_regs", 0, 0, true, false, false, sh_handle_interrupt_handler_attribute },
+ { "resbank", 0, 0, true, false, false, sh_handle_resbank_handler_attribute },
+ { "function_vector", 1, 1, true, false, false, sh2a_handle_function_vector_handler_attribute },
+#ifdef SYMBIAN
+ /* Symbian support adds three new attributes:
+ dllexport - for exporting a function/variable that will live in a dll
+ dllimport - for importing a function/variable from a dll
+ Microsoft allows multiple declspecs in one __declspec, separating
+ them with spaces. We do NOT support this. Instead, use __declspec
+ multiple times. */
+ { "dllimport", 0, 0, true, false, false, sh_symbian_handle_dll_attribute },
+ { "dllexport", 0, 0, true, false, false, sh_symbian_handle_dll_attribute },
+#endif
+ { NULL, 0, 0, false, false, false, NULL }
+};
\f
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
R0-R14, MACH, MACL, GBR and PR. This is useful only on SH2A targets.
*/
-const struct attribute_spec sh_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "interrupt_handler", 0, 0, true, false, false, sh_handle_interrupt_handler_attribute },
- { "sp_switch", 1, 1, true, false, false, sh_handle_sp_switch_attribute },
- { "trap_exit", 1, 1, true, false, false, sh_handle_trap_exit_attribute },
- { "renesas", 0, 0, false, true, false, sh_handle_renesas_attribute },
- { "trapa_handler", 0, 0, true, false, false, sh_handle_interrupt_handler_attribute },
- { "nosave_low_regs", 0, 0, true, false, false, sh_handle_interrupt_handler_attribute },
- { "resbank", 0, 0, true, false, false, sh_handle_resbank_handler_attribute },
- { "function_vector", 1, 1, true, false, false, sh2a_handle_function_vector_handler_attribute },
-#ifdef SYMBIAN
- /* Symbian support adds three new attributes:
- dllexport - for exporting a function/variable that will live in a dll
- dllimport - for importing a function/variable from a dll
-
- Microsoft allows multiple declspecs in one __declspec, separating
- them with spaces. We do NOT support this. Instead, use __declspec
- multiple times. */
- { "dllimport", 0, 0, true, false, false, sh_symbian_handle_dll_attribute },
- { "dllexport", 0, 0, true, false, false, sh_symbian_handle_dll_attribute },
-#endif
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Handle a 'resbank' attribute. */
static tree
sh_handle_resbank_handler_attribute (tree * node, tree name,
#ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING
static const char *sparc_mangle_type (const_tree);
#endif
+\f
#ifdef SUBTARGET_ATTRIBUTE_TABLE
-EXPORTED_CONST struct attribute_spec sparc_attribute_table[];
+/* Table of valid machine attributes. */
+static const struct attribute_spec sparc_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ SUBTARGET_ATTRIBUTE_TABLE,
+ { NULL, 0, 0, false, false, false, NULL }
+};
#endif
\f
/* Option handling. */
? 64 : 32));
}
\f
-#ifdef SUBTARGET_ATTRIBUTE_TABLE
-/* Table of valid machine attributes. */
-const struct attribute_spec sparc_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- SUBTARGET_ATTRIBUTE_TABLE,
- { NULL, 0, 0, false, false, false, NULL }
-};
-#endif
-\f
/* Miscellaneous utilities. */
/* Nonzero if CODE, a comparison, is suitable for use in v9 conditional move
static enum machine_mode
spu_libgcc_shift_count_mode (void);
-
+\f
+/* Table of machine attributes. */
+static const struct attribute_spec spu_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "naked", 0, 0, true, false, false, spu_handle_fndecl_attribute },
+ { "spu_vector", 0, 0, false, true, false, spu_handle_vector_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
\f
/* TARGET overrides. */
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST spu_sched_adjust_cost
-EXPORTED_CONST struct attribute_spec spu_attribute_table[];
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE spu_attribute_table
/* Handle an attribute requiring a FUNCTION_DECL; arguments as in
struct attribute_spec.handler. */
-/* Table of machine attributes. */
-const struct attribute_spec spu_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "naked", 0, 0, true, false, false, spu_handle_fndecl_attribute },
- { "spu_vector", 0, 0, false, true, false, spu_handle_vector_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* True if MODE is valid for the target. By "valid", we mean able to
be manipulated in non-trivial ways. In particular, this means all
the arithmetic is supported. */
/* v850 specific, C compiler specific functions.
- Copyright (C) 2000, 2007, 2009 Free Software Foundation, Inc.
+ Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2009
+ Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GCC.
void
ghs_pragma_section (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
- int repeat;
+ int repeat = 0;
/* #pragma ghs section [name = alias [, name = alias [, ...]]] */
do
static void v850_reorg (void);
static int ep_memory_offset (enum machine_mode, int);
static void v850_set_data_area (tree, v850_data_area);
-EXPORTED_CONST struct attribute_spec v850_attribute_table[];
static tree v850_handle_interrupt_attribute (tree *, tree, tree, int, bool *);
static tree v850_handle_data_area_attribute (tree *, tree, tree, int, bool *);
static void v850_insert_attributes (tree, tree *);
static GTY(()) section *zdata_section;
static GTY(()) section *zbss_section;
\f
+/* V850 specific attributes. */
+
+static const struct attribute_spec v850_attribute_table[] =
+{
+ /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+ { "interrupt_handler", 0, 0, true, false, false, v850_handle_interrupt_attribute },
+ { "interrupt", 0, 0, true, false, false, v850_handle_interrupt_attribute },
+ { "sda", 0, 0, true, false, false, v850_handle_data_area_attribute },
+ { "tda", 0, 0, true, false, false, v850_handle_data_area_attribute },
+ { "zda", 0, 0, true, false, false, v850_handle_data_area_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+};
+
+\f
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
static bool
v850_rtx_costs (rtx x,
- int code,
+ int codearg,
int outer_code ATTRIBUTE_UNUSED,
int * total, bool speed)
{
+ enum rtx_code code = (enum rtx_code) codearg;
+
switch (code)
{
case CONST_INT:
init_stack_free = (signed) actual_fsize;
/* Deallocate the rest of the stack if it is > 32K. */
- if (actual_fsize > init_stack_free)
+ if ((unsigned int) actual_fsize > init_stack_free)
{
int diff;
(name, NULL, DECL_ATTRIBUTES (decl));
}
\f
-const struct attribute_spec v850_attribute_table[] =
-{
- /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
- { "interrupt_handler", 0, 0, true, false, false, v850_handle_interrupt_attribute },
- { "interrupt", 0, 0, true, false, false, v850_handle_interrupt_attribute },
- { "sda", 0, 0, true, false, false, v850_handle_data_area_attribute },
- { "tda", 0, 0, true, false, false, v850_handle_data_area_attribute },
- { "zda", 0, 0, true, false, false, v850_handle_data_area_attribute },
- { NULL, 0, 0, false, false, false, NULL }
-};
-
/* Handle an "interrupt" attribute; arguments as in
struct attribute_spec.handler. */
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