* config/mcore/mcore.h (IRA_COVER_CLASSES): Define.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@139721 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d5236ed..d436e8c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,7 @@
 2008-08-28  Nick Clifton  <nickc@redhat.com>
 
+       * config/mcore/mcore.h (IRA_COVER_CLASSES): Define.
+
        * config/iq2000/iq2000.h (IRA_COVER_CLASSES): Define.
 
        * config/fr30/fr30.h (IRA_COVER_CLASSES): Define.

diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h
index 7ea9ac4..6e26d5e 100644 (file)
--- a/gcc/config/mcore/mcore.h
+++ b/gcc/config/mcore/mcore.h
@@ -1,7 +1,7 @@
 /* Definitions of target machine for GNU compiler,
    for Motorola M*CORE Processor.
-   Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
-   Free Software Foundation, Inc.
+   Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
+   2008  Free Software Foundation, Inc.
 
    This file is part of GCC.
 
@@ -379,6 +379,12 @@ enum reg_class
 
 #define N_REG_CLASSES  (int) LIM_REG_CLASSES
 
+#define IRA_COVER_CLASSES              \
+{                                      \
+  GENERAL_REGS, C_REGS, LIM_REG_CLASSES        \
+}
+
+
 /* Give names of register classes as strings for dump file.  */
 #define REG_CLASS_NAMES  \
 {                      \