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Switch the license of all files explicitly copyright the FSF
authorbrobecke <brobecke>
Fri, 24 Aug 2007 14:28:36 +0000 (14:28 +0000)
committerbrobecke <brobecke>
Fri, 24 Aug 2007 14:28:36 +0000 (14:28 +0000)
commitf5a632cc7ddac201ef908fce320ad2c832b80218
tree2b9fdc8e69fa62f06e300bd33073af547247187a
parent4cb98af0e89916d5527051073ad458004c158318
    Switch the license of all files explicitly copyright the FSF
        to GPLv3.
146 files changed:
sim/ChangeLog
sim/Makefile.in
sim/m32c/Makefile.in
sim/m32c/configure.in
sim/m32c/cpu.h
sim/m32c/gdb-if.c
sim/m32c/int.c
sim/m32c/int.h
sim/m32c/load.c
sim/m32c/load.h
sim/m32c/m32c.opc
sim/m32c/main.c
sim/m32c/mem.c
sim/m32c/mem.h
sim/m32c/misc.c
sim/m32c/misc.h
sim/m32c/opc2c.c
sim/m32c/r8c.opc
sim/m32c/reg.c
sim/m32c/safe-fgets.c
sim/m32c/safe-fgets.h
sim/m32c/sample.ld
sim/m32c/sample2.c
sim/m32c/srcdest.c
sim/m32c/syscalls.c
sim/m32c/syscalls.h
sim/m32c/trace.c
sim/m32c/trace.h
sim/m32r/Makefile.in
sim/m32r/arch.c
sim/m32r/arch.h
sim/m32r/cpu.c
sim/m32r/cpu.h
sim/m32r/cpu2.c
sim/m32r/cpu2.h
sim/m32r/cpuall.h
sim/m32r/cpux.c
sim/m32r/cpux.h
sim/m32r/decode.c
sim/m32r/decode.h
sim/m32r/decode2.c
sim/m32r/decode2.h
sim/m32r/decodex.c
sim/m32r/decodex.h
sim/m32r/devices.c
sim/m32r/m32r-sim.h
sim/m32r/m32r.c
sim/m32r/m32r2.c
sim/m32r/m32rx.c
sim/m32r/mloop.in
sim/m32r/mloop2.in
sim/m32r/mloopx.in
sim/m32r/model.c
sim/m32r/model2.c
sim/m32r/modelx.c
sim/m32r/sem-switch.c
sim/m32r/sem.c
sim/m32r/sem2-switch.c
sim/m32r/semx-switch.c
sim/m32r/sim-if.c
sim/m32r/traps-linux.c
sim/m32r/traps.c
sim/m68hc11/Makefile.in
sim/m68hc11/dv-m68hc11.c
sim/m68hc11/dv-m68hc11eepr.c
sim/m68hc11/dv-m68hc11sio.c
sim/m68hc11/dv-m68hc11spi.c
sim/m68hc11/dv-m68hc11tim.c
sim/m68hc11/dv-nvram.c
sim/m68hc11/emulos.c
sim/m68hc11/gencode.c
sim/m68hc11/interp.c
sim/m68hc11/interrupts.c
sim/m68hc11/interrupts.h
sim/m68hc11/m68hc11_sim.c
sim/m68hc11/sim-main.h
sim/mcore/Makefile.in
sim/mcore/interp.c
sim/mcore/sysdep.h
sim/mips/cp1.c
sim/mips/cp1.h
sim/mips/dsp.c
sim/mips/dsp.igen
sim/mips/dsp2.igen
sim/mips/dv-tx3904cpu.c
sim/mips/dv-tx3904irc.c
sim/mips/dv-tx3904sio.c
sim/mips/dv-tx3904tmr.c
sim/mips/m16e.igen
sim/mips/mdmx.c
sim/mips/mdmx.igen
sim/mips/mips3264r2.igen
sim/mips/mips3d.igen
sim/mips/sb1.igen
sim/mips/sim-main.h
sim/mips/smartmips.igen
sim/mn10300/Makefile.in
sim/mn10300/dv-mn103cpu.c
sim/mn10300/dv-mn103int.c
sim/mn10300/dv-mn103iop.c
sim/mn10300/dv-mn103ser.c
sim/mn10300/dv-mn103tim.c
sim/mn10300/sim-main.h
sim/ppc/altivec.igen
sim/ppc/altivec_expression.h
sim/ppc/altivec_registers.h
sim/ppc/dp-bit.c
sim/ppc/e500.igen
sim/ppc/e500_expression.h
sim/ppc/e500_registers.h
sim/ppc/gdb-sim.c
sim/sh/Makefile.in
sim/sh64/Makefile.in
sim/sh64/arch.c
sim/sh64/arch.h
sim/sh64/cpu.c
sim/sh64/cpu.h
sim/sh64/cpuall.h
sim/sh64/decode-compact.c
sim/sh64/decode-compact.h
sim/sh64/decode-media.c
sim/sh64/decode-media.h
sim/sh64/defs-compact.h
sim/sh64/defs-media.h
sim/sh64/eng.h
sim/sh64/sem-compact-switch.c
sim/sh64/sem-compact.c
sim/sh64/sem-media-switch.c
sim/sh64/sem-media.c
sim/sh64/sh-desc.c
sim/sh64/sh-desc.h
sim/sh64/sh-opc.h
sim/sh64/sh64-sim.h
sim/sh64/sh64.c
sim/sh64/sim-if.c
sim/testsuite/Makefile.in
sim/testsuite/common/bits-gen.c
sim/testsuite/d10v-elf/Makefile.in
sim/testsuite/frv-elf/Makefile.in
sim/testsuite/m32r-elf/Makefile.in
sim/testsuite/mips64el-elf/Makefile.in
sim/testsuite/sim/cris/asm/asm.exp
sim/testsuite/sim/cris/c/c.exp
sim/testsuite/sim/cris/hw/rv-n-cris/rvc.exp
sim/testsuite/sim/mips/mips32-dsp.s
sim/v850/Makefile.in