+2010-07-08 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/44861
+ * g++.dg/vect/pr44861.cc: New testcase.
+
+2010-07-07 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR middle-end/44828
+ * gcc.c-torture/execute/pr44828.x: New file.
+
+2010-07-07 Peter Bergner <bergner@vnet.ibm.com>
+
+ * g++.dg/ext/altivec-2.C: Add -Wno-unused-but-set-variable to
+ dg-options.
+ * g++.dg/ext/altivec-17.C: Adjust error message.
+
+2010-07-07 Tom Tromey <tromey@redhat.com>
+
+ * g++.dg/debug/dwarf2/pubnames-1.C: Make darwin-specific.
+
+2010-07-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/44844
+ * gcc.target/i386/rdrand-1.c: Scan "jnc".
+ * gcc.target/i386/rdrand-2.c: Likewise.
+ * gcc.target/i386/rdrand-3.c: Likewise.
+
+2010-07-07 Jan Hubicka <jh@suse.cz>
+
+ PR middle-end/44813
+ * g++.dg/torture/pr44813.C: New testcase.
+ * g++.dg/torture/pr44826.C: New testcase.
+
+2010-07-07 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR rtl-optimization/44787
+ * gcc.c-torture/compile/pr44788.c: New test.
+ * gcc.target/arm/pr44788.c: New test.
+
+2010-07-06 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gcc.target/powerpc/altivec-volatile.c: Adjust expected warning.
+
+2010-07-06 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gcc.target/powerpc/ppu-intrinsics.c: Add -Wno-unused-but-set-variable
+ to dg-options.
+
+2010-07-06 Tobias Burnus <burnus@net-b.de>
+
+ PR fortran/44742
+ * gfortran.dg/parameter_array_init_6.f90: New.
+ * gfortran.dg/initialization_20.f90: Update dg-error.
+ * gfortran.dg/initialization_24.f90: Ditto.
+
+2010-07-06 Thomas Koenig <tkoenig@gcc.gnu.org>
+ PR fortran/PR44693
+ * gfortran.dg/dim_range_1.f90: New test.
+ * gfortran.dg/minmaxloc_4.f90: Remove invalid test.
+
+2010-07-06 Jason Merrill <jason@redhat.com>
+
+ PR c++/44703
+ * g++.dg/cpp0x/initlist41.C: New.
+
+ PR c++/44778
+ * g++.dg/template/ptrmem22.C: New.
+
+2010-07-06 Kai Tietz <kai.tietz@onevision.com>
+
+ * gcc.target/i386/ms_hook_prologue.c: Add x64 ms_hook_prologue
+ support.
+ * gcc.target/i386/i386.exp: Likewise.
+
+2010-07-06 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR testsuite/44195
+ * gcc.dg/lto/20100518_0.c: Limit to x86.
+
+2010-07-06 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/44828
+ * gcc.c-torture/execute/pr44828.c: New testcase.
+
+2010-07-06 Shujing Zhao <pearly.zhao@oracle.com>
+
+ * g++.dg/warn/noeffect2.C: Adjust expected warning.
+ * g++.dg/warn/volatile1.C: Likewise.
+ * g++.dg/template/warn1.C: Likewise.
+
+2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (June, 2010)
+ * g++.dg/other/i386-2.C: Add -mfsgsbase -mrdrnd -mf16c.
+ * g++.dg/other/i386-3.C: Likewise.
+ * gcc.target/i386/sse-12.c: Likewise.
+
+ * gcc.target/i386/f16c-check.h: New.
+ * gcc.target/i386/rdfsbase-1.c: Likewise.
+ * gcc.target/i386/rdfsbase-2.c: Likewise.
+ * gcc.target/i386/rdgsbase-1.c: Likewise.
+ * gcc.target/i386/rdgsbase-2.c: Likewise.
+ * gcc.target/i386/rdrand-1.c: Likewise.
+ * gcc.target/i386/rdrand-2.c: Likewise.
+ * gcc.target/i386/rdrand-3.c: Likewise.
+ * gcc.target/i386/vcvtph2ps-1.c: Likewise.
+ * gcc.target/i386/vcvtph2ps-2.c: Likewise.
+ * gcc.target/i386/vcvtph2ps-3.c: Likewise.
+ * gcc.target/i386/vcvtps2ph-1.c: Likewise.
+ * gcc.target/i386/vcvtps2ph-2.c: Likewise.
+ * gcc.target/i386/vcvtps2ph-3.c: Likewise.
+ * gcc.target/i386/wrfsbase-1.c: Likewise.
+ * gcc.target/i386/wrfsbase-2.c: Likewise.
+ * gcc.target/i386/wrgsbase-1.c: Likewise.
+ * gcc.target/i386/wrgsbase-2.c: Likewise.
+
+ * gcc.target/i386/sse-13.c: Add -mfsgsbase -mrdrnd -mf16c.
+ (__builtin_ia32_vcvtps2ph): New.
+ (__builtin_ia32_vcvtps2ph256): Likewise.
+
+ * gcc.target/i386/sse-14.c: Add -mfsgsbase -mrdrnd -mf16c.
+ Test _cvtss_sh, _mm_cvtps_ph and _mm256_cvtps_ph.
+
+ * gcc.target/i386/sse-22.c: Add fsgsbase,rdrnd,f16c.
+ Test _cvtss_sh, _mm_cvtps_ph and _mm256_cvtps_ph.
+
+ * gcc.target/i386/sse-23.c (__builtin_ia32_vcvtps2ph): New.
+ (__builtin_ia32_vcvtps2ph256): Likewise.
+ Add fsgsbase,rdrnd,f16c.
+
+ * lib/target-supports.exp (check_effective_target_f16c): New.
+
+2010-07-05 Jakub Jelinek <jakub@redhat.com>
+
+ * gcc.dg/guality/nrv-1.c: New test.
+
+2010-07-05 Sandra Loosemore <sandra@codesourcery.com>
+
+ PR middle-end/42505
+ * gcc.target/arm/pr42505.c: New test case.
+
+2010-07-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/44808
+ * g++.dg/opt/nrv16.C: New test.
+
+2010-07-05 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/44784
+ * gcc.c-torture/compile/pr44784.c: New testcase.
+
+2010-07-05 Ira Rosen <irar@il.ibm.com>
+
+ * gcc.dg/vect/costmodel/i386/costmodel-fast-math-vect-pr29925.c:
+ Increase loop bound and array size.
+ * gcc.dg/vect/costmodel/x86_64/costmodel-fast-math-vect-pr29925.c:
+ Likewise.
+
+2010-07-05 Ira Rosen <irar@il.ibm.com>
+
+ * gcc.dg/vect/costmodel/ppc/costmodel-vect-31d.c: Remove.
+ * gcc.dg/vect/costmodel/ppc/costmodel-vect-76a.c: Increase loop bound.
+ * gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c: Likewise.
+ * gcc.dg/vect/costmodel/ppc/costmodel-vect-68d.c: Remove.
+ * gcc.dg/vect/pr35821-altivec.c, gcc.dg/vect/pr35821-spu.c: Likewise.
+
+2010-07-05 Shujing Zhao <pearly.zhao@oracle.com>
+
+ PR c++/22138
+ * g++.dg/parse/template25.C: New.
+
2010-07-04 H.J. Lu <hongjiu.lu@intel.com>
PR rtl-optimization/44695
misaligned stores.
* gcc.dg/vect/vect-60.c, gcc.dg/vect/vect-56.c, gcc.dg/vect/vect-93.c,
gcc.dg/vect/vect-96.c: Likewise.
- * gcc.dg/vect/vect-109.c: Expect vectorization only on targets that
- that support misaligned stores. Change the number of expected
+ * gcc.dg/vect/vect-109.c: Expect vectorization only on targets that
+ that support misaligned stores. Change the number of expected
misaligned accesses.
* gcc.dg/vect/vect-peel-1.c: New test.
- * gcc.dg/vect/vect-peel-2.c, gcc.dg/vect/vect-peel-3.c,
+ * gcc.dg/vect/vect-peel-2.c, gcc.dg/vect/vect-peel-3.c,
gcc.dg/vect/vect-peel-4.c: Likewise.
- * gcc.dg/vect/vect-multitypes-1.c: Change the test to make it
+ * gcc.dg/vect/vect-multitypes-1.c: Change the test to make it
vectorizable on all targets that support realignment.
- * gcc.dg/vect/vect-multitypes-4.c: Likewise.
+ * gcc.dg/vect/vect-multitypes-4.c: Likewise.
2010-07-03 H.J. Lu <hongjiu.lu@intel.com>
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