/* RTL simplification functions for GNU compiler.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
- 2011 Free Software Foundation, Inc.
+ 2011, 2012 Free Software Foundation, Inc.
This file is part of GCC.
/* If we're accessing the constant in a different mode than it was
originally stored, attempt to fix that up via subreg simplifications.
If that fails we have no choice but to return the original memory. */
- if (offset != 0 || cmode != GET_MODE (x))
+ if ((offset != 0 || cmode != GET_MODE (x))
+ && offset >= 0 && offset < GET_MODE_SIZE (cmode))
{
rtx tem = simplify_subreg (GET_MODE (x), c, cmode, offset);
if (tem && CONSTANT_P (tem))
use their base addresses as equivalent. */
if (MEM_P (x)
&& MEM_EXPR (x)
- && MEM_OFFSET (x))
+ && MEM_OFFSET_KNOWN_P (x))
{
tree decl = MEM_EXPR (x);
enum machine_mode mode = GET_MODE (x);
{
rtx newx;
- offset += INTVAL (MEM_OFFSET (x));
+ offset += MEM_OFFSET (x);
newx = DECL_RTL (decl);
}
if (CONST_INT_P (op)
- && width <= HOST_BITS_PER_WIDE_INT
- && op_width <= HOST_BITS_PER_WIDE_INT && op_width > 0)
+ && width <= HOST_BITS_PER_WIDE_INT && width > 0)
{
HOST_WIDE_INT arg0 = INTVAL (op);
HOST_WIDE_INT val;
break;
case FFS:
- arg0 &= GET_MODE_MASK (op_mode);
+ arg0 &= GET_MODE_MASK (mode);
val = ffs_hwi (arg0);
break;
case CLZ:
- arg0 &= GET_MODE_MASK (op_mode);
- if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (op_mode, val))
+ arg0 &= GET_MODE_MASK (mode);
+ if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
;
else
- val = GET_MODE_PRECISION (op_mode) - floor_log2 (arg0) - 1;
+ val = GET_MODE_PRECISION (mode) - floor_log2 (arg0) - 1;
break;
case CLRSB:
- arg0 &= GET_MODE_MASK (op_mode);
+ arg0 &= GET_MODE_MASK (mode);
if (arg0 == 0)
- val = GET_MODE_PRECISION (op_mode) - 1;
+ val = GET_MODE_PRECISION (mode) - 1;
else if (arg0 >= 0)
- val = GET_MODE_PRECISION (op_mode) - floor_log2 (arg0) - 2;
+ val = GET_MODE_PRECISION (mode) - floor_log2 (arg0) - 2;
else if (arg0 < 0)
- val = GET_MODE_PRECISION (op_mode) - floor_log2 (~arg0) - 2;
+ val = GET_MODE_PRECISION (mode) - floor_log2 (~arg0) - 2;
break;
case CTZ:
- arg0 &= GET_MODE_MASK (op_mode);
+ arg0 &= GET_MODE_MASK (mode);
if (arg0 == 0)
{
/* Even if the value at zero is undefined, we have to come
up with some replacement. Seems good enough. */
- if (! CTZ_DEFINED_VALUE_AT_ZERO (op_mode, val))
- val = GET_MODE_PRECISION (op_mode);
+ if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
+ val = GET_MODE_PRECISION (mode);
}
else
val = ctz_hwi (arg0);
break;
case POPCOUNT:
- arg0 &= GET_MODE_MASK (op_mode);
+ arg0 &= GET_MODE_MASK (mode);
val = 0;
while (arg0)
val++, arg0 &= arg0 - 1;
break;
case PARITY:
- arg0 &= GET_MODE_MASK (op_mode);
+ arg0 &= GET_MODE_MASK (mode);
val = 0;
while (arg0)
val++, arg0 &= arg0 - 1;
coeff = immed_double_int_const (val, mode);
tem = simplify_gen_binary (MULT, mode, lhs, coeff);
- return rtx_cost (tem, SET, speed) <= rtx_cost (orig, SET, speed)
+ return set_src_cost (tem, speed) <= set_src_cost (orig, speed)
? tem : 0;
}
}
coeff = immed_double_int_const (val, mode);
tem = simplify_gen_binary (MULT, mode, lhs, coeff);
- return rtx_cost (tem, SET, speed) <= rtx_cost (orig, SET, speed)
+ return set_src_cost (tem, speed) <= set_src_cost (orig, speed)
? tem : 0;
}
}
neg_const_int (mode, op1));
/* (x - (x & y)) -> (x & ~y) */
- if (GET_CODE (op1) == AND)
+ if (INTEGRAL_MODE_P (mode) && GET_CODE (op1) == AND)
{
if (rtx_equal_p (op0, XEXP (op1, 0)))
{
case IOR:
if (trueop1 == CONST0_RTX (mode))
return op0;
- if (CONST_INT_P (trueop1)
- && ((UINTVAL (trueop1) & GET_MODE_MASK (mode))
- == GET_MODE_MASK (mode)))
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
return op1;
if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
HOST_WIDE_INT mask = INTVAL (trueop1) << count;
if (mask >> count == INTVAL (trueop1)
+ && trunc_int_for_mode (mask, mode) == mask
&& (mask & nonzero_bits (XEXP (op0, 0), mode)) == 0)
return simplify_gen_binary (ASHIFTRT, mode,
plus_constant (XEXP (op0, 0), mask),
case XOR:
if (trueop1 == CONST0_RTX (mode))
return op0;
- if (CONST_INT_P (trueop1)
- && ((UINTVAL (trueop1) & GET_MODE_MASK (mode))
- == GET_MODE_MASK (mode)))
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
return simplify_gen_unary (NOT, mode, op0, mode);
if (rtx_equal_p (trueop0, trueop1)
&& ! side_effects_p (op0)
case AND:
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return trueop1;
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
+ return op0;
if (HWI_COMPUTABLE_MODE_P (mode))
{
HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);
}
}
}
- else
+ else if (SCALAR_INT_MODE_P (mode))
{
/* 0/x is 0 (or x&0 if x has side-effects). */
if (trueop0 == CONST0_RTX (mode)
/* ~a -> (-a - 1) */
if (n_ops != 7)
{
- ops[n_ops].op = constm1_rtx;
+ ops[n_ops].op = CONSTM1_RTX (mode);
ops[n_ops++].neg = this_neg;
ops[i].op = XEXP (this_op, 0);
ops[i].neg = !this_neg;
{
rtx x = XEXP (op0, 0);
rtx c = XEXP (op0, 1);
+ enum rtx_code invcode = op0code == PLUS ? MINUS : PLUS;
+ rtx tem = simplify_gen_binary (invcode, cmp_mode, op1, c);
+
+ /* Detect an infinite recursive condition, where we oscillate at this
+ simplification case between:
+ A + B == C <---> C - B == A,
+ where A, B, and C are all constants with non-simplifiable expressions,
+ usually SYMBOL_REFs. */
+ if (GET_CODE (tem) == invcode
+ && CONSTANT_P (x)
+ && rtx_equal_p (c, XEXP (tem, 1)))
+ return NULL_RTX;
- c = simplify_gen_binary (op0code == PLUS ? MINUS : PLUS,
- cmp_mode, op1, c);
- return simplify_gen_relational (code, mode, cmp_mode, x, c);
+ return simplify_gen_relational (code, mode, cmp_mode, x, tem);
}
/* (ne:SI (zero_extract:SI FOO (const_int 1) BAR) (const_int 0))) is
/* Optimize SUBREG truncations of zero and sign extended values. */
if ((GET_CODE (op) == ZERO_EXTEND
|| GET_CODE (op) == SIGN_EXTEND)
+ && SCALAR_INT_MODE_P (innermode)
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode))
{
unsigned int bitpos = subreg_lsb_1 (outermode, innermode, byte);
if ((GET_CODE (op) == LSHIFTRT
|| GET_CODE (op) == ASHIFTRT)
&& SCALAR_INT_MODE_P (outermode)
+ && SCALAR_INT_MODE_P (innermode)
/* Ensure that OUTERMODE is at least twice as wide as the INNERMODE
to avoid the possibility that an outer LSHIFTRT shifts by more
than the sign extension's sign_bit_copies and introduces zeros
if ((GET_CODE (op) == LSHIFTRT
|| GET_CODE (op) == ASHIFTRT)
&& SCALAR_INT_MODE_P (outermode)
+ && SCALAR_INT_MODE_P (innermode)
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode)
&& CONST_INT_P (XEXP (op, 1))
&& GET_CODE (XEXP (op, 0)) == ZERO_EXTEND
the outer subreg is effectively a truncation to the original mode. */
if (GET_CODE (op) == ASHIFT
&& SCALAR_INT_MODE_P (outermode)
+ && SCALAR_INT_MODE_P (innermode)
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode)
&& CONST_INT_P (XEXP (op, 1))
&& (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND
/* Recognize a word extraction from a multi-word subreg. */
if ((GET_CODE (op) == LSHIFTRT
|| GET_CODE (op) == ASHIFTRT)
- && SCALAR_INT_MODE_P (outermode)
+ && SCALAR_INT_MODE_P (innermode)
&& GET_MODE_PRECISION (outermode) >= BITS_PER_WORD
&& GET_MODE_PRECISION (innermode) >= (2 * GET_MODE_PRECISION (outermode))
&& CONST_INT_P (XEXP (op, 1))
if ((GET_CODE (op) == LSHIFTRT
|| GET_CODE (op) == ASHIFTRT)
+ && SCALAR_INT_MODE_P (innermode)
&& MEM_P (XEXP (op, 0))
&& CONST_INT_P (XEXP (op, 1))
&& GET_MODE_SIZE (outermode) < GET_MODE_SIZE (GET_MODE (op))
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