/* Instruction scheduling pass. This file computes dependencies between
instructions.
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
and currently maintained by, Jim Wilson (wilson@cygnus.com)
#include "rtl.h"
#include "tm_p.h"
#include "hard-reg-set.h"
-#include "basic-block.h"
#include "regs.h"
#include "function.h"
#include "flags.h"
#include "df.h"
-static regset_head reg_pending_sets_head;
-static regset_head reg_pending_clobbers_head;
-static regset_head reg_pending_uses_head;
-
static regset reg_pending_sets;
static regset reg_pending_clobbers;
static regset reg_pending_uses;
static bitmap_head *true_dependency_cache;
static bitmap_head *anti_dependency_cache;
static bitmap_head *output_dependency_cache;
-int cache_size;
+static int cache_size;
/* To speed up checking consistency of formed forward insn
dependencies we use the following cache. Another possible solution
static int deps_may_trap_p (rtx);
static void add_dependence_list (rtx, rtx, enum reg_note);
static void add_dependence_list_and_free (rtx, rtx *, enum reg_note);
-static void set_sched_group_p (rtx);
+static void delete_all_dependences (rtx);
+static void fixup_sched_groups (rtx);
static void flush_pending_lists (struct deps *, rtx, int, int);
static void sched_analyze_1 (struct deps *, rtx, rtx);
static void sched_analyze_2 (struct deps *, rtx, rtx);
static void sched_analyze_insn (struct deps *, rtx, rtx, rtx);
-static rtx get_condition (rtx);
+static rtx sched_get_condition (rtx);
static int conditions_mutex_p (rtx, rtx);
\f
/* Return nonzero if a load of the memory reference MEM can cause a trap. */
/* Find the condition under which INSN is executed. */
static rtx
-get_condition (rtx insn)
+sched_get_condition (rtx insn)
{
rtx pat = PATTERN (insn);
rtx src;
be dependent. */
if (!CALL_P (insn) && !CALL_P (elem))
{
- cond1 = get_condition (insn);
- cond2 = get_condition (elem);
+ cond1 = sched_get_condition (insn);
+ cond2 = sched_get_condition (elem);
if (cond1 && cond2
&& conditions_mutex_p (cond1, cond2)
/* Make sure first instruction doesn't affect condition of second
}
}
-/* Set SCHED_GROUP_P and care for the rest of the bookkeeping that
- goes along with that. */
+/* Clear all dependencies for an insn. */
+
+static void
+delete_all_dependences (rtx insn)
+{
+ /* Clear caches, if they exist, as well as free the dependence. */
+
+#ifdef INSN_SCHEDULING
+ if (true_dependency_cache != NULL)
+ {
+ bitmap_clear (&true_dependency_cache[INSN_LUID (insn)]);
+ bitmap_clear (&anti_dependency_cache[INSN_LUID (insn)]);
+ bitmap_clear (&output_dependency_cache[INSN_LUID (insn)]);
+ }
+#endif
+
+ free_INSN_LIST_list (&LOG_LINKS (insn));
+}
+
+/* All insns in a scheduling group except the first should only have
+ dependencies on the previous insn in the group. So we find the
+ first instruction in the scheduling group by walking the dependence
+ chains backwards. Then we add the dependencies for the group to
+ the previous nonnote insn. */
static void
-set_sched_group_p (rtx insn)
+fixup_sched_groups (rtx insn)
{
- rtx prev;
+ rtx link;
- SCHED_GROUP_P (insn) = 1;
+ for (link = LOG_LINKS (insn); link ; link = XEXP (link, 1))
+ {
+ rtx i = insn;
+ do
+ {
+ i = prev_nonnote_insn (i);
+
+ if (XEXP (link, 0) == i)
+ goto next_link;
+ } while (SCHED_GROUP_P (i));
+ add_dependence (i, XEXP (link, 0), REG_NOTE_KIND (link));
+ next_link:;
+ }
- prev = prev_nonnote_insn (insn);
- add_dependence (insn, prev, REG_DEP_ANTI);
+ delete_all_dependences (insn);
+
+ if (BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (prev_nonnote_insn (insn)))
+ add_dependence (insn, prev_nonnote_insn (insn), REG_DEP_ANTI);
}
\f
/* Process an insn's memory dependencies. There are four kinds of
The MEM is a memory reference contained within INSN, which we are saving
so that we can do memory aliasing on it. */
-void
+static void
add_insn_mem_dependence (struct deps *deps, rtx *insn_list, rtx *mem_list,
rtx insn, rtx mem)
{
}
while (GET_CODE (dest) == STRICT_LOW_PART || GET_CODE (dest) == SUBREG
- || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
+ || GET_CODE (dest) == ZERO_EXTRACT)
{
if (GET_CODE (dest) == STRICT_LOW_PART
|| GET_CODE (dest) == ZERO_EXTRACT
- || GET_CODE (dest) == SIGN_EXTRACT
|| read_modify_subreg_p (dest))
{
/* These both read and modify the result. We must handle
sched_analyze_2 (deps, XEXP (dest, 0), insn);
}
- if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
+ if (GET_CODE (dest) == ZERO_EXTRACT)
{
/* The second and third arguments are values read by this insn. */
sched_analyze_2 (deps, XEXP (dest, 1), insn);
{
regno = REGNO (dest);
+#ifdef STACK_REGS
+ /* Treat all writes to a stack register as modifying the TOS. */
+ if (regno >= FIRST_STACK_REG && regno <= LAST_STACK_REG)
+ {
+ SET_REGNO_REG_SET (reg_pending_uses, FIRST_STACK_REG);
+ regno = FIRST_STACK_REG;
+ }
+#endif
+
/* A hard reg in a wide mode may really be multiple registers.
If so, mark all of them just like the first. */
if (regno < FIRST_PSEUDO_REGISTER)
#ifdef HAVE_cc0
case CC0:
/* User of CC0 depends on immediately preceding insn. */
- set_sched_group_p (insn);
+ SCHED_GROUP_P (insn) = 1;
/* Don't move CC0 setter to another block (it can set up the
same flag for previous CC0 users which is safe). */
CANT_MOVE (prev_nonnote_insn (insn)) = 1;
case REG:
{
int regno = REGNO (x);
+
+#ifdef STACK_REGS
+ /* Treat all reads of a stack register as modifying the TOS. */
+ if (regno >= FIRST_STACK_REG && regno <= LAST_STACK_REG)
+ {
+ SET_REGNO_REG_SET (reg_pending_sets, FIRST_STACK_REG);
+ regno = FIRST_STACK_REG;
+ }
+#endif
+
if (regno < FIRST_PSEUDO_REGISTER)
{
int i = hard_regno_nregs[regno][GET_MODE (x)];
{
RTX_CODE code = GET_CODE (x);
rtx link;
- int i;
+ unsigned i;
+ reg_set_iterator rsi;
if (code == COND_EXEC)
{
}
else if (code == PARALLEL)
{
- int i;
- for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
+ for (i = XVECLEN (x, 0); i--;)
{
rtx sub = XVECEXP (x, 0, i);
code = GET_CODE (sub);
(*current_sched_info->compute_jump_reg_dependencies)
(insn, &deps->reg_conditional_sets, &tmp_uses, &tmp_sets);
/* Make latency of jump equal to 0 by using anti-dependence. */
- EXECUTE_IF_SET_IN_REG_SET (&tmp_uses, 0, i,
+ EXECUTE_IF_SET_IN_REG_SET (&tmp_uses, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list (insn, reg_last->sets, REG_DEP_ANTI);
add_dependence_list (insn, reg_last->clobbers, REG_DEP_ANTI);
reg_last->uses_length++;
reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
- });
+ }
IOR_REG_SET (reg_pending_sets, &tmp_sets);
CLEAR_REG_SET (&tmp_uses);
{
rtx link;
- /* Update loop_notes with any notes from this insn. Also determine
- if any of the notes on the list correspond to instruction scheduling
- barriers (loop, eh & setjmp notes, but not range notes). */
+ /* Update loop_notes with any notes from this insn. */
link = loop_notes;
while (XEXP (link, 1))
{
- if (INTVAL (XEXP (link, 0)) == NOTE_INSN_LOOP_BEG
- || INTVAL (XEXP (link, 0)) == NOTE_INSN_LOOP_END
- || INTVAL (XEXP (link, 0)) == NOTE_INSN_EH_REGION_BEG
- || INTVAL (XEXP (link, 0)) == NOTE_INSN_EH_REGION_END)
- reg_pending_barrier = MOVE_BARRIER;
+ gcc_assert (INTVAL (XEXP (link, 0)) == NOTE_INSN_LOOP_BEG
+ || INTVAL (XEXP (link, 0)) == NOTE_INSN_LOOP_END);
+ reg_pending_barrier = MOVE_BARRIER;
link = XEXP (link, 1);
}
XEXP (link, 1) = REG_NOTES (insn);
real, so we use anti-dependence here. */
if (GET_CODE (PATTERN (insn)) == COND_EXEC)
{
- EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
+ EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
add_dependence_list
(insn, reg_last->clobbers,
reg_pending_barrier == TRUE_BARRIER ? 0 : REG_DEP_ANTI);
- });
+ }
}
else
{
- EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
+ EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list_and_free (insn, ®_last->uses,
reg_pending_barrier == TRUE_BARRIER ? 0 : REG_DEP_ANTI);
reg_last->uses_length = 0;
reg_last->clobbers_length = 0;
- });
+ }
}
- for (i = 0; i < deps->max_reg; i++)
+ for (i = 0; i < (unsigned)deps->max_reg; i++)
{
struct deps_reg *reg_last = &deps->reg_last[i];
reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
of the lists. */
if (GET_CODE (PATTERN (insn)) == COND_EXEC)
{
- EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i,
+ EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list (insn, reg_last->sets, 0);
add_dependence_list (insn, reg_last->clobbers, 0);
reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
reg_last->uses_length++;
- });
- EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i,
+ }
+ EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list (insn, reg_last->sets, REG_DEP_OUTPUT);
add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
reg_last->clobbers = alloc_INSN_LIST (insn, reg_last->clobbers);
reg_last->clobbers_length++;
- });
- EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i,
+ }
+ EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list (insn, reg_last->sets, REG_DEP_OUTPUT);
add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
SET_REGNO_REG_SET (&deps->reg_conditional_sets, i);
- });
+ }
}
else
{
- EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i,
+ EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list (insn, reg_last->sets, 0);
add_dependence_list (insn, reg_last->clobbers, 0);
reg_last->uses_length++;
reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
- });
- EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i,
+ }
+ EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
if (reg_last->uses_length > MAX_PENDING_LIST_LENGTH
}
reg_last->clobbers_length++;
reg_last->clobbers = alloc_INSN_LIST (insn, reg_last->clobbers);
- });
- EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i,
+ }
+ EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
add_dependence_list_and_free (insn, ®_last->sets,
reg_last->uses_length = 0;
reg_last->clobbers_length = 0;
CLEAR_REGNO_REG_SET (&deps->reg_conditional_sets, i);
- });
+ }
}
IOR_REG_SET (&deps->reg_last_in_use, reg_pending_uses);
if (deps->libcall_block_tail_insn)
{
- set_sched_group_p (insn);
+ SCHED_GROUP_P (insn) = 1;
CANT_MOVE (insn) = 1;
}
if (src_regno < FIRST_PSEUDO_REGISTER
|| dest_regno < FIRST_PSEUDO_REGISTER)
{
- /* If we are inside a post-call group right at the start of the
- scheduling region, we must not add a dependency. */
if (deps->in_post_call_group_p == post_call_initial)
- {
- SCHED_GROUP_P (insn) = 1;
- deps->in_post_call_group_p = post_call;
- }
- else
- set_sched_group_p (insn);
+ deps->in_post_call_group_p = post_call;
+
+ SCHED_GROUP_P (insn) = 1;
CANT_MOVE (insn) = 1;
}
else
deps->in_post_call_group_p = not_post_call;
}
}
+
+ /* Fixup the dependencies in the sched group. */
+ if (SCHED_GROUP_P (insn))
+ fixup_sched_groups (insn);
}
/* Analyze every insn between HEAD and TAIL inclusive, creating LOG_LINKS
deps->in_post_call_group_p = post_call;
}
+ /* EH_REGION insn notes can not appear until well after we complete
+ scheduling. */
+ if (NOTE_P (insn))
+ gcc_assert (NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_BEG
+ && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_END);
+
/* See comments on reemit_notes as to why we do this.
??? Actually, the reemit_notes just say what is done, not why. */
if (NOTE_P (insn)
- && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
- || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
- || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
- || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END))
+ && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
+ || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END))
{
- rtx rtx_region;
-
- if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
- || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
- rtx_region = GEN_INT (NOTE_EH_HANDLER (insn));
- else
- rtx_region = const0_rtx;
-
- loop_notes = alloc_EXPR_LIST (REG_SAVE_NOTE,
- rtx_region,
- loop_notes);
loop_notes = alloc_EXPR_LIST (REG_SAVE_NOTE,
GEN_INT (NOTE_LINE_NUMBER (insn)),
loop_notes);
void
free_deps (struct deps *deps)
{
- int i;
+ unsigned i;
+ reg_set_iterator rsi;
free_INSN_LIST_list (&deps->pending_read_insns);
free_EXPR_LIST_list (&deps->pending_read_mems);
/* Without the EXECUTE_IF_SET, this loop is executed max_reg * nr_regions
times. For a testcase with 42000 regs and 8000 small basic blocks,
this loop accounted for nearly 60% (84 sec) of the total -O2 runtime. */
- EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
+ EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i, rsi)
{
struct deps_reg *reg_last = &deps->reg_last[i];
if (reg_last->uses)
free_INSN_LIST_list (®_last->sets);
if (reg_last->clobbers)
free_INSN_LIST_list (®_last->clobbers);
- });
+ }
CLEAR_REG_SET (&deps->reg_last_in_use);
CLEAR_REG_SET (&deps->reg_conditional_sets);
void
init_deps_global (void)
{
- reg_pending_sets = INITIALIZE_REG_SET (reg_pending_sets_head);
- reg_pending_clobbers = INITIALIZE_REG_SET (reg_pending_clobbers_head);
- reg_pending_uses = INITIALIZE_REG_SET (reg_pending_uses_head);
+ reg_pending_sets = ALLOC_REG_SET (®_obstack);
+ reg_pending_clobbers = ALLOC_REG_SET (®_obstack);
+ reg_pending_uses = ALLOC_REG_SET (®_obstack);
reg_pending_barrier = NOT_A_BARRIER;
}
OSDN Git Service
