requirements for delay slots. */
DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA)
-/* Define a set of insns that requires a function unit. This means that
- these insns produce their result after a delay and that there may be
- restrictions on the number of insns of this type that can be scheduled
- simultaneously.
-
- More than one DEFINE_FUNCTION_UNIT can be specified for a function unit.
- Each gives a set of operations and associated delays. The first three
- operands must be the same for each operation for the same function unit.
-
- All delays are specified in cycles.
-
- 1st operand: Name of function unit (mostly for documentation)
- 2nd operand: Number of identical function units in CPU
- 3rd operand: Total number of simultaneous insns that can execute on this
- function unit; 0 if unlimited.
- 4th operand: Condition involving insn attribute, that, if true, specifies
- those insns that this expression applies to.
- 5th operand: Constant delay after which insn result will be
- available.
- 6th operand: Delay until next insn can be scheduled on the function unit
- executing this operation. The meaning depends on whether or
- not the next operand is supplied.
- 7th operand: If this operand is not specified, the 6th operand gives the
- number of cycles after the instruction matching the 4th
- operand begins using the function unit until a subsequent
- insn can begin. A value of zero should be used for a
- unit with no issue constraints. If only one operation can
- be executed a time and the unit is busy for the entire time,
- the 3rd operand should be specified as 1, the 6th operand
- should be specified as 0, and the 7th operand should not
- be specified.
-
- If this operand is specified, it is a list of attribute
- expressions. If an insn for which any of these expressions
- is true is currently executing on the function unit, the
- issue delay will be given by the 6th operand. Otherwise,
- the insn can be immediately scheduled (subject to the limit
- on the number of simultaneous operations executing on the
- unit.) */
-DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", RTX_EXTRA)
-
/* Define attribute computation for `asm' instructions. */
DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA)
pretend to be looking at the entire value and comparing it. */
DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ)
-/* Reference to the address of a register. Removed by purge_addressof after
- CSE has elided as many as possible.
- 1st operand: the register we may need the address of.
- 2nd operand: the original pseudo regno we were generated for.
- 3rd operand: the decl for the object in the register, for
- put_reg_in_stack. */
-
-DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", RTX_OBJ)
-
-/* =====================================================================
- A QUEUED expression really points to a member of the queue of instructions
- to be output later for postincrement/postdecrement.
- QUEUED expressions never become part of instructions.
- When a QUEUED expression would be put into an instruction,
- instead either the incremented variable or a copy of its previous
- value is used.
-
- Operands are:
- 0. the variable to be incremented (a REG rtx).
- 1. the incrementing instruction, or 0 if it hasn't been output yet.
- 2. A REG rtx for a copy of the old value of the variable, or 0 if none yet.
- 3. the body to use for the incrementing instruction
- 4. the next QUEUED expression in the queue.
- ====================================================================== */
-
-DEF_RTL_EXPR(QUEUED, "queued", "eeeee", RTX_EXTRA)
-
/* ----------------------------------------------------------------------
Expressions for operators in an rtl pattern
---------------------------------------------------------------------- */
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