Register Transfer Expressions (rtx's) that make up the
Register Transfer Language (rtl) used in the Back End of the GNU compiler.
Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004,
- 2005
+ 2005, 2006, 2007
Free Software Foundation, Inc.
This file is part of GCC.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-02111-1307, USA. */
+Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA. */
/* Expression definitions and descriptions for all targets are in this file.
/* Several operations to be done in parallel (perhaps under COND_EXEC). */
DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA)
+#ifdef USE_MAPPED_LOCATION
/* A string that is passed through to the assembler as input.
One can obviously pass comments through by using the
assembler comment syntax.
These occur in an insn all by themselves as the PATTERN.
They also appear inside an ASM_OPERANDS
as a convenient way to hold a string. */
-DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", RTX_EXTRA)
+DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA)
-#ifdef USE_MAPPED_LOCATION
/* An assembler instruction with operands.
1st operand is the instruction template.
2nd operand is the constraint for the output.
6th is the source line number. */
DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEi", RTX_EXTRA)
#else
+/* A string that is passed through to the assembler as input.
+ One can obviously pass comments through by using the
+ assembler comment syntax.
+ These occur in an insn all by themselves as the PATTERN.
+ They also appear inside an ASM_OPERANDS
+ as a convenient way to hold a string. */
+DEF_RTL_EXPR(ASM_INPUT, "asm_input", "ssi", RTX_EXTRA)
+
/* An assembler instruction with operands.
1st operand is the instruction template.
2nd operand is the constraint for the output.
in DECL_RTLs and during RTL generation, but not in the insn chain. */
DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ)
+/* (CONCATN [a1 a2 ... an]) represents the virtual concatenation of
+ all An to make a value. This is an extension of CONCAT to larger
+ number of components. Like CONCAT, it should not appear in the
+ insn chain. Every element of the CONCATN is the same size. */
+DEF_RTL_EXPR(CONCATN, "concatn", "E", RTX_OBJ)
+
/* A memory location; operand is the address. The second operand is the
alias set to which this MEM belongs. We use `0' instead of `w' for this
field so that the field need not be specified in machine descriptions. */
DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ)
/* Reference to an assembler label in the code for this function.
- The operand is a CODE_LABEL found in the insn chain.
- The unprinted field 1 is used in flow.c for the LABEL_NEXTREF. */
-DEF_RTL_EXPR(LABEL_REF, "label_ref", "u0", RTX_CONST_OBJ)
+ The operand is a CODE_LABEL found in the insn chain. */
+DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
/* Reference to a named label:
Operand 0: label name
/* Bitwise operations. */
DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH)
-
DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH)
-
DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH)
-
DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY)
/* Operand:
/* Minimum and maximum values of two operands. We need both signed and
unsigned forms. (We cannot use MIN for SMIN because it conflicts
- with a macro of the same name.) */
+ with a macro of the same name.) The signed variants should be used
+ with floating point. Further, if both operands are zeros, or if either
+ operand is NaN, then it is unspecified which of the two operands is
+ returned as the result. */
DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH)
/* Square root */
DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY)
+/* Swap bytes. */
+DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY)
+
/* Find first bit that is set.
Value is 1 + number of trailing zeros in the arg.,
or 0 if arg is 0. */
/* Operand 0 minus operand 1, with signed saturation. */
DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH)
+/* Negation with signed saturation. */
+DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY)
+
+/* Shift left with signed saturation. */
+DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH)
+
/* Operand 0 minus operand 1, with unsigned saturation. */
DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
/* Appears only in define_predicate/define_special_predicate
expressions. Evaluates true only if the operand has an RTX code
- from the set given by the argument (a comma-separated list). */
-DEF_RTL_EXPR(MATCH_CODE, "match_code", "s", RTX_MATCH)
+ from the set given by the argument (a comma-separated list). If the
+ second argument is present and nonempty, it is a sequence of digits
+ and/or letters which indicates the subexpression to test, using the
+ same syntax as genextract/genrecog's location strings: 0-9 for
+ XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to
+ the result of the one before it. */
+DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH)
/* Appears only in define_predicate/define_special_predicate
expressions. The argument is a C expression to be injected at this
DEF_RTL_EXPR(DEFINE_PREDICATE, "define_predicate", "ses", RTX_EXTRA)
DEF_RTL_EXPR(DEFINE_SPECIAL_PREDICATE, "define_special_predicate", "ses", RTX_EXTRA)
+/* Definition of a register operand constraint. This simply maps the
+ constraint string to a register class.
+
+ Operand:
+ 0: The name of the constraint (often, but not always, a single letter).
+ 1: A C expression which evaluates to the appropriate register class for
+ this constraint. If this is not just a constant, it should look only
+ at -m switches and the like.
+ 2: A docstring for this constraint, in Texinfo syntax; not currently
+ used, in future will be incorporated into the manual's list of
+ machine-specific operand constraints. */
+DEF_RTL_EXPR(DEFINE_REGISTER_CONSTRAINT, "define_register_constraint", "sss", RTX_EXTRA)
+
+/* Definition of a non-register operand constraint. These look at the
+ operand and decide whether it fits the constraint.
+
+ DEFINE_CONSTRAINT gets no special treatment if it fails to match.
+ It is appropriate for constant-only constraints, and most others.
+
+ DEFINE_MEMORY_CONSTRAINT tells reload that this constraint can be made
+ to match, if it doesn't already, by converting the operand to the form
+ (mem (reg X)) where X is a base register. It is suitable for constraints
+ that describe a subset of all memory references.
+
+ DEFINE_ADDRESS_CONSTRAINT tells reload that this constraint can be made
+ to match, if it doesn't already, by converting the operand to the form
+ (reg X) where X is a base register. It is suitable for constraints that
+ describe a subset of all address references.
+
+ When in doubt, use plain DEFINE_CONSTRAINT.
+
+ Operand:
+ 0: The name of the constraint (often, but not always, a single letter).
+ 1: A docstring for this constraint, in Texinfo syntax; not currently
+ used, in future will be incorporated into the manual's list of
+ machine-specific operand constraints.
+ 2: A boolean expression which computes whether or not the constraint
+ matches. It should follow the same rules as a define_predicate
+ expression, including the bit about specifying the set of RTX codes
+ that could possibly match. MATCH_TEST subexpressions may make use of
+ these variables:
+ `op' - the RTL object defining the operand.
+ `mode' - the mode of `op'.
+ `ival' - INTVAL(op), if op is a CONST_INT.
+ `hval' - CONST_DOUBLE_HIGH(op), if op is an integer CONST_DOUBLE.
+ `lval' - CONST_DOUBLE_LOW(op), if op is an integer CONST_DOUBLE.
+ `rval' - CONST_DOUBLE_REAL_VALUE(op), if op is a floating-point
+ CONST_DOUBLE.
+ Do not use ival/hval/lval/rval if op is not the appropriate kind of
+ RTL object. */
+DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
+DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
+DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
+
+
/* Constructions for CPU pipeline description described by NDFAs. */
/* (define_cpu_unit string [string]) describes cpu functional
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