/* Search an insn for pseudo regs that must be in hard regs and are not.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000 Free Software Foundation, Inc.
+ 1999, 2000, 2001 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
/* This file contains subroutines used only from the file reload1.c.
It knows how to scan one insn for operands and values
2 happens only when REPLACE is 1, which is only when
actually doing the reloads, not when just counting them.
-
Using a reload register for several reloads in one insn:
When an insn has reloads, it is considered as having three parts:
#include "rtl.h"
#include "tm_p.h"
#include "insn-config.h"
-#include "insn-codes.h"
+#include "expr.h"
+#include "optabs.h"
#include "recog.h"
#include "reload.h"
#include "regs.h"
#include "real.h"
#include "output.h"
#include "function.h"
-#include "expr.h"
#include "toplev.h"
#ifndef REGISTER_MOVE_COST
-#define REGISTER_MOVE_COST(x, y) 2
+#define REGISTER_MOVE_COST(m, x, y) 2
#endif
#ifndef REGNO_MODE_OK_FOR_BASE_P
enum insn_code *));
#endif
static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
+static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
static int push_reload PARAMS ((rtx, rtx, rtx *, rtx *, enum reg_class,
enum machine_mode, enum machine_mode,
int, int, int, enum reload_type));
static int immune_p PARAMS ((rtx, rtx, struct decomposition));
static int alternative_allows_memconst PARAMS ((const char *, int));
static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
- int, rtx));
+ int, rtx, int *));
static rtx make_memloc PARAMS ((rtx, int));
static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
int, enum reload_type, int, rtx));
static rtx subst_reg_equivs PARAMS ((rtx, rtx));
static rtx subst_indexed_address PARAMS ((rtx));
+static void update_auto_inc_notes PARAMS ((rtx, int, int));
static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
int, enum reload_type,int, rtx));
static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
int, rtx));
static int find_inc_amount PARAMS ((rtx, rtx));
-extern void debug_reload_to_stream PARAMS ((FILE *));
-extern void debug_reload PARAMS ((void));
\f
#ifdef HAVE_SECONDARY_RELOADS
in operand 1. Outputs should have an initial "=", which we must
skip. */
- char insn_letter
- = insn_data[(int) icode].operand[!in_p].constraint[in_p];
- enum reg_class insn_class
- = (insn_letter == 'r' ? GENERAL_REGS
- : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
+ enum reg_class insn_class;
+
+ if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
+ insn_class = ALL_REGS;
+ else
+ {
+ char insn_letter
+ = insn_data[(int) icode].operand[!in_p].constraint[in_p];
+ insn_class
+ = (insn_letter == 'r' ? GENERAL_REGS
+ : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
+ }
if (insn_class == NO_REGS
|| (in_p
can not use secondary reloads, you must work around the problem some
other way.
- Allow this when MODE is not reload_mode and assume that the generated
- code handles this case (it does on the Alpha, which is the only place
- this currently happens). */
+ Allow this when a reload_in/out pattern is being used. I.e. assume
+ that the generated code handles this case. */
- if (in_p && class == reload_class && mode == reload_mode)
+ if (in_p && class == reload_class && icode == CODE_FOR_nothing
+ && t_icode == CODE_FOR_nothing)
abort ();
/* If we need a tertiary reload, see if we have one we can reuse or else
if (in_p && icode == CODE_FOR_nothing
&& SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
- get_secondary_mem (x, reload_mode, opnum, type);
+ {
+ get_secondary_mem (x, reload_mode, opnum, type);
+
+ /* We may have just added new reloads. Make sure we add
+ the new reload at the end. */
+ s_reload = n_reloads;
+ }
#endif
/* We need to make a new secondary reload for this register class. */
: type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
: RELOAD_OTHER);
- find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
+ find_reloads_address (mode, (rtx*)0, XEXP (loc, 0), &XEXP (loc, 0),
opnum, type, 0, 0);
}
void
clear_secondary_mem ()
{
- bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
+ memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
}
#endif /* SECONDARY_MEMORY_NEEDED */
\f
combine. P_IN points to the corresponding value of IN, which can be
modified by this function.
DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
+
static int
find_reusable_reload (p_in, out, class, type, opnum, dont_share)
rtx *p_in, out;
true_regnum (rld[i].reg_rtx)))
&& out == 0 && rld[i].out == 0 && rld[i].in != 0
&& ((GET_CODE (in) == REG
- && (GET_CODE (rld[i].in) == POST_INC
- || GET_CODE (rld[i].in) == POST_DEC
- || GET_CODE (rld[i].in) == PRE_INC
- || GET_CODE (rld[i].in) == PRE_DEC)
+ && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
&& MATCHES (XEXP (rld[i].in, 0), in))
- ||
- (GET_CODE (rld[i].in) == REG
- && (GET_CODE (in) == POST_INC
- || GET_CODE (in) == POST_DEC
- || GET_CODE (in) == PRE_INC
- || GET_CODE (in) == PRE_DEC)
- && MATCHES (XEXP (in, 0), rld[i].in)))
+ || (GET_CODE (rld[i].in) == REG
+ && GET_RTX_CLASS (GET_CODE (in)) == 'a'
+ && MATCHES (XEXP (in, 0), rld[i].in)))
&& (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
&& (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
&& MERGABLE_RELOADS (type, rld[i].when_needed,
return n_reloads;
}
+/* Return nonzero if X is a SUBREG which will require reloading of its
+ SUBREG_REG expression. */
+
+static int
+reload_inner_reg_of_subreg (x, mode)
+ rtx x;
+ enum machine_mode mode;
+{
+ rtx inner;
+
+ /* Only SUBREGs are problematical. */
+ if (GET_CODE (x) != SUBREG)
+ return 0;
+
+ inner = SUBREG_REG (x);
+
+ /* If INNER is a constant or PLUS, then INNER must be reloaded. */
+ if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
+ return 1;
+
+ /* If INNER is not a hard register, then INNER will not need to
+ be reloaded. */
+ if (GET_CODE (inner) != REG
+ || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
+ return 0;
+
+ /* If INNER is not ok for MODE, then INNER will need reloading. */
+ if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
+ return 1;
+
+ /* If the outer part is a word or smaller, INNER larger than a
+ word and the number of regs for INNER is not the same as the
+ number of words in INNER, then INNER will need reloading. */
+ return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
+ && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
+ && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
+}
+
/* Record one reload that needs to be performed.
IN is an rtx saying where the data are to be found before this instruction.
OUT says where they must be stored after the instruction.
/* If we have a read-write operand with an address side-effect,
change either IN or OUT so the side-effect happens only once. */
if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
- {
- if (GET_CODE (XEXP (in, 0)) == POST_INC
- || GET_CODE (XEXP (in, 0)) == POST_DEC)
- {
- rtx new = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
+ switch (GET_CODE (XEXP (in, 0)))
+ {
+ case POST_INC: case POST_DEC: case POST_MODIFY:
+ in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
+ break;
- MEM_COPY_ATTRIBUTES (new, in);
- in = new;
- }
- if (GET_CODE (XEXP (in, 0)) == PRE_INC
- || GET_CODE (XEXP (in, 0)) == PRE_DEC)
- {
- rtx new = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
+ case PRE_INC: case PRE_DEC: case PRE_MODIFY:
+ out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
+ break;
- MEM_COPY_ATTRIBUTES (new, out);
- out = new;
- }
+ default:
+ break;
}
/* If we are reloading a (SUBREG constant ...), really reload just the
Finally, reload the inner expression if it is a register that is in
the class whose registers cannot be referenced in a different size
- and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
+ and M1 is not the same size as M2. If SUBREG_BYTE is nonzero, we
cannot reload just the inside since we might end up with the wrong
register class. But if it is inside a STRICT_LOW_PART, we have
no choice, so we hope we do get the right register class there. */
if (in != 0 && GET_CODE (in) == SUBREG
- && (SUBREG_WORD (in) == 0 || strict_low)
+ && (SUBREG_BYTE (in) == 0 || strict_low)
#ifdef CLASS_CANNOT_CHANGE_MODE
- && class != CLASS_CANNOT_CHANGE_MODE
+ && (class != CLASS_CANNOT_CHANGE_MODE
+ || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
#endif
&& (CONSTANT_P (SUBREG_REG (in))
|| GET_CODE (SUBREG_REG (in)) == PLUS
&& REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
/* The case where out is nonzero
is handled differently in the following statement. */
- && (out == 0 || SUBREG_WORD (in) == 0)
+ && (out == 0 || SUBREG_BYTE (in) == 0)
&& ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
&& (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
> UNITS_PER_WORD)
/ UNITS_PER_WORD)
!= HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
GET_MODE (SUBREG_REG (in)))))
- || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
- + SUBREG_WORD (in)),
- inmode)))
+ || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
#ifdef SECONDARY_INPUT_RELOAD_CLASS
|| (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
&& (SECONDARY_INPUT_RELOAD_CLASS (class,
that case. */
/* Similar issue for (SUBREG constant ...) if it was not handled by the
- code above. This can happen if SUBREG_WORD != 0. */
+ code above. This can happen if SUBREG_BYTE != 0. */
- if (in != 0 && GET_CODE (in) == SUBREG
- && (CONSTANT_P (SUBREG_REG (in))
- || (GET_CODE (SUBREG_REG (in)) == REG
- && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
- && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
- + SUBREG_WORD (in),
- inmode)
- || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
- && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
- > UNITS_PER_WORD)
- && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
- / UNITS_PER_WORD)
- != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
- GET_MODE (SUBREG_REG (in)))))))))
+ if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
{
+ enum reg_class in_class = class;
+
+ if (GET_CODE (SUBREG_REG (in)) == REG)
+ in_class
+ = find_valid_class (inmode,
+ subreg_regno_offset (REGNO (SUBREG_REG (in)),
+ GET_MODE (SUBREG_REG (in)),
+ SUBREG_BYTE (in),
+ GET_MODE (in)));
+
/* This relies on the fact that emit_reload_insns outputs the
instructions for input reloads of type RELOAD_OTHER in the same
order as the reloads. Thus if the outer reload is also of type
RELOAD_OTHER, we are guaranteed that this inner reload will be
output before the outer reload. */
- push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
- find_valid_class (inmode, SUBREG_WORD (in)),
- VOIDmode, VOIDmode, 0, 0, opnum, type);
+ push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *)0,
+ in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
dont_remove_subreg = 1;
}
(except in the case of STRICT_LOW_PART,
and in that case the constraint should label it input-output.) */
if (out != 0 && GET_CODE (out) == SUBREG
- && (SUBREG_WORD (out) == 0 || strict_low)
+ && (SUBREG_BYTE (out) == 0 || strict_low)
#ifdef CLASS_CANNOT_CHANGE_MODE
- && class != CLASS_CANNOT_CHANGE_MODE
+ && (class != CLASS_CANNOT_CHANGE_MODE
+ || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
+ outmode))
#endif
&& (CONSTANT_P (SUBREG_REG (out))
|| strict_low
/ UNITS_PER_WORD)
!= HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
GET_MODE (SUBREG_REG (out)))))
- || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
- + SUBREG_WORD (out)),
- outmode)))
+ || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
|| (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
&& (SECONDARY_OUTPUT_RELOAD_CLASS (class,
However, we must reload the inner reg *as well as* the subreg in
that case. In this case, the inner reg is an in-out reload. */
- if (out != 0 && GET_CODE (out) == SUBREG
- && GET_CODE (SUBREG_REG (out)) == REG
- && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
- && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
- outmode)
- || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
- && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
- > UNITS_PER_WORD)
- && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
- / UNITS_PER_WORD)
- != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
- GET_MODE (SUBREG_REG (out)))))))
+ if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
{
/* This relies on the fact that emit_reload_insns outputs the
instructions for output reloads of type RELOAD_OTHER in reverse
dont_remove_subreg = 1;
push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
&SUBREG_REG (out),
- find_valid_class (outmode, SUBREG_WORD (out)),
+ find_valid_class (outmode,
+ subreg_regno_offset (REGNO (SUBREG_REG (out)),
+ GET_MODE (SUBREG_REG (out)),
+ SUBREG_BYTE (out),
+ GET_MODE (out))),
VOIDmode, VOIDmode, 0, 0,
opnum, RELOAD_OTHER);
}
if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
&& REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
&& ! dont_remove_subreg)
- in = gen_rtx_REG (GET_MODE (in),
- REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
+ in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
/* Similarly for OUT. */
if (out != 0 && GET_CODE (out) == SUBREG
&& GET_CODE (SUBREG_REG (out)) == REG
&& REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
&& ! dont_remove_subreg)
- out = gen_rtx_REG (GET_MODE (out),
- REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
+ out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
/* Narrow down the class of register wanted if that is
desirable on this machine for efficiency. */
rld[i].opnum = MIN (rld[i].opnum, opnum);
}
- /* If the ostensible rtx being reload differs from the rtx found
+ /* If the ostensible rtx being reloaded differs from the rtx found
in the location to substitute, this reload is not safe to combine
because we cannot reliably tell whether it appears in the insn. */
{
rtx note;
int regno;
+ enum machine_mode rel_mode = inmode;
+
+ if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
+ rel_mode = outmode;
for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
if (REG_NOTE_KIND (note) == REG_DEAD
&& ! refers_to_regno_for_reload_p (regno,
(regno
+ HARD_REGNO_NREGS (regno,
- inmode)),
+ rel_mode)),
PATTERN (this_insn), inloc)
/* If this is also an output reload, IN cannot be used as
the reload register if it is set in this insn unless IN
|| ! hard_reg_set_here_p (regno,
(regno
+ HARD_REGNO_NREGS (regno,
- inmode)),
+ rel_mode)),
PATTERN (this_insn)))
/* ??? Why is this code so different from the previous?
Is there any simple coherent way to describe the two together?
== ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
/* Make sure the operand fits in the reg that dies. */
- && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
+ && (GET_MODE_SIZE (rel_mode)
+ <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
&& HARD_REGNO_MODE_OK (regno, inmode)
- && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
&& HARD_REGNO_MODE_OK (regno, outmode))
{
unsigned int offs;
if (offs == nregs)
{
- rld[i].reg_rtx = gen_rtx_REG (inmode, regno);
+ rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
break;
}
}
char reload_flags[MAX_RELOADS];
int something_changed = 0;
- bzero (reload_flags, sizeof reload_flags);
+ memset (reload_flags, 0, sizeof reload_flags);
for (i = 0, j = 0; i < n_replacements; i++)
{
if (loc_mentioned_in_p (replacements[i].where, in_rtx))
&& ! (GET_CODE (rld[i].in) == REG
&& reg_overlap_mentioned_for_reload_p (rld[i].in,
rld[output_reload].out))))
+ && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
&& (reg_class_size[(int) rld[i].class]
|| SMALL_REGISTER_CLASSES)
/* We will allow making things slightly worse by combining an
|| GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
return 0;
+ /* Note that {in,out}_offset are needed only when 'in' or 'out'
+ respectively refers to a hard register. */
+
/* Find the inside of any subregs. */
while (GET_CODE (out) == SUBREG)
{
- out_offset = SUBREG_WORD (out);
+ if (GET_CODE (SUBREG_REG (out)) == REG
+ && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
+ out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
+ GET_MODE (SUBREG_REG (out)),
+ SUBREG_BYTE (out),
+ GET_MODE (out));
out = SUBREG_REG (out);
}
while (GET_CODE (in) == SUBREG)
{
- in_offset = SUBREG_WORD (in);
+ if (GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
+ in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
+ GET_MODE (SUBREG_REG (in)),
+ SUBREG_BYTE (in),
+ GET_MODE (in));
in = SUBREG_REG (in);
}
unsigned int regno = REGNO (in) + in_offset;
unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
- if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
+ if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*)0)
&& ! hard_reg_set_here_p (regno, regno + nwords,
PATTERN (this_insn))
&& (! earlyclobber
i = REGNO (SUBREG_REG (x));
if (i >= FIRST_PSEUDO_REGISTER)
goto slow;
- i += SUBREG_WORD (x);
+ i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
+ GET_MODE (SUBREG_REG (x)),
+ SUBREG_BYTE (x),
+ GET_MODE (x));
}
else
i = REGNO (x);
j = REGNO (SUBREG_REG (y));
if (j >= FIRST_PSEUDO_REGISTER)
goto slow;
- j += SUBREG_WORD (y);
+ j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
+ GET_MODE (SUBREG_REG (y)),
+ SUBREG_BYTE (y),
+ GET_MODE (y));
}
else
j = REGNO (y);
because the assembler insn would increment only once.
On the other hand, an postincrement matches ordinary indexing
if the postincrement is the output operand. */
- if (code == POST_DEC || code == POST_INC)
+ if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
return operands_match_p (XEXP (x, 0), y);
/* Two preincrements are invalid
because the assembler insn would increment only once.
if the preincrement is the input operand.
In this case, return 2, since some callers need to do special
things when this happens. */
- if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
+ if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
+ || GET_CODE (y) == PRE_MODIFY)
return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
slow:
|| GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
{
val.base = XEXP (addr, 0);
- val.start = - GET_MODE_SIZE (GET_MODE (x));
+ val.start = -GET_MODE_SIZE (GET_MODE (x));
val.end = GET_MODE_SIZE (GET_MODE (x));
val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
return val;
}
+ if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
+ {
+ if (GET_CODE (XEXP (addr, 1)) == PLUS
+ && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
+ && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
+ {
+ val.base = XEXP (addr, 0);
+ val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
+ val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
+ val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
+ return val;
+ }
+ }
+
if (GET_CODE (addr) == CONST)
{
addr = XEXP (addr, 0);
struct decomposition xdata;
if (ydata.reg_flag)
- return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
+ return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*)0);
if (ydata.safe)
return 1;
if (GET_CODE (x) != MEM)
return 1;
- xdata = decompose (x);
+ xdata = decompose (x);
if (! rtx_equal_p (xdata.base, ydata.base))
{
return 0;
}
-
return (xdata.start >= ydata.end || ydata.start >= xdata.end);
}
int no_input_reloads = 0, no_output_reloads = 0;
int n_alternatives;
int this_alternative[MAX_RECOG_OPERANDS];
+ char this_alternative_match_win[MAX_RECOG_OPERANDS];
char this_alternative_win[MAX_RECOG_OPERANDS];
char this_alternative_offmemok[MAX_RECOG_OPERANDS];
char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
int operand_reloadnum[MAX_RECOG_OPERANDS];
int goal_alternative_matches[MAX_RECOG_OPERANDS];
int goal_alternative_matched[MAX_RECOG_OPERANDS];
+ char goal_alternative_match_win[MAX_RECOG_OPERANDS];
char goal_alternative_win[MAX_RECOG_OPERANDS];
char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
/* The eliminated forms of any secondary memory locations are per-insn, so
clear them out here. */
- bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
+ memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
#endif
/* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
&& REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
&& GET_CODE (SET_SRC (body)) == REG
&& REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
- && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
+ && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
+ REGNO_REG_CLASS (REGNO (SET_SRC (body))),
REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
return 0;
;
else if (constraints[i][0] == 'p')
{
- find_reloads_address (VOIDmode, NULL_PTR,
+ find_reloads_address (VOIDmode, (rtx*)0,
recog_data.operand[i],
recog_data.operand_loc[i],
i, operand_type[i], ind_levels, insn);
ind_levels,
set != 0
&& &SET_DEST (set) == recog_data.operand_loc[i],
- insn);
+ insn,
+ &address_reloaded[i]);
/* If we made a MEM to load (a part of) the stackslot of a pseudo
that didn't get a hard register, emit a USE with a REG_EQUAL
a unary operator by reloading the operand. */
substed_operand[i] = recog_data.operand[i]
= find_reloads_toplev (recog_data.operand[i], i, address_type[i],
- ind_levels, 0, insn);
+ ind_levels, 0, insn,
+ &address_reloaded[i]);
else if (code == REG)
{
/* This is equivalent to calling find_reloads_toplev.
of a constant equivalence was checked above. */
substed_operand[i] = recog_data.operand[i]
= find_reloads_toplev (recog_data.operand[i], i, address_type[i],
- ind_levels, 0, insn);
+ ind_levels, 0, insn,
+ &address_reloaded[i]);
}
/* If the operand is still a register (we didn't replace it with an
equivalent), get the preferred class to reload it into. */
{
register char *p = constraints[i];
register int win = 0;
- /* 0 => this operand can be reloaded somehow for this alternative */
+ int did_match = 0;
+ /* 0 => this operand can be reloaded somehow for this alternative. */
int badop = 1;
/* 0 => this operand can be reloaded if the alternative allows regs. */
int winreg = 0;
while (GET_CODE (operand) == SUBREG)
{
- offset += SUBREG_WORD (operand);
+ /* Offset only matters when operand is a REG and
+ it is a hard reg. This is because it is passed
+ to reg_fits_class_p if it is a REG and all pseudos
+ return 0 from that function. */
+ if (GET_CODE (SUBREG_REG (operand)) == REG
+ && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
+ {
+ offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
+ GET_MODE (SUBREG_REG (operand)),
+ SUBREG_BYTE (operand),
+ GET_MODE (operand));
+ }
operand = SUBREG_REG (operand);
/* Force reload if this is a constant or PLUS or if there may
be a problem accessing OPERAND in the outer mode. */
)
#endif
)
+ /* This following hunk of code should no longer be
+ needed at all with SUBREG_BYTE. If you need this
+ code back, please explain to me why so I can
+ fix the real problem. -DaveM */
+#if 0
/* Subreg of a hard reg which can't handle the subreg's mode
or which would handle that mode in the wrong number of
registers for subregging to work. */
!= HARD_REGNO_NREGS (REGNO (operand),
GET_MODE (operand))))
|| ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
- operand_mode[i]))))
+ operand_mode[i])))
+#endif
+ )
force_reload = 1;
}
this_alternative[i] = (int) NO_REGS;
this_alternative_win[i] = 0;
+ this_alternative_match_win[i] = 0;
this_alternative_offmemok[i] = 0;
this_alternative_earlyclobber[i] = 0;
this_alternative_matches[i] = -1;
case '#':
/* Ignore rest of this alternative as far as
reloading is concerned. */
- while (*p && *p != ',') p++;
+ while (*p && *p != ',')
+ p++;
break;
case '0': case '1': case '2': case '3': case '4':
only on one side of its diagonal. */
? (operands_match
[(c == commutative || c == commutative + 1)
- ? 2*commutative + 1 - c : c]
+ ? 2 * commutative + 1 - c : c]
[(i == commutative || i == commutative + 1)
- ? 2*commutative + 1 - i : i])
+ ? 2 * commutative + 1 - i : i])
: operands_match[c][i])
{
/* If we are matching a non-offsettable address where an
&& ! this_alternative_win[c])
bad = 1;
- win = this_alternative_win[c];
+ did_match = this_alternative_win[c];
}
else
{
operand also had to match the same thing as this
operand, we don't know how to do that. So reject this
alternative. */
- if (! win || force_reload)
+ if (! did_match || force_reload)
for (j = 0; j < i; j++)
if (this_alternative_matches[j]
== this_alternative_matches[i])
badop = 1;
-
break;
case 'p':
|| (REGNO (operand) >= FIRST_PSEUDO_REGISTER
&& reg_renumber[REGNO (operand)] < 0)))
win = 1;
- /* Drop through into 'r' case */
+ /* Drop through into 'r' case. */
case 'r':
this_alternative[i]
= (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
goto reg;
+ default:
+ if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
+ {
#ifdef EXTRA_CONSTRAINT
- case 'Q':
- case 'R':
- case 'S':
- case 'T':
- case 'U':
- if (EXTRA_CONSTRAINT (operand, c))
- win = 1;
- break;
+ if (EXTRA_CONSTRAINT (operand, c))
+ win = 1;
#endif
+ break;
+ }
- default:
this_alternative[i]
= (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
-
reg:
if (GET_MODE (operand) == BLKmode)
break;
this_alternative_earlyclobber[i] = earlyclobber;
if (win && ! force_reload)
this_alternative_win[i] = 1;
+ else if (did_match && ! force_reload)
+ this_alternative_match_win[i] = 1;
else
{
int const_to_mem = 0;
&& ! const_to_mem)
bad = 1;
-
/* We prefer to reload pseudos over reloading other things,
since such reloads may be able to be eliminated later.
If we are reloading a SCRATCH, we won't be generating any
Don't do this if the preferred class has only one register
because we might otherwise exhaust the class. */
-
- if (! win && this_alternative[i] != (int) NO_REGS
+ if (! win && ! did_match
+ && this_alternative[i] != (int) NO_REGS
&& GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
&& reg_class_size[(int) preferred_class[i]] > 1)
{
for (i = 0; i < noperands; i++)
if (this_alternative_earlyclobber[i]
- && this_alternative_win[i])
+ && (this_alternative_win[i] || this_alternative_match_win[i]))
{
struct decomposition early_data;
{
losers++;
this_alternative_win[j] = 0;
+ this_alternative_match_win[j] = 0;
}
else
break;
{
losers++;
this_alternative_win[i] = 0;
+ this_alternative_match_win[j] = 0;
for (j = 0; j < noperands; j++)
if (this_alternative_matches[j] == i
- && this_alternative_win[j])
+ && this_alternative_match_win[j])
{
this_alternative_win[j] = 0;
+ this_alternative_match_win[j] = 0;
losers++;
}
}
}
for (i = 0; i < noperands; i++)
{
- goal_alternative_win[i] = 1;
+ goal_alternative_win[i] = this_alternative_win[i];
+ goal_alternative_match_win[i] = this_alternative_match_win[i];
goal_alternative[i] = this_alternative[i];
goal_alternative_offmemok[i] = this_alternative_offmemok[i];
goal_alternative_matches[i] = this_alternative_matches[i];
{
goal_alternative[i] = this_alternative[i];
goal_alternative_win[i] = this_alternative_win[i];
+ goal_alternative_match_win[i] = this_alternative_match_win[i];
goal_alternative_offmemok[i] = this_alternative_offmemok[i];
goal_alternative_matches[i] = this_alternative_matches[i];
goal_alternative_earlyclobber[i]
for (i = 0; i < noperands; i++)
goal_alternative_matched[i] = -1;
-
+
for (i = 0; i < noperands; i++)
if (! goal_alternative_win[i]
&& goal_alternative_matches[i] >= 0)
goal_alternative_matched[goal_alternative_matches[i]] = i;
+ for (i = 0; i < noperands; i++)
+ goal_alternative_win[i] |= goal_alternative_match_win[i];
+
/* If the best alternative is with operands 1 and 2 swapped,
consider them swapped before reporting the reloads. Update the
operand numbers of any reloads already pushed. */
tem = *recog_data.operand_loc[commutative];
*recog_data.operand_loc[commutative]
= *recog_data.operand_loc[commutative + 1];
- *recog_data.operand_loc[commutative+1] = tem;
+ *recog_data.operand_loc[commutative + 1] = tem;
for (i = 0; i < n_reloads; i++)
{
substed_operand[i] = recog_data.operand[i]
= find_reloads_toplev (force_const_mem (operand_mode[i],
recog_data.operand[i]),
- i, address_type[i], ind_levels, 0, insn);
+ i, address_type[i], ind_levels, 0, insn,
+ NULL);
if (alternative_allows_memconst (recog_data.constraints[i],
goal_alternative_number))
goal_alternative_win[i] = 1;
{
operand_reloadnum[i]
= push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
- &XEXP (recog_data.operand[i], 0), NULL_PTR,
+ &XEXP (recog_data.operand[i], 0), (rtx*)0,
BASE_REG_CLASS,
GET_MODE (XEXP (recog_data.operand[i], 0)),
VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
rtx operand = recog_data.operand[i];
while (GET_CODE (operand) == SUBREG)
- operand = XEXP (operand, 0);
+ operand = SUBREG_REG (operand);
if ((GET_CODE (operand) == MEM
|| (GET_CODE (operand) == REG
&& REGNO (operand) >= FIRST_PSEUDO_REGISTER))
operand = *recog_data.operand_loc[i];
while (GET_CODE (operand) == SUBREG)
- operand = XEXP (operand, 0);
+ operand = SUBREG_REG (operand);
if (GET_CODE (operand) == REG)
{
if (modified[i] != RELOAD_WRITE)
rtx operand = recog_data.operand[i];
while (GET_CODE (operand) == SUBREG)
- operand = XEXP (operand, 0);
+ operand = SUBREG_REG (operand);
if ((GET_CODE (operand) == MEM
|| (GET_CODE (operand) == REG
&& REGNO (operand) >= FIRST_PSEUDO_REGISTER))
{
int secondary_in_reload = rld[i].secondary_in_reload;
- rld[secondary_in_reload].when_needed
- = RELOAD_FOR_OPADDR_ADDR;
+ rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
/* If there's a tertiary reload we have to change it also. */
if (secondary_in_reload > 0
{
int secondary_out_reload = rld[i].secondary_out_reload;
- rld[secondary_out_reload].when_needed
- = RELOAD_FOR_OPADDR_ADDR;
+ rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
/* If there's a tertiary reload we have to change it also. */
if (secondary_out_reload
int first_op_addr_num = -2;
int first_inpaddr_num[MAX_RECOG_OPERANDS];
int first_outpaddr_num[MAX_RECOG_OPERANDS];
- int need_change= 0;
+ int need_change = 0;
/* We use last_op_addr_reload and the contents of the above arrays
first as flags - -2 means no instance encountered, -1 means exactly
one instance encountered.
INSN, if nonzero, is the insn in which we do the reload. It is used
to determine if we may generate output reloads, and where to put USEs
- for pseudos that we have to replace with stack slots. */
+ for pseudos that we have to replace with stack slots.
+
+ ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
+ result of find_reloads_address. */
static rtx
-find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
+find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
+ address_reloaded)
rtx x;
int opnum;
enum reload_type type;
int ind_levels;
int is_set_dest;
rtx insn;
+ int *address_reloaded;
{
register RTX_CODE code = GET_CODE (x);
if (replace_reloads && recog_data.operand[opnum] != x)
emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
x = mem;
- find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
- opnum, type, ind_levels, insn);
+ i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
+ opnum, type, ind_levels, insn);
+ if (address_reloaded)
+ *address_reloaded = i;
}
}
return x;
if (code == MEM)
{
rtx tem = x;
- find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
- opnum, type, ind_levels, insn);
+
+ i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
+ opnum, type, ind_levels, insn);
+ if (address_reloaded)
+ *address_reloaded = i;
+
return tem;
}
&& regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
&& reg_equiv_constant[regno] != 0
&& (tem = operand_subword (reg_equiv_constant[regno],
- SUBREG_WORD (x), 0,
+ SUBREG_BYTE (x) / UNITS_PER_WORD, 0,
GET_MODE (SUBREG_REG (x)))) != 0)
{
/* TEM is now a word sized constant for the bits from X that
&& (GET_MODE_SIZE (GET_MODE (x))
< GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
{
- int shift = SUBREG_WORD (x) * BITS_PER_WORD;
+ int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
if (WORDS_BIG_ENDIAN)
shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
- GET_MODE_BITSIZE (GET_MODE (x))
x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
insn);
}
+ else if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM
+ && (GET_MODE_SIZE (GET_MODE (x))
+ > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
+ && mode_dependent_address_p (XEXP (SUBREG_REG (x), 0)))
+ {
+ /* A paradoxical subreg will simply have the mode of the access
+ changed, so we need to reload such a memory operand to stabilize
+ the meaning of the memory access. */
+ enum machine_mode subreg_mode = GET_MODE (SUBREG_REG (x));
+
+ /* SUBREG_REG (x) is a MEM, so we cant take the offset, instead we
+ calculate the register number as :
+ SUBREG_BYTE (x) / GET_MODE_SIZE (subreg_mode) */
+ if (is_set_dest)
+ push_reload (NULL_RTX, SUBREG_REG (x), (rtx*)0, &SUBREG_REG (x),
+ find_valid_class (subreg_mode,
+ SUBREG_BYTE (x) / GET_MODE_SIZE (subreg_mode)),
+ VOIDmode, subreg_mode, 0, 0, opnum, type);
+ else
+ push_reload (SUBREG_REG (x), NULL_RTX, &SUBREG_REG (x), (rtx*)0,
+ find_valid_class (subreg_mode,
+ SUBREG_BYTE (x) / GET_MODE_SIZE (subreg_mode)),
+ subreg_mode, VOIDmode, 0, 0, opnum, type);
+ }
for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
{
rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
- ind_levels, is_set_dest, insn);
+ ind_levels, is_set_dest, insn,
+ address_reloaded);
/* If we have replaced a reg with it's equivalent memory loc -
that can still be handled here e.g. if it's in a paradoxical
subreg - we must make the change in a copy, rather than using
/* If TEM might contain a pseudo, we must copy it to avoid
modifying it when we do the substitution for the reload. */
- if (rtx_varies_p (tem))
+ if (rtx_varies_p (tem, 0))
tem = copy_rtx (tem);
- tem = gen_rtx_MEM (GET_MODE (ad), tem);
- MEM_COPY_ATTRIBUTES (tem, reg_equiv_memory_loc[regno]);
- return tem;
+ tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
+ return adjust_address_nv (tem, GET_MODE (ad), 0);
}
/* Record all reloads needed for handling memory address AD
{
regno = REGNO (ad);
- if (reg_equiv_constant[regno] != 0
- && strict_memory_address_p (mode, reg_equiv_constant[regno]))
+ /* If the register is equivalent to an invariant expression, substitute
+ the invariant, and eliminate any eliminable register references. */
+ tem = reg_equiv_constant[regno];
+ if (tem != 0
+ && (tem = eliminate_regs (tem, mode, insn))
+ && strict_memory_address_p (mode, tem))
{
- *loc = ad = reg_equiv_constant[regno];
+ *loc = ad = tem;
return 0;
}
tem = make_memloc (ad, regno);
if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
{
- find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
+ find_reloads_address (GET_MODE (tem), (rtx*)0, XEXP (tem, 0),
&XEXP (tem, 0), opnum, ADDR_TYPE (type),
ind_levels, insn);
}
else if (regno < FIRST_PSEUDO_REGISTER
&& REGNO_MODE_OK_FOR_BASE_P (regno, mode)
- && ! regno_clobbered_p (regno, this_insn))
+ && ! regno_clobbered_p (regno, this_insn, mode, 0))
return 0;
/* If we do not have one of the cases above, we must do the reload. */
- push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
+ push_reload (ad, NULL_RTX, loc, (rtx*)0, BASE_REG_CLASS,
GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
return 1;
}
{
/* Must use TEM here, not AD, since it is the one that will
have any subexpressions reloaded, if needed. */
- push_reload (tem, NULL_RTX, loc, NULL_PTR,
+ push_reload (tem, NULL_RTX, loc, (rtx*)0,
BASE_REG_CLASS, GET_MODE (tem),
VOIDmode, 0,
0, opnum, type);
into a register. */
if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
{
- /* If AD is in address in the constant pool, the MEM rtx may be shared.
+ /* If AD is an address in the constant pool, the MEM rtx may be shared.
Unshare it so we can safely alter it. */
if (memrefloc && GET_CODE (ad) == SYMBOL_REF
&& CONSTANT_POOL_ADDRESS_P (ad))
return addr;
}
\f
+/* Update the REG_INC notes for an insn. It updates all REG_INC
+ notes for the instruction which refer to REGNO the to refer
+ to the reload number.
+
+ INSN is the insn for which any REG_INC notes need updating.
+
+ REGNO is the register number which has been reloaded.
+
+ RELOADNUM is the reload number. */
+
+static void
+update_auto_inc_notes (insn, regno, reloadnum)
+ rtx insn ATTRIBUTE_UNUSED;
+ int regno ATTRIBUTE_UNUSED;
+ int reloadnum ATTRIBUTE_UNUSED;
+{
+#ifdef AUTO_INC_DEC
+ rtx link;
+
+ for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
+ if (REG_NOTE_KIND (link) == REG_INC
+ && REGNO (XEXP (link, 0)) == regno)
+ push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
+#endif
+}
+\f
/* Record the pseudo registers we must reload into hard registers in a
subexpression of a would-be memory address, X referring to a value
in mode MODE. (This function is not called if the address we find
/* Note that we take shortcuts assuming that no multi-reg machine mode
occurs as part of an address.
Also, this is not fully machine-customizable; it works for machines
- such as vaxes and 68000's and 32000's, but other possible machines
+ such as VAXen and 68000's and 32000's, but other possible machines
could have addressing modes that this does not handle right. */
static int
code0 = GET_CODE (op0);
if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
op0 = gen_rtx_REG (word_mode,
- REGNO (op0) + SUBREG_WORD (orig_op0));
+ (REGNO (op0) +
+ subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
+ GET_MODE (SUBREG_REG (orig_op0)),
+ SUBREG_BYTE (orig_op0),
+ GET_MODE (orig_op0))));
}
if (GET_CODE (op1) == SUBREG)
op1 = SUBREG_REG (op1);
code1 = GET_CODE (op1);
if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
+ /* ??? Why is this given op1's mode and above for
+ ??? op0 SUBREGs we use word_mode? */
op1 = gen_rtx_REG (GET_MODE (op1),
- REGNO (op1) + SUBREG_WORD (orig_op1));
+ (REGNO (op1) +
+ subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
+ GET_MODE (SUBREG_REG (orig_op1)),
+ SUBREG_BYTE (orig_op1),
+ GET_MODE (orig_op1))));
}
if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
return 0;
+ case POST_MODIFY:
+ case PRE_MODIFY:
+ {
+ rtx op0 = XEXP (x, 0);
+ rtx op1 = XEXP (x, 1);
+
+ if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
+ return 0;
+
+ /* Currently, we only support {PRE,POST}_MODIFY constructs
+ where a base register is {inc,dec}remented by the contents
+ of another register or by a constant value. Thus, these
+ operands must match. */
+ if (op0 != XEXP (op1, 0))
+ abort ();
+
+ /* Require index register (or constant). Let's just handle the
+ register case in the meantime... If the target allows
+ auto-modify by a constant then we could try replacing a pseudo
+ register with its equivalent constant where applicable. */
+ if (REG_P (XEXP (op1, 1)))
+ if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
+ find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
+ opnum, type, ind_levels, insn);
+
+ if (REG_P (XEXP (op1, 0)))
+ {
+ int regno = REGNO (XEXP (op1, 0));
+ int reloadnum;
+
+ /* A register that is incremented cannot be constant! */
+ if (regno >= FIRST_PSEUDO_REGISTER
+ && reg_equiv_constant[regno] != 0)
+ abort ();
+
+ /* Handle a register that is equivalent to a memory location
+ which cannot be addressed directly. */
+ if (reg_equiv_memory_loc[regno] != 0
+ && (reg_equiv_address[regno] != 0
+ || num_not_at_initial_offset))
+ {
+ rtx tem = make_memloc (XEXP (x, 0), regno);
+
+ if (reg_equiv_address[regno]
+ || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
+ {
+ /* First reload the memory location's address.
+ We can't use ADDR_TYPE (type) here, because we need to
+ write back the value after reading it, hence we actually
+ need two registers. */
+ find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
+ &XEXP (tem, 0), opnum,
+ RELOAD_OTHER,
+ ind_levels, insn);
+
+ /* Then reload the memory location into a base
+ register. */
+ reloadnum = push_reload (tem, tem, &XEXP (x, 0),
+ &XEXP (op1, 0), BASE_REG_CLASS,
+ GET_MODE (x), GET_MODE (x), 0,
+ 0, opnum, RELOAD_OTHER);
+
+ update_auto_inc_notes (this_insn, regno, reloadnum);
+ return 0;
+ }
+ }
+
+ if (reg_renumber[regno] >= 0)
+ regno = reg_renumber[regno];
+
+ /* We require a base register here... */
+ if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
+ {
+ reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
+ &XEXP (op1, 0), &XEXP (x, 0),
+ BASE_REG_CLASS,
+ GET_MODE (x), GET_MODE (x), 0, 0,
+ opnum, RELOAD_OTHER);
+
+ update_auto_inc_notes (this_insn, regno, reloadnum);
+ return 0;
+ }
+ }
+ else
+ abort ();
+ }
+ return 0;
+
case POST_INC:
case POST_DEC:
case PRE_INC:
|| !(context ? REGNO_OK_FOR_INDEX_P (regno)
: REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
{
-#ifdef AUTO_INC_DEC
- register rtx link;
-#endif
int reloadnum;
/* If we can output the register afterwards, do so, this
&& ((*insn_data[icode].operand[1].predicate)
(equiv, Pmode))))
{
- loc = &XEXP (x, 0);
+ /* We use the original pseudo for loc, so that
+ emit_reload_insns() knows which pseudo this
+ reload refers to and updates the pseudo rtx, not
+ its equivalent memory location, as well as the
+ corresponding entry in reg_last_reload_reg. */
+ loc = &XEXP (x_orig, 0);
x = XEXP (x, 0);
reloadnum
= push_reload (x, x, loc, loc,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), GET_MODE (x), 0, 0,
opnum, RELOAD_OTHER);
-
- /* If we created a new MEM based on reg_equiv_mem[REGNO], then
- LOC above is part of the new MEM, not the MEM in INSN.
-
- We must also replace the address of the MEM in INSN. */
- if (&XEXP (x_orig, 0) != loc)
- push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
-
}
else
{
reloadnum
- = push_reload (x, NULL_RTX, loc, NULL_PTR,
+ = push_reload (x, NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), GET_MODE (x), 0, 0,
opnum, type);
value = 1;
}
-#ifdef AUTO_INC_DEC
- /* Update the REG_INC notes. */
-
- for (link = REG_NOTES (this_insn);
- link; link = XEXP (link, 1))
- if (REG_NOTE_KIND (link) == REG_INC
- && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
- push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
-#endif
+ update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
+ reloadnum);
}
return value;
}
XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
opnum, type, ind_levels, insn);
- reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
+ reloadnum = push_reload (x, NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
rld[reloadnum].inc
find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
opnum, ADDR_TYPE (type), ind_levels, insn);
- push_reload (*loc, NULL_RTX, loc, NULL_PTR,
+ push_reload (*loc, NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
that feeds this insn. */
if (reg_equiv_mem[regno] != 0)
{
- push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
+ push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
|| !(context ? REGNO_OK_FOR_INDEX_P (regno)
: REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
{
- push_reload (x, NULL_RTX, loc, NULL_PTR,
+ push_reload (x, NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
in this insn, reload it into some other register to be safe.
The CLOBBER is supposed to make the register unavailable
from before this insn to after it. */
- if (regno_clobbered_p (regno, this_insn))
+ if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
{
- push_reload (x, NULL_RTX, loc, NULL_PTR,
+ push_reload (x, NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
needless copies if SUBREG_REG is multi-word. */
if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
{
- int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
+ int regno = subreg_regno (x);
if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
: REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
{
- push_reload (x, NULL_RTX, loc, NULL_PTR,
+ push_reload (x, NULL_RTX, loc, (rtx*)0,
(context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
{
x = find_reloads_subreg_address (x, 0, opnum, type,
ind_levels, insn);
- push_reload (x, NULL_RTX, loc, NULL_PTR, class,
+ push_reload (x, NULL_RTX, loc, (rtx*)0, class,
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
{
rtx tem;
- /* If this is a CONST_INT, it could have been created by a
- plus_constant call in eliminate_regs, which means it may be
- on the reload_obstack. reload_obstack will be freed later, so
- we can't allow such RTL to be put in the constant pool. There
- is code in force_const_mem to check for this case, but it doesn't
- work because we have already popped off the reload_obstack, so
- rtl_obstack == saveable_obstack is true at this point. */
- if (GET_CODE (x) == CONST_INT)
- tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
- else
- tem = x = force_const_mem (mode, x);
-
+ tem = x = force_const_mem (mode, x);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
opnum, type, ind_levels, 0);
}
{
rtx tem;
- /* See comment above. */
- if (GET_CODE (XEXP (x, 1)) == CONST_INT)
- tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
- else
- tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
-
+ tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
opnum, type, ind_levels, 0);
}
- push_reload (x, NULL_RTX, loc, NULL_PTR, class,
+ push_reload (x, NULL_RTX, loc, (rtx*)0, class,
mode, VOIDmode, 0, 0, opnum, type);
}
\f
if (force_replace
|| ! rtx_equal_p (tem, reg_equiv_mem[regno]))
{
- int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
+ int offset = SUBREG_BYTE (x);
+ unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
+ unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
+
+ XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
+ PUT_MODE (tem, GET_MODE (x));
- if (BYTES_BIG_ENDIAN)
+ /* If this was a paradoxical subreg that we replaced, the
+ resulting memory must be sufficiently aligned to allow
+ us to widen the mode of the memory. */
+ if (outer_size > inner_size && STRICT_ALIGNMENT)
{
- int size;
+ rtx base;
- size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
- offset += MIN (size, UNITS_PER_WORD);
- size = GET_MODE_SIZE (GET_MODE (x));
- offset -= MIN (size, UNITS_PER_WORD);
+ base = XEXP (tem, 0);
+ if (GET_CODE (base) == PLUS)
+ {
+ if (GET_CODE (XEXP (base, 1)) == CONST_INT
+ && INTVAL (XEXP (base, 1)) % outer_size != 0)
+ return x;
+ base = XEXP (base, 0);
+ }
+ if (GET_CODE (base) != REG
+ || (REGNO_POINTER_ALIGN (REGNO (base))
+ < outer_size * BITS_PER_UNIT))
+ return x;
}
- XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
- PUT_MODE (tem, GET_MODE (x));
+
find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
&XEXP (tem, 0), opnum, ADDR_TYPE (type),
ind_levels, insn);
+
/* If this is not a toplevel operand, find_reloads doesn't see
this substitution. We have to emit a USE of the pseudo so
that delete_output_reload can see it. */
\f
/* Substitute into the current INSN the registers into which we have reloaded
the things that need reloading. The array `replacements'
- says contains the locations of all pointers that must be changed
+ contains the locations of all pointers that must be changed
and says what to replace them with.
Return the rtx that X translates into; usually X, but modified. */
void
-subst_reloads ()
+subst_reloads (insn)
+ rtx insn;
{
register int i;
register rtx reloadreg = rld[r->what].reg_rtx;
if (reloadreg)
{
+ /* If we're replacing a LABEL_REF with a register, add a
+ REG_LABEL note to indicate to flow which label this
+ register refers to. */
+ if (GET_CODE (*r->where) == LABEL_REF
+ && GET_CODE (insn) == JUMP_INSN)
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
+ XEXP (*r->where, 0),
+ REG_NOTES (insn));
+
/* Encapsulate RELOADREG so its machine mode matches what
used to be there. Note that gen_lowpart_common will
do the wrong thing if RELOADREG is multi-word. RELOADREG
*r->subreg_loc = SUBREG_REG (reloadreg);
else
{
+ int final_offset =
+ SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
+
+ /* When working with SUBREGs the rule is that the byte
+ offset must be a multiple of the SUBREG's mode. */
+ final_offset = (final_offset /
+ GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
+ final_offset = (final_offset *
+ GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
+
*r->where = SUBREG_REG (reloadreg);
- SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
+ SUBREG_BYTE (*r->subreg_loc) = final_offset;
}
}
else
if (GET_CODE (reloadreg) == REG)
return gen_rtx_REG (GET_MODE (*loc),
- REGNO (reloadreg) + SUBREG_WORD (*loc));
+ (REGNO (reloadreg) +
+ subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
+ GET_MODE (SUBREG_REG (*loc)),
+ SUBREG_BYTE (*loc),
+ GET_MODE (*loc))));
else if (GET_MODE (reloadreg) == GET_MODE (*loc))
return reloadreg;
else
- return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
- SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
+ {
+ int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
+
+ /* When working with SUBREGs the rule is that the byte
+ offset must be a multiple of the SUBREG's mode. */
+ final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
+ final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
+ return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
+ final_offset);
+ }
}
}
if (reg_equiv_memory_loc[r])
return refers_to_regno_for_reload_p (regno, endregno,
reg_equiv_memory_loc[r],
- NULL_PTR);
+ (rtx*)0);
if (reg_equiv_constant[r])
return 0;
if (GET_CODE (SUBREG_REG (x)) == REG
&& REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
{
- unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
+ unsigned int inner_regno = subreg_regno (x);
unsigned int inner_endregno
= inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
else if (fmt[i] == 'E')
{
register int j;
- for (j = XVECLEN (x, i) - 1; j >=0; j--)
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
if (loc != &XVECEXP (x, i, j)
&& refers_to_regno_for_reload_p (regno, endregno,
XVECEXP (x, i, j), loc))
contains a MEM (we don't bother checking for memory addresses that can't
conflict because we expect this to be a rare case.
- This function is similar to reg_overlap_mention_p in rtlanal.c except
+ This function is similar to reg_overlap_mentioned_p in rtlanal.c except
that we look at equivalences for pseudos that didn't get hard registers. */
int
{
regno = REGNO (SUBREG_REG (x));
if (regno < FIRST_PSEUDO_REGISTER)
- regno += SUBREG_WORD (x);
+ regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
+ GET_MODE (SUBREG_REG (x)),
+ SUBREG_BYTE (x),
+ GET_MODE (x));
}
else if (GET_CODE (x) == REG)
{
endregno = regno + (regno < FIRST_PSEUDO_REGISTER
? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
- return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
+ return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*)0);
}
/* Return nonzero if anything in X contains a MEM. Look also for pseudo
case PRE_INC:
case POST_DEC:
case PRE_DEC:
+ case POST_MODIFY:
+ case PRE_MODIFY:
return 0;
default:
break;
&& (valtry
= operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
&& (valueno = true_regnum (valtry)) >= 0)))
- if (other >= 0
- ? valueno == other
- : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
- && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
- valueno)))
- {
- value = valtry;
- where = p;
- break;
- }
+ {
+ if (other >= 0)
+ {
+ if (valueno != other)
+ continue;
+ }
+ else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
+ continue;
+ else
+ {
+ int i;
+
+ for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
+ if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
+ valueno + i))
+ break;
+ if (i >= 0)
+ continue;
+ }
+ value = valtry;
+ where = p;
+ break;
+ }
}
}
&& refers_to_regno_for_reload_p (valueno,
(valueno
+ HARD_REGNO_NREGS (valueno, mode)),
- goal, NULL_PTR))
+ goal, (rtx*)0))
return 0;
/* Reject registers that overlap GOAL. */
if (GET_CODE (p) == CALL_INSN)
{
int i;
-
+
if (goal_mem || need_stable_sp)
return 0;
-
+
if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
for (i = 0; i < nregs; ++i)
if (call_used_regs[regno + i])
for (i = 0; i < valuenregs; ++i)
if (call_used_regs[valueno + i])
return 0;
- }
-
#ifdef NON_SAVING_SETJMP
- if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
- && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
- return 0;
+ if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
+ return 0;
#endif
+ }
- if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
+ if (INSN_P (p))
{
pat = PATTERN (p);
&& xregno + xnregs > regno)
return 0;
else if (xregno < valueno + valuenregs
- && xregno + xnregs > valueno)
+ && xregno + xnregs > valueno)
return 0;
else if (goal_mem_addr_varies
&& reg_overlap_mentioned_for_reload_p (dest,
|| GET_CODE (addr) == POST_INC)
&& XEXP (addr, 0) == inced)
return GET_MODE_SIZE (GET_MODE (x));
+ else if ((GET_CODE (addr) == PRE_MODIFY
+ || GET_CODE (addr) == POST_MODIFY)
+ && GET_CODE (XEXP (addr, 1)) == PLUS
+ && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
+ && XEXP (addr, 0) == inced
+ && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
+ {
+ i = INTVAL (XEXP (XEXP (addr, 1), 1));
+ return i < 0 ? -i : i;
+ }
}
fmt = GET_RTX_FORMAT (code);
return 0;
}
\f
-/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
+/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
+ If SETS is nonzero, also consider SETs. */
int
-regno_clobbered_p (regno, insn)
+regno_clobbered_p (regno, insn, mode, sets)
unsigned int regno;
rtx insn;
+ enum machine_mode mode;
+ int sets;
{
- if (GET_CODE (PATTERN (insn)) == CLOBBER
+ unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
+ unsigned int endregno = regno + nregs;
+
+ if ((GET_CODE (PATTERN (insn)) == CLOBBER
+ || (sets && GET_CODE (PATTERN (insn)) == SET))
&& GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
- return REGNO (XEXP (PATTERN (insn), 0)) == regno;
+ {
+ unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
+
+ return test >= regno && test < endregno;
+ }
if (GET_CODE (PATTERN (insn)) == PARALLEL)
{
for (; i >= 0; i--)
{
rtx elt = XVECEXP (PATTERN (insn), 0, i);
- if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
- && REGNO (XEXP (elt, 0)) == regno)
- return 1;
+ if ((GET_CODE (elt) == CLOBBER
+ || (sets && GET_CODE (PATTERN (insn)) == SET))
+ && GET_CODE (XEXP (elt, 0)) == REG)
+ {
+ unsigned int test = REGNO (XEXP (elt, 0));
+
+ if (test >= regno && test < endregno)
+ return 1;
+ }
}
}
fprintf (f, ", optional");
if (rld[r].nongroup)
- fprintf (stderr, ", nongroup");
+ fprintf (f, ", nongroup");
if (rld[r].inc != 0)
fprintf (f, ", inc by %d", rld[r].inc);
prefix = "\n\t";
if (rld[r].secondary_in_icode != CODE_FOR_nothing)
{
- fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
+ fprintf (f, "%ssecondary_in_icode = %s", prefix,
insn_data[rld[r].secondary_in_icode].name);
prefix = ", ";
}
if (rld[r].secondary_out_icode != CODE_FOR_nothing)
- fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
+ fprintf (f, "%ssecondary_out_icode = %s", prefix,
insn_data[rld[r].secondary_out_icode].name);
fprintf (f, "\n");
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