/* Search an insn for pseudo regs that must be in hard regs and are not.
- Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
+ Copyright (C) 1987, 88, 89, 92-5, 1996 Free Software Foundation, Inc.
This file is part of GNU CC.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
/* This file contains subroutines used only from the file reload1.c.
#define REG_OK_STRICT
+#include <stdio.h>
#include "config.h"
#include "rtl.h"
#include "insn-config.h"
#include "hard-reg-set.h"
#include "flags.h"
#include "real.h"
+#include "output.h"
#ifndef REGISTER_MOVE_COST
#define REGISTER_MOVE_COST(x, y) 2
when reloaded, on input.
reload_outmode enum machine_mode; mode this operand should have
when reloaded, on output.
- reload_strict_low char; currently always zero; used to mean that this
- reload is inside a STRICT_LOW_PART, but we don't
- need to know this anymore.
reload_optional char, nonzero for an optional reload.
Optional reloads are ignored unless the
value is already sitting in a register.
reload_inmode or reload_outmode.
reload_nocombine char, nonzero if this reload shouldn't be
combined with another reload.
- reload_needed_for rtx, operand this reload is needed for address of.
- 0 means it isn't needed for addressing.
- reload_needed_for_multiple
- int, 1 if this reload needed for more than one thing.
- reload_when_needed enum, classifies reload as needed either for
+ reload_opnum int, operand number being reloaded. This is
+ used to group related reloads and need not always
+ be equal to the actual operand number in the insn,
+ though it current will be; for in-out operands, it
+ is one of the two operand numbers.
+ reload_when_needed enum, classifies reload as needed either for
addressing an input reload, addressing an output,
for addressing a non-reloaded mem ref,
or for unspecified purposes (i.e., more than one
of the above).
- reload_secondary_reload int, gives the reload number of a secondary
- reload, when needed; otherwise -1
reload_secondary_p int, 1 if this is a secondary register for one
- or more reloads.
- reload_secondary_icode enum insn_code, if a secondary reload is required,
+ or more reloads.
+ reload_secondary_in_reload
+ reload_secondary_out_reload
+ int, gives the reload number of a secondary
+ reload, when needed; otherwise -1
+ reload_secondary_in_icode
+ reload_secondary_out_icode
+ enum insn_code, if a secondary reload is required,
gives the INSN_CODE that uses the secondary
reload as a scratch register, or CODE_FOR_nothing
if the secondary reload register is to be an
enum reg_class reload_reg_class[MAX_RELOADS];
enum machine_mode reload_inmode[MAX_RELOADS];
enum machine_mode reload_outmode[MAX_RELOADS];
-char reload_strict_low[MAX_RELOADS];
rtx reload_reg_rtx[MAX_RELOADS];
char reload_optional[MAX_RELOADS];
int reload_inc[MAX_RELOADS];
rtx reload_in_reg[MAX_RELOADS];
char reload_nocombine[MAX_RELOADS];
-int reload_needed_for_multiple[MAX_RELOADS];
-rtx reload_needed_for[MAX_RELOADS];
-enum reload_when_needed reload_when_needed[MAX_RELOADS];
-int reload_secondary_reload[MAX_RELOADS];
+int reload_opnum[MAX_RELOADS];
+enum reload_type reload_when_needed[MAX_RELOADS];
int reload_secondary_p[MAX_RELOADS];
-enum insn_code reload_secondary_icode[MAX_RELOADS];
+int reload_secondary_in_reload[MAX_RELOADS];
+int reload_secondary_out_reload[MAX_RELOADS];
+enum insn_code reload_secondary_in_icode[MAX_RELOADS];
+enum insn_code reload_secondary_out_icode[MAX_RELOADS];
/* All the "earlyclobber" operands of the current insn
are recorded here. */
int n_earlyclobbers;
rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
+int reload_n_operands;
+
/* Replacing reloads.
If `replace_reloads' is nonzero, then as each reload is recorded
/* Number of replacements currently recorded. */
static int n_replacements;
+/* Used to track what is modified by an operand. */
+struct decomposition
+{
+ int reg_flag; /* Nonzero if referencing a register. */
+ int safe; /* Nonzero if this can't conflict with anything. */
+ rtx base; /* Base address for MEM. */
+ HOST_WIDE_INT start; /* Starting offset or register number. */
+ HOST_WIDE_INT end; /* Ending offset or register number. */
+};
+
/* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
(see reg_equiv_address). */
static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
/* Save MEMs needed to copy from one class of registers to another. One MEM
is used per mode, but normally only one or two modes are ever used.
- We keep two versions, before and after register elimination. */
+ We keep two versions, before and after register elimination. The one
+ after register elimination is record separately for each operand. This
+ is done in case the address is not valid to be sure that we separately
+ reload each. */
static rtx secondary_memlocs[NUM_MACHINE_MODES];
-static rtx secondary_memlocs_elim[NUM_MACHINE_MODES];
+static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
#endif
/* The instruction we are doing reloads for;
operand, which can be different for that from the input operand. */
static int output_reloadnum;
-static int alternative_allows_memconst ();
-static rtx find_dummy_reload ();
-static rtx find_reloads_toplev ();
-static int find_reloads_address ();
-static int find_reloads_address_1 ();
-static void find_reloads_address_part ();
-static int hard_reg_set_here_p ();
-/* static rtx forget_volatility (); */
-static rtx subst_reg_equivs ();
-static rtx subst_indexed_address ();
-void copy_replacements ();
-rtx find_equiv_reg ();
-static int find_inc_amount ();
+ /* Compare two RTX's. */
+#define MATCHES(x, y) \
+ (x == y || (x != 0 && (GET_CODE (x) == REG \
+ ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
+ : rtx_equal_p (x, y) && ! side_effects_p (x))))
+
+ /* Indicates if two reloads purposes are for similar enough things that we
+ can merge their reloads. */
+#define MERGABLE_RELOADS(when1, when2, op1, op2) \
+ ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
+ || ((when1) == (when2) && (op1) == (op2)) \
+ || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
+ || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
+ && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
+ || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
+ && (when2) == RELOAD_FOR_OTHER_ADDRESS))
+
+ /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
+#define MERGE_TO_OTHER(when1, when2, op1, op2) \
+ ((when1) != (when2) \
+ || ! ((op1) == (op2) \
+ || (when1) == RELOAD_FOR_INPUT \
+ || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
+ || (when1) == RELOAD_FOR_OTHER_ADDRESS))
+
+static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
+ enum machine_mode, enum reload_type,
+ enum insn_code *));
+static enum reg_class find_valid_class PROTO((enum machine_mode, int));
+static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
+ enum machine_mode, enum machine_mode,
+ int, int, int, enum reload_type));
+static void push_replacement PROTO((rtx *, int, enum machine_mode));
+static void combine_reloads PROTO((void));
+static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
+ enum machine_mode, enum machine_mode,
+ enum reg_class, int));
+static int earlyclobber_operand_p PROTO((rtx));
+static int hard_reg_set_here_p PROTO((int, int, rtx));
+static struct decomposition decompose PROTO((rtx));
+static int immune_p PROTO((rtx, rtx, struct decomposition));
+static int alternative_allows_memconst PROTO((char *, int));
+static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
+static rtx make_memloc PROTO((rtx, int));
+static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
+ int, enum reload_type, int));
+static rtx subst_reg_equivs PROTO((rtx));
+static rtx subst_indexed_address PROTO((rtx));
+static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
+ enum reload_type,int));
+static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
+ enum machine_mode, int,
+ enum reload_type, int));
+static int find_inc_amount PROTO((rtx, rtx));
\f
#ifdef HAVE_SECONDARY_RELOADS
/* Determine if any secondary reloads are needed for loading (if IN_P is
non-zero) or storing (if IN_P is zero) X to or from a reload register of
- register class RELOAD_CLASS in mode RELOAD_MODE.
-
- Return the register class of a secondary reload register, or NO_REGS if
- none. *PMODE is set to the mode that the register is required in.
- If the reload register is needed as a scratch register instead of an
- intermediate register, *PICODE is set to the insn_code of the insn to be
- used to load or store the primary reload register; otherwise *PICODE
- is set to CODE_FOR_nothing.
+ register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
+ are needed, push them.
- In some cases (such as storing MQ into an external memory location on
- the RT), both an intermediate register and a scratch register. In that
- case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
- register is returned, and the *PTERTIARY_... variables are set to describe
- the scratch register. */
+ Return the reload number of the secondary reload we made, or -1 if
+ we didn't need one. *PICODE is set to the insn_code to use if we do
+ need a secondary reload. */
-static enum reg_class
-find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
- ptertiary_class, ptertiary_icode, ptertiary_mode)
+static int
+push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
+ type, picode)
+ int in_p;
rtx x;
+ int opnum;
+ int optional;
enum reg_class reload_class;
enum machine_mode reload_mode;
- int in_p;
+ enum reload_type type;
enum insn_code *picode;
- enum machine_mode *pmode;
- enum reg_class *ptertiary_class;
- enum insn_code *ptertiary_icode;
- enum machine_mode *ptertiary_mode;
{
enum reg_class class = NO_REGS;
enum machine_mode mode = reload_mode;
enum reg_class t_class = NO_REGS;
enum machine_mode t_mode = VOIDmode;
enum insn_code t_icode = CODE_FOR_nothing;
+ enum reload_type secondary_type;
+ int i;
+ int s_reload, t_reload = -1;
+
+ if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
+ secondary_type = type;
+ else
+ secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
+
+ *picode = CODE_FOR_nothing;
+
+ /* If X is a paradoxical SUBREG, use the inner value to determine both the
+ mode and object being reloaded. */
+ if (GET_CODE (x) == SUBREG
+#ifdef CLASS_CANNOT_CHANGE_SIZE
+ && reload_class != CLASS_CANNOT_CHANGE_SIZE
+#endif
+ && (GET_MODE_SIZE (GET_MODE (x))
+ > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
+ {
+ x = SUBREG_REG (x);
+ reload_mode = GET_MODE (x);
+ }
/* If X is a pseudo-register that has an equivalent MEM (actually, if it
is still a pseudo-register by now, it *must* have an equivalent MEM
class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
#endif
- /* If we don't need any secondary registers, go away; the rest of the
- values won't be used. */
+ /* If we don't need any secondary registers, done. */
if (class == NO_REGS)
- return NO_REGS;
+ return -1;
/* Get a possible insn to use. If the predicate doesn't accept X, don't
use the insn. */
}
}
- *pmode = mode;
- *picode = icode;
- *ptertiary_class = t_class;
- *ptertiary_mode = t_mode;
- *ptertiary_icode = t_icode;
+ /* This case isn't valid, so fail. Reload is allowed to use the same
+ register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
+ in the case of a secondary register, we actually need two different
+ registers for correct code. We fail here to prevent the possibility of
+ silently generating incorrect code later.
+
+ The convention is that secondary input reloads are valid only if the
+ secondary_class is different from class. If you have such a case, you
+ can not use secondary reloads, you must work around the problem some
+ other way.
+
+ Allow this when MODE is not reload_mode and assume that the generated
+ code handles this case (it does on the Alpha, which is the only place
+ this currently happens). */
+
+ if (in_p && class == reload_class && mode == reload_mode)
+ abort ();
- return class;
+ /* If we need a tertiary reload, see if we have one we can reuse or else
+ make a new one. */
+
+ if (t_class != NO_REGS)
+ {
+ for (t_reload = 0; t_reload < n_reloads; t_reload++)
+ if (reload_secondary_p[t_reload]
+ && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
+ || reg_class_subset_p (reload_reg_class[t_reload], t_class))
+ && ((in_p && reload_inmode[t_reload] == t_mode)
+ || (! in_p && reload_outmode[t_reload] == t_mode))
+ && ((in_p && (reload_secondary_in_icode[t_reload]
+ == CODE_FOR_nothing))
+ || (! in_p &&(reload_secondary_out_icode[t_reload]
+ == CODE_FOR_nothing)))
+ && (reg_class_size[(int) t_class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (secondary_type,
+ reload_when_needed[t_reload],
+ opnum, reload_opnum[t_reload]))
+ {
+ if (in_p)
+ reload_inmode[t_reload] = t_mode;
+ if (! in_p)
+ reload_outmode[t_reload] = t_mode;
+
+ if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
+ reload_reg_class[t_reload] = t_class;
+
+ reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
+ reload_optional[t_reload] &= optional;
+ reload_secondary_p[t_reload] = 1;
+ if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
+ opnum, reload_opnum[t_reload]))
+ reload_when_needed[t_reload] = RELOAD_OTHER;
+ }
+
+ if (t_reload == n_reloads)
+ {
+ /* We need to make a new tertiary reload for this register class. */
+ reload_in[t_reload] = reload_out[t_reload] = 0;
+ reload_reg_class[t_reload] = t_class;
+ reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
+ reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
+ reload_reg_rtx[t_reload] = 0;
+ reload_optional[t_reload] = optional;
+ reload_inc[t_reload] = 0;
+ /* Maybe we could combine these, but it seems too tricky. */
+ reload_nocombine[t_reload] = 1;
+ reload_in_reg[t_reload] = 0;
+ reload_opnum[t_reload] = opnum;
+ reload_when_needed[t_reload] = secondary_type;
+ reload_secondary_in_reload[t_reload] = -1;
+ reload_secondary_out_reload[t_reload] = -1;
+ reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
+ reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
+ reload_secondary_p[t_reload] = 1;
+
+ n_reloads++;
+ }
+ }
+
+ /* See if we can reuse an existing secondary reload. */
+ for (s_reload = 0; s_reload < n_reloads; s_reload++)
+ if (reload_secondary_p[s_reload]
+ && (reg_class_subset_p (class, reload_reg_class[s_reload])
+ || reg_class_subset_p (reload_reg_class[s_reload], class))
+ && ((in_p && reload_inmode[s_reload] == mode)
+ || (! in_p && reload_outmode[s_reload] == mode))
+ && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
+ || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
+ && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
+ || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
+ && (reg_class_size[(int) class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
+ opnum, reload_opnum[s_reload]))
+ {
+ if (in_p)
+ reload_inmode[s_reload] = mode;
+ if (! in_p)
+ reload_outmode[s_reload] = mode;
+
+ if (reg_class_subset_p (class, reload_reg_class[s_reload]))
+ reload_reg_class[s_reload] = class;
+
+ reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
+ reload_optional[s_reload] &= optional;
+ reload_secondary_p[s_reload] = 1;
+ if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
+ opnum, reload_opnum[s_reload]))
+ reload_when_needed[s_reload] = RELOAD_OTHER;
+ }
+
+ if (s_reload == n_reloads)
+ {
+ /* We need to make a new secondary reload for this register class. */
+ reload_in[s_reload] = reload_out[s_reload] = 0;
+ reload_reg_class[s_reload] = class;
+
+ reload_inmode[s_reload] = in_p ? mode : VOIDmode;
+ reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
+ reload_reg_rtx[s_reload] = 0;
+ reload_optional[s_reload] = optional;
+ reload_inc[s_reload] = 0;
+ /* Maybe we could combine these, but it seems too tricky. */
+ reload_nocombine[s_reload] = 1;
+ reload_in_reg[s_reload] = 0;
+ reload_opnum[s_reload] = opnum;
+ reload_when_needed[s_reload] = secondary_type;
+ reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
+ reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
+ reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
+ reload_secondary_out_icode[s_reload]
+ = ! in_p ? t_icode : CODE_FOR_nothing;
+ reload_secondary_p[s_reload] = 1;
+
+ n_reloads++;
+
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* If we need a memory location to copy between the two reload regs,
+ set it up now. */
+
+ if (in_p && icode == CODE_FOR_nothing
+ && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
+ get_secondary_mem (x, reload_mode, opnum, type);
+
+ if (! in_p && icode == CODE_FOR_nothing
+ && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
+ get_secondary_mem (x, reload_mode, opnum, type);
+#endif
+ }
+
+ *picode = icode;
+ return s_reload;
}
#endif /* HAVE_SECONDARY_RELOADS */
\f
call find_reloads_address on the location being returned. */
rtx
-get_secondary_mem (x, mode)
+get_secondary_mem (x, mode, opnum, type)
rtx x;
enum machine_mode mode;
+ int opnum;
+ enum reload_type type;
{
rtx loc;
int mem_valid;
- /* If MODE is narrower than a word, widen it. This is required because
- most machines that require these memory locations do not support
- short load and stores from all registers (e.g., FP registers). We could
- possibly conditionalize this, but we lose nothing by doing the wider
- mode. */
+ /* By default, if MODE is narrower than a word, widen it to a word.
+ This is required because most machines that require these memory
+ locations do not support short load and stores from all registers
+ (e.g., FP registers). */
+#ifdef SECONDARY_MEMORY_NEEDED_MODE
+ mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
+#else
if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
+#endif
- /* If we already have made a MEM for this insn, return it. */
- if (secondary_memlocs_elim[(int) mode] != 0)
- return secondary_memlocs_elim[(int) mode];
+ /* If we already have made a MEM for this operand in MODE, return it. */
+ if (secondary_memlocs_elim[(int) mode][opnum] != 0)
+ return secondary_memlocs_elim[(int) mode][opnum];
/* If this is the first time we've tried to get a MEM for this mode,
allocate a new one. `something_changed' in reload will get set
by noticing that the frame size has changed. */
if (secondary_memlocs[(int) mode] == 0)
- secondary_memlocs[(int) mode]
- = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
+ {
+#ifdef SECONDARY_MEMORY_NEEDED_RTX
+ secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
+#else
+ secondary_memlocs[(int) mode]
+ = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
+#endif
+ }
/* Get a version of the address doing any eliminations needed. If that
didn't give us a new MEM, make a new one if it isn't valid. */
- loc = eliminate_regs (secondary_memlocs[(int) mode], 0, NULL_RTX);
+ loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
if (! mem_valid && loc == secondary_memlocs[(int) mode])
/* The only time the call below will do anything is if the stack
offset is too large. In that case IND_LEVELS doesn't matter, so we
- can just pass a zero. */
+ can just pass a zero. Adjust the type to be the address of the
+ corresponding object. If the address was valid, save the eliminated
+ address. If it wasn't valid, we need to make a reload each time, so
+ don't save it. */
+
if (! mem_valid)
- find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), x, 0);
+ {
+ type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
+ : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
+ : RELOAD_OTHER);
- secondary_memlocs_elim[(int) mode] = loc;
+ find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
+ opnum, type, 0);
+ }
+ secondary_memlocs_elim[(int) mode][opnum] = loc;
return loc;
}
void
clear_secondary_mem ()
{
- int i;
-
- for (i = 0; i < NUM_MACHINE_MODES; i++)
- secondary_memlocs[i] = 0;
+ bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
}
#endif /* SECONDARY_MEMORY_NEEDED */
\f
-/* Record one (sometimes two) reload that needs to be performed.
+/* Find the largest class for which every register number plus N is valid in
+ M1 (if in range). Abort if no such class exists. */
+
+static enum reg_class
+find_valid_class (m1, n)
+ enum machine_mode m1;
+ int n;
+{
+ int class;
+ int regno;
+ enum reg_class best_class;
+ int best_size = 0;
+
+ for (class = 1; class < N_REG_CLASSES; class++)
+ {
+ int bad = 0;
+ for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
+ if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
+ && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
+ && ! HARD_REGNO_MODE_OK (regno + n, m1))
+ bad = 1;
+
+ if (! bad && reg_class_size[class] > best_size)
+ best_class = class, best_size = reg_class_size[class];
+ }
+
+ if (best_size == 0)
+ abort ();
+
+ return best_class;
+}
+\f
+/* Record one reload that needs to be performed.
IN is an rtx saying where the data are to be found before this instruction.
OUT says where they must be stored after the instruction.
(IN is zero for data not read, and OUT is zero for data not written.)
INLOC and OUTLOC point to the places in the instructions where
IN and OUT were found.
+ If IN and OUT are both non-zero, it means the same register must be used
+ to reload both IN and OUT.
+
CLASS is a register class required for the reloaded data.
INMODE is the machine mode that the instruction requires
for the reg that replaces IN and OUTMODE is likewise for OUT.
OPTIONAL nonzero means this reload does not need to be performed:
it can be discarded if that is more convenient.
+ OPNUM and TYPE say what the purpose of this reload is.
+
The return value is the reload-number for this reload.
If both IN and OUT are nonzero, in some rare cases we might
static int
push_reload (in, out, inloc, outloc, class,
- inmode, outmode, strict_low, optional, needed_for)
+ inmode, outmode, strict_low, optional, opnum, type)
register rtx in, out;
rtx *inloc, *outloc;
enum reg_class class;
enum machine_mode inmode, outmode;
int strict_low;
int optional;
- rtx needed_for;
+ int opnum;
+ enum reload_type type;
{
register int i;
int dont_share = 0;
+ int dont_remove_subreg = 0;
rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
- int secondary_reload = -1;
- enum insn_code secondary_icode = CODE_FOR_nothing;
-
- /* Compare two RTX's. */
-#define MATCHES(x, y) \
- (x == y || (x != 0 && (GET_CODE (x) == REG \
- ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
- : rtx_equal_p (x, y) && ! side_effects_p (x))))
+ int secondary_in_reload = -1, secondary_out_reload = -1;
+ enum insn_code secondary_in_icode = CODE_FOR_nothing;
+ enum insn_code secondary_out_icode = CODE_FOR_nothing;
/* INMODE and/or OUTMODE could be VOIDmode if no mode
has been specified for the operand. In that case,
out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
}
- /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
- really reload just the inside expression in its own mode.
- If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
- register is a pseudo, this will become the same as the above case.
- Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
+ /* If we are reloading a (SUBREG constant ...), really reload just the
+ inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
+ If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
+ a pseudo and hence will become a MEM) with M1 wider than M2 and the
+ register is a pseudo, also reload the inside expression.
+ For machines that extend byte loads, do this for any SUBREG of a pseudo
+ where both M1 and M2 are a word or smaller, M1 is wider than M2, and
+ M2 is an integral mode that gets extended when loaded.
+ Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
either M1 is not valid for R or M2 is wider than a word but we only
need one word to store an M2-sized quantity in R.
+ (However, if OUT is nonzero, we need to reload the reg *and*
+ the subreg, so do nothing here, and let following statement handle it.)
+
Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
we can't handle it here because CONST_INT does not indicate a mode.
STRICT_LOW_PART (presumably, in == out in the cas).
Also reload the inner expression if it does not require a secondary
- reload but the SUBREG does. */
+ reload but the SUBREG does.
- if (in != 0 && GET_CODE (in) == SUBREG
- && (GET_CODE (SUBREG_REG (in)) != REG
+ Finally, reload the inner expression if it is a register that is in
+ the class whose registers cannot be referenced in a different size
+ and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
+ cannot reload just the inside since we might end up with the wrong
+ register class. */
+
+ if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
+#ifdef CLASS_CANNOT_CHANGE_SIZE
+ && class != CLASS_CANNOT_CHANGE_SIZE
+#endif
+ && (CONSTANT_P (SUBREG_REG (in))
+ || GET_CODE (SUBREG_REG (in)) == PLUS
|| strict_low
- || (GET_CODE (SUBREG_REG (in)) == REG
- && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
- && (GET_MODE_SIZE (inmode)
- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
- || (GET_CODE (SUBREG_REG (in)) == REG
- && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
- && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
+ || (((GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
+ || GET_CODE (SUBREG_REG (in)) == MEM)
+ && ((GET_MODE_SIZE (inmode)
+ > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
+#ifdef LOAD_EXTEND_OP
|| (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
&& (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
- > UNITS_PER_WORD)
- && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
- / UNITS_PER_WORD)
- != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
- GET_MODE (SUBREG_REG (in)))))))
+ <= UNITS_PER_WORD)
+ && (GET_MODE_SIZE (inmode)
+ > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
+ && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
+ && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
+#endif
+ ))
+ || (GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ /* The case where out is nonzero
+ is handled differently in the following statement. */
+ && (out == 0 || SUBREG_WORD (in) == 0)
+ && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ > UNITS_PER_WORD)
+ && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
+ GET_MODE (SUBREG_REG (in)))))
+ || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
+ + SUBREG_WORD (in)),
+ inmode)))
#ifdef SECONDARY_INPUT_RELOAD_CLASS
|| (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
&& (SECONDARY_INPUT_RELOAD_CLASS (class,
SUBREG_REG (in))
== NO_REGS))
#endif
+#ifdef CLASS_CANNOT_CHANGE_SIZE
+ || (GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ && (TEST_HARD_REG_BIT
+ (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
+ REGNO (SUBREG_REG (in))))
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ != GET_MODE_SIZE (inmode)))
+#endif
))
{
in_subreg_loc = inloc;
inloc = &SUBREG_REG (in);
in = *inloc;
+#ifndef LOAD_EXTEND_OP
if (GET_CODE (in) == MEM)
/* This is supposed to happen only for paradoxical subregs made by
combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
abort ();
+#endif
inmode = GET_MODE (in);
}
+ /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
+ either M1 is not valid for R or M2 is wider than a word but we only
+ need one word to store an M2-sized quantity in R.
+
+ However, we must reload the inner reg *as well as* the subreg in
+ that case. */
+
+ if (in != 0 && GET_CODE (in) == SUBREG
+ && GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)) + SUBREG_WORD (in),
+ inmode)
+ || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ > UNITS_PER_WORD)
+ && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
+ GET_MODE (SUBREG_REG (in)))))))
+ {
+ /* This relies on the fact that emit_reload_insns outputs the
+ instructions for input reloads of type RELOAD_OTHER in the same
+ order as the reloads. Thus if the outer reload is also of type
+ RELOAD_OTHER, we are guaranteed that this inner reload will be
+ output before the outer reload. */
+ push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
+ find_valid_class (inmode, SUBREG_WORD (in)),
+ VOIDmode, VOIDmode, 0, 0, opnum, type);
+ dont_remove_subreg = 1;
+ }
+
+
/* Similarly for paradoxical and problematical SUBREGs on the output.
Note that there is no reason we need worry about the previous value
of SUBREG_REG (out); even if wider than out,
storing in a subreg is entitled to clobber it all
(except in the case of STRICT_LOW_PART,
and in that case the constraint should label it input-output.) */
- if (out != 0 && GET_CODE (out) == SUBREG
- && (GET_CODE (SUBREG_REG (out)) != REG
+ if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
+#ifdef CLASS_CANNOT_CHANGE_SIZE
+ && class != CLASS_CANNOT_CHANGE_SIZE
+#endif
+ && (CONSTANT_P (SUBREG_REG (out))
|| strict_low
- || (GET_CODE (SUBREG_REG (out)) == REG
- && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
- && (GET_MODE_SIZE (outmode)
- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
+ || (((GET_CODE (SUBREG_REG (out)) == REG
+ && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
+ || GET_CODE (SUBREG_REG (out)) == MEM)
+ && ((GET_MODE_SIZE (outmode)
+ > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
|| (GET_CODE (SUBREG_REG (out)) == REG
&& REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
- && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
- || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
- && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
- > UNITS_PER_WORD)
- && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
- / UNITS_PER_WORD)
- != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
- GET_MODE (SUBREG_REG (out)))))))
+ && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
+ > UNITS_PER_WORD)
+ && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
+ / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
+ GET_MODE (SUBREG_REG (out)))))
+ || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
+ + SUBREG_WORD (out)),
+ outmode)))
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
|| (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
&& (SECONDARY_OUTPUT_RELOAD_CLASS (class,
SUBREG_REG (out))
== NO_REGS))
#endif
+#ifdef CLASS_CANNOT_CHANGE_SIZE
+ || (GET_CODE (SUBREG_REG (out)) == REG
+ && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
+ && (TEST_HARD_REG_BIT
+ (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
+ REGNO (SUBREG_REG (out))))
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
+ != GET_MODE_SIZE (outmode)))
+#endif
))
{
out_subreg_loc = outloc;
outloc = &SUBREG_REG (out);
- out = *outloc;
- if (GET_CODE (out) == MEM
+ out = *outloc;
+#ifndef LOAD_EXTEND_OP
+ if (GET_CODE (out) == MEM
&& GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
abort ();
+#endif
outmode = GET_MODE (out);
}
- /* That's all we use STRICT_LOW for, so clear it. At some point,
- we may want to get rid of reload_strict_low. */
- strict_low = 0;
+ /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
+ either M1 is not valid for R or M2 is wider than a word but we only
+ need one word to store an M2-sized quantity in R.
+
+ However, we must reload the inner reg *as well as* the subreg in
+ that case. In this case, the inner reg is an in-out reload. */
+
+ if (out != 0 && GET_CODE (out) == SUBREG
+ && GET_CODE (SUBREG_REG (out)) == REG
+ && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
+ && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
+ outmode)
+ || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
+ > UNITS_PER_WORD)
+ && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
+ / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
+ GET_MODE (SUBREG_REG (out)))))))
+ {
+ /* This relies on the fact that emit_reload_insns outputs the
+ instructions for output reloads of type RELOAD_OTHER in reverse
+ order of the reloads. Thus if the outer reload is also of type
+ RELOAD_OTHER, we are guaranteed that this inner reload will be
+ output after the outer reload. */
+ dont_remove_subreg = 1;
+ push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
+ &SUBREG_REG (out),
+ find_valid_class (outmode, SUBREG_WORD (out)),
+ VOIDmode, VOIDmode, 0, 0,
+ opnum, RELOAD_OTHER);
+ }
/* If IN appears in OUT, we can't share any input-only reload for IN. */
if (in != 0 && out != 0 && GET_CODE (out) == MEM
simplifies some of the cases below. */
if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
- && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ && ! dont_remove_subreg)
in = gen_rtx (REG, GET_MODE (in),
REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
/* Similarly for OUT. */
if (out != 0 && GET_CODE (out) == SUBREG
&& GET_CODE (SUBREG_REG (out)) == REG
- && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
+ && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
+ && ! dont_remove_subreg)
out = gen_rtx (REG, GET_MODE (out),
REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
if (in != 0)
class = PREFERRED_RELOAD_CLASS (in, class);
- /* Output reloads may need analagous treatment, different in detail. */
+ /* Output reloads may need analogous treatment, different in detail. */
#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
if (out != 0)
class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
#endif
- if (class == NO_REGS)
- abort ();
-
/* Verify that this class is at least possible for the mode that
is specified. */
if (this_insn_is_asm)
mode = inmode;
else
mode = outmode;
+ if (mode == VOIDmode)
+ {
+ error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
+ mode = word_mode;
+ if (in != 0)
+ inmode = word_mode;
+ if (out != 0)
+ outmode = word_mode;
+ }
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (HARD_REGNO_MODE_OK (i, mode)
&& TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
}
}
+ if (class == NO_REGS)
+ abort ();
+
/* We can use an existing reload if the class is right
and at least one of IN and OUT is a match
and the other is at worst neutral.
- (A zero compared against anything is neutral.) */
+ (A zero compared against anything is neutral.)
+
+ If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
+ for the same thing since that can cause us to need more reload registers
+ than we otherwise would. */
+
for (i = 0; i < n_reloads; i++)
if ((reg_class_subset_p (class, reload_reg_class[i])
|| reg_class_subset_p (reload_reg_class[i], class))
- && reload_strict_low[i] == strict_low
/* If the existing reload has a register, it must fit our class. */
&& (reload_reg_rtx[i] == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) class],
&& (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
||
(out != 0 && MATCHES (reload_out[i], out)
- && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
+ && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
+ && (reg_class_size[(int) class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (type, reload_when_needed[i],
+ opnum, reload_opnum[i]))
break;
/* Reloading a plain reg for input can match a reload to postincrement
&& (reload_reg_rtx[i] == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) class],
true_regnum (reload_reg_rtx[i])))
- && reload_strict_low[i] == strict_low
&& out == 0 && reload_out[i] == 0 && reload_in[i] != 0
&& ((GET_CODE (in) == REG
&& (GET_CODE (reload_in[i]) == POST_INC
|| GET_CODE (in) == POST_DEC
|| GET_CODE (in) == PRE_INC
|| GET_CODE (in) == PRE_DEC)
- && MATCHES (XEXP (in, 0), reload_in[i]))))
+ && MATCHES (XEXP (in, 0), reload_in[i])))
+ && (reg_class_size[(int) class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (type, reload_when_needed[i],
+ opnum, reload_opnum[i]))
{
/* Make sure reload_in ultimately has the increment,
not the plain register. */
if (i == n_reloads)
{
-#ifdef HAVE_SECONDARY_RELOADS
- enum reg_class secondary_class = NO_REGS;
- enum reg_class secondary_out_class = NO_REGS;
- enum machine_mode secondary_mode = inmode;
- enum machine_mode secondary_out_mode = outmode;
- enum insn_code secondary_icode;
- enum insn_code secondary_out_icode = CODE_FOR_nothing;
- enum reg_class tertiary_class = NO_REGS;
- enum reg_class tertiary_out_class = NO_REGS;
- enum machine_mode tertiary_mode;
- enum machine_mode tertiary_out_mode;
- enum insn_code tertiary_icode;
- enum insn_code tertiary_out_icode = CODE_FOR_nothing;
- int tertiary_reload = -1;
-
- /* See if we need a secondary reload register to move between
- CLASS and IN or CLASS and OUT. Get the modes and icodes to
- use for each of them if so. */
+ /* See if we need a secondary reload register to move between CLASS
+ and IN or CLASS and OUT. Get the icode and push any required reloads
+ needed for each of them if so. */
#ifdef SECONDARY_INPUT_RELOAD_CLASS
if (in != 0)
- secondary_class
- = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
- &secondary_mode, &tertiary_class,
- &tertiary_icode, &tertiary_mode);
+ secondary_in_reload
+ = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
+ &secondary_in_icode);
#endif
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
if (out != 0 && GET_CODE (out) != SCRATCH)
- secondary_out_class
- = find_secondary_reload (out, class, outmode, 0,
- &secondary_out_icode, &secondary_out_mode,
- &tertiary_out_class, &tertiary_out_icode,
- &tertiary_out_mode);
-#endif
-
- /* We can only record one secondary and one tertiary reload. If both
- IN and OUT need secondary reloads, we can only make an in-out
- reload if neither need an insn and if the classes are compatible. */
-
- if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
- && reg_class_subset_p (secondary_out_class, secondary_class))
- secondary_class = secondary_out_class;
-
- if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
- && (! reg_class_subset_p (secondary_class, secondary_out_class)
- || secondary_icode != CODE_FOR_nothing
- || secondary_out_icode != CODE_FOR_nothing))
- {
- push_reload (NULL_RTX, out, NULL_PTR, outloc, class,
- VOIDmode, outmode, strict_low, optional, needed_for);
- out = 0;
- outloc = 0;
- outmode = VOIDmode;
- }
-
- /* If we need a secondary reload for OUT but not IN, copy the
- information. */
- if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
- {
- secondary_class = secondary_out_class;
- secondary_icode = secondary_out_icode;
- tertiary_class = tertiary_out_class;
- tertiary_icode = tertiary_out_icode;
- tertiary_mode = tertiary_out_mode;
- }
-
- if (secondary_class != NO_REGS)
- {
- /* If we need a tertiary reload, see if we have one we can reuse
- or else make one. */
-
- if (tertiary_class != NO_REGS)
- {
- for (tertiary_reload = 0; tertiary_reload < n_reloads;
- tertiary_reload++)
- if (reload_secondary_p[tertiary_reload]
- && (reg_class_subset_p (tertiary_class,
- reload_reg_class[tertiary_reload])
- || reg_class_subset_p (reload_reg_class[tertiary_reload],
- tertiary_class))
- && ((reload_inmode[tertiary_reload] == tertiary_mode)
- || reload_inmode[tertiary_reload] == VOIDmode)
- && ((reload_outmode[tertiary_reload] == tertiary_mode)
- || reload_outmode[tertiary_reload] == VOIDmode)
- && (reload_secondary_icode[tertiary_reload]
- == CODE_FOR_nothing))
-
- {
- if (tertiary_mode != VOIDmode)
- reload_inmode[tertiary_reload] = tertiary_mode;
- if (tertiary_out_mode != VOIDmode)
- reload_outmode[tertiary_reload] = tertiary_mode;
- if (reg_class_subset_p (tertiary_class,
- reload_reg_class[tertiary_reload]))
- reload_reg_class[tertiary_reload] = tertiary_class;
- if (reload_needed_for[tertiary_reload] != needed_for)
- reload_needed_for_multiple[tertiary_reload] = 1;
- reload_optional[tertiary_reload] &= optional;
- reload_secondary_p[tertiary_reload] = 1;
- }
-
- if (tertiary_reload == n_reloads)
- {
- /* We need to make a new tertiary reload for this register
- class. */
- reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
- reload_reg_class[tertiary_reload] = tertiary_class;
- reload_inmode[tertiary_reload] = tertiary_mode;
- reload_outmode[tertiary_reload] = tertiary_mode;
- reload_reg_rtx[tertiary_reload] = 0;
- reload_optional[tertiary_reload] = optional;
- reload_inc[tertiary_reload] = 0;
- reload_strict_low[tertiary_reload] = 0;
- /* Maybe we could combine these, but it seems too tricky. */
- reload_nocombine[tertiary_reload] = 1;
- reload_in_reg[tertiary_reload] = 0;
- reload_needed_for[tertiary_reload] = needed_for;
- reload_needed_for_multiple[tertiary_reload] = 0;
- reload_secondary_reload[tertiary_reload] = -1;
- reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
- reload_secondary_p[tertiary_reload] = 1;
-
- n_reloads++;
- i = n_reloads;
- }
- }
-
- /* See if we can reuse an existing secondary reload. */
- for (secondary_reload = 0; secondary_reload < n_reloads;
- secondary_reload++)
- if (reload_secondary_p[secondary_reload]
- && (reg_class_subset_p (secondary_class,
- reload_reg_class[secondary_reload])
- || reg_class_subset_p (reload_reg_class[secondary_reload],
- secondary_class))
- && ((reload_inmode[secondary_reload] == secondary_mode)
- || reload_inmode[secondary_reload] == VOIDmode)
- && ((reload_outmode[secondary_reload] == secondary_out_mode)
- || reload_outmode[secondary_reload] == VOIDmode)
- && reload_secondary_reload[secondary_reload] == tertiary_reload
- && reload_secondary_icode[secondary_reload] == tertiary_icode)
- {
- if (secondary_mode != VOIDmode)
- reload_inmode[secondary_reload] = secondary_mode;
- if (secondary_out_mode != VOIDmode)
- reload_outmode[secondary_reload] = secondary_out_mode;
- if (reg_class_subset_p (secondary_class,
- reload_reg_class[secondary_reload]))
- reload_reg_class[secondary_reload] = secondary_class;
- if (reload_needed_for[secondary_reload] != needed_for)
- reload_needed_for_multiple[secondary_reload] = 1;
- reload_optional[secondary_reload] &= optional;
- reload_secondary_p[secondary_reload] = 1;
- }
-
- if (secondary_reload == n_reloads)
- {
- /* We need to make a new secondary reload for this register
- class. */
- reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
- reload_reg_class[secondary_reload] = secondary_class;
- reload_inmode[secondary_reload] = secondary_mode;
- reload_outmode[secondary_reload] = secondary_out_mode;
- reload_reg_rtx[secondary_reload] = 0;
- reload_optional[secondary_reload] = optional;
- reload_inc[secondary_reload] = 0;
- reload_strict_low[secondary_reload] = 0;
- /* Maybe we could combine these, but it seems too tricky. */
- reload_nocombine[secondary_reload] = 1;
- reload_in_reg[secondary_reload] = 0;
- reload_needed_for[secondary_reload] = needed_for;
- reload_needed_for_multiple[secondary_reload] = 0;
- reload_secondary_reload[secondary_reload] = tertiary_reload;
- reload_secondary_icode[secondary_reload] = tertiary_icode;
- reload_secondary_p[secondary_reload] = 1;
-
- n_reloads++;
- i = n_reloads;
-
-#ifdef SECONDARY_MEMORY_NEEDED
- /* If we need a memory location to copy between the two
- reload regs, set it up now. */
-
- if (in != 0 && secondary_icode == CODE_FOR_nothing
- && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
- get_secondary_mem (in, inmode);
-
- if (out != 0 && secondary_icode == CODE_FOR_nothing
- && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
- get_secondary_mem (out, outmode);
-#endif
- }
- }
+ secondary_out_reload
+ = push_secondary_reload (0, out, opnum, optional, class, outmode,
+ type, &secondary_out_icode);
#endif
/* We found no existing reload suitable for re-use.
So add an additional reload. */
+ i = n_reloads;
reload_in[i] = in;
reload_out[i] = out;
reload_reg_class[i] = class;
reload_reg_rtx[i] = 0;
reload_optional[i] = optional;
reload_inc[i] = 0;
- reload_strict_low[i] = strict_low;
reload_nocombine[i] = 0;
reload_in_reg[i] = inloc ? *inloc : 0;
- reload_needed_for[i] = needed_for;
- reload_needed_for_multiple[i] = 0;
- reload_secondary_reload[i] = secondary_reload;
- reload_secondary_icode[i] = secondary_icode;
+ reload_opnum[i] = opnum;
+ reload_when_needed[i] = type;
+ reload_secondary_in_reload[i] = secondary_in_reload;
+ reload_secondary_out_reload[i] = secondary_out_reload;
+ reload_secondary_in_icode[i] = secondary_in_icode;
+ reload_secondary_out_icode[i] = secondary_out_icode;
reload_secondary_p[i] = 0;
n_reloads++;
&& REGNO (in) < FIRST_PSEUDO_REGISTER
&& SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
class, inmode))
- get_secondary_mem (in, inmode);
+ get_secondary_mem (in, inmode, opnum, type);
if (out != 0 && GET_CODE (out) == REG
&& REGNO (out) < FIRST_PSEUDO_REGISTER
&& SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
outmode))
- get_secondary_mem (out, outmode);
+ get_secondary_mem (out, outmode, opnum, type);
#endif
}
else
if (reg_class_subset_p (class, reload_reg_class[i]))
reload_reg_class[i] = class;
reload_optional[i] &= optional;
- if (reload_needed_for[i] != needed_for)
- reload_needed_for_multiple[i] = 1;
+ if (MERGE_TO_OTHER (type, reload_when_needed[i],
+ opnum, reload_opnum[i]))
+ reload_when_needed[i] = RELOAD_OTHER;
+ reload_opnum[i] = MIN (reload_opnum[i], opnum);
}
/* If the ostensible rtx being reload differs from the rtx found
if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
{
reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
+ inmode, outmode,
reload_reg_class[i], i);
/* If the outgoing register already contains the same value
+ HARD_REGNO_NREGS (regno,
inmode)),
PATTERN (this_insn), inloc)
+ /* If this is also an output reload, IN cannot be used as
+ the reload register if it is set in this insn unless IN
+ is also OUT. */
+ && (out == 0 || in == out
+ || ! hard_reg_set_here_p (regno,
+ (regno
+ + HARD_REGNO_NREGS (regno,
+ inmode)),
+ PATTERN (this_insn)))
+ /* ??? Why is this code so different from the previous?
+ Is there any simple coherent way to describe the two together?
+ What's going on here. */
&& (in != out
|| (GET_CODE (in) == SUBREG
&& (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
}
}
\f
+/* Transfer all replacements that used to be in reload FROM to be in
+ reload TO. */
+
+void
+transfer_replacements (to, from)
+ int to, from;
+{
+ int i;
+
+ for (i = 0; i < n_replacements; i++)
+ if (replacements[i].what == from)
+ replacements[i].what = to;
+}
+\f
/* If there is only one output reload, and it is not for an earlyclobber
operand, try to combine it with a (logically unrelated) input reload
to reduce the number of reload registers needed.
{
int i;
int output_reload = -1;
+ int secondary_out = -1;
rtx note;
/* Find the output reload; return unless there is exactly one
return;
/* If this reload is for an earlyclobber operand, we can't do anything. */
-
- for (i = 0; i < n_earlyclobbers; i++)
- if (reload_out[output_reload] == reload_earlyclobbers[i])
- return;
+ if (earlyclobber_operand_p (reload_out[output_reload]))
+ return;
/* Check each input reload; can we combine it? */
for (i = 0; i < n_reloads; i++)
if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
/* Life span of this reload must not extend past main insn. */
- && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
- && ! reload_needed_for_multiple[i]
- && reload_inmode[i] == reload_outmode[output_reload]
+ && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
+ && reload_when_needed[i] != RELOAD_OTHER
+ && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
+ == CLASS_MAX_NREGS (reload_reg_class[output_reload],
+ reload_outmode[output_reload]))
&& reload_inc[i] == 0
&& reload_reg_rtx[i] == 0
- && reload_strict_low[i] == 0
- /* Don't combine two reloads with different secondary reloads. */
- && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
- || reload_secondary_reload[i] == -1
- || reload_secondary_reload[output_reload] == -1)
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* Don't combine two reloads with different secondary
+ memory locations. */
+ && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
+ || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
+ || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
+ secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
+#endif
+#ifdef SMALL_REGISTER_CLASSES
+ && reload_reg_class[i] == reload_reg_class[output_reload]
+#else
&& (reg_class_subset_p (reload_reg_class[i],
reload_reg_class[output_reload])
|| reg_class_subset_p (reload_reg_class[output_reload],
reload_reg_class[i]))
+#endif
&& (MATCHES (reload_in[i], reload_out[output_reload])
/* Args reversed because the first arg seems to be
the one that we imagine being modified
will clobber the address of the memory ref. */
&& ! (GET_CODE (reload_in[i]) == REG
&& reg_overlap_mentioned_for_reload_p (reload_in[i],
- reload_out[output_reload])))))
+ reload_out[output_reload]))))
+ && (reg_class_size[(int) reload_reg_class[i]]
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ /* We will allow making things slightly worse by combining an
+ input and an output, but no worse than that. */
+ && (reload_when_needed[i] == RELOAD_FOR_INPUT
+ || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
{
int j;
/* Mark the old output reload as inoperative. */
reload_out[output_reload] = 0;
/* The combined reload is needed for the entire insn. */
- reload_needed_for_multiple[i] = 1;
reload_when_needed[i] = RELOAD_OTHER;
/* If the output reload had a secondary reload, copy it. */
- if (reload_secondary_reload[output_reload] != -1)
- reload_secondary_reload[i] = reload_secondary_reload[output_reload];
+ if (reload_secondary_out_reload[output_reload] != -1)
+ {
+ reload_secondary_out_reload[i]
+ = reload_secondary_out_reload[output_reload];
+ reload_secondary_out_icode[i]
+ = reload_secondary_out_icode[output_reload];
+ }
+
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* Copy any secondary MEM. */
+ if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
+ secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
+ = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
+#endif
/* If required, minimize the register class. */
if (reg_class_subset_p (reload_reg_class[output_reload],
reload_reg_class[i]))
REGNO (XEXP (note, 0)))
&& (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
<= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
+ /* Ensure that a secondary or tertiary reload for this output
+ won't want this register. */
+ && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
+ || (! (TEST_HARD_REG_BIT
+ (reg_class_contents[(int) reload_reg_class[secondary_out]],
+ REGNO (XEXP (note, 0))))
+ && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
+ || ! (TEST_HARD_REG_BIT
+ (reg_class_contents[(int) reload_reg_class[secondary_out]],
+ REGNO (XEXP (note, 0)))))))
&& ! fixed_regs[REGNO (XEXP (note, 0))])
{
reload_reg_rtx[output_reload] = gen_rtx (REG,
is just to see if a register can be found, not to find and install it. */
static rtx
-find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
+find_dummy_reload (real_in, real_out, inloc, outloc,
+ inmode, outmode, class, for_real)
rtx real_in, real_out;
rtx *inloc, *outloc;
+ enum machine_mode inmode, outmode;
enum reg_class class;
int for_real;
{
/* If operands exceed a word, we can't use either of them
unless they have the same size. */
- if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
- && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
- || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
+ if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
+ && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
+ || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
return 0;
/* Find the inside of any subregs. */
&& REGNO (out) < FIRST_PSEUDO_REGISTER)
{
register int regno = REGNO (out) + out_offset;
- int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
+ int nwords = HARD_REGNO_NREGS (regno, outmode);
rtx saved_rtx;
/* When we consider whether the insn uses OUT,
if (GET_CODE (real_out) == REG)
value = real_out;
else
- value = gen_rtx (REG, GET_MODE (real_out), regno);
+ value = gen_rtx (REG, outmode, regno);
}
}
|| find_reg_note (this_insn, REG_UNUSED, real_out))
&& find_reg_note (this_insn, REG_DEAD, real_in)
&& !fixed_regs[REGNO (in)]
- && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
+ && HARD_REGNO_MODE_OK (REGNO (in),
+ /* The only case where out and real_out might
+ have different modes is where real_out
+ is a subreg, and in that case, out
+ has a real mode. */
+ (GET_MODE (out) != VOIDmode
+ ? GET_MODE (out) : outmode)))
{
register int regno = REGNO (in) + in_offset;
- int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
+ int nwords = HARD_REGNO_NREGS (regno, inmode);
if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
&& ! hard_reg_set_here_p (regno, regno + nwords,
if (GET_CODE (real_in) == REG)
value = real_in;
else
- value = gen_rtx (REG, GET_MODE (real_in), regno);
+ value = gen_rtx (REG, inmode, regno);
}
}
}
whether the IN or an OUT of a reload can serve as the
reload register. */
+/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
+
+static int
+earlyclobber_operand_p (x)
+ rtx x;
+{
+ int i;
+
+ for (i = 0; i < n_earlyclobbers; i++)
+ if (reload_earlyclobbers[i] == x)
+ return 1;
+
+ return 0;
+}
+
/* Return 1 if expression X alters a hard reg in the range
from BEG_REGNO (inclusive) to END_REGNO (exclusive),
either explicitly or in the guise of a pseudo-reg allocated to REGNO.
win:
return 1;
}
-
\f
/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
if they are the same hard reg, and has special hacks for
else
j = REGNO (y);
+ /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
+ multiple hard register group, so that for example (reg:DI 0) and
+ (reg:SI 1) will be considered the same register. */
+ if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
+ && i < FIRST_PSEUDO_REGISTER)
+ i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
+ if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
+ && j < FIRST_PSEUDO_REGISTER)
+ j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
+
return i == j;
}
/* If two operands must match, because they are really a single
int
n_occurrences (c, s)
- char c;
+ int c;
char *s;
{
int n = 0;
return n;
}
\f
-struct decomposition
-{
- int reg_flag;
- int safe;
- rtx base;
- HOST_WIDE_INT start;
- HOST_WIDE_INT end;
-};
-
/* Describe the range of registers or memory referenced by X.
If X is a register, set REG_FLAG and put the first register
number into START and the last plus one into END.
/* Constants and stack slots never overlap. */
if (CONSTANT_P (xdata.base)
&& (ydata.base == frame_pointer_rtx
+ || ydata.base == hard_frame_pointer_rtx
|| ydata.base == stack_pointer_rtx))
return 1;
if (CONSTANT_P (ydata.base)
&& (xdata.base == frame_pointer_rtx
+ || xdata.base == hard_frame_pointer_rtx
|| xdata.base == stack_pointer_rtx))
return 1;
/* If either base is variable, we don't know anything. */
int live_known;
short *reload_reg_p;
{
- rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
- int n_non_reloaded_operands = 0;
#ifdef REGISTER_CONSTRAINTS
- enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
-
register int insn_code_number;
- register int i;
+ register int i, j;
int noperands;
/* These are the constraints for the insn. We don't change them. */
char *constraints1[MAX_RECOG_OPERANDS];
char pref_or_nothing[MAX_RECOG_OPERANDS];
/* Nonzero for a MEM operand whose entire address needs a reload. */
int address_reloaded[MAX_RECOG_OPERANDS];
+ /* Value of enum reload_type to use for operand. */
+ enum reload_type operand_type[MAX_RECOG_OPERANDS];
+ /* Value of enum reload_type to use within address of operand. */
+ enum reload_type address_type[MAX_RECOG_OPERANDS];
+ /* Save the usage of each operand. */
+ enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
int no_input_reloads = 0, no_output_reloads = 0;
int n_alternatives;
int this_alternative[MAX_RECOG_OPERANDS];
char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
int goal_alternative_swapped;
- enum reload_modified modified[MAX_RECOG_OPERANDS];
int best;
int commutative;
char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
/* The eliminated forms of any secondary memory locations are per-insn, so
clear them out here. */
- bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
+ bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
#endif
/* Find what kind of insn this is. NOPERANDS gets number of operands.
return;
case PARALLEL:
case ASM_OPERANDS:
- noperands = asm_noperands (body);
+ reload_n_operands = noperands = asm_noperands (body);
if (noperands >= 0)
{
/* This insn is an `asm' with operands. */
constraints, operand_mode);
if (noperands > 0)
{
- bcopy (constraints, constraints1, noperands * sizeof (char *));
+ bcopy ((char *) constraints, (char *) constraints1,
+ noperands * sizeof (char *));
n_alternatives = n_occurrences (',', constraints[0]) + 1;
for (i = 1; i < noperands; i++)
if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
if (insn_code_number < 0)
fatal_insn_not_found (insn);
- noperands = insn_n_operands[insn_code_number];
+ reload_n_operands = noperands = insn_n_operands[insn_code_number];
n_alternatives = insn_n_alternatives[insn_code_number];
/* Just return "no reloads" if insn has no operands with constraints. */
if (n_alternatives == 0)
substed_operand[i] = recog_operand[i];
p = constraints[i];
- /* Scan this operand's constraint to see if it should match another. */
+ modified[i] = RELOAD_READ;
- while (c = *p++)
- if (c == '%')
- {
- /* The last operand should not be marked commutative. */
- if (i == noperands - 1)
- {
- if (this_insn_is_asm)
- warning_for_asm (this_insn,
- "`%%' constraint used with last operand");
- else
- abort ();
- }
- else
- commutative = i;
- }
- else if (c >= '0' && c <= '9')
- {
- c -= '0';
- operands_match[c][i]
- = operands_match_p (recog_operand[c], recog_operand[i]);
+ /* Scan this operand's constraint to see if it is an output operand,
+ an in-out operand, is commutative, or should match another. */
- /* An operand may not match itself. */
- if (c == i)
- {
- if (this_insn_is_asm)
- warning_for_asm (this_insn,
- "operand %d has constraint %d", i, c);
- else
- abort ();
- }
+ while (c = *p++)
+ {
+ if (c == '=')
+ modified[i] = RELOAD_WRITE;
+ else if (c == '+')
+ modified[i] = RELOAD_READ_WRITE;
+ else if (c == '%')
+ {
+ /* The last operand should not be marked commutative. */
+ if (i == noperands - 1)
+ {
+ if (this_insn_is_asm)
+ warning_for_asm (this_insn,
+ "`%%' constraint used with last operand");
+ else
+ abort ();
+ }
+ else
+ commutative = i;
+ }
+ else if (c >= '0' && c <= '9')
+ {
+ c -= '0';
+ operands_match[c][i]
+ = operands_match_p (recog_operand[c], recog_operand[i]);
- /* If C can be commuted with C+1, and C might need to match I,
- then C+1 might also need to match I. */
- if (commutative >= 0)
- {
- if (c == commutative || c == commutative + 1)
- {
- int other = c + (c == commutative ? 1 : -1);
- operands_match[other][i]
- = operands_match_p (recog_operand[other], recog_operand[i]);
- }
- if (i == commutative || i == commutative + 1)
- {
- int other = i + (i == commutative ? 1 : -1);
- operands_match[c][other]
- = operands_match_p (recog_operand[c], recog_operand[other]);
- }
- /* Note that C is supposed to be less than I.
- No need to consider altering both C and I
- because in that case we would alter one into the other. */
- }
- }
- }
+ /* An operand may not match itself. */
+ if (c == i)
+ {
+ if (this_insn_is_asm)
+ warning_for_asm (this_insn,
+ "operand %d has constraint %d", i, c);
+ else
+ abort ();
+ }
- /* Examine each operand that is a memory reference or memory address
- and reload parts of the addresses into index registers.
- While we are at it, initialize the array `modified'.
- Also here any references to pseudo regs that didn't get hard regs
- but are equivalent to constants get replaced in the insn itself
+ /* If C can be commuted with C+1, and C might need to match I,
+ then C+1 might also need to match I. */
+ if (commutative >= 0)
+ {
+ if (c == commutative || c == commutative + 1)
+ {
+ int other = c + (c == commutative ? 1 : -1);
+ operands_match[other][i]
+ = operands_match_p (recog_operand[other], recog_operand[i]);
+ }
+ if (i == commutative || i == commutative + 1)
+ {
+ int other = i + (i == commutative ? 1 : -1);
+ operands_match[c][other]
+ = operands_match_p (recog_operand[c], recog_operand[other]);
+ }
+ /* Note that C is supposed to be less than I.
+ No need to consider altering both C and I because in
+ that case we would alter one into the other. */
+ }
+ }
+ }
+ }
+
+ /* Examine each operand that is a memory reference or memory address
+ and reload parts of the addresses into index registers.
+ Also here any references to pseudo regs that didn't get hard regs
+ but are equivalent to constants get replaced in the insn itself
with those constants. Nobody will ever see them again.
Finally, set up the preferred classes of each operand. */
for (i = 0; i < noperands; i++)
{
register RTX_CODE code = GET_CODE (recog_operand[i]);
- modified[i] = RELOAD_READ;
- address_reloaded[i] = 0;
- if (constraints[i][0] == 'p')
+ address_reloaded[i] = 0;
+ operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
+ : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
+ : RELOAD_OTHER);
+ address_type[i]
+ = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
+ : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
+ : RELOAD_OTHER);
+
+ if (*constraints[i] == 0)
+ /* Ignore things like match_operator operands. */
+ ;
+ else if (constraints[i][0] == 'p')
{
find_reloads_address (VOIDmode, NULL_PTR,
recog_operand[i], recog_operand_loc[i],
- recog_operand[i], ind_levels);
+ i, operand_type[i], ind_levels);
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
}
else if (code == MEM)
recog_operand_loc[i],
XEXP (recog_operand[i], 0),
&XEXP (recog_operand[i], 0),
- recog_operand[i], ind_levels))
+ i, address_type[i], ind_levels))
address_reloaded[i] = 1;
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
}
else if (code == SUBREG)
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], ind_levels,
+ = find_reloads_toplev (recog_operand[i], i, address_type[i],
+ ind_levels,
set != 0
&& &SET_DEST (set) == recog_operand_loc[i]);
+ else if (code == PLUS)
+ /* We can get a PLUS as an "operand" as a result of
+ register elimination. See eliminate_regs and gen_reload. */
+ substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
+ = find_reloads_toplev (recog_operand[i], i, address_type[i],
+ ind_levels, 0);
else if (code == REG)
{
/* This is equivalent to calling find_reloads_toplev.
{
/* If reg_equiv_address is not a constant address, copy it,
since it may be shared. */
- rtx address = reg_equiv_address[regno];
+ /* We must rerun eliminate_regs, in case the elimination
+ offsets have changed. */
+ rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
+ 0, NULL_RTX),
+ 0);
if (rtx_varies_p (address))
address = copy_rtx (address);
/* If this is an output operand, we must output a CLOBBER
- after INSN so find_equiv_reg knows REGNO is being written. */
- if (constraints[i][0] == '='
- || constraints[i][0] == '+')
- emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
- insn);
+ after INSN so find_equiv_reg knows REGNO is being written.
+ Mark this insn specially, do we can put our output reloads
+ after it. */
+
+ if (modified[i] != RELOAD_READ)
+ PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
+ recog_operand[i]),
+ insn),
+ DImode);
*recog_operand_loc[i] = recog_operand[i]
= gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
recog_operand_loc[i],
XEXP (recog_operand[i], 0),
&XEXP (recog_operand[i], 0),
- recog_operand[i], ind_levels);
+ i, address_type[i], ind_levels);
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
}
}
regardless of what the constraint says. */
int force_reload = 0;
int offmemok = 0;
+ /* Nonzero if a constant forced into memory would be OK for this
+ operand. */
+ int constmemok = 0;
int earlyclobber = 0;
/* If the operand is a SUBREG, extract
{
offset += SUBREG_WORD (operand);
operand = SUBREG_REG (operand);
- /* Force reload if this is not a register or if there may may
- be a problem accessing the register in the outer mode. */
- if (GET_CODE (operand) != REG
-#if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
- /* ??? The comment below clearly does not match the code.
- What the code below actually does is set force_reload
- for a paradoxical subreg of a pseudo. rms and kenner
- can't see the point of doing this. */
- /* Nonparadoxical subreg of a pseudoreg.
- Don't to load the full width if on this machine
- we expected the fetch to extend. */
- || ((GET_MODE_SIZE (operand_mode[i])
- > GET_MODE_SIZE (GET_MODE (operand)))
- && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
+ /* Force reload if this is a constant or PLUS or if there may may
+ be a problem accessing OPERAND in the outer mode. */
+ if (CONSTANT_P (operand)
+ || GET_CODE (operand) == PLUS
+ /* We must force a reload of paradoxical SUBREGs
+ of a MEM because the alignment of the inner value
+ may not be enough to do the outer reference. On
+ big-endian machines, it may also reference outside
+ the object.
+
+ On machines that extend byte operations and we have a
+ SUBREG where both the inner and outer modes are no wider
+ than a word and the inner mode is narrower, is integral,
+ and gets extended when loaded from memory, combine.c has
+ made assumptions about the behavior of the machine in such
+ register access. If the data is, in fact, in memory we
+ must always load using the size assumed to be in the
+ register and let the insn do the different-sized
+ accesses. */
+ || ((GET_CODE (operand) == MEM
+ || (GET_CODE (operand)== REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
+ && (((GET_MODE_BITSIZE (GET_MODE (operand))
+ < BIGGEST_ALIGNMENT)
+ && (GET_MODE_SIZE (operand_mode[i])
+ > GET_MODE_SIZE (GET_MODE (operand))))
+ || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
+#ifdef LOAD_EXTEND_OP
+ || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (operand))
+ <= UNITS_PER_WORD)
+ && (GET_MODE_SIZE (operand_mode[i])
+ > GET_MODE_SIZE (GET_MODE (operand)))
+ && INTEGRAL_MODE_P (GET_MODE (operand))
+ && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
#endif
+ ))
/* Subreg of a hard reg which can't handle the subreg's mode
or which would handle that mode in the wrong number of
registers for subregging to work. */
- || (REGNO (operand) < FIRST_PSEUDO_REGISTER
- && (! HARD_REGNO_MODE_OK (REGNO (operand),
- operand_mode[i])
- || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
- && (GET_MODE_SIZE (GET_MODE (operand))
- > UNITS_PER_WORD)
- && ((GET_MODE_SIZE (GET_MODE (operand))
- / UNITS_PER_WORD)
- != HARD_REGNO_NREGS (REGNO (operand),
- GET_MODE (operand)))))))
+ || (GET_CODE (operand) == REG
+ && REGNO (operand) < FIRST_PSEUDO_REGISTER
+ && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (operand))
+ > UNITS_PER_WORD)
+ && ((GET_MODE_SIZE (GET_MODE (operand))
+ / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (operand),
+ GET_MODE (operand))))
+ || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
+ operand_mode[i]))))
force_reload = 1;
}
switch (c)
{
case '=':
- modified[i] = RELOAD_WRITE;
- break;
-
case '+':
- modified[i] = RELOAD_READ_WRITE;
- break;
-
case '*':
break;
value
= find_dummy_reload (recog_operand[i], recog_operand[c],
recog_operand_loc[i], recog_operand_loc[c],
+ operand_mode[i], operand_mode[c],
this_alternative[c], -1);
if (value != 0)
we are supposed to match can be fixed with reloads. */
badop = 0;
this_alternative[i] = this_alternative[c];
+
+ /* If we have to reload this operand and some previous
+ operand also had to match the same thing as this
+ operand, we don't know how to do that. So reject this
+ alternative. */
+ if (! win || force_reload)
+ for (j = 0; j < i; j++)
+ if (this_alternative_matches[j]
+ == this_alternative_matches[i])
+ badop = 1;
+
break;
case 'p':
/* All necessary reloads for an address_operand
were handled in find_reloads_address. */
- this_alternative[i] = (int) ALL_REGS;
+ this_alternative[i] = (int) BASE_REG_CLASS;
win = 1;
break;
win = 1;
if (CONSTANT_P (operand))
badop = 0;
+ constmemok = 1;
break;
case '<':
reject that case. */
&& (ind_levels ? offsettable_memref_p (operand)
: offsettable_nonstrict_memref_p (operand)))
+ /* A reloaded auto-increment address is offsettable,
+ because it is now just a simple register indirect. */
+ || (GET_CODE (operand) == MEM
+ && address_reloaded[i]
+ && (GET_CODE (XEXP (operand, 0)) == PRE_INC
+ || GET_CODE (XEXP (operand, 0)) == PRE_DEC
+ || GET_CODE (XEXP (operand, 0)) == POST_INC
+ || GET_CODE (XEXP (operand, 0)) == POST_DEC))
/* Certain mem addresses will become offsettable
after they themselves are reloaded. This is important;
we don't want our own handling of unoffsettables
|| reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
|| (GET_CODE (operand) == REG
&& REGNO (operand) >= FIRST_PSEUDO_REGISTER
- && reg_renumber[REGNO (operand)] < 0))
+ && reg_renumber[REGNO (operand)] < 0
+ /* If reg_equiv_address is nonzero, we will be
+ loading it into a register; hence it will be
+ offsettable, but we cannot say that reg_equiv_mem
+ is offsettable without checking. */
+ && ((reg_equiv_mem[REGNO (operand)] != 0
+ && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
+ || (reg_equiv_address[REGNO (operand)] != 0))))
win = 1;
if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
badop = 0;
+ constmemok = 1;
offmemok = 1;
break;
break;
case 'E':
+#ifndef REAL_ARITHMETIC
/* Match any floating double constant, but only if
we can examine the bits of it reliably. */
if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
|| HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
&& GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
break;
+#endif
if (GET_CODE (operand) == CONST_DOUBLE)
win = 1;
break;
this_alternative_win[i] = 1;
else
{
+ int const_to_mem = 0;
+
this_alternative_offmemok[i] = offmemok;
losers++;
if (badop)
/* Alternative loses if it requires a type of reload not
permitted for this insn. We can always reload SCRATCH
and objects with a REG_UNUSED note. */
- if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
- && no_output_reloads
+ if (GET_CODE (operand) != SCRATCH
+ && modified[i] != RELOAD_READ && no_output_reloads
&& ! find_reg_note (insn, REG_UNUSED, operand))
bad = 1;
else if (modified[i] != RELOAD_WRITE && no_input_reloads)
bad = 1;
+ /* If this is a constant that is reloaded into the desired
+ class by copying it to memory first, count that as another
+ reload. This is consistent with other code and is
+ required to avoid choosing another alternative when
+ the constant is moved into memory by this function on
+ an early reload pass. Note that the test here is
+ precisely the same as in the code below that calls
+ force_const_mem. */
+ if (CONSTANT_P (operand)
+ /* force_const_mem does not accept HIGH. */
+ && GET_CODE (operand) != HIGH
+ && (PREFERRED_RELOAD_CLASS (operand,
+ (enum reg_class) this_alternative[i])
+ == NO_REGS)
+ && operand_mode[i] != VOIDmode)
+ {
+ const_to_mem = 1;
+ if (this_alternative[i] != (int) NO_REGS)
+ losers++;
+ }
+
+ /* If we can't reload this value at all, reject this
+ alternative. Note that we could also lose due to
+ LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
+ here. */
+
+ if (! CONSTANT_P (operand)
+ && (enum reg_class) this_alternative[i] != NO_REGS
+ && (PREFERRED_RELOAD_CLASS (operand,
+ (enum reg_class) this_alternative[i])
+ == NO_REGS))
+ bad = 1;
+
/* We prefer to reload pseudos over reloading other things,
since such reloads may be able to be eliminated later.
If we are reloading a SCRATCH, we won't be generating any
insns, just using a register, so it is also preferred.
- So bump REJECT in other cases. */
- if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
+ So bump REJECT in other cases. Don't do this in the
+ case where we are forcing a constant into memory and
+ it will then win since we don't want to have a different
+ alternative match then. */
+ if (! (GET_CODE (operand) == REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
+ && GET_CODE (operand) != SCRATCH
+ && ! (const_to_mem && constmemok))
reject++;
}
Don't bother with this if this alternative will accept this
operand.
+ Don't do this for a multiword operand, since it is only a
+ small win and has the risk of requiring more spill registers,
+ which could cause a large loss.
+
Don't do this if the preferred class has only one register
because we might otherwise exhaust the class. */
if (! win && this_alternative[i] != (int) NO_REGS
+ && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
&& reg_class_size[(int) preferred_class[i]] > 1)
{
if (! reg_class_subset_p (this_alternative[i],
&& this_alternative_win[i])
{
struct decomposition early_data;
- int j;
early_data = decompose (recog_operand[i]);
pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
pref_or_nothing[commutative + 1] = t;
- bcopy (constraints1, constraints, noperands * sizeof (char *));
+ bcopy ((char *) constraints1, (char *) constraints,
+ noperands * sizeof (char *));
goto try_swapped;
}
else
goal_alternative_matched[goal_alternative_matches[i]] = i;
/* If the best alternative is with operands 1 and 2 swapped,
- consider them swapped before reporting the reloads. */
+ consider them swapped before reporting the reloads. Update the
+ operand numbers of any reloads already pushed. */
if (goal_alternative_swapped)
{
tem = recog_operand[commutative];
recog_operand[commutative] = recog_operand[commutative + 1];
recog_operand[commutative + 1] = tem;
+
+ for (i = 0; i < n_reloads; i++)
+ {
+ if (reload_opnum[i] == commutative)
+ reload_opnum[i] = commutative + 1;
+ else if (reload_opnum[i] == commutative + 1)
+ reload_opnum[i] = commutative;
+ }
}
/* Perform whatever substitutions on the operands we are supposed
*recog_operand_loc[i] = substed_operand[i];
/* While we are looping on operands, initialize this. */
operand_reloadnum[i] = -1;
+
+ /* If this is an earlyclobber operand, we need to widen the scope.
+ The reload must remain valid from the start of the insn being
+ reloaded until after the operand is stored into its destination.
+ We approximate this with RELOAD_OTHER even though we know that we
+ do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
+
+ One special case that is worth checking is when we have an
+ output that is earlyclobber but isn't used past the insn (typically
+ a SCRATCH). In this case, we only need have the reload live
+ through the insn itself, but not for any of our input or output
+ reloads.
+
+ In any case, anything needed to address this operand can remain
+ however they were previously categorized. */
+
+ if (goal_alternative_earlyclobber[i])
+ operand_type[i]
+ = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
+ ? RELOAD_FOR_INSN : RELOAD_OTHER);
}
/* Any constants that aren't allowed and can't be reloaded
for (i = 0; i < noperands; i++)
if (! goal_alternative_win[i]
&& CONSTANT_P (recog_operand[i])
+ /* force_const_mem does not accept HIGH. */
+ && GET_CODE (recog_operand[i]) != HIGH
&& (PREFERRED_RELOAD_CLASS (recog_operand[i],
(enum reg_class) goal_alternative[i])
== NO_REGS)
*recog_operand_loc[i] = recog_operand[i]
= find_reloads_toplev (force_const_mem (operand_mode[i],
recog_operand[i]),
- ind_levels, 0);
+ i, address_type[i], ind_levels, 0);
if (alternative_allows_memconst (constraints1[i],
goal_alternative_number))
goal_alternative_win[i] = 1;
}
+ /* Record the values of the earlyclobber operands for the caller. */
+ if (goal_earlyclobber)
+ for (i = 0; i < noperands; i++)
+ if (goal_alternative_earlyclobber[i])
+ reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
+
/* Now record reloads for all the operands that need them. */
for (i = 0; i < noperands; i++)
if (! goal_alternative_win[i])
;
/* Handle an operand with a nonoffsettable address
appearing where an offsettable address will do
- by reloading the address into a base register. */
+ by reloading the address into a base register.
+
+ ??? We can also do this when the operand is a register and
+ reg_equiv_mem is not offsettable, but this is a bit tricky,
+ so we don't bother with it. It may not be worth doing. */
else if (goal_alternative_matched[i] == -1
&& goal_alternative_offmemok[i]
&& GET_CODE (recog_operand[i]) == MEM)
= push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
&XEXP (recog_operand[i], 0), NULL_PTR,
BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
- VOIDmode, 0, 0, NULL_RTX);
+ VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
reload_inc[operand_reloadnum[i]]
= GET_MODE_SIZE (GET_MODE (recog_operand[i]));
+
+ /* If this operand is an output, we will have made any
+ reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
+ now we are treating part of the operand as an input, so
+ we must change these to RELOAD_FOR_INPUT_ADDRESS. */
+
+ if (modified[i] == RELOAD_WRITE)
+ for (j = 0; j < n_reloads; j++)
+ if (reload_opnum[j] == i
+ && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
+ reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
}
else if (goal_alternative_matched[i] == -1)
operand_reloadnum[i] =
push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
+ (modified[i] != RELOAD_WRITE ?
+ recog_operand_loc[i] : 0),
modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
(enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_WRITE
+ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_READ
+ ? VOIDmode : operand_mode[i]),
(insn_code_number < 0 ? 0
: insn_operand_strict_low[insn_code_number][i]),
- 0, NULL_RTX);
+ 0, i, operand_type[i]);
/* In a matching pair of operands, one must be input only
and the other must be output only.
Pass the input operand as IN and the other as OUT. */
(enum reg_class) goal_alternative[i],
operand_mode[i],
operand_mode[goal_alternative_matched[i]],
- 0, 0, NULL_RTX);
+ 0, 0, i, RELOAD_OTHER);
operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
}
else if (modified[i] == RELOAD_WRITE
(enum reg_class) goal_alternative[i],
operand_mode[goal_alternative_matched[i]],
operand_mode[i],
- 0, 0, NULL_RTX);
+ 0, 0, i, RELOAD_OTHER);
operand_reloadnum[i] = output_reloadnum;
}
else if (insn_code_number >= 0)
&& goal_alternative_matches[i] < 0
&& optimize)
{
- rtx operand = recog_operand[i];
- /* For each non-matching operand that's a pseudo-register
+ /* For each non-matching operand that's a MEM or a pseudo-register
that didn't get a hard register, make an optional reload.
This may get done even if the insn needs no reloads otherwise. */
- /* (It would be safe to make an optional reload for a matching pair
- of operands, but we don't bother yet.) */
+
+ rtx operand = recog_operand[i];
+
while (GET_CODE (operand) == SUBREG)
operand = XEXP (operand, 0);
- if (GET_CODE (operand) == REG
- && REGNO (operand) >= FIRST_PSEUDO_REGISTER
- && reg_renumber[REGNO (operand)] < 0
+ if ((GET_CODE (operand) == MEM
+ || (GET_CODE (operand) == REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
&& (enum reg_class) goal_alternative[i] != NO_REGS
- /* Don't make optional output reloads for jump insns
- (such as aobjeq on the vax). */
+ && ! no_input_reloads
+ /* Optional output reloads don't do anything and we mustn't
+ make in-out reloads on insns that are not permitted output
+ reloads. */
&& (modified[i] == RELOAD_READ
- || GET_CODE (insn) != JUMP_INSN))
+ || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
operand_reloadnum[i]
= push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
+ (modified[i] != RELOAD_WRITE
+ ? recog_operand_loc[i] : 0),
+ (modified[i] != RELOAD_READ
+ ? recog_operand_loc[i] : 0),
(enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_WRITE
+ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_READ
+ ? VOIDmode : operand_mode[i]),
(insn_code_number < 0 ? 0
: insn_operand_strict_low[insn_code_number][i]),
- 1, NULL_RTX);
- /* Make an optional reload for an explicit mem ref. */
- else if (GET_CODE (operand) == MEM
- && (enum reg_class) goal_alternative[i] != NO_REGS
- /* Don't make optional output reloads for jump insns
- (such as aobjeq on the vax). */
- && (modified[i] == RELOAD_READ
- || GET_CODE (insn) != JUMP_INSN))
- operand_reloadnum[i]
- = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
- (enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
- (insn_code_number < 0 ? 0
- : insn_operand_strict_low[insn_code_number][i]),
- 1, NULL_RTX);
- else
- non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
+ 1, i, operand_type[i]);
}
- else if (goal_alternative_matched[i] < 0
- && goal_alternative_matches[i] < 0)
- non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
+ else if (goal_alternative_matches[i] >= 0
+ && goal_alternative_win[goal_alternative_matches[i]]
+ && modified[i] == RELOAD_READ
+ && modified[goal_alternative_matches[i]] == RELOAD_WRITE
+ && ! no_input_reloads && ! no_output_reloads
+ && optimize)
+ {
+ /* Similarly, make an optional reload for a pair of matching
+ objects that are in MEM or a pseudo that didn't get a hard reg. */
- /* Record the values of the earlyclobber operands for the caller. */
- if (goal_earlyclobber)
- for (i = 0; i < noperands; i++)
- if (goal_alternative_earlyclobber[i])
- reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
+ rtx operand = recog_operand[i];
+ while (GET_CODE (operand) == SUBREG)
+ operand = XEXP (operand, 0);
+ if ((GET_CODE (operand) == MEM
+ || (GET_CODE (operand) == REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
+ && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
+ != NO_REGS))
+ operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
+ = push_reload (recog_operand[goal_alternative_matches[i]],
+ recog_operand[i],
+ recog_operand_loc[goal_alternative_matches[i]],
+ recog_operand_loc[i],
+ (enum reg_class) goal_alternative[goal_alternative_matches[i]],
+ operand_mode[goal_alternative_matches[i]],
+ operand_mode[i],
+ 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
+ }
+
/* If this insn pattern contains any MATCH_DUP's, make sure that
they will be substituted if the operands they match are substituted.
Also do now any substitutions we already did on the operands.
}
#endif
+ /* Perhaps an output reload can be combined with another
+ to reduce needs by one. */
+ if (!goal_earlyclobber)
+ combine_reloads ();
+
+ /* If we have a pair of reloads for parts of an address, they are reloading
+ the same object, the operands themselves were not reloaded, and they
+ are for two operands that are supposed to match, merge the reloads and
+ change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
+
+ for (i = 0; i < n_reloads; i++)
+ {
+ int k;
+
+ for (j = i + 1; j < n_reloads; j++)
+ if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
+ && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
+ || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
+ && rtx_equal_p (reload_in[i], reload_in[j])
+ && (operand_reloadnum[reload_opnum[i]] < 0
+ || reload_optional[operand_reloadnum[reload_opnum[i]]])
+ && (operand_reloadnum[reload_opnum[j]] < 0
+ || reload_optional[operand_reloadnum[reload_opnum[j]]])
+ && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
+ || (goal_alternative_matches[reload_opnum[j]]
+ == reload_opnum[i])))
+ {
+ for (k = 0; k < n_replacements; k++)
+ if (replacements[k].what == j)
+ replacements[k].what = i;
+
+ reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
+ reload_in[j] = 0;
+ }
+ }
+
+ /* Scan all the reloads and update their type.
+ If a reload is for the address of an operand and we didn't reload
+ that operand, change the type. Similarly, change the operand number
+ of a reload when two operands match. If a reload is optional, treat it
+ as though the operand isn't reloaded.
+
+ ??? This latter case is somewhat odd because if we do the optional
+ reload, it means the object is hanging around. Thus we need only
+ do the address reload if the optional reload was NOT done.
+
+ Change secondary reloads to be the address type of their operand, not
+ the normal type.
+
+ If an operand's reload is now RELOAD_OTHER, change any
+ RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
+ RELOAD_FOR_OTHER_ADDRESS. */
+
+ for (i = 0; i < n_reloads; i++)
+ {
+ if (reload_secondary_p[i]
+ && reload_when_needed[i] == operand_type[reload_opnum[i]])
+ reload_when_needed[i] = address_type[reload_opnum[i]];
+
+ if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
+ && (operand_reloadnum[reload_opnum[i]] < 0
+ || reload_optional[operand_reloadnum[reload_opnum[i]]]))
+ {
+ /* If we have a secondary reload to go along with this reload,
+ change its type to RELOAD_FOR_OPADDR_ADDR. */
+
+ if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ && reload_secondary_in_reload[i] != -1)
+ {
+ int secondary_in_reload = reload_secondary_in_reload[i];
+
+ reload_when_needed[secondary_in_reload] =
+ RELOAD_FOR_OPADDR_ADDR;
+
+ /* If there's a tertiary reload we have to change it also. */
+ if (secondary_in_reload > 0
+ && reload_secondary_in_reload[secondary_in_reload] != -1)
+ reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
+ = RELOAD_FOR_OPADDR_ADDR;
+ }
+
+ if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
+ && reload_secondary_out_reload[i] != -1)
+ {
+ int secondary_out_reload = reload_secondary_out_reload[i];
+
+ reload_when_needed[secondary_out_reload] =
+ RELOAD_FOR_OPADDR_ADDR;
+
+ /* If there's a tertiary reload we have to change it also. */
+ if (secondary_out_reload
+ && reload_secondary_out_reload[secondary_out_reload] != -1)
+ reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
+ = RELOAD_FOR_OPADDR_ADDR;
+ }
+ reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
+ }
+
+ if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ && operand_reloadnum[reload_opnum[i]] >= 0
+ && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
+ == RELOAD_OTHER))
+ reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
+
+ if (goal_alternative_matches[reload_opnum[i]] >= 0)
+ reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
+ }
+
+ /* See if we have any reloads that are now allowed to be merged
+ because we've changed when the reload is needed to
+ RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
+ check for the most common cases. */
+
+ for (i = 0; i < n_reloads; i++)
+ if (reload_in[i] != 0 && reload_out[i] == 0
+ && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
+ || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
+ for (j = 0; j < n_reloads; j++)
+ if (i != j && reload_in[j] != 0 && reload_out[j] == 0
+ && reload_when_needed[j] == reload_when_needed[i]
+ && MATCHES (reload_in[i], reload_in[j])
+ && reload_reg_class[i] == reload_reg_class[j]
+ && !reload_nocombine[i] && !reload_nocombine[j]
+ && reload_reg_rtx[i] == reload_reg_rtx[j])
+ {
+ reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
+ transfer_replacements (i, j);
+ reload_in[j] = 0;
+ }
+
#else /* no REGISTER_CONSTRAINTS */
int noperands;
int insn_code_number;
if (insn_operand_address_p[insn_code_number][i])
find_reloads_address (VOIDmode, NULL_PTR,
recog_operand[i], recog_operand_loc[i],
- recog_operand[i], ind_levels);
+ i, RELOAD_FOR_INPUT, ind_levels);
+
+ /* In these cases, we can't tell if the operand is an input
+ or an output, so be conservative. In practice it won't be
+ problem. */
+
if (code == MEM)
find_reloads_address (GET_MODE (recog_operand[i]),
recog_operand_loc[i],
XEXP (recog_operand[i], 0),
&XEXP (recog_operand[i], 0),
- recog_operand[i], ind_levels);
+ i, RELOAD_OTHER, ind_levels);
if (code == SUBREG)
recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
+ = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
+ ind_levels, is_set_dest);
if (code == REG)
{
register int regno = REGNO (recog_operand[i]);
= reg_equiv_mem[regno];
#endif
}
- /* All operands are non-reloaded. */
- non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
- }
-#endif /* no REGISTER_CONSTRAINTS */
-
- /* Determine which part of the insn each reload is needed for,
- based on which operand the reload is needed for.
- Reloads of entire operands are classified as RELOAD_OTHER.
- So are reloads for which a unique purpose is not known. */
-
- for (i = 0; i < n_reloads; i++)
- {
- reload_when_needed[i] = RELOAD_OTHER;
-
- if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
- {
- int j;
- int output_address = 0;
- int input_address = 0;
- int operand_address = 0;
-
- /* This reload is needed only for the address of something.
- Determine whether it is needed for addressing an operand
- being reloaded for input, whether it is needed for an
- operand being reloaded for output, and whether it is needed
- for addressing an operand that won't really be reloaded.
-
- Note that we know that this reload is needed in only one address,
- but we have not yet checked for the case where that same address
- is used in both input and output reloads.
- The following code detects this case. */
-
- for (j = 0; j < n_reloads; j++)
- if (reload_needed_for[i] == reload_in[j]
- || reload_needed_for[i] == reload_out[j])
- {
- if (reload_optional[j])
- operand_address = 1;
- else
- {
- if (reload_needed_for[i] == reload_in[j])
- input_address = 1;
- if (reload_needed_for[i] == reload_out[j])
- output_address = 1;
- }
- }
- /* Don't ignore memrefs without optional reloads. */
- for (j = 0; j < n_non_reloaded_operands; j++)
- if (reload_needed_for[i] == non_reloaded_operands[j])
- operand_address = 1;
-
- /* If it is needed for only one of those, record which one. */
-
- if (input_address && ! output_address && ! operand_address)
- reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
- if (output_address && ! input_address && ! operand_address)
- reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
- if (operand_address && ! input_address && ! output_address)
- reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
-
- /* Indicate those RELOAD_OTHER reloads which, though they have
- 0 for reload_output, still cannot overlap an output reload. */
-
- if (output_address && reload_when_needed[i] == RELOAD_OTHER)
- reload_needed_for_multiple[i] = 1;
-
- /* If we have earlyclobbers, make sure nothing overlaps them. */
- if (n_earlyclobbers > 0)
- {
- reload_when_needed[i] = RELOAD_OTHER;
- reload_needed_for_multiple[i] = 1;
- }
- }
}
/* Perhaps an output reload can be combined with another
to reduce needs by one. */
if (!goal_earlyclobber)
combine_reloads ();
+#endif /* no REGISTER_CONSTRAINTS */
}
/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
IND_LEVELS says how many levels of indirect addressing this machine
supports.
+ OPNUM and TYPE identify the purpose of the reload.
+
IS_SET_DEST is true if X is the destination of a SET, which is not
appropriate to be replaced by a constant. */
static rtx
-find_reloads_toplev (x, ind_levels, is_set_dest)
+find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
rtx x;
+ int opnum;
+ enum reload_type type;
int ind_levels;
int is_set_dest;
{
else if (reg_equiv_address[regno] != 0)
{
/* If reg_equiv_address varies, it may be shared, so copy it. */
- rtx addr = reg_equiv_address[regno];
+ /* We must rerun eliminate_regs, in case the elimination
+ offsets have changed. */
+ rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
+ NULL_RTX),
+ 0);
if (rtx_varies_p (addr))
addr = copy_rtx (addr);
RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
find_reloads_address (GET_MODE (x), NULL_PTR,
XEXP (x, 0),
- &XEXP (x, 0), x, ind_levels);
+ &XEXP (x, 0), opnum, type, ind_levels);
}
return x;
}
{
rtx tem = x;
find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
- x, ind_levels);
+ opnum, type, ind_levels);
return tem;
}
force a reload in that case. So we should not do anything here. */
else if (regno >= FIRST_PSEUDO_REGISTER
-#if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
+#ifdef LOAD_EXTEND_OP
&& (GET_MODE_SIZE (GET_MODE (x))
<= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
#endif
&& (reg_equiv_address[regno] != 0
|| (reg_equiv_mem[regno] != 0
- && ! offsettable_memref_p (reg_equiv_mem[regno]))))
+ && (! strict_memory_address_p (GET_MODE (x),
+ XEXP (reg_equiv_mem[regno], 0))
+ || ! offsettable_memref_p (reg_equiv_mem[regno])))))
{
int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
- rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
- : XEXP (reg_equiv_mem[regno], 0));
-#if BYTES_BIG_ENDIAN
- int size;
- size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
- offset += MIN (size, UNITS_PER_WORD);
- size = GET_MODE_SIZE (GET_MODE (x));
- offset -= MIN (size, UNITS_PER_WORD);
-#endif
+ /* We must rerun eliminate_regs, in case the elimination
+ offsets have changed. */
+ rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
+ NULL_RTX),
+ 0);
+ if (BYTES_BIG_ENDIAN)
+ {
+ int size;
+ size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
+ offset += MIN (size, UNITS_PER_WORD);
+ size = GET_MODE_SIZE (GET_MODE (x));
+ offset -= MIN (size, UNITS_PER_WORD);
+ }
addr = plus_constant (addr, offset);
x = gen_rtx (MEM, GET_MODE (x), addr);
RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
find_reloads_address (GET_MODE (x), NULL_PTR,
XEXP (x, 0),
- &XEXP (x, 0), x, ind_levels);
+ &XEXP (x, 0), opnum, type, ind_levels);
}
}
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
- XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
+ XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
ind_levels, is_set_dest);
}
return x;
}
+/* Return a mem ref for the memory equivalent of reg REGNO.
+ This mem ref is not shared with anything. */
+
static rtx
make_memloc (ad, regno)
rtx ad;
int regno;
{
register int i;
- rtx tem = reg_equiv_address[regno];
+ /* We must rerun eliminate_regs, in case the elimination
+ offsets have changed. */
+ rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX),
+ 0);
+
+#if 0 /* We cannot safely reuse a memloc made here;
+ if the pseudo appears twice, and its mem needs a reload,
+ it gets two separate reloads assigned, but it only
+ gets substituted with the second of them;
+ then it can get used before that reload reg gets loaded up. */
for (i = 0; i < n_memlocs; i++)
if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
return memlocs[i];
+#endif
/* If TEM might contain a pseudo, we must copy it to avoid
modifying it when we do the substitution for the reload. */
Note that we take shortcuts assuming that no multi-reg machine mode
occurs as part of an address.
- OPERAND is the operand of the insn within which this address appears.
+ OPNUM and TYPE specify the purpose of this reload.
IND_LEVELS says how many levels of indirect addressing this machine
supports.
to a hard register, and frame pointer elimination. */
static int
-find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
+find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
enum machine_mode mode;
rtx *memrefloc;
rtx ad;
rtx *loc;
- rtx operand;
+ int opnum;
+ enum reload_type type;
int ind_levels;
{
register int regno;
{
tem = make_memloc (ad, regno);
find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
- &XEXP (tem, 0), operand, ind_levels);
+ &XEXP (tem, 0), opnum, type, ind_levels);
push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
GET_MODE (ad), VOIDmode, 0, 0,
- operand);
+ opnum, type);
return 1;
}
- else if (reg_equiv_mem[regno] != 0)
- {
- tem = XEXP (reg_equiv_mem[regno], 0);
-
- /* If we can't indirect any more, a pseudo must be reloaded.
- If the pseudo's address in its MEM is a SYMBOL_REF, it
- must be reloaded unless indirect_symref_ok. Otherwise, it
- can be reloaded if the address is REG or REG + CONST_INT. */
-
- if (ind_levels > 0
- && ! (GET_CODE (tem) == SYMBOL_REF && ! indirect_symref_ok)
- && ((GET_CODE (tem) == REG
- && REGNO (tem) < FIRST_PSEUDO_REGISTER)
- || (GET_CODE (tem) == PLUS
- && GET_CODE (XEXP (tem, 0)) == REG
- && REGNO (XEXP (tem, 0)) < FIRST_PSEUDO_REGISTER
- && GET_CODE (XEXP (tem, 1)) == CONST_INT)))
- return 0;
- }
+ /* We can avoid a reload if the register's equivalent memory expression
+ is valid as an indirect memory address.
+ But not all addresses are valid in a mem used as an indirect address:
+ only reg or reg+constant. */
+
+ else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
+ && strict_memory_address_p (mode, reg_equiv_mem[regno])
+ && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
+ || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
+ && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
+ && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
+ return 0;
/* The only remaining case where we can avoid a reload is if this is a
hard register that is valid as a base register and which is not the
/* If we do not have one of the cases above, we must do the reload. */
push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
- GET_MODE (ad), VOIDmode, 0, 0, operand);
+ GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
return 1;
}
indirect addresses are valid, reload the MEM into a register. */
tem = ad;
find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
- operand, ind_levels == 0 ? 0 : ind_levels - 1);
+ opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
/* If tem was changed, then we must create a new memory reference to
hold it and store it back into memrefloc. */
if (tem != ad && memrefloc)
{
- rtx oldref = *memrefloc;
*memrefloc = copy_rtx (*memrefloc);
copy_replacements (tem, XEXP (*memrefloc, 0));
loc = &XEXP (*memrefloc, 0);
- if (operand == oldref)
- operand = *memrefloc;
}
/* Check similar cases as for indirect addresses as above except
have any subexpressions reloaded, if needed. */
push_reload (tem, NULL_RTX, loc, NULL_PTR,
BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
- 0, operand);
+ 0, opnum, type);
return 1;
}
else
return 0;
}
- /* If we have address of a stack slot but it's not valid
- (displacement is too large), compute the sum in a register. */
+ /* If we have address of a stack slot but it's not valid because the
+ displacement is too large, compute the sum in a register.
+ Handle all base registers here, not just fp/ap/sp, because on some
+ targets (namely SH) we can also get too large displacements from
+ big-endian corrections. */
else if (GET_CODE (ad) == PLUS
- && (XEXP (ad, 0) == frame_pointer_rtx
-#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
- || XEXP (ad, 0) == arg_pointer_rtx
-#endif
- || XEXP (ad, 0) == stack_pointer_rtx)
+ && GET_CODE (XEXP (ad, 0)) == REG
+ && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
+ && REG_OK_FOR_BASE_P (XEXP (ad, 0))
&& GET_CODE (XEXP (ad, 1)) == CONST_INT)
{
/* Unshare the MEM rtx so we can safely alter it. */
if (memrefloc)
{
- rtx oldref = *memrefloc;
*memrefloc = copy_rtx (*memrefloc);
loc = &XEXP (*memrefloc, 0);
- if (operand == oldref)
- operand = *memrefloc;
}
if (double_reg_address_ok)
{
/* Reload the displacement into an index reg.
We assume the frame pointer or arg pointer is a base reg. */
find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
- INDEX_REG_CLASS, GET_MODE (ad), operand,
- ind_levels);
+ INDEX_REG_CLASS, GET_MODE (ad), opnum,
+ type, ind_levels);
}
else
{
reload the sum into a base reg.
That will at least work. */
find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
- operand, ind_levels);
+ opnum, type, ind_levels);
}
return 1;
}
else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
&& GET_CODE (XEXP (ad, 0)) == PLUS
&& (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
+#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
+ || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
+#endif
#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
|| XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
#endif
INTVAL (XEXP (ad, 1))),
XEXP (XEXP (ad, 0), 1));
find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
- GET_MODE (ad), operand, ind_levels);
- find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
+ GET_MODE (ad), opnum, type, ind_levels);
+ find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
return 1;
}
else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
&& GET_CODE (XEXP (ad, 0)) == PLUS
&& (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
+#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
+#endif
#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
|| XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
#endif
&& ! memory_address_p (mode, ad))
{
*loc = ad = gen_rtx (PLUS, GET_MODE (ad),
+ XEXP (XEXP (ad, 0), 0),
plus_constant (XEXP (XEXP (ad, 0), 1),
- INTVAL (XEXP (ad, 1))),
- XEXP (XEXP (ad, 0), 0));
- find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
- GET_MODE (ad), operand, ind_levels);
- find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
+ INTVAL (XEXP (ad, 1))));
+ find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
+ GET_MODE (ad), opnum, type, ind_levels);
+ find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
return 1;
}
if (memrefloc && GET_CODE (ad) == SYMBOL_REF
&& CONSTANT_POOL_ADDRESS_P (ad))
{
- rtx oldref = *memrefloc;
*memrefloc = copy_rtx (*memrefloc);
loc = &XEXP (*memrefloc, 0);
- if (operand == oldref)
- operand = *memrefloc;
}
- find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
+ find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
ind_levels);
return 1;
}
- return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
+ return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
}
\f
/* Find all pseudo regs appearing in AD
rtx x, y;
{
rtx tem;
+ enum machine_mode mode = GET_MODE (x);
+
+ if (mode == VOIDmode)
+ mode = GET_MODE (y);
+
+ if (mode == VOIDmode)
+ mode = Pmode;
if (GET_CODE (x) == CONST_INT)
return plus_constant (y, INTVAL (x));
if (GET_CODE (y) == CONST)
y = XEXP (y, 0);
- return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
+ return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
}
- return gen_rtx (PLUS, Pmode, x, y);
+ return gen_rtx (PLUS, mode, x, y);
}
\f
/* If ADDR is a sum containing a pseudo register that should be
CONTEXT = 1 means we are considering regs as index regs,
= 0 means we are considering them as base regs.
- OPERAND is the operand of the insn within which this address appears.
+ OPNUM and TYPE specify the purpose of any reloads made.
IND_LEVELS says how many levels of indirect addressing are
supported at this point in the address.
could have addressing modes that this does not handle right. */
static int
-find_reloads_address_1 (x, context, loc, operand, ind_levels)
+find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
rtx x;
int context;
rtx *loc;
- rtx operand;
+ int opnum;
+ enum reload_type type;
int ind_levels;
{
register RTX_CODE code = GET_CODE (x);
- if (code == PLUS)
+ switch (code)
{
- register rtx op0 = XEXP (x, 0);
- register rtx op1 = XEXP (x, 1);
- register RTX_CODE code0 = GET_CODE (op0);
- register RTX_CODE code1 = GET_CODE (op1);
- if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
- {
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
- }
- else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
- {
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
- find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
- }
- else if (code0 == CONST_INT || code0 == CONST
- || code0 == SYMBOL_REF || code0 == LABEL_REF)
- {
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
- }
- else if (code1 == CONST_INT || code1 == CONST
- || code1 == SYMBOL_REF || code1 == LABEL_REF)
- {
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
- }
- else if (code0 == REG && code1 == REG)
- {
- if (REG_OK_FOR_INDEX_P (op0)
- && REG_OK_FOR_BASE_P (op1))
- return 0;
- else if (REG_OK_FOR_INDEX_P (op1)
- && REG_OK_FOR_BASE_P (op0))
- return 0;
- else if (REG_OK_FOR_BASE_P (op1))
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
- else if (REG_OK_FOR_BASE_P (op0))
- find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
- else if (REG_OK_FOR_INDEX_P (op1))
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
- else if (REG_OK_FOR_INDEX_P (op0))
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
- else
- {
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
+ case PLUS:
+ {
+ register rtx orig_op0 = XEXP (x, 0);
+ register rtx orig_op1 = XEXP (x, 1);
+ register RTX_CODE code0 = GET_CODE (orig_op0);
+ register RTX_CODE code1 = GET_CODE (orig_op1);
+ register rtx op0 = orig_op0;
+ register rtx op1 = orig_op1;
+
+ if (GET_CODE (op0) == SUBREG)
+ {
+ op0 = SUBREG_REG (op0);
+ code0 = GET_CODE (op0);
+ if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
+ op0 = gen_rtx (REG, word_mode,
+ REGNO (op0) + SUBREG_WORD (orig_op0));
+ }
+
+ if (GET_CODE (op1) == SUBREG)
+ {
+ op1 = SUBREG_REG (op1);
+ code1 = GET_CODE (op1);
+ if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
+ op1 = gen_rtx (REG, GET_MODE (op1),
+ REGNO (op1) + SUBREG_WORD (orig_op1));
+ }
+
+ if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
+ || code0 == ZERO_EXTEND || code1 == MEM)
+ {
+ find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ }
+
+ else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
+ || code1 == ZERO_EXTEND || code0 == MEM)
+ {
+ find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ }
+
+ else if (code0 == CONST_INT || code0 == CONST
+ || code0 == SYMBOL_REF || code0 == LABEL_REF)
+ find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
+
+ else if (code1 == CONST_INT || code1 == CONST
+ || code1 == SYMBOL_REF || code1 == LABEL_REF)
+ find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
+
+ else if (code0 == REG && code1 == REG)
+ {
+ if (REG_OK_FOR_INDEX_P (op0)
+ && REG_OK_FOR_BASE_P (op1))
+ return 0;
+ else if (REG_OK_FOR_INDEX_P (op1)
+ && REG_OK_FOR_BASE_P (op0))
+ return 0;
+ else if (REG_OK_FOR_BASE_P (op1))
+ find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
ind_levels);
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
+ else if (REG_OK_FOR_BASE_P (op0))
+ find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
ind_levels);
- }
- }
- else if (code0 == REG)
- {
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
- }
- else if (code1 == REG)
- {
- find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
- }
- }
- else if (code == POST_INC || code == POST_DEC
- || code == PRE_INC || code == PRE_DEC)
- {
+ else if (REG_OK_FOR_INDEX_P (op1))
+ find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ else if (REG_OK_FOR_INDEX_P (op0))
+ find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ else
+ {
+ find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ }
+ }
+
+ else if (code0 == REG)
+ {
+ find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ }
+
+ else if (code1 == REG)
+ {
+ find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ }
+ }
+
+ return 0;
+
+ case POST_INC:
+ case POST_DEC:
+ case PRE_INC:
+ case PRE_DEC:
if (GET_CODE (XEXP (x, 0)) == REG)
{
register int regno = REGNO (XEXP (x, 0));
rtx tem = make_memloc (XEXP (x, 0), regno);
/* First reload the memory location's address. */
find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
- &XEXP (tem, 0), operand, ind_levels);
+ &XEXP (tem, 0), opnum, type, ind_levels);
/* Put this inside a new increment-expression. */
x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
/* Proceed to reload that, as if it contained a register. */
int reloadnum
= push_reload (x, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
+ GET_MODE (x), GET_MODE (x), VOIDmode, 0,
+ opnum, type);
reload_inc[reloadnum]
= find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
}
return value;
}
+
else if (GET_CODE (XEXP (x, 0)) == MEM)
{
/* This is probably the result of a substitution, by eliminate_regs,
reload1.c here. */
find_reloads_address (GET_MODE (x), &XEXP (x, 0),
XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
- operand, ind_levels);
+ opnum, type, ind_levels);
reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
reload_inc[reloadnum]
= find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
return 1;
}
- }
- else if (code == MEM)
- {
- /* This is probably the result of a substitution, by eliminate_regs,
- of an equivalent address for a pseudo that was not allocated to a
- hard register. Verify that the specified address is valid and reload
- it into a register.
+ return 0;
+
+ case MEM:
+ /* This is probably the result of a substitution, by eliminate_regs, of
+ an equivalent address for a pseudo that was not allocated to a hard
+ register. Verify that the specified address is valid and reload it
+ into a register.
- Since we know we are going to reload this item, don't decrement
- for the indirection level.
+ Since we know we are going to reload this item, don't decrement for
+ the indirection level.
Note that this is actually conservative: it would be slightly more
efficient to use the value of SPILL_INDIRECT_LEVELS from
reload1.c here. */
find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
- operand, ind_levels);
-
+ opnum, type, ind_levels);
push_reload (*loc, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
- }
- else if (code == REG)
- {
- register int regno = REGNO (x);
- if (reg_equiv_constant[regno] != 0)
- {
- find_reloads_address_part (reg_equiv_constant[regno], loc,
- (context ? INDEX_REG_CLASS
- : BASE_REG_CLASS),
- GET_MODE (x), operand, ind_levels);
- return 1;
- }
+ case REG:
+ {
+ register int regno = REGNO (x);
+
+ if (reg_equiv_constant[regno] != 0)
+ {
+ find_reloads_address_part (reg_equiv_constant[regno], loc,
+ (context ? INDEX_REG_CLASS
+ : BASE_REG_CLASS),
+ GET_MODE (x), opnum, type, ind_levels);
+ return 1;
+ }
#if 0 /* This might screw code in reload1.c to delete prior output-reload
that feeds this insn. */
- if (reg_equiv_mem[regno] != 0)
- {
- push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
- context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
- return 1;
- }
+ if (reg_equiv_mem[regno] != 0)
+ {
+ push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
+ context ? INDEX_REG_CLASS : BASE_REG_CLASS,
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
+ return 1;
+ }
#endif
- if (reg_equiv_address[regno] != 0)
- {
- x = make_memloc (x, regno);
- find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
- operand, ind_levels);
- }
- if (reg_renumber[regno] >= 0)
- regno = reg_renumber[regno];
- if ((regno >= FIRST_PSEUDO_REGISTER
- || !(context ? REGNO_OK_FOR_INDEX_P (regno)
- : REGNO_OK_FOR_BASE_P (regno))))
- {
- push_reload (x, NULL_RTX, loc, NULL_PTR,
- context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
- return 1;
- }
+ if (reg_equiv_address[regno] != 0)
+ {
+ x = make_memloc (x, regno);
+ find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
+ opnum, type, ind_levels);
+ }
- /* If a register appearing in an address is the subject of a CLOBBER
- in this insn, reload it into some other register to be safe.
- The CLOBBER is supposed to make the register unavailable
- from before this insn to after it. */
- if (regno_clobbered_p (regno, this_insn))
- {
- push_reload (x, NULL_RTX, loc, NULL_PTR,
- context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
- return 1;
- }
- }
- else
- {
- register char *fmt = GET_RTX_FORMAT (code);
- register int i;
- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ if (reg_renumber[regno] >= 0)
+ regno = reg_renumber[regno];
+
+ if ((regno >= FIRST_PSEUDO_REGISTER
+ || !(context ? REGNO_OK_FOR_INDEX_P (regno)
+ : REGNO_OK_FOR_BASE_P (regno))))
+ {
+ push_reload (x, NULL_RTX, loc, NULL_PTR,
+ context ? INDEX_REG_CLASS : BASE_REG_CLASS,
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
+ return 1;
+ }
+
+ /* If a register appearing in an address is the subject of a CLOBBER
+ in this insn, reload it into some other register to be safe.
+ The CLOBBER is supposed to make the register unavailable
+ from before this insn to after it. */
+ if (regno_clobbered_p (regno, this_insn))
+ {
+ push_reload (x, NULL_RTX, loc, NULL_PTR,
+ context ? INDEX_REG_CLASS : BASE_REG_CLASS,
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
+ return 1;
+ }
+ }
+ return 0;
+
+ case SUBREG:
+ if (GET_CODE (SUBREG_REG (x)) == REG)
{
- if (fmt[i] == 'e')
- find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
- operand, ind_levels);
+ /* If this is a SUBREG of a hard register and the resulting register
+ is of the wrong class, reload the whole SUBREG. This avoids
+ needless copies if SUBREG_REG is multi-word. */
+ if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
+ {
+ int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
+
+ if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
+ : REGNO_OK_FOR_BASE_P (regno)))
+ {
+ push_reload (x, NULL_RTX, loc, NULL_PTR,
+ context ? INDEX_REG_CLASS : BASE_REG_CLASS,
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
+ return 1;
+ }
+ }
+ /* If this is a SUBREG of a pseudo-register, and the pseudo-register
+ is larger than the class size, then reload the whole SUBREG. */
+ else
+ {
+ enum reg_class class = (context
+ ? INDEX_REG_CLASS : BASE_REG_CLASS);
+ if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
+ > reg_class_size[class])
+ {
+ push_reload (x, NULL_RTX, loc, NULL_PTR, class,
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
+ return 1;
+ }
+ }
}
+ break;
}
+ {
+ register char *fmt = GET_RTX_FORMAT (code);
+ register int i;
+
+ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ {
+ if (fmt[i] == 'e')
+ find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
+ opnum, type, ind_levels);
+ }
+ }
+
return 0;
}
\f
MODE is the mode to use, in case X is an integer constant.
- NEEDED_FOR says which operand this reload is needed for.
+ OPNUM and TYPE describe the purpose of any reloads made.
IND_LEVELS says how many levels of indirect addressing this machine
supports. */
static void
-find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
+find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
rtx x;
rtx *loc;
enum reg_class class;
enum machine_mode mode;
- rtx needed_for;
+ int opnum;
+ enum reload_type type;
int ind_levels;
{
if (CONSTANT_P (x)
{
rtx tem = x = force_const_mem (mode, x);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
- needed_for, ind_levels);
+ opnum, type, ind_levels);
}
else if (GET_CODE (x) == PLUS
x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
- needed_for, ind_levels);
+ opnum, type, ind_levels);
}
push_reload (x, NULL_RTX, loc, NULL_PTR, class,
- mode, VOIDmode, 0, 0, needed_for);
+ mode, VOIDmode, 0, 0, opnum, type);
}
\f
-/* Substitute into X the registers into which we have reloaded
+/* Substitute into the current INSN the registers into which we have reloaded
the things that need reloading. The array `replacements'
says contains the locations of all pointers that must be changed
and says what to replace them with.
if (reloadreg)
{
/* Encapsulate RELOADREG so its machine mode matches what
- used to be there. */
+ used to be there. Note that gen_lowpart_common will
+ do the wrong thing if RELOADREG is multi-word. RELOADREG
+ will always be a REG here. */
if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
\f
/* Return nonzero if register in range [REGNO, ENDREGNO)
appears either explicitly or implicitly in X
- other than being stored into.
+ other than being stored into (except for earlyclobber operands).
References contained within the substructure at LOC do not count.
LOC may be zero, meaning don't ignore anything.
&& refers_to_regno_for_reload_p (regno, endregno,
SUBREG_REG (SET_DEST (x)),
loc))
- || (GET_CODE (SET_DEST (x)) != REG
+ /* If the output is an earlyclobber operand, this is
+ a conflict. */
+ || ((GET_CODE (SET_DEST (x)) != REG
+ || earlyclobber_operand_p (SET_DEST (x)))
&& refers_to_regno_for_reload_p (regno, endregno,
SET_DEST (x), loc))))
return 1;
return 0;
}
\f
-#if 0
-
-/* [[This function is currently obsolete, now that volatility
- is represented by a special bit `volatil' so VOLATILE is never used;
- and UNCHANGING has never been brought into use.]]
-
- Alter X by eliminating all VOLATILE and UNCHANGING expressions.
- Each of them is replaced by its operand.
- Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
- becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
-
- If X is itself a VOLATILE expression,
- we return the expression that should replace it
- but we do not modify X. */
-
-static rtx
-forget_volatility (x)
- register rtx x;
-{
- enum rtx_code code = GET_CODE (x);
- register char *fmt;
- register int i;
- register rtx value = 0;
-
- switch (code)
- {
- case LABEL_REF:
- case SYMBOL_REF:
- case CONST_INT:
- case CONST_DOUBLE:
- case CONST:
- case REG:
- case CC0:
- case PC:
- return x;
-
- case VOLATILE:
- case UNCHANGING:
- return XEXP (x, 0);
- }
-
- fmt = GET_RTX_FORMAT (code);
- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
- {
- if (fmt[i] == 'e')
- XEXP (x, i) = forget_volatility (XEXP (x, i));
- if (fmt[i] == 'E')
- {
- register int j;
- for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
- }
- }
-
- return x;
-}
-
-#endif
-\f
/* Check the insns before INSN to see if there is a suitable register
containing the same value as GOAL.
If OTHER is -1, look for a register in class CLASS.
enum machine_mode mode;
{
register rtx p = insn;
- rtx valtry, value, where;
+ rtx goaltry, valtry, value, where;
register rtx pat;
register int regno = -1;
int valueno;
return 0;
if (GET_CODE (p) == INSN
/* If we don't want spill regs ... */
- && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
+ && (! (reload_reg_p != 0
+ && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
/* ... then ignore insns introduced by reload; they aren't useful
and can cause results in reload_as_needed to be different
from what they were when calculating the need for spills.
&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
&& GET_CODE (goal) == CONST_INT
- && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
+ && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
+ VOIDmode))
+ && rtx_equal_p (goal, goaltry)
&& (valtry = operand_subword (SET_DEST (pat), 0, 0,
VOIDmode))
&& (valueno = true_regnum (valtry)) >= 0)
&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
&& GET_CODE (goal) == CONST_INT
- && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
+ && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
+ VOIDmode))
+ && rtx_equal_p (goal, goaltry)
&& (valtry
= operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
&& (valueno = true_regnum (valtry)) >= 0)))
/* Reject VALUE if it was loaded from GOAL
and is also a register that appears in the address of GOAL. */
- if (goal_mem && value == SET_DEST (PATTERN (where))
+ if (goal_mem && value == SET_DEST (single_set (where))
&& refers_to_regno_for_reload_p (valueno,
(valueno
+ HARD_REGNO_NREGS (valueno, mode)),
(Now that insns introduced by reload are ignored above,
this case shouldn't happen, but I'm not positive.) */
- if (reload_reg_p != 0 && reload_reg_p != (short *)1
+ if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
&& reload_reg_p[valueno] >= 0)
return 0;
}
if (goal_mem)
- goal_mem_addr_varies = rtx_addr_varies_p (goal);
+ /* We must treat frame pointer as varying here,
+ since it can vary--in a nonlocal goto as generated by expand_goto. */
+ goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
/* Now verify that the values of GOAL and VALUE remain unaltered
until INSN is reached. */
|| need_stable_sp))
return 0;
+#ifdef NON_SAVING_SETJMP
+ if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
+ && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
+ return 0;
+#endif
+
#ifdef INSN_CLOBBERS_REGNO_P
if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
&& INSN_CLOBBERS_REGNO_P (p, valueno))
else if (goal_mem && GET_CODE (dest) == MEM
&& ! push_operand (dest, GET_MODE (dest)))
return 0;
+ else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
+ && reg_equiv_memory_loc[regno] != 0)
+ return 0;
else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
return 0;
}
}
}
+ if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
+ {
+ rtx link;
+
+ for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
+ link = XEXP (link, 1))
+ {
+ pat = XEXP (link, 0);
+ if (GET_CODE (pat) == CLOBBER)
+ {
+ register rtx dest = SET_DEST (pat);
+ while (GET_CODE (dest) == SUBREG
+ || GET_CODE (dest) == ZERO_EXTRACT
+ || GET_CODE (dest) == SIGN_EXTRACT
+ || GET_CODE (dest) == STRICT_LOW_PART)
+ dest = XEXP (dest, 0);
+ if (GET_CODE (dest) == REG)
+ {
+ register int xregno = REGNO (dest);
+ int xnregs;
+ if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
+ xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
+ else
+ xnregs = 1;
+ if (xregno < regno + nregs
+ && xregno + xnregs > regno)
+ return 0;
+ if (xregno < valueno + valuenregs
+ && xregno + xnregs > valueno)
+ return 0;
+ if (goal_mem_addr_varies
+ && reg_overlap_mentioned_for_reload_p (dest,
+ goal))
+ return 0;
+ }
+ else if (goal_mem && GET_CODE (dest) == MEM
+ && ! push_operand (dest, GET_MODE (dest)))
+ return 0;
+ else if (need_stable_sp
+ && push_operand (dest, GET_MODE (dest)))
+ return 0;
+ }
+ }
+ }
+
#ifdef AUTO_INC_DEC
/* If this insn auto-increments or auto-decrements
either regno or valueno, return 0 now.
return 0;
}
+
+static char *reload_when_needed_name[] =
+{
+ "RELOAD_FOR_INPUT",
+ "RELOAD_FOR_OUTPUT",
+ "RELOAD_FOR_INSN",
+ "RELOAD_FOR_INPUT_ADDRESS",
+ "RELOAD_FOR_OUTPUT_ADDRESS",
+ "RELOAD_FOR_OPERAND_ADDRESS",
+ "RELOAD_FOR_OPADDR_ADDR",
+ "RELOAD_OTHER",
+ "RELOAD_FOR_OTHER_ADDRESS"
+};
+
+static char *reg_class_names[] = REG_CLASS_NAMES;
+
+/* This function is used to print the variables set by 'find_reloads' */
+
+void
+debug_reload()
+{
+ int r;
+
+ fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
+
+ for (r = 0; r < n_reloads; r++)
+ {
+ fprintf (stderr, "\nRELOAD %d\n", r);
+
+ if (reload_in[r])
+ {
+ fprintf (stderr, "\nreload_in (%s) = ",
+ GET_MODE_NAME (reload_inmode[r]));
+ debug_rtx (reload_in[r]);
+ }
+
+ if (reload_out[r])
+ {
+ fprintf (stderr, "\nreload_out (%s) = ",
+ GET_MODE_NAME (reload_outmode[r]));
+ debug_rtx (reload_out[r]);
+ }
+
+ fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
+
+ fprintf (stderr, "%s (opnum = %d)",
+ reload_when_needed_name[(int)reload_when_needed[r]],
+ reload_opnum[r]);
+
+ if (reload_optional[r])
+ fprintf (stderr, ", optional");
+
+ if (reload_in[r])
+ fprintf (stderr, ", inc by %d\n", reload_inc[r]);
+
+ if (reload_nocombine[r])
+ fprintf (stderr, ", can't combine", reload_nocombine[r]);
+
+ if (reload_secondary_p[r])
+ fprintf (stderr, ", secondary_reload_p");
+
+ if (reload_in_reg[r])
+ {
+ fprintf (stderr, "\nreload_in_reg:\t\t\t");
+ debug_rtx (reload_in_reg[r]);
+ }
+
+ if (reload_reg_rtx[r])
+ {
+ fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
+ debug_rtx (reload_reg_rtx[r]);
+ }
+
+ if (reload_secondary_in_reload[r] != -1)
+ {
+ fprintf (stderr, "\nsecondary_in_reload = ");
+ fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
+ }
+
+ if (reload_secondary_out_reload[r] != -1)
+ {
+ if (reload_secondary_in_reload[r] != -1)
+ fprintf (stderr, ", secondary_out_reload = ");
+ else
+ fprintf (stderr, "\nsecondary_out_reload = ");
+
+ fprintf (stderr, "%d", reload_secondary_out_reload[r]);
+ }
+
+
+ if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
+ {
+ fprintf (stderr, "\nsecondary_in_icode = ");
+ fprintf (stderr, "%s", insn_name[r]);
+ }
+
+ if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
+ {
+ if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
+ fprintf (stderr, ", secondary_out_icode = ");
+ else
+ fprintf (stderr, "\nsecondary_out_icode = ");
+
+ fprintf (stderr, "%s ", insn_name[r]);
+ }
+ fprintf (stderr, "\n");
+ }
+
+ fprintf (stderr, "\n");
+}
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