/* Search an insn for pseudo regs that must be in hard regs and are not.
- Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1987, 88, 89, 92-99, 2000 Free Software Foundation, Inc.
This file is part of GNU CC.
#include "config.h"
#include "system.h"
#include "rtl.h"
+#include "tm_p.h"
#include "insn-config.h"
#include "insn-codes.h"
#include "recog.h"
#include "flags.h"
#include "real.h"
#include "output.h"
+#include "function.h"
#include "expr.h"
+#include "toplev.h"
#ifndef REGISTER_MOVE_COST
#define REGISTER_MOVE_COST(x, y) 2
#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
#endif
\f
-/* The variables set up by `find_reloads' are:
-
- n_reloads number of distinct reloads needed; max reload # + 1
- tables indexed by reload number
- reload_in rtx for value to reload from
- reload_out rtx for where to store reload-reg afterward if nec
- (often the same as reload_in)
- reload_reg_class enum reg_class, saying what regs to reload into
- reload_inmode enum machine_mode; mode this operand should have
- when reloaded, on input.
- reload_outmode enum machine_mode; mode this operand should have
- when reloaded, on output.
- reload_optional char, nonzero for an optional reload.
- Optional reloads are ignored unless the
- value is already sitting in a register.
- reload_inc int, positive amount to increment or decrement by if
- reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
- Ignored otherwise (don't assume it is zero).
- reload_in_reg rtx. A reg for which reload_in is the equivalent.
- If reload_in is a symbol_ref which came from
- reg_equiv_constant, then this is the pseudo
- which has that symbol_ref as equivalent.
- reload_reg_rtx rtx. This is the register to reload into.
- If it is zero when `find_reloads' returns,
- you must find a suitable register in the class
- specified by reload_reg_class, and store here
- an rtx for that register with mode from
- reload_inmode or reload_outmode.
- reload_nocombine char, nonzero if this reload shouldn't be
- combined with another reload.
- reload_opnum int, operand number being reloaded. This is
- used to group related reloads and need not always
- be equal to the actual operand number in the insn,
- though it current will be; for in-out operands, it
- is one of the two operand numbers.
- reload_when_needed enum, classifies reload as needed either for
- addressing an input reload, addressing an output,
- for addressing a non-reloaded mem ref,
- or for unspecified purposes (i.e., more than one
- of the above).
- reload_secondary_p int, 1 if this is a secondary register for one
- or more reloads.
- reload_secondary_in_reload
- reload_secondary_out_reload
- int, gives the reload number of a secondary
- reload, when needed; otherwise -1
- reload_secondary_in_icode
- reload_secondary_out_icode
- enum insn_code, if a secondary reload is required,
- gives the INSN_CODE that uses the secondary
- reload as a scratch register, or CODE_FOR_nothing
- if the secondary reload register is to be an
- intermediate register. */
+/* All reloads of the current insn are recorded here. See reload.h for
+ comments. */
int n_reloads;
-
-rtx reload_in[MAX_RELOADS];
-rtx reload_out[MAX_RELOADS];
-enum reg_class reload_reg_class[MAX_RELOADS];
-enum machine_mode reload_inmode[MAX_RELOADS];
-enum machine_mode reload_outmode[MAX_RELOADS];
-rtx reload_reg_rtx[MAX_RELOADS];
-char reload_optional[MAX_RELOADS];
-int reload_inc[MAX_RELOADS];
-rtx reload_in_reg[MAX_RELOADS];
-char reload_nocombine[MAX_RELOADS];
-int reload_opnum[MAX_RELOADS];
-enum reload_type reload_when_needed[MAX_RELOADS];
-int reload_secondary_p[MAX_RELOADS];
-int reload_secondary_in_reload[MAX_RELOADS];
-int reload_secondary_out_reload[MAX_RELOADS];
-enum insn_code reload_secondary_in_icode[MAX_RELOADS];
-enum insn_code reload_secondary_out_icode[MAX_RELOADS];
+struct reload rld[MAX_RELOADS];
/* All the "earlyclobber" operands of the current insn
are recorded here. */
HOST_WIDE_INT end; /* Ending offset or register number. */
};
-/* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
- (see reg_equiv_address). */
-static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
-static int n_memlocs;
-
#ifdef SECONDARY_MEMORY_NEEDED
/* Save MEMs needed to copy from one class of registers to another. One MEM
- is used per mode, but normally only one or two modes are ever used.
+ is used per mode, but normally only one or two modes are ever used.
- We keep two versions, before and after register elimination. The one
+ We keep two versions, before and after register elimination. The one
after register elimination is record separately for each operand. This
is done in case the address is not valid to be sure that we separately
reload each. */
int, int, int, enum reload_type));
static void push_replacement PROTO((rtx *, int, enum machine_mode));
static void combine_reloads PROTO((void));
+static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
+ enum reload_type, int, int));
static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
enum machine_mode, enum machine_mode,
enum reg_class, int, int));
-static int earlyclobber_operand_p PROTO((rtx));
static int hard_reg_set_here_p PROTO((int, int, rtx));
static struct decomposition decompose PROTO((rtx));
static int immune_p PROTO((rtx, rtx, struct decomposition));
-static int alternative_allows_memconst PROTO((char *, int));
-static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
+static int alternative_allows_memconst PROTO((const char *, int));
+static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
static rtx make_memloc PROTO((rtx, int));
static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
int, enum reload_type, int, rtx));
-static rtx subst_reg_equivs PROTO((rtx));
+static rtx subst_reg_equivs PROTO((rtx, rtx));
static rtx subst_indexed_address PROTO((rtx));
static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
int, enum reload_type,int, rtx));
static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
enum machine_mode, int,
enum reload_type, int));
+static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
+ int, rtx));
static int find_inc_amount PROTO((rtx, rtx));
+static int loc_mentioned_in_p PROTO((rtx *, rtx));
+extern void debug_reload_to_stream PROTO((FILE *));
+extern void debug_reload PROTO((void));
\f
#ifdef HAVE_SECONDARY_RELOADS
: reload_out_optab[(int) reload_mode]);
if (icode != CODE_FOR_nothing
- && insn_operand_predicate[(int) icode][in_p]
- && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
+ && insn_data[(int) icode].operand[in_p].predicate
+ && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
icode = CODE_FOR_nothing;
/* If we will be using an insn, see if it can directly handle the reload
if (icode != CODE_FOR_nothing)
{
- /* If IN_P is non-zero, the reload register will be the output in
+ /* If IN_P is non-zero, the reload register will be the output in
operand 0. If IN_P is zero, the reload register will be the input
in operand 1. Outputs should have an initial "=", which we must
skip. */
- char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
+ char insn_letter
+ = insn_data[(int) icode].operand[!in_p].constraint[in_p];
enum reg_class insn_class
= (insn_letter == 'r' ? GENERAL_REGS
- : REG_CLASS_FROM_LETTER (insn_letter));
+ : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
if (insn_class == NO_REGS
- || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
+ || (in_p
+ && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
/* The scratch register's constraint must start with "=&". */
- || insn_operand_constraint[(int) icode][2][0] != '='
- || insn_operand_constraint[(int) icode][2][1] != '&')
+ || insn_data[(int) icode].operand[2].constraint[0] != '='
+ || insn_data[(int) icode].operand[2].constraint[1] != '&')
abort ();
if (reg_class_subset_p (reload_class, insn_class))
- mode = insn_operand_mode[(int) icode][2];
+ mode = insn_data[(int) icode].operand[2].mode;
else
{
- char t_letter = insn_operand_constraint[(int) icode][2][2];
+ char t_letter = insn_data[(int) icode].operand[2].constraint[2];
class = insn_class;
- t_mode = insn_operand_mode[(int) icode][2];
+ t_mode = insn_data[(int) icode].operand[2].mode;
t_class = (t_letter == 'r' ? GENERAL_REGS
- : REG_CLASS_FROM_LETTER (t_letter));
+ : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
t_icode = icode;
icode = CODE_FOR_nothing;
}
if (t_class != NO_REGS)
{
for (t_reload = 0; t_reload < n_reloads; t_reload++)
- if (reload_secondary_p[t_reload]
- && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
- || reg_class_subset_p (reload_reg_class[t_reload], t_class))
- && ((in_p && reload_inmode[t_reload] == t_mode)
- || (! in_p && reload_outmode[t_reload] == t_mode))
- && ((in_p && (reload_secondary_in_icode[t_reload]
+ if (rld[t_reload].secondary_p
+ && (reg_class_subset_p (t_class, rld[t_reload].class)
+ || reg_class_subset_p (rld[t_reload].class, t_class))
+ && ((in_p && rld[t_reload].inmode == t_mode)
+ || (! in_p && rld[t_reload].outmode == t_mode))
+ && ((in_p && (rld[t_reload].secondary_in_icode
== CODE_FOR_nothing))
- || (! in_p &&(reload_secondary_out_icode[t_reload]
+ || (! in_p &&(rld[t_reload].secondary_out_icode
== CODE_FOR_nothing)))
&& (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
&& MERGABLE_RELOADS (secondary_type,
- reload_when_needed[t_reload],
- opnum, reload_opnum[t_reload]))
+ rld[t_reload].when_needed,
+ opnum, rld[t_reload].opnum))
{
if (in_p)
- reload_inmode[t_reload] = t_mode;
+ rld[t_reload].inmode = t_mode;
if (! in_p)
- reload_outmode[t_reload] = t_mode;
+ rld[t_reload].outmode = t_mode;
- if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
- reload_reg_class[t_reload] = t_class;
+ if (reg_class_subset_p (t_class, rld[t_reload].class))
+ rld[t_reload].class = t_class;
- reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
- reload_optional[t_reload] &= optional;
- reload_secondary_p[t_reload] = 1;
- if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
- opnum, reload_opnum[t_reload]))
- reload_when_needed[t_reload] = RELOAD_OTHER;
+ rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
+ rld[t_reload].optional &= optional;
+ rld[t_reload].secondary_p = 1;
+ if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
+ opnum, rld[t_reload].opnum))
+ rld[t_reload].when_needed = RELOAD_OTHER;
}
if (t_reload == n_reloads)
{
/* We need to make a new tertiary reload for this register class. */
- reload_in[t_reload] = reload_out[t_reload] = 0;
- reload_reg_class[t_reload] = t_class;
- reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
- reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
- reload_reg_rtx[t_reload] = 0;
- reload_optional[t_reload] = optional;
- reload_inc[t_reload] = 0;
+ rld[t_reload].in = rld[t_reload].out = 0;
+ rld[t_reload].class = t_class;
+ rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
+ rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
+ rld[t_reload].reg_rtx = 0;
+ rld[t_reload].optional = optional;
+ rld[t_reload].inc = 0;
/* Maybe we could combine these, but it seems too tricky. */
- reload_nocombine[t_reload] = 1;
- reload_in_reg[t_reload] = 0;
- reload_opnum[t_reload] = opnum;
- reload_when_needed[t_reload] = secondary_type;
- reload_secondary_in_reload[t_reload] = -1;
- reload_secondary_out_reload[t_reload] = -1;
- reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
- reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
- reload_secondary_p[t_reload] = 1;
+ rld[t_reload].nocombine = 1;
+ rld[t_reload].in_reg = 0;
+ rld[t_reload].out_reg = 0;
+ rld[t_reload].opnum = opnum;
+ rld[t_reload].when_needed = secondary_type;
+ rld[t_reload].secondary_in_reload = -1;
+ rld[t_reload].secondary_out_reload = -1;
+ rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
+ rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
+ rld[t_reload].secondary_p = 1;
n_reloads++;
}
/* See if we can reuse an existing secondary reload. */
for (s_reload = 0; s_reload < n_reloads; s_reload++)
- if (reload_secondary_p[s_reload]
- && (reg_class_subset_p (class, reload_reg_class[s_reload])
- || reg_class_subset_p (reload_reg_class[s_reload], class))
- && ((in_p && reload_inmode[s_reload] == mode)
- || (! in_p && reload_outmode[s_reload] == mode))
- && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
- || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
- && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
- || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
+ if (rld[s_reload].secondary_p
+ && (reg_class_subset_p (class, rld[s_reload].class)
+ || reg_class_subset_p (rld[s_reload].class, class))
+ && ((in_p && rld[s_reload].inmode == mode)
+ || (! in_p && rld[s_reload].outmode == mode))
+ && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
+ || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
+ && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
+ || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
&& (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
- && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
- opnum, reload_opnum[s_reload]))
+ && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
+ opnum, rld[s_reload].opnum))
{
if (in_p)
- reload_inmode[s_reload] = mode;
+ rld[s_reload].inmode = mode;
if (! in_p)
- reload_outmode[s_reload] = mode;
+ rld[s_reload].outmode = mode;
- if (reg_class_subset_p (class, reload_reg_class[s_reload]))
- reload_reg_class[s_reload] = class;
+ if (reg_class_subset_p (class, rld[s_reload].class))
+ rld[s_reload].class = class;
- reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
- reload_optional[s_reload] &= optional;
- reload_secondary_p[s_reload] = 1;
- if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
- opnum, reload_opnum[s_reload]))
- reload_when_needed[s_reload] = RELOAD_OTHER;
+ rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
+ rld[s_reload].optional &= optional;
+ rld[s_reload].secondary_p = 1;
+ if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
+ opnum, rld[s_reload].opnum))
+ rld[s_reload].when_needed = RELOAD_OTHER;
}
if (s_reload == n_reloads)
#ifdef SECONDARY_MEMORY_NEEDED
/* If we need a memory location to copy between the two reload regs,
set it up now. Note that we do the input case before making
- the reload and the output case after. This is due to the
+ the reload and the output case after. This is due to the
way reloads are output. */
if (in_p && icode == CODE_FOR_nothing
#endif
/* We need to make a new secondary reload for this register class. */
- reload_in[s_reload] = reload_out[s_reload] = 0;
- reload_reg_class[s_reload] = class;
-
- reload_inmode[s_reload] = in_p ? mode : VOIDmode;
- reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
- reload_reg_rtx[s_reload] = 0;
- reload_optional[s_reload] = optional;
- reload_inc[s_reload] = 0;
+ rld[s_reload].in = rld[s_reload].out = 0;
+ rld[s_reload].class = class;
+
+ rld[s_reload].inmode = in_p ? mode : VOIDmode;
+ rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
+ rld[s_reload].reg_rtx = 0;
+ rld[s_reload].optional = optional;
+ rld[s_reload].inc = 0;
/* Maybe we could combine these, but it seems too tricky. */
- reload_nocombine[s_reload] = 1;
- reload_in_reg[s_reload] = 0;
- reload_opnum[s_reload] = opnum;
- reload_when_needed[s_reload] = secondary_type;
- reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
- reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
- reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
- reload_secondary_out_icode[s_reload]
+ rld[s_reload].nocombine = 1;
+ rld[s_reload].in_reg = 0;
+ rld[s_reload].out_reg = 0;
+ rld[s_reload].opnum = opnum;
+ rld[s_reload].when_needed = secondary_type;
+ rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
+ rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
+ rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
+ rld[s_reload].secondary_out_icode
= ! in_p ? t_icode : CODE_FOR_nothing;
- reload_secondary_p[s_reload] = 1;
+ rld[s_reload].secondary_p = 1;
n_reloads++;
\f
#ifdef SECONDARY_MEMORY_NEEDED
-/* Return a memory location that will be used to copy X in mode MODE.
+/* Return a memory location that will be used to copy X in mode MODE.
If we haven't already made a location for this mode in this insn,
call find_reloads_address on the location being returned. */
rtx
get_secondary_mem (x, mode, opnum, type)
- rtx x;
+ rtx x ATTRIBUTE_UNUSED;
enum machine_mode mode;
int opnum;
enum reload_type type;
if (secondary_memlocs_elim[(int) mode][opnum] != 0)
return secondary_memlocs_elim[(int) mode][opnum];
- /* If this is the first time we've tried to get a MEM for this mode,
+ /* If this is the first time we've tried to get a MEM for this mode,
allocate a new one. `something_changed' in reload will get set
by noticing that the frame size has changed. */
{
int class;
int regno;
- enum reg_class best_class;
+ enum reg_class best_class = NO_REGS;
int best_size = 0;
for (class = 1; class < N_REG_CLASSES; class++)
return best_class;
}
\f
+/* Return the number of a previously made reload that can be combined with
+ a new one, or n_reloads if none of the existing reloads can be used.
+ OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
+ push_reload, they determine the kind of the new reload that we try to
+ combine. P_IN points to the corresponding value of IN, which can be
+ modified by this function.
+ DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
+static int
+find_reusable_reload (p_in, out, class, type, opnum, dont_share)
+ rtx *p_in, out;
+ enum reg_class class;
+ enum reload_type type;
+ int opnum, dont_share;
+{
+ rtx in = *p_in;
+ int i;
+ /* We can't merge two reloads if the output of either one is
+ earlyclobbered. */
+
+ if (earlyclobber_operand_p (out))
+ return n_reloads;
+
+ /* We can use an existing reload if the class is right
+ and at least one of IN and OUT is a match
+ and the other is at worst neutral.
+ (A zero compared against anything is neutral.)
+
+ If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
+ for the same thing since that can cause us to need more reload registers
+ than we otherwise would. */
+
+ for (i = 0; i < n_reloads; i++)
+ if ((reg_class_subset_p (class, rld[i].class)
+ || reg_class_subset_p (rld[i].class, class))
+ /* If the existing reload has a register, it must fit our class. */
+ && (rld[i].reg_rtx == 0
+ || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
+ true_regnum (rld[i].reg_rtx)))
+ && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
+ && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
+ || (out != 0 && MATCHES (rld[i].out, out)
+ && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
+ && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
+ && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
+ && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
+ return i;
+
+ /* Reloading a plain reg for input can match a reload to postincrement
+ that reg, since the postincrement's value is the right value.
+ Likewise, it can match a preincrement reload, since we regard
+ the preincrementation as happening before any ref in this insn
+ to that register. */
+ for (i = 0; i < n_reloads; i++)
+ if ((reg_class_subset_p (class, rld[i].class)
+ || reg_class_subset_p (rld[i].class, class))
+ /* If the existing reload has a register, it must fit our
+ class. */
+ && (rld[i].reg_rtx == 0
+ || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
+ true_regnum (rld[i].reg_rtx)))
+ && out == 0 && rld[i].out == 0 && rld[i].in != 0
+ && ((GET_CODE (in) == REG
+ && (GET_CODE (rld[i].in) == POST_INC
+ || GET_CODE (rld[i].in) == POST_DEC
+ || GET_CODE (rld[i].in) == PRE_INC
+ || GET_CODE (rld[i].in) == PRE_DEC)
+ && MATCHES (XEXP (rld[i].in, 0), in))
+ ||
+ (GET_CODE (rld[i].in) == REG
+ && (GET_CODE (in) == POST_INC
+ || GET_CODE (in) == POST_DEC
+ || GET_CODE (in) == PRE_INC
+ || GET_CODE (in) == PRE_DEC)
+ && MATCHES (XEXP (in, 0), rld[i].in)))
+ && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
+ && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
+ && MERGABLE_RELOADS (type, rld[i].when_needed,
+ opnum, rld[i].opnum))
+ {
+ /* Make sure reload_in ultimately has the increment,
+ not the plain register. */
+ if (GET_CODE (in) == REG)
+ *p_in = rld[i].in;
+ return i;
+ }
+ return n_reloads;
+}
+
/* Record one reload that needs to be performed.
IN is an rtx saying where the data are to be found before this instruction.
OUT says where they must be stored after the instruction.
static int
push_reload (in, out, inloc, outloc, class,
inmode, outmode, strict_low, optional, opnum, type)
- register rtx in, out;
+ rtx in, out;
rtx *inloc, *outloc;
enum reg_class class;
enum machine_mode inmode, outmode;
if (outmode == VOIDmode && out != 0)
outmode = GET_MODE (out);
- /* If IN is a pseudo register everywhere-equivalent to a constant, and
+ /* If IN is a pseudo register everywhere-equivalent to a constant, and
it is not in a hard register, reload straight from the constant,
since we want to get rid of such pseudo registers.
Often this is done earlier, but not always in find_reloads_address. */
the class whose registers cannot be referenced in a different size
and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
cannot reload just the inside since we might end up with the wrong
- register class. */
+ register class. But if it is inside a STRICT_LOW_PART, we have
+ no choice, so we hope we do get the right register class there. */
- if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
+ if (in != 0 && GET_CODE (in) == SUBREG
+ && (SUBREG_WORD (in) == 0 || strict_low)
#ifdef CLASS_CANNOT_CHANGE_SIZE
&& class != CLASS_CANNOT_CHANGE_SIZE
#endif
storing in a subreg is entitled to clobber it all
(except in the case of STRICT_LOW_PART,
and in that case the constraint should label it input-output.) */
- if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
+ if (out != 0 && GET_CODE (out) == SUBREG
+ && (SUBREG_WORD (out) == 0 || strict_low)
#ifdef CLASS_CANNOT_CHANGE_SIZE
&& class != CLASS_CANNOT_CHANGE_SIZE
#endif
((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
/ UNITS_PER_WORD)))
#endif
- ))
+ ))
|| (GET_CODE (SUBREG_REG (out)) == REG
&& REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
&& ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
{
out_subreg_loc = outloc;
outloc = &SUBREG_REG (out);
- out = *outloc;
+ out = *outloc;
#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
- if (GET_CODE (out) == MEM
+ if (GET_CODE (out) == MEM
&& GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
abort ();
#endif
}
}
- if (class == NO_REGS)
+ /* Optional output reloads are always OK even if we have no register class,
+ since the function of these reloads is only to have spill_reg_store etc.
+ set, so that the storing insn can be deleted later. */
+ if (class == NO_REGS
+ && (optional == 0 || type != RELOAD_FOR_OUTPUT))
abort ();
- /* We can use an existing reload if the class is right
- and at least one of IN and OUT is a match
- and the other is at worst neutral.
- (A zero compared against anything is neutral.)
-
- If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
- for the same thing since that can cause us to need more reload registers
- than we otherwise would. */
-
- for (i = 0; i < n_reloads; i++)
- if ((reg_class_subset_p (class, reload_reg_class[i])
- || reg_class_subset_p (reload_reg_class[i], class))
- /* If the existing reload has a register, it must fit our class. */
- && (reload_reg_rtx[i] == 0
- || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
- true_regnum (reload_reg_rtx[i])))
- && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
- && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
- ||
- (out != 0 && MATCHES (reload_out[i], out)
- && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
- && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
- && MERGABLE_RELOADS (type, reload_when_needed[i],
- opnum, reload_opnum[i]))
- break;
-
- /* Reloading a plain reg for input can match a reload to postincrement
- that reg, since the postincrement's value is the right value.
- Likewise, it can match a preincrement reload, since we regard
- the preincrementation as happening before any ref in this insn
- to that register. */
- if (i == n_reloads)
- for (i = 0; i < n_reloads; i++)
- if ((reg_class_subset_p (class, reload_reg_class[i])
- || reg_class_subset_p (reload_reg_class[i], class))
- /* If the existing reload has a register, it must fit our class. */
- && (reload_reg_rtx[i] == 0
- || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
- true_regnum (reload_reg_rtx[i])))
- && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
- && ((GET_CODE (in) == REG
- && (GET_CODE (reload_in[i]) == POST_INC
- || GET_CODE (reload_in[i]) == POST_DEC
- || GET_CODE (reload_in[i]) == PRE_INC
- || GET_CODE (reload_in[i]) == PRE_DEC)
- && MATCHES (XEXP (reload_in[i], 0), in))
- ||
- (GET_CODE (reload_in[i]) == REG
- && (GET_CODE (in) == POST_INC
- || GET_CODE (in) == POST_DEC
- || GET_CODE (in) == PRE_INC
- || GET_CODE (in) == PRE_DEC)
- && MATCHES (XEXP (in, 0), reload_in[i])))
- && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
- && MERGABLE_RELOADS (type, reload_when_needed[i],
- opnum, reload_opnum[i]))
- {
- /* Make sure reload_in ultimately has the increment,
- not the plain register. */
- if (GET_CODE (in) == REG)
- in = reload_in[i];
- break;
- }
+ i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
if (i == n_reloads)
{
if (in != 0 && GET_CODE (in) == REG
&& REGNO (in) < FIRST_PSEUDO_REGISTER
&& SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
- class, inmode))
+ class, inmode))
get_secondary_mem (in, inmode, opnum, type);
#endif
i = n_reloads;
- reload_in[i] = in;
- reload_out[i] = out;
- reload_reg_class[i] = class;
- reload_inmode[i] = inmode;
- reload_outmode[i] = outmode;
- reload_reg_rtx[i] = 0;
- reload_optional[i] = optional;
- reload_inc[i] = 0;
- reload_nocombine[i] = 0;
- reload_in_reg[i] = inloc ? *inloc : 0;
- reload_opnum[i] = opnum;
- reload_when_needed[i] = type;
- reload_secondary_in_reload[i] = secondary_in_reload;
- reload_secondary_out_reload[i] = secondary_out_reload;
- reload_secondary_in_icode[i] = secondary_in_icode;
- reload_secondary_out_icode[i] = secondary_out_icode;
- reload_secondary_p[i] = 0;
+ rld[i].in = in;
+ rld[i].out = out;
+ rld[i].class = class;
+ rld[i].inmode = inmode;
+ rld[i].outmode = outmode;
+ rld[i].reg_rtx = 0;
+ rld[i].optional = optional;
+ rld[i].inc = 0;
+ rld[i].nocombine = 0;
+ rld[i].in_reg = inloc ? *inloc : 0;
+ rld[i].out_reg = outloc ? *outloc : 0;
+ rld[i].opnum = opnum;
+ rld[i].when_needed = type;
+ rld[i].secondary_in_reload = secondary_in_reload;
+ rld[i].secondary_out_reload = secondary_out_reload;
+ rld[i].secondary_in_icode = secondary_in_icode;
+ rld[i].secondary_out_icode = secondary_out_icode;
+ rld[i].secondary_p = 0;
n_reloads++;
/* The modes can be different. If they are, we want to reload in
the larger mode, so that the value is valid for both modes. */
if (inmode != VOIDmode
- && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
- reload_inmode[i] = inmode;
+ && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
+ rld[i].inmode = inmode;
if (outmode != VOIDmode
- && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
- reload_outmode[i] = outmode;
+ && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
+ rld[i].outmode = outmode;
if (in != 0)
- reload_in[i] = in;
+ {
+ rtx in_reg = inloc ? *inloc : 0;
+ /* If we merge reloads for two distinct rtl expressions that
+ are identical in content, there might be duplicate address
+ reloads. Remove the extra set now, so that if we later find
+ that we can inherit this reload, we can get rid of the
+ address reloads altogether.
+
+ Do not do this if both reloads are optional since the result
+ would be an optional reload which could potentially leave
+ unresolved address replacements.
+
+ It is not sufficient to call transfer_replacements since
+ choose_reload_regs will remove the replacements for address
+ reloads of inherited reloads which results in the same
+ problem. */
+ if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
+ && ! (rld[i].optional && optional))
+ {
+ /* We must keep the address reload with the lower operand
+ number alive. */
+ if (opnum > rld[i].opnum)
+ {
+ remove_address_replacements (in);
+ in = rld[i].in;
+ in_reg = rld[i].in_reg;
+ }
+ else
+ remove_address_replacements (rld[i].in);
+ }
+ rld[i].in = in;
+ rld[i].in_reg = in_reg;
+ }
if (out != 0)
- reload_out[i] = out;
- if (reg_class_subset_p (class, reload_reg_class[i]))
- reload_reg_class[i] = class;
- reload_optional[i] &= optional;
- if (MERGE_TO_OTHER (type, reload_when_needed[i],
- opnum, reload_opnum[i]))
- reload_when_needed[i] = RELOAD_OTHER;
- reload_opnum[i] = MIN (reload_opnum[i], opnum);
+ {
+ rld[i].out = out;
+ rld[i].out_reg = outloc ? *outloc : 0;
+ }
+ if (reg_class_subset_p (class, rld[i].class))
+ rld[i].class = class;
+ rld[i].optional &= optional;
+ if (MERGE_TO_OTHER (type, rld[i].when_needed,
+ opnum, rld[i].opnum))
+ rld[i].when_needed = RELOAD_OTHER;
+ rld[i].opnum = MIN (rld[i].opnum, opnum);
}
/* If the ostensible rtx being reload differs from the rtx found
because we cannot reliably tell whether it appears in the insn. */
if (in != 0 && in != *inloc)
- reload_nocombine[i] = 1;
+ rld[i].nocombine = 1;
#if 0
/* This was replaced by changes in find_reloads_address_1 and the new
if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
{
out = 0;
- reload_out[i] = 0;
- reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
+ rld[i].out = 0;
+ rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
/* If we did not find a nonzero amount-to-increment-by,
that contradicts the belief that IN is being incremented
in an address in this insn. */
- if (reload_inc[i] == 0)
+ if (rld[i].inc == 0)
abort ();
}
#endif
supposed to be made to match, see if either one of the two
can serve as the place to reload into.
- If one of them is acceptable, set reload_reg_rtx[i]
+ If one of them is acceptable, set rld[i].reg_rtx
to that one. */
- if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
+ if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
{
- reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
- inmode, outmode,
- reload_reg_class[i], i,
- earlyclobber_operand_p (out));
+ rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
+ inmode, outmode,
+ rld[i].class, i,
+ earlyclobber_operand_p (out));
/* If the outgoing register already contains the same value
as the incoming one, we can dispense with loading it.
The easiest way to tell the caller that is to give a phony
value for the incoming operand (same as outgoing one). */
- if (reload_reg_rtx[i] == out
+ if (rld[i].reg_rtx == out
&& (GET_CODE (in) == REG || CONSTANT_P (in))
&& 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
static_reload_reg_p, i, inmode))
- reload_in[i] = out;
+ rld[i].in = out;
}
/* If this is an input reload and the operand contains a register that
But if there is no spilling in this block, that is OK.
An explicitly used hard reg cannot be a spill reg. */
- if (reload_reg_rtx[i] == 0 && in != 0)
+ if (rld[i].reg_rtx == 0 && in != 0)
{
rtx note;
int regno;
&& GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
&& HARD_REGNO_MODE_OK (regno, inmode)
&& GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
- && HARD_REGNO_MODE_OK (regno, outmode)
- && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
- && !fixed_regs[regno])
+ && HARD_REGNO_MODE_OK (regno, outmode))
{
- reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
- break;
+ int offs;
+ int nregs = HARD_REGNO_NREGS (regno, inmode);
+ for (offs = 0; offs < nregs; offs++)
+ if (fixed_regs[regno + offs]
+ || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
+ regno + offs))
+ break;
+
+ if (offs == nregs)
+ {
+ rld[i].reg_rtx = gen_rtx_REG (inmode, regno);
+ break;
+ }
}
}
replacements[i].what = to;
}
\f
+/* IN_RTX is the value loaded by a reload that we now decided to inherit,
+ or a subpart of it. If we have any replacements registered for IN_RTX,
+ cancel the reloads that were supposed to load them.
+ Return non-zero if we canceled any reloads. */
+int
+remove_address_replacements (in_rtx)
+ rtx in_rtx;
+{
+ int i, j;
+ char reload_flags[MAX_RELOADS];
+ int something_changed = 0;
+
+ bzero (reload_flags, sizeof reload_flags);
+ for (i = 0, j = 0; i < n_replacements; i++)
+ {
+ if (loc_mentioned_in_p (replacements[i].where, in_rtx))
+ reload_flags[replacements[i].what] |= 1;
+ else
+ {
+ replacements[j++] = replacements[i];
+ reload_flags[replacements[i].what] |= 2;
+ }
+ }
+ /* Note that the following store must be done before the recursive calls. */
+ n_replacements = j;
+
+ for (i = n_reloads - 1; i >= 0; i--)
+ {
+ if (reload_flags[i] == 1)
+ {
+ deallocate_reload_reg (i);
+ remove_address_replacements (rld[i].in);
+ rld[i].in = 0;
+ something_changed = 1;
+ }
+ }
+ return something_changed;
+}
+
+/* Return non-zero if IN contains a piece of rtl that has the address LOC */
+static int
+loc_mentioned_in_p (loc, in)
+ rtx *loc, in;
+{
+ enum rtx_code code = GET_CODE (in);
+ const char *fmt = GET_RTX_FORMAT (code);
+ int i, j;
+
+ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ {
+ if (loc == &in->fld[i].rtx)
+ return 1;
+ if (fmt[i] == 'e')
+ {
+ if (loc_mentioned_in_p (loc, XEXP (in, i)))
+ return 1;
+ }
+ else if (fmt[i] == 'E')
+ for (j = XVECLEN (in, i) - 1; i >= 0; i--)
+ if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
+ return 1;
+ }
+ return 0;
+}
+\f
/* If there is only one output reload, and it is not for an earlyclobber
operand, try to combine it with a (logically unrelated) input reload
to reduce the number of reload registers needed.
and that one is mandatory. */
for (i = 0; i < n_reloads; i++)
- if (reload_out[i] != 0)
+ if (rld[i].out != 0)
{
if (output_reload >= 0)
return;
output_reload = i;
}
- if (output_reload < 0 || reload_optional[output_reload])
+ if (output_reload < 0 || rld[output_reload].optional)
return;
/* An input-output reload isn't combinable. */
- if (reload_in[output_reload] != 0)
+ if (rld[output_reload].in != 0)
return;
/* If this reload is for an earlyclobber operand, we can't do anything. */
- if (earlyclobber_operand_p (reload_out[output_reload]))
+ if (earlyclobber_operand_p (rld[output_reload].out))
return;
/* Check each input reload; can we combine it? */
for (i = 0; i < n_reloads; i++)
- if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
+ if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
/* Life span of this reload must not extend past main insn. */
- && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
- && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
- && reload_when_needed[i] != RELOAD_OTHER
- && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
- == CLASS_MAX_NREGS (reload_reg_class[output_reload],
- reload_outmode[output_reload]))
- && reload_inc[i] == 0
- && reload_reg_rtx[i] == 0
+ && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
+ && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
+ && rld[i].when_needed != RELOAD_OTHER
+ && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
+ == CLASS_MAX_NREGS (rld[output_reload].class,
+ rld[output_reload].outmode))
+ && rld[i].inc == 0
+ && rld[i].reg_rtx == 0
#ifdef SECONDARY_MEMORY_NEEDED
/* Don't combine two reloads with different secondary
memory locations. */
- && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
- || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
- || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
- secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
+ && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
+ || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
+ || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
+ secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
#endif
&& (SMALL_REGISTER_CLASSES
- ? (reload_reg_class[i] == reload_reg_class[output_reload])
- : (reg_class_subset_p (reload_reg_class[i],
- reload_reg_class[output_reload])
- || reg_class_subset_p (reload_reg_class[output_reload],
- reload_reg_class[i])))
- && (MATCHES (reload_in[i], reload_out[output_reload])
+ ? (rld[i].class == rld[output_reload].class)
+ : (reg_class_subset_p (rld[i].class,
+ rld[output_reload].class)
+ || reg_class_subset_p (rld[output_reload].class,
+ rld[i].class)))
+ && (MATCHES (rld[i].in, rld[output_reload].out)
/* Args reversed because the first arg seems to be
the one that we imagine being modified
while the second is the one that might be affected. */
- || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
- reload_in[i])
+ || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
+ rld[i].in)
/* However, if the input is a register that appears inside
the output, then we also can't share.
Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
If the same reload reg is used for both reg 69 and the
result to be stored in memory, then that result
will clobber the address of the memory ref. */
- && ! (GET_CODE (reload_in[i]) == REG
- && reg_overlap_mentioned_for_reload_p (reload_in[i],
- reload_out[output_reload]))))
- && (reg_class_size[(int) reload_reg_class[i]]
+ && ! (GET_CODE (rld[i].in) == REG
+ && reg_overlap_mentioned_for_reload_p (rld[i].in,
+ rld[output_reload].out))))
+ && (reg_class_size[(int) rld[i].class]
|| SMALL_REGISTER_CLASSES)
/* We will allow making things slightly worse by combining an
input and an output, but no worse than that. */
- && (reload_when_needed[i] == RELOAD_FOR_INPUT
- || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
+ && (rld[i].when_needed == RELOAD_FOR_INPUT
+ || rld[i].when_needed == RELOAD_FOR_OUTPUT))
{
int j;
/* We have found a reload to combine with! */
- reload_out[i] = reload_out[output_reload];
- reload_outmode[i] = reload_outmode[output_reload];
+ rld[i].out = rld[output_reload].out;
+ rld[i].out_reg = rld[output_reload].out_reg;
+ rld[i].outmode = rld[output_reload].outmode;
/* Mark the old output reload as inoperative. */
- reload_out[output_reload] = 0;
+ rld[output_reload].out = 0;
/* The combined reload is needed for the entire insn. */
- reload_when_needed[i] = RELOAD_OTHER;
+ rld[i].when_needed = RELOAD_OTHER;
/* If the output reload had a secondary reload, copy it. */
- if (reload_secondary_out_reload[output_reload] != -1)
+ if (rld[output_reload].secondary_out_reload != -1)
{
- reload_secondary_out_reload[i]
- = reload_secondary_out_reload[output_reload];
- reload_secondary_out_icode[i]
- = reload_secondary_out_icode[output_reload];
+ rld[i].secondary_out_reload
+ = rld[output_reload].secondary_out_reload;
+ rld[i].secondary_out_icode
+ = rld[output_reload].secondary_out_icode;
}
#ifdef SECONDARY_MEMORY_NEEDED
/* Copy any secondary MEM. */
- if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
- secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
- = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
+ if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
+ secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
+ = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
#endif
/* If required, minimize the register class. */
- if (reg_class_subset_p (reload_reg_class[output_reload],
- reload_reg_class[i]))
- reload_reg_class[i] = reload_reg_class[output_reload];
+ if (reg_class_subset_p (rld[output_reload].class,
+ rld[i].class))
+ rld[i].class = rld[output_reload].class;
/* Transfer all replacements from the old reload to the combined. */
for (j = 0; j < n_replacements; j++)
if (INSN_CODE (this_insn) == -1)
return;
- for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
- if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
- || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
+ for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
+ if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
+ || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
return;
/* See if some hard register that dies in this insn and is not used in
if (REG_NOTE_KIND (note) == REG_DEAD
&& GET_CODE (XEXP (note, 0)) == REG
&& ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
- reload_out[output_reload])
+ rld[output_reload].out)
&& REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
- && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
- && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
+ && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
+ && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
REGNO (XEXP (note, 0)))
- && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
+ && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
<= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
/* Ensure that a secondary or tertiary reload for this output
won't want this register. */
- && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
- || (! (TEST_HARD_REG_BIT
- (reg_class_contents[(int) reload_reg_class[secondary_out]],
- REGNO (XEXP (note, 0))))
- && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
+ && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
+ || (! (TEST_HARD_REG_BIT
+ (reg_class_contents[(int) rld[secondary_out].class],
+ REGNO (XEXP (note, 0))))
+ && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
|| ! (TEST_HARD_REG_BIT
- (reg_class_contents[(int) reload_reg_class[secondary_out]],
+ (reg_class_contents[(int) rld[secondary_out].class],
REGNO (XEXP (note, 0)))))))
&& ! fixed_regs[REGNO (XEXP (note, 0))])
{
- reload_reg_rtx[output_reload]
- = gen_rtx_REG (reload_outmode[output_reload],
+ rld[output_reload].reg_rtx
+ = gen_rtx_REG (rld[output_reload].outmode,
REGNO (XEXP (note, 0)));
return;
}
If FOR_REAL is >= 0, it is the number of the reload,
and in some cases when it can be discovered that OUT doesn't need
- to be computed, clear out reload_out[FOR_REAL].
+ to be computed, clear out rld[FOR_REAL].out.
If FOR_REAL is -1, this should not be done, because this call
is just to see if a register can be found, not to find and install it.
*inloc = const0_rtx;
if (regno < FIRST_PSEUDO_REGISTER
- /* A fixed reg that can overlap other regs better not be used
- for reloading in any way. */
-#ifdef OVERLAPPING_REGNO_P
- && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
-#endif
&& ! refers_to_regno_for_reload_p (regno, regno + nwords,
PATTERN (this_insn), outloc))
{
and changed our mind, it means OUT is a dummy that
dies here. So don't bother copying value to it. */
if (for_real >= 0 && value == real_out)
- reload_out[for_real] = 0;
+ rld[for_real].out = 0;
if (GET_CODE (real_in) == REG)
value = real_in;
else
/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
-static int
+int
earlyclobber_operand_p (x)
rtx x;
{
{
register int i;
register RTX_CODE code = GET_CODE (x);
- register char *fmt;
+ register const char *fmt;
int success_2;
-
+
if (x == y)
return 1;
if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
slow:
- /* Now we have disposed of all the cases
+ /* Now we have disposed of all the cases
in which different rtx codes can match. */
if (code != GET_CODE (y))
return 0;
fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
- int val;
+ int val, j;
switch (fmt[i])
{
case 'w':
case '0':
break;
+ case 'E':
+ if (XVECLEN (x, i) != XVECLEN (y, i))
+ return 0;
+ for (j = XVECLEN (x, i) - 1; j >= 0; --j)
+ {
+ val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
+ if (val == 0)
+ return 0;
+ if (val == 2)
+ success_2 = 1;
+ }
+ break;
+
/* It is believed that rtx's at this level will never
contain anything but integers and other rtx's,
except for within LABEL_REFs and SYMBOL_REFs. */
return 1 + success_2;
}
\f
-/* Return the number of times character C occurs in string S. */
-
-int
-n_occurrences (c, s)
- int c;
- char *s;
-{
- int n = 0;
- while (*s)
- n += (*s++ == c);
- return n;
-}
-\f
/* Describe the range of registers or memory referenced by X.
- If X is a register, set REG_FLAG and put the first register
+ If X is a register, set REG_FLAG and put the first register
number into START and the last plus one into END.
- If X is a memory reference, put a base address into BASE
+ If X is a memory reference, put a base address into BASE
and a range of integer offsets into START and END.
- If X is pushing on the stack, we can assume it causes no trouble,
+ If X is pushing on the stack, we can assume it causes no trouble,
so we set the SAFE field. */
static struct decomposition
val.base = 0;
if (GET_CODE (x) == MEM)
{
- rtx base, offset = 0;
+ rtx base = NULL_RTX, offset = 0;
rtx addr = XEXP (x, 0);
if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
{
base = addr;
offset = const0_rtx;
- }
+ }
if (GET_CODE (offset) == CONST)
offset = XEXP (offset, 0);
if (GET_CODE (offset) == PLUS)
else if (GET_CODE (x) == REG)
{
val.reg_flag = 1;
- val.start = true_regnum (x);
+ val.start = true_regnum (x);
if (val.start < 0)
{
/* A pseudo with no hard reg. */
/* This could be more precise, but it's good enough. */
return decompose (SUBREG_REG (x));
val.reg_flag = 1;
- val.start = true_regnum (x);
+ val.start = true_regnum (x);
if (val.start < 0)
return decompose (SUBREG_REG (x));
else
RELOAD_REG_P if nonzero is a vector indexed by hard reg number
which is nonnegative if the reg has been commandeered for reloading into.
It is copied into STATIC_RELOAD_REG_P and referenced from there
- by various subroutines. */
+ by various subroutines.
-void
+ Return TRUE if some operands need to be changed, because of swapping
+ commutative operands, reg_equiv_address substitution, or whatever. */
+
+int
find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
rtx insn;
int replace, ind_levels;
int live_known;
short *reload_reg_p;
{
-#ifdef REGISTER_CONSTRAINTS
-
register int insn_code_number;
register int i, j;
int noperands;
- /* These are the constraints for the insn. We don't change them. */
- char *constraints1[MAX_RECOG_OPERANDS];
/* These start out as the constraints for the insn
and they are chewed up as we consider alternatives. */
char *constraints[MAX_RECOG_OPERANDS];
int swapped;
int goal_alternative[MAX_RECOG_OPERANDS];
int this_alternative_number;
- int goal_alternative_number;
+ int goal_alternative_number = 0;
int operand_reloadnum[MAX_RECOG_OPERANDS];
int goal_alternative_matches[MAX_RECOG_OPERANDS];
int goal_alternative_matched[MAX_RECOG_OPERANDS];
rtx substed_operand[MAX_RECOG_OPERANDS];
rtx body = PATTERN (insn);
rtx set = single_set (insn);
- int goal_earlyclobber, this_earlyclobber;
+ int goal_earlyclobber = 0, this_earlyclobber;
enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
+ int retval = 0;
this_insn = insn;
- this_insn_is_asm = 0; /* Tentative. */
n_reloads = 0;
n_replacements = 0;
- n_memlocs = 0;
n_earlyclobbers = 0;
replace_reloads = replace;
hard_regs_live_known = live_known;
if (reg_set_p (cc0_rtx, PATTERN (insn)))
no_output_reloads = 1;
#endif
-
+
#ifdef SECONDARY_MEMORY_NEEDED
/* The eliminated forms of any secondary memory locations are per-insn, so
clear them out here. */
bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
#endif
- /* Find what kind of insn this is. NOPERANDS gets number of operands.
- Make OPERANDS point to a vector of operand values.
- Make OPERAND_LOCS point to a vector of pointers to
- where the operands were found.
- Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
- constraint-strings for this insn.
- Return if the insn needs no reload processing. */
-
- switch (GET_CODE (body))
- {
- case USE:
- case CLOBBER:
- case ASM_INPUT:
- case ADDR_VEC:
- case ADDR_DIFF_VEC:
- return;
-
- case SET:
- /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
- is cheap to move between them. If it is not, there may not be an insn
- to do the copy, so we may need a reload. */
- if (GET_CODE (SET_DEST (body)) == REG
- && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
- && GET_CODE (SET_SRC (body)) == REG
- && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
- && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
- REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
- return;
- case PARALLEL:
- case ASM_OPERANDS:
- reload_n_operands = noperands = asm_noperands (body);
- if (noperands >= 0)
- {
- /* This insn is an `asm' with operands. */
-
- insn_code_number = -1;
- this_insn_is_asm = 1;
-
- /* expand_asm_operands makes sure there aren't too many operands. */
- if (noperands > MAX_RECOG_OPERANDS)
- abort ();
-
- /* Now get the operand values and constraints out of the insn. */
+ /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
+ is cheap to move between them. If it is not, there may not be an insn
+ to do the copy, so we may need a reload. */
+ if (GET_CODE (body) == SET
+ && GET_CODE (SET_DEST (body)) == REG
+ && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
+ && GET_CODE (SET_SRC (body)) == REG
+ && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
+ && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
+ REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
+ return 0;
- decode_asm_operands (body, recog_operand, recog_operand_loc,
- constraints, operand_mode);
- if (noperands > 0)
- {
- bcopy ((char *) constraints, (char *) constraints1,
- noperands * sizeof (char *));
- n_alternatives = n_occurrences (',', constraints[0]) + 1;
- for (i = 1; i < noperands; i++)
- if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
- {
- error_for_asm (insn, "operand constraints differ in number of alternatives");
- /* Avoid further trouble with this insn. */
- PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
- n_reloads = 0;
- return;
- }
- }
- break;
- }
+ extract_insn (insn);
- default:
- /* Ordinary insn: recognize it, get the operands via insn_extract
- and get the constraints. */
+ noperands = reload_n_operands = recog_data.n_operands;
+ n_alternatives = recog_data.n_alternatives;
- insn_code_number = recog_memoized (insn);
- if (insn_code_number < 0)
- fatal_insn_not_found (insn);
+ /* Just return "no reloads" if insn has no operands with constraints. */
+ if (noperands == 0 || n_alternatives == 0)
+ return 0;
- reload_n_operands = noperands = insn_n_operands[insn_code_number];
- n_alternatives = insn_n_alternatives[insn_code_number];
- /* Just return "no reloads" if insn has no operands with constraints. */
- if (n_alternatives == 0)
- return;
- insn_extract (insn);
- for (i = 0; i < noperands; i++)
- {
- constraints[i] = constraints1[i]
- = insn_operand_constraint[insn_code_number][i];
- operand_mode[i] = insn_operand_mode[insn_code_number][i];
- }
- }
+ insn_code_number = INSN_CODE (insn);
+ this_insn_is_asm = insn_code_number < 0;
- if (noperands == 0)
- return;
+ memcpy (operand_mode, recog_data.operand_mode,
+ noperands * sizeof (enum machine_mode));
+ memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
commutative = -1;
register char *p;
register int c;
- substed_operand[i] = recog_operand[i];
+ substed_operand[i] = recog_data.operand[i];
p = constraints[i];
modified[i] = RELOAD_READ;
- /* Scan this operand's constraint to see if it is an output operand,
+ /* Scan this operand's constraint to see if it is an output operand,
an in-out operand, is commutative, or should match another. */
while ((c = *p++))
{
/* The last operand should not be marked commutative. */
if (i == noperands - 1)
- {
- if (this_insn_is_asm)
- warning_for_asm (this_insn,
- "`%%' constraint used with last operand");
- else
- abort ();
- }
- else
- commutative = i;
+ abort ();
+
+ commutative = i;
}
else if (c >= '0' && c <= '9')
{
c -= '0';
operands_match[c][i]
- = operands_match_p (recog_operand[c], recog_operand[i]);
+ = operands_match_p (recog_data.operand[c],
+ recog_data.operand[i]);
/* An operand may not match itself. */
if (c == i)
- {
- if (this_insn_is_asm)
- warning_for_asm (this_insn,
- "operand %d has constraint %d", i, c);
- else
- abort ();
- }
+ abort ();
/* If C can be commuted with C+1, and C might need to match I,
then C+1 might also need to match I. */
{
int other = c + (c == commutative ? 1 : -1);
operands_match[other][i]
- = operands_match_p (recog_operand[other], recog_operand[i]);
+ = operands_match_p (recog_data.operand[other],
+ recog_data.operand[i]);
}
if (i == commutative || i == commutative + 1)
{
int other = i + (i == commutative ? 1 : -1);
operands_match[c][other]
- = operands_match_p (recog_operand[c], recog_operand[other]);
+ = operands_match_p (recog_data.operand[c],
+ recog_data.operand[other]);
}
/* Note that C is supposed to be less than I.
No need to consider altering both C and I because in
and reload parts of the addresses into index registers.
Also here any references to pseudo regs that didn't get hard regs
but are equivalent to constants get replaced in the insn itself
- with those constants. Nobody will ever see them again.
+ with those constants. Nobody will ever see them again.
Finally, set up the preferred classes of each operand. */
for (i = 0; i < noperands; i++)
{
- register RTX_CODE code = GET_CODE (recog_operand[i]);
+ register RTX_CODE code = GET_CODE (recog_data.operand[i]);
address_reloaded[i] = 0;
operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
else if (constraints[i][0] == 'p')
{
find_reloads_address (VOIDmode, NULL_PTR,
- recog_operand[i], recog_operand_loc[i],
+ recog_data.operand[i],
+ recog_data.operand_loc[i],
i, operand_type[i], ind_levels, insn);
- /* If we now have a simple operand where we used to have a
+ /* If we now have a simple operand where we used to have a
PLUS or MULT, re-recognize and try again. */
- if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
- || GET_CODE (*recog_operand_loc[i]) == SUBREG)
- && (GET_CODE (recog_operand[i]) == MULT
- || GET_CODE (recog_operand[i]) == PLUS))
+ if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
+ || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
+ && (GET_CODE (recog_data.operand[i]) == MULT
+ || GET_CODE (recog_data.operand[i]) == PLUS))
{
INSN_CODE (insn) = -1;
- find_reloads (insn, replace, ind_levels, live_known,
- reload_reg_p);
- return;
+ retval = find_reloads (insn, replace, ind_levels, live_known,
+ reload_reg_p);
+ return retval;
}
- substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
+ recog_data.operand[i] = *recog_data.operand_loc[i];
+ substed_operand[i] = recog_data.operand[i];
}
else if (code == MEM)
{
- if (find_reloads_address (GET_MODE (recog_operand[i]),
- recog_operand_loc[i],
- XEXP (recog_operand[i], 0),
- &XEXP (recog_operand[i], 0),
- i, address_type[i], ind_levels, insn))
- address_reloaded[i] = 1;
- substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
+ address_reloaded[i]
+ = find_reloads_address (GET_MODE (recog_data.operand[i]),
+ recog_data.operand_loc[i],
+ XEXP (recog_data.operand[i], 0),
+ &XEXP (recog_data.operand[i], 0),
+ i, address_type[i], ind_levels, insn);
+ recog_data.operand[i] = *recog_data.operand_loc[i];
+ substed_operand[i] = recog_data.operand[i];
}
else if (code == SUBREG)
- substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], i, address_type[i],
- ind_levels,
- set != 0
- && &SET_DEST (set) == recog_operand_loc[i]);
+ {
+ rtx reg = SUBREG_REG (recog_data.operand[i]);
+ rtx op
+ = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
+ ind_levels,
+ set != 0
+ && &SET_DEST (set) == recog_data.operand_loc[i],
+ insn);
+
+ /* If we made a MEM to load (a part of) the stackslot of a pseudo
+ that didn't get a hard register, emit a USE with a REG_EQUAL
+ note in front so that we might inherit a previous, possibly
+ wider reload. */
+
+ if (replace
+ && GET_CODE (op) == MEM
+ && GET_CODE (reg) == REG
+ && (GET_MODE_SIZE (GET_MODE (reg))
+ >= GET_MODE_SIZE (GET_MODE (op))))
+ REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
+ = gen_rtx_EXPR_LIST (REG_EQUAL,
+ reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
+
+ substed_operand[i] = recog_data.operand[i] = op;
+ }
else if (code == PLUS || GET_RTX_CLASS (code) == '1')
/* We can get a PLUS as an "operand" as a result of register
elimination. See eliminate_regs and gen_reload. We handle
a unary operator by reloading the operand. */
- substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], i, address_type[i],
- ind_levels, 0);
+ substed_operand[i] = recog_data.operand[i]
+ = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
+ ind_levels, 0, insn);
else if (code == REG)
{
/* This is equivalent to calling find_reloads_toplev.
we replace it by the constant. We must be sure, however,
that we don't try to replace it in the insn in which it
is being set. */
- register int regno = REGNO (recog_operand[i]);
+ register int regno = REGNO (recog_data.operand[i]);
if (reg_equiv_constant[regno] != 0
- && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
- substed_operand[i] = recog_operand[i]
- = reg_equiv_constant[regno];
-#if 0 /* This might screw code in reload1.c to delete prior output-reload
- that feeds this insn. */
- if (reg_equiv_mem[regno] != 0)
- substed_operand[i] = recog_operand[i]
- = reg_equiv_mem[regno];
-#endif
- if (reg_equiv_address[regno] != 0)
+ && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
{
- /* If reg_equiv_address is not a constant address, copy it,
- since it may be shared. */
- /* We must rerun eliminate_regs, in case the elimination
- offsets have changed. */
- rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
- 0, NULL_RTX),
- 0);
-
- if (rtx_varies_p (address))
- address = copy_rtx (address);
-
- /* If this is an output operand, we must output a CLOBBER
- after INSN so find_equiv_reg knows REGNO is being written.
- Mark this insn specially, do we can put our output reloads
- after it. */
-
- if (modified[i] != RELOAD_READ)
- PUT_MODE (emit_insn_after (gen_rtx_CLOBBER (VOIDmode,
- recog_operand[i]),
- insn),
- DImode);
-
- *recog_operand_loc[i] = recog_operand[i]
- = gen_rtx_MEM (GET_MODE (recog_operand[i]), address);
- RTX_UNCHANGING_P (recog_operand[i])
- = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
- find_reloads_address (GET_MODE (recog_operand[i]),
- recog_operand_loc[i],
- XEXP (recog_operand[i], 0),
- &XEXP (recog_operand[i], 0),
- i, address_type[i], ind_levels, insn);
- substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
+ /* Record the existing mode so that the check if constants are
+ allowed will work when operand_mode isn't specified. */
+
+ if (operand_mode[i] == VOIDmode)
+ operand_mode[i] = GET_MODE (recog_data.operand[i]);
+
+ substed_operand[i] = recog_data.operand[i]
+ = reg_equiv_constant[regno];
}
+ if (reg_equiv_memory_loc[regno] != 0
+ && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
+ /* We need not give a valid is_set_dest argument since the case
+ of a constant equivalence was checked above. */
+ substed_operand[i] = recog_data.operand[i]
+ = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
+ ind_levels, 0, insn);
}
/* If the operand is still a register (we didn't replace it with an
equivalent), get the preferred class to reload it into. */
- code = GET_CODE (recog_operand[i]);
+ code = GET_CODE (recog_data.operand[i]);
preferred_class[i]
- = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
- ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
+ = ((code == REG && REGNO (recog_data.operand[i])
+ >= FIRST_PSEUDO_REGISTER)
+ ? reg_preferred_class (REGNO (recog_data.operand[i]))
+ : NO_REGS);
pref_or_nothing[i]
- = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
- && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
+ = (code == REG
+ && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
+ && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
}
/* If this is simply a copy from operand 1 to operand 0, merge the
preferred classes for the operands. */
- if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
- && recog_operand[1] == SET_SRC (set))
+ if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
+ && recog_data.operand[1] == SET_SRC (set))
{
preferred_class[0] = preferred_class[1]
= reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
/* REJECT is a count of how undesirable this alternative says it is
if any reloading is required. If the alternative matches exactly
then REJECT is ignored, but otherwise it gets this much
- counted against it in addition to the reloading needed. Each
+ counted against it in addition to the reloading needed. Each
? counts three times here since we want the disparaging caused by
a bad register class to only count 1/3 as much. */
int reject = 0;
/* 0 => this operand can be reloaded if the alternative allows regs. */
int winreg = 0;
int c;
- register rtx operand = recog_operand[i];
+ register rtx operand = recog_data.operand[i];
int offset = 0;
/* Nonzero means this is a MEM that must be reloaded into a reg
regardless of what the constraint says. */
int earlyclobber = 0;
/* If the predicate accepts a unary operator, it means that
- we need to reload the operand. */
- if (GET_RTX_CLASS (GET_CODE (operand)) == '1')
+ we need to reload the operand, but do not do this for
+ match_operator and friends. */
+ if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
operand = XEXP (operand, 0);
/* If the operand is a SUBREG, extract
{
offset += SUBREG_WORD (operand);
operand = SUBREG_REG (operand);
- /* Force reload if this is a constant or PLUS or if there may may
+ /* Force reload if this is a constant or PLUS or if there may
be a problem accessing OPERAND in the outer mode. */
if (CONSTANT_P (operand)
|| GET_CODE (operand) == PLUS
made assumptions about the behavior of the machine in such
register access. If the data is, in fact, in memory we
must always load using the size assumed to be in the
- register and let the insn do the different-sized
+ register and let the insn do the different-sized
accesses.
- This is doubly true if WORD_REGISTER_OPERATIONS. In
+ This is doubly true if WORD_REGISTER_OPERATIONS. In
this case eliminate_regs has left non-paradoxical
subregs for push_reloads to see. Make sure it does
by forcing the reload.
while (*p && (c = *p++) != ',')
switch (c)
{
- case '=':
- case '+':
- case '*':
+ case '=': case '+': case '*':
break;
case '%':
while (*p && *p != ',') p++;
break;
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
+
c -= '0';
this_alternative_matches[i] = c;
/* We are supposed to match a previous operand.
don't exchange them, because operands_match is valid
only on one side of its diagonal. */
? (operands_match
- [(c == commutative || c == commutative + 1)
- ? 2*commutative + 1 - c : c]
- [(i == commutative || i == commutative + 1)
- ? 2*commutative + 1 - i : i])
+ [(c == commutative || c == commutative + 1)
+ ? 2*commutative + 1 - c : c]
+ [(i == commutative || i == commutative + 1)
+ ? 2*commutative + 1 - i : i])
: operands_match[c][i])
{
/* If we are matching a non-offsettable address where an
offsettable address was expected, then we must reject
this combination, because we can't reload it. */
if (this_alternative_offmemok[c]
- && GET_CODE (recog_operand[c]) == MEM
+ && GET_CODE (recog_data.operand[c]) == MEM
&& this_alternative[c] == (int) NO_REGS
&& ! this_alternative_win[c])
bad = 1;
/* But count the pair only once in the total badness of
this alternative, if the pair can be a dummy reload. */
value
- = find_dummy_reload (recog_operand[i], recog_operand[c],
- recog_operand_loc[i], recog_operand_loc[c],
+ = find_dummy_reload (recog_data.operand[i],
+ recog_data.operand[c],
+ recog_data.operand_loc[i],
+ recog_data.operand_loc[c],
operand_mode[i], operand_mode[c],
this_alternative[c], -1,
this_alternative_earlyclobber[c]);
/* If IND_LEVELS, find_reloads_address won't reload a
pseudo that didn't get a hard reg, so we have to
reject that case. */
- && (ind_levels ? offsettable_memref_p (operand)
- : offsettable_nonstrict_memref_p (operand)))
- /* A reloaded auto-increment address is offsettable,
- because it is now just a simple register indirect. */
- || (GET_CODE (operand) == MEM
- && address_reloaded[i]
- && (GET_CODE (XEXP (operand, 0)) == PRE_INC
- || GET_CODE (XEXP (operand, 0)) == PRE_DEC
- || GET_CODE (XEXP (operand, 0)) == POST_INC
- || GET_CODE (XEXP (operand, 0)) == POST_DEC))
- /* Certain mem addresses will become offsettable
- after they themselves are reloaded. This is important;
- we don't want our own handling of unoffsettables
- to override the handling of reg_equiv_address. */
- || (GET_CODE (operand) == MEM
- && GET_CODE (XEXP (operand, 0)) == REG
- && (ind_levels == 0
- || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
+ && ((ind_levels ? offsettable_memref_p (operand)
+ : offsettable_nonstrict_memref_p (operand))
+ /* A reloaded address is offsettable because it is now
+ just a simple register indirect. */
+ || address_reloaded[i]))
|| (GET_CODE (operand) == REG
&& REGNO (operand) >= FIRST_PSEUDO_REGISTER
&& reg_renumber[REGNO (operand)] < 0
/* A SCRATCH is not a valid operand. */
&& GET_CODE (operand) != SCRATCH
#ifdef LEGITIMATE_PIC_OPERAND_P
- && (! CONSTANT_P (operand)
- || ! flag_pic
+ && (! CONSTANT_P (operand)
+ || ! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand))
#endif
&& (GENERAL_REGS == ALL_REGS
goto reg;
#ifdef EXTRA_CONSTRAINT
- case 'Q':
- case 'R':
- case 'S':
- case 'T':
- case 'U':
+ case 'Q':
+ case 'R':
+ case 'S':
+ case 'T':
+ case 'U':
if (EXTRA_CONSTRAINT (operand, c))
win = 1;
break;
#endif
-
+
default:
this_alternative[i]
= (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
-
+
reg:
if (GET_MODE (operand) == BLKmode)
break;
winreg = 1;
if (GET_CODE (operand) == REG
&& reg_fits_class_p (operand, this_alternative[i],
- offset, GET_MODE (recog_operand[i])))
+ offset, GET_MODE (recog_data.operand[i])))
win = 1;
break;
}
&& this_alternative_matches[i] < 0)
bad = 1;
- /* Alternative loses if it requires a type of reload not
- permitted for this insn. We can always reload SCRATCH
- and objects with a REG_UNUSED note. */
- if (GET_CODE (operand) != SCRATCH
- && modified[i] != RELOAD_READ && no_output_reloads
- && ! find_reg_note (insn, REG_UNUSED, operand))
- bad = 1;
- else if (modified[i] != RELOAD_WRITE && no_input_reloads)
- bad = 1;
-
/* If this is a constant that is reloaded into the desired
class by copying it to memory first, count that as another
reload. This is consistent with other code and is
required to avoid choosing another alternative when
the constant is moved into memory by this function on
- an early reload pass. Note that the test here is
+ an early reload pass. Note that the test here is
precisely the same as in the code below that calls
force_const_mem. */
if (CONSTANT_P (operand)
/* force_const_mem does not accept HIGH. */
&& GET_CODE (operand) != HIGH
- && (PREFERRED_RELOAD_CLASS (operand,
- (enum reg_class) this_alternative[i])
- == NO_REGS)
+ && ((PREFERRED_RELOAD_CLASS (operand,
+ (enum reg_class) this_alternative[i])
+ == NO_REGS)
+ || no_input_reloads)
&& operand_mode[i] != VOIDmode)
{
const_to_mem = 1;
== NO_REGS))
bad = 1;
+ /* Alternative loses if it requires a type of reload not
+ permitted for this insn. We can always reload SCRATCH
+ and objects with a REG_UNUSED note. */
+ else if (GET_CODE (operand) != SCRATCH
+ && modified[i] != RELOAD_READ && no_output_reloads
+ && ! find_reg_note (insn, REG_UNUSED, operand))
+ bad = 1;
+ else if (modified[i] != RELOAD_WRITE && no_input_reloads
+ && ! const_to_mem)
+ bad = 1;
+
+
/* We prefer to reload pseudos over reloading other things,
since such reloads may be able to be eliminated later.
If we are reloading a SCRATCH, we won't be generating any
- insns, just using a register, so it is also preferred.
+ insns, just using a register, so it is also preferred.
So bump REJECT in other cases. Don't do this in the
case where we are forcing a constant into memory and
it will then win since we don't want to have a different
/* Input reloads can be inherited more often than output
reloads can be removed, so penalize output reloads. */
- if (operand_type[i] != RELOAD_FOR_INPUT)
+ if (operand_type[i] != RELOAD_FOR_INPUT
+ && GET_CODE (operand) != SCRATCH)
reject++;
}
- /* If this operand is a pseudo register that didn't get a hard
+ /* If this operand is a pseudo register that didn't get a hard
reg and this alternative accepts some register, see if the
class that we want is a subset of the preferred class for this
register. If not, but it intersects that class, use the
{
/* Since we don't have a way of forming the intersection,
we just do something special if the preferred class
- is a subset of the class we have; that's the most
+ is a subset of the class we have; that's the most
common case anyway. */
if (reg_class_subset_p (preferred_class[i],
this_alternative[i]))
if (this_alternative_earlyclobber[i]
&& this_alternative_win[i])
{
- struct decomposition early_data;
+ struct decomposition early_data;
- early_data = decompose (recog_operand[i]);
+ early_data = decompose (recog_data.operand[i]);
if (modified[i] == RELOAD_READ)
- {
- if (this_insn_is_asm)
- warning_for_asm (this_insn,
- "`&' constraint used with input operand");
- else
- abort ();
- continue;
- }
-
+ abort ();
+
if (this_alternative[i] == NO_REGS)
{
this_alternative_earlyclobber[i] = 0;
for (j = 0; j < noperands; j++)
/* Is this an input operand or a memory ref? */
- if ((GET_CODE (recog_operand[j]) == MEM
+ if ((GET_CODE (recog_data.operand[j]) == MEM
|| modified[j] != RELOAD_WRITE)
&& j != i
/* Ignore things like match_operator operands. */
- && *constraints1[j] != 0
+ && *recog_data.constraints[j] != 0
/* Don't count an input operand that is constrained to match
the early clobber operand. */
&& ! (this_alternative_matches[j] == i
- && rtx_equal_p (recog_operand[i], recog_operand[j]))
+ && rtx_equal_p (recog_data.operand[i],
+ recog_data.operand[j]))
/* Is it altered by storing the earlyclobber operand? */
- && !immune_p (recog_operand[j], recog_operand[i], early_data))
+ && !immune_p (recog_data.operand[j], recog_data.operand[i],
+ early_data))
{
/* If the output is in a single-reg class,
it's costly to reload it, so reload the input instead. */
if (reg_class_size[this_alternative[i]] == 1
- && (GET_CODE (recog_operand[j]) == REG
- || GET_CODE (recog_operand[j]) == SUBREG))
+ && (GET_CODE (recog_data.operand[j]) == REG
+ || GET_CODE (recog_data.operand[j]) == SUBREG))
{
losers++;
this_alternative_win[j] = 0;
/* Unswap these so that they are never swapped at `finish'. */
if (commutative >= 0)
{
- recog_operand[commutative] = substed_operand[commutative];
- recog_operand[commutative + 1]
+ recog_data.operand[commutative] = substed_operand[commutative];
+ recog_data.operand[commutative + 1]
= substed_operand[commutative + 1];
}
for (i = 0; i < noperands; i++)
register enum reg_class tclass;
register int t;
- recog_operand[commutative] = substed_operand[commutative + 1];
- recog_operand[commutative + 1] = substed_operand[commutative];
+ recog_data.operand[commutative] = substed_operand[commutative + 1];
+ recog_data.operand[commutative + 1] = substed_operand[commutative];
tclass = preferred_class[commutative];
preferred_class[commutative] = preferred_class[commutative + 1];
pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
pref_or_nothing[commutative + 1] = t;
- bcopy ((char *) constraints1, (char *) constraints,
- noperands * sizeof (char *));
+ memcpy (constraints, recog_data.constraints,
+ noperands * sizeof (char *));
goto try_swapped;
}
else
{
- recog_operand[commutative] = substed_operand[commutative];
- recog_operand[commutative + 1] = substed_operand[commutative + 1];
+ recog_data.operand[commutative] = substed_operand[commutative];
+ recog_data.operand[commutative + 1]
+ = substed_operand[commutative + 1];
}
}
that we could reach by reloading the fewest operands.
Reload so as to fit it. */
- if (best == MAX_RECOG_OPERANDS + 300)
+ if (best == MAX_RECOG_OPERANDS * 2 + 600)
{
/* No alternative works with reloads?? */
if (insn_code_number >= 0)
- abort ();
+ fatal_insn ("Unable to generate reloads for:", insn);
error_for_asm (insn, "inconsistent operand constraints in an `asm'");
/* Avoid further trouble with this insn. */
PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
n_reloads = 0;
- return;
+ return 0;
}
/* Jump to `finish' from above if all operands are valid already.
tem = substed_operand[commutative];
substed_operand[commutative] = substed_operand[commutative + 1];
substed_operand[commutative + 1] = tem;
- tem = recog_operand[commutative];
- recog_operand[commutative] = recog_operand[commutative + 1];
- recog_operand[commutative + 1] = tem;
+ tem = recog_data.operand[commutative];
+ recog_data.operand[commutative] = recog_data.operand[commutative + 1];
+ recog_data.operand[commutative + 1] = tem;
+ tem = *recog_data.operand_loc[commutative];
+ *recog_data.operand_loc[commutative]
+ = *recog_data.operand_loc[commutative + 1];
+ *recog_data.operand_loc[commutative+1] = tem;
for (i = 0; i < n_reloads; i++)
{
- if (reload_opnum[i] == commutative)
- reload_opnum[i] = commutative + 1;
- else if (reload_opnum[i] == commutative + 1)
- reload_opnum[i] = commutative;
+ if (rld[i].opnum == commutative)
+ rld[i].opnum = commutative + 1;
+ else if (rld[i].opnum == commutative + 1)
+ rld[i].opnum = commutative;
}
}
- /* Perform whatever substitutions on the operands we are supposed
- to make due to commutativity or replacement of registers
- with equivalent constants or memory slots. */
-
for (i = 0; i < noperands; i++)
{
- *recog_operand_loc[i] = substed_operand[i];
- /* While we are looping on operands, initialize this. */
operand_reloadnum[i] = -1;
/* If this is an earlyclobber operand, we need to widen the scope.
One special case that is worth checking is when we have an
output that is earlyclobber but isn't used past the insn (typically
- a SCRATCH). In this case, we only need have the reload live
+ a SCRATCH). In this case, we only need have the reload live
through the insn itself, but not for any of our input or output
- reloads.
+ reloads.
+ But we must not accidentally narrow the scope of an existing
+ RELOAD_OTHER reload - leave these alone.
In any case, anything needed to address this operand can remain
however they were previously categorized. */
- if (goal_alternative_earlyclobber[i])
+ if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
operand_type[i]
- = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
+ = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
? RELOAD_FOR_INSN : RELOAD_OTHER);
}
into registers are here changed into memory references. */
for (i = 0; i < noperands; i++)
if (! goal_alternative_win[i]
- && CONSTANT_P (recog_operand[i])
+ && CONSTANT_P (recog_data.operand[i])
/* force_const_mem does not accept HIGH. */
- && GET_CODE (recog_operand[i]) != HIGH
- && (PREFERRED_RELOAD_CLASS (recog_operand[i],
- (enum reg_class) goal_alternative[i])
- == NO_REGS)
+ && GET_CODE (recog_data.operand[i]) != HIGH
+ && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
+ (enum reg_class) goal_alternative[i])
+ == NO_REGS)
+ || no_input_reloads)
&& operand_mode[i] != VOIDmode)
{
- *recog_operand_loc[i] = recog_operand[i]
+ substed_operand[i] = recog_data.operand[i]
= find_reloads_toplev (force_const_mem (operand_mode[i],
- recog_operand[i]),
- i, address_type[i], ind_levels, 0);
- if (alternative_allows_memconst (constraints1[i],
+ recog_data.operand[i]),
+ i, address_type[i], ind_levels, 0, insn);
+ if (alternative_allows_memconst (recog_data.constraints[i],
goal_alternative_number))
goal_alternative_win[i] = 1;
}
if (goal_earlyclobber)
for (i = 0; i < noperands; i++)
if (goal_alternative_earlyclobber[i])
- reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
+ reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
/* Now record reloads for all the operands that need them. */
for (i = 0; i < noperands; i++)
so we don't bother with it. It may not be worth doing. */
else if (goal_alternative_matched[i] == -1
&& goal_alternative_offmemok[i]
- && GET_CODE (recog_operand[i]) == MEM)
+ && GET_CODE (recog_data.operand[i]) == MEM)
{
operand_reloadnum[i]
- = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
- &XEXP (recog_operand[i], 0), NULL_PTR,
- BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
+ = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
+ &XEXP (recog_data.operand[i], 0), NULL_PTR,
+ BASE_REG_CLASS,
+ GET_MODE (XEXP (recog_data.operand[i], 0)),
VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
- reload_inc[operand_reloadnum[i]]
- = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
+ rld[operand_reloadnum[i]].inc
+ = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
/* If this operand is an output, we will have made any
reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
{
for (j = 0; j < n_reloads; j++)
{
- if (reload_opnum[j] == i)
+ if (rld[j].opnum == i)
{
- if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
- reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
- else if (reload_when_needed[j]
+ if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
+ rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
+ else if (rld[j].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS)
- reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
+ rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
}
}
}
}
else if (goal_alternative_matched[i] == -1)
- operand_reloadnum[i]
- = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- (modified[i] != RELOAD_WRITE
- ? recog_operand_loc[i] : 0),
- modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
- (enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE
- ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ
- ? VOIDmode : operand_mode[i]),
- (insn_code_number < 0 ? 0
- : insn_operand_strict_low[insn_code_number][i]),
- 0, i, operand_type[i]);
+ {
+ operand_reloadnum[i]
+ = push_reload ((modified[i] != RELOAD_WRITE
+ ? recog_data.operand[i] : 0),
+ (modified[i] != RELOAD_READ
+ ? recog_data.operand[i] : 0),
+ (modified[i] != RELOAD_WRITE
+ ? recog_data.operand_loc[i] : 0),
+ (modified[i] != RELOAD_READ
+ ? recog_data.operand_loc[i] : 0),
+ (enum reg_class) goal_alternative[i],
+ (modified[i] == RELOAD_WRITE
+ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_READ
+ ? VOIDmode : operand_mode[i]),
+ (insn_code_number < 0 ? 0
+ : insn_data[insn_code_number].operand[i].strict_low),
+ 0, i, operand_type[i]);
+ }
/* In a matching pair of operands, one must be input only
and the other must be output only.
Pass the input operand as IN and the other as OUT. */
&& modified[goal_alternative_matched[i]] == RELOAD_WRITE)
{
operand_reloadnum[i]
- = push_reload (recog_operand[i],
- recog_operand[goal_alternative_matched[i]],
- recog_operand_loc[i],
- recog_operand_loc[goal_alternative_matched[i]],
+ = push_reload (recog_data.operand[i],
+ recog_data.operand[goal_alternative_matched[i]],
+ recog_data.operand_loc[i],
+ recog_data.operand_loc[goal_alternative_matched[i]],
(enum reg_class) goal_alternative[i],
operand_mode[i],
operand_mode[goal_alternative_matched[i]],
&& modified[goal_alternative_matched[i]] == RELOAD_READ)
{
operand_reloadnum[goal_alternative_matched[i]]
- = push_reload (recog_operand[goal_alternative_matched[i]],
- recog_operand[i],
- recog_operand_loc[goal_alternative_matched[i]],
- recog_operand_loc[i],
+ = push_reload (recog_data.operand[goal_alternative_matched[i]],
+ recog_data.operand[i],
+ recog_data.operand_loc[goal_alternative_matched[i]],
+ recog_data.operand_loc[i],
(enum reg_class) goal_alternative[i],
operand_mode[goal_alternative_matched[i]],
operand_mode[i],
/* Avoid further trouble with this insn. */
PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
n_reloads = 0;
- return;
+ return 0;
}
}
else if (goal_alternative_matched[i] < 0
&& goal_alternative_matches[i] < 0
&& optimize)
{
- /* For each non-matching operand that's a MEM or a pseudo-register
+ /* For each non-matching operand that's a MEM or a pseudo-register
that didn't get a hard register, make an optional reload.
This may get done even if the insn needs no reloads otherwise. */
- rtx operand = recog_operand[i];
+ rtx operand = recog_data.operand[i];
while (GET_CODE (operand) == SUBREG)
operand = XEXP (operand, 0);
if ((GET_CODE (operand) == MEM
|| (GET_CODE (operand) == REG
&& REGNO (operand) >= FIRST_PSEUDO_REGISTER))
- && (enum reg_class) goal_alternative[i] != NO_REGS
+ /* If this is only for an output, the optional reload would not
+ actually cause us to use a register now, just note that
+ something is stored here. */
+ && ((enum reg_class) goal_alternative[i] != NO_REGS
+ || modified[i] == RELOAD_WRITE)
&& ! no_input_reloads
- /* Optional output reloads don't do anything and we mustn't
- make in-out reloads on insns that are not permitted output
- reloads. */
+ /* An optional output reload might allow to delete INSN later.
+ We mustn't make in-out reloads on insns that are not permitted
+ output reloads.
+ If this is an asm, we can't delete it; we must not even call
+ push_reload for an optional output reload in this case,
+ because we can't be sure that the constraint allows a register,
+ and push_reload verifies the constraints for asms. */
&& (modified[i] == RELOAD_READ
- || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
+ || (! no_output_reloads && ! this_insn_is_asm)))
operand_reloadnum[i]
- = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand[i] : 0,
+ = push_reload ((modified[i] != RELOAD_WRITE
+ ? recog_data.operand[i] : 0),
+ (modified[i] != RELOAD_READ
+ ? recog_data.operand[i] : 0),
(modified[i] != RELOAD_WRITE
- ? recog_operand_loc[i] : 0),
+ ? recog_data.operand_loc[i] : 0),
(modified[i] != RELOAD_READ
- ? recog_operand_loc[i] : 0),
+ ? recog_data.operand_loc[i] : 0),
(enum reg_class) goal_alternative[i],
(modified[i] == RELOAD_WRITE
? VOIDmode : operand_mode[i]),
(modified[i] == RELOAD_READ
? VOIDmode : operand_mode[i]),
(insn_code_number < 0 ? 0
- : insn_operand_strict_low[insn_code_number][i]),
+ : insn_data[insn_code_number].operand[i].strict_low),
1, i, operand_type[i]);
+ /* If a memory reference remains (either as a MEM or a pseudo that
+ did not get a hard register), yet we can't make an optional
+ reload, check if this is actually a pseudo register reference;
+ we then need to emit a USE and/or a CLOBBER so that reload
+ inheritance will do the right thing. */
+ else if (replace
+ && (GET_CODE (operand) == MEM
+ || (GET_CODE (operand) == REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER
+ && reg_renumber [REGNO (operand)] < 0)))
+ {
+ operand = *recog_data.operand_loc[i];
+
+ while (GET_CODE (operand) == SUBREG)
+ operand = XEXP (operand, 0);
+ if (GET_CODE (operand) == REG)
+ {
+ if (modified[i] != RELOAD_WRITE)
+ emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
+ if (modified[i] != RELOAD_READ)
+ emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
+ }
+ }
}
else if (goal_alternative_matches[i] >= 0
&& goal_alternative_win[goal_alternative_matches[i]]
/* Similarly, make an optional reload for a pair of matching
objects that are in MEM or a pseudo that didn't get a hard reg. */
- rtx operand = recog_operand[i];
+ rtx operand = recog_data.operand[i];
while (GET_CODE (operand) == SUBREG)
operand = XEXP (operand, 0);
&& ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
!= NO_REGS))
operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
- = push_reload (recog_operand[goal_alternative_matches[i]],
- recog_operand[i],
- recog_operand_loc[goal_alternative_matches[i]],
- recog_operand_loc[i],
+ = push_reload (recog_data.operand[goal_alternative_matches[i]],
+ recog_data.operand[i],
+ recog_data.operand_loc[goal_alternative_matches[i]],
+ recog_data.operand_loc[i],
(enum reg_class) goal_alternative[goal_alternative_matches[i]],
operand_mode[goal_alternative_matches[i]],
operand_mode[i],
0, 1, goal_alternative_matches[i], RELOAD_OTHER);
}
-
+
+ /* Perform whatever substitutions on the operands we are supposed
+ to make due to commutativity or replacement of registers
+ with equivalent constants or memory slots. */
+
+ for (i = 0; i < noperands; i++)
+ {
+ /* We only do this on the last pass through reload, because it is
+ possible for some data (like reg_equiv_address) to be changed during
+ later passes. Moreover, we loose the opportunity to get a useful
+ reload_{in,out}_reg when we do these replacements. */
+
+ if (replace)
+ {
+ rtx substitution = substed_operand[i];
+
+ *recog_data.operand_loc[i] = substitution;
+
+ /* If we're replacing an operand with a LABEL_REF, we need
+ to make sure that there's a REG_LABEL note attached to
+ this instruction. */
+ if (GET_CODE (insn) != JUMP_INSN
+ && GET_CODE (substitution) == LABEL_REF
+ && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
+ XEXP (substitution, 0),
+ REG_NOTES (insn));
+ }
+ else
+ retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
+ }
+
/* If this insn pattern contains any MATCH_DUP's, make sure that
they will be substituted if the operands they match are substituted.
Also do now any substitutions we already did on the operands.
it doesn't expect. */
if (insn_code_number >= 0 && replace)
- for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
+ for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
{
- int opno = recog_dup_num[i];
- *recog_dup_loc[i] = *recog_operand_loc[opno];
+ int opno = recog_data.dup_num[i];
+ *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
if (operand_reloadnum[opno] >= 0)
- push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
- insn_operand_mode[insn_code_number][opno]);
+ push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
+ insn_data[insn_code_number].operand[opno].mode);
}
#if 0
search for an existing equivalent reg (same value now) in the right class.
We can use it as long as we don't need to change its contents. */
for (i = 0; i < n_reloads; i++)
- if (reload_reg_rtx[i] == 0
- && reload_in[i] != 0
- && GET_CODE (reload_in[i]) == REG
- && reload_out[i] == 0)
+ if (rld[i].reg_rtx == 0
+ && rld[i].in != 0
+ && GET_CODE (rld[i].in) == REG
+ && rld[i].out == 0)
{
- reload_reg_rtx[i]
- = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
- static_reload_reg_p, 0, reload_inmode[i]);
+ rld[i].reg_rtx
+ = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
+ static_reload_reg_p, 0, rld[i].inmode);
/* Prevent generation of insn to load the value
because the one we found already has the value. */
- if (reload_reg_rtx[i])
- reload_in[i] = reload_reg_rtx[i];
+ if (rld[i].reg_rtx)
+ rld[i].in = rld[i].reg_rtx;
}
#endif
int k;
for (j = i + 1; j < n_reloads; j++)
- if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
- && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
- || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
- || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
- || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
- && rtx_equal_p (reload_in[i], reload_in[j])
- && (operand_reloadnum[reload_opnum[i]] < 0
- || reload_optional[operand_reloadnum[reload_opnum[i]]])
- && (operand_reloadnum[reload_opnum[j]] < 0
- || reload_optional[operand_reloadnum[reload_opnum[j]]])
- && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
- || (goal_alternative_matches[reload_opnum[j]]
- == reload_opnum[i])))
+ if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+ && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
+ || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
+ || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+ || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+ && rtx_equal_p (rld[i].in, rld[j].in)
+ && (operand_reloadnum[rld[i].opnum] < 0
+ || rld[operand_reloadnum[rld[i].opnum]].optional)
+ && (operand_reloadnum[rld[j].opnum] < 0
+ || rld[operand_reloadnum[rld[j].opnum]].optional)
+ && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
+ || (goal_alternative_matches[rld[j].opnum]
+ == rld[i].opnum)))
{
for (k = 0; k < n_replacements; k++)
if (replacements[k].what == j)
replacements[k].what = i;
- if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
- reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
+ if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+ rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
else
- reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
- reload_in[j] = 0;
+ rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
+ rld[j].in = 0;
}
}
- /* Scan all the reloads and update their type.
+ /* Scan all the reloads and update their type.
If a reload is for the address of an operand and we didn't reload
that operand, change the type. Similarly, change the operand number
of a reload when two operands match. If a reload is optional, treat it
for (i = 0; i < n_reloads; i++)
{
- if (reload_secondary_p[i]
- && reload_when_needed[i] == operand_type[reload_opnum[i]])
- reload_when_needed[i] = address_type[reload_opnum[i]];
-
- if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
- && (operand_reloadnum[reload_opnum[i]] < 0
- || reload_optional[operand_reloadnum[reload_opnum[i]]]))
+ if (rld[i].secondary_p
+ && rld[i].when_needed == operand_type[rld[i].opnum])
+ rld[i].when_needed = address_type[rld[i].opnum];
+
+ if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+ && (operand_reloadnum[rld[i].opnum] < 0
+ || rld[operand_reloadnum[rld[i].opnum]].optional))
{
/* If we have a secondary reload to go along with this reload,
change its type to RELOAD_FOR_OPADDR_ADDR. */
- if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
- && reload_secondary_in_reload[i] != -1)
+ if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
+ && rld[i].secondary_in_reload != -1)
{
- int secondary_in_reload = reload_secondary_in_reload[i];
+ int secondary_in_reload = rld[i].secondary_in_reload;
- reload_when_needed[secondary_in_reload]
+ rld[secondary_in_reload].when_needed
= RELOAD_FOR_OPADDR_ADDR;
/* If there's a tertiary reload we have to change it also. */
if (secondary_in_reload > 0
- && reload_secondary_in_reload[secondary_in_reload] != -1)
- reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
+ && rld[secondary_in_reload].secondary_in_reload != -1)
+ rld[rld[secondary_in_reload].secondary_in_reload].when_needed
= RELOAD_FOR_OPADDR_ADDR;
}
- if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
- && reload_secondary_out_reload[i] != -1)
+ if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+ && rld[i].secondary_out_reload != -1)
{
- int secondary_out_reload = reload_secondary_out_reload[i];
+ int secondary_out_reload = rld[i].secondary_out_reload;
- reload_when_needed[secondary_out_reload]
+ rld[secondary_out_reload].when_needed
= RELOAD_FOR_OPADDR_ADDR;
/* If there's a tertiary reload we have to change it also. */
if (secondary_out_reload
- && reload_secondary_out_reload[secondary_out_reload] != -1)
- reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
+ && rld[secondary_out_reload].secondary_out_reload != -1)
+ rld[rld[secondary_out_reload].secondary_out_reload].when_needed
= RELOAD_FOR_OPADDR_ADDR;
}
- if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
- reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
+
+ if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+ rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
else
- reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
+ rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
}
- if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
- && operand_reloadnum[reload_opnum[i]] >= 0
- && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
+ if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
+ && operand_reloadnum[rld[i].opnum] >= 0
+ && (rld[operand_reloadnum[rld[i].opnum]].when_needed
== RELOAD_OTHER))
- reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
+ rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
- if (goal_alternative_matches[reload_opnum[i]] >= 0)
- reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
+ if (goal_alternative_matches[rld[i].opnum] >= 0)
+ rld[i].opnum = goal_alternative_matches[rld[i].opnum];
}
/* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
actually fail are extremely rare, so it turns out to be better to fix
the problem here by not generating cases that choose_reload_regs will
fail for. */
-
+ /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
+ RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
+ a single operand.
+ We can reduce the register pressure by exploiting that a
+ RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
+ does not conflict with any of them, if it is only used for the first of
+ the RELOAD_FOR_X_ADDRESS reloads. */
{
- int op_addr_reloads = 0;
- for (i = 0; i < n_reloads; i++)
- if (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS)
- op_addr_reloads++;
+ int first_op_addr_num = -2;
+ int first_inpaddr_num[MAX_RECOG_OPERANDS];
+ int first_outpaddr_num[MAX_RECOG_OPERANDS];
+ int need_change= 0;
+ /* We use last_op_addr_reload and the contents of the above arrays
+ first as flags - -2 means no instance encountered, -1 means exactly
+ one instance encountered.
+ If more than one instance has been encountered, we store the reload
+ number of the first reload of the kind in question; reload numbers
+ are known to be non-negative. */
+ for (i = 0; i < noperands; i++)
+ first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
+ for (i = n_reloads - 1; i >= 0; i--)
+ {
+ switch (rld[i].when_needed)
+ {
+ case RELOAD_FOR_OPERAND_ADDRESS:
+ if (++first_op_addr_num >= 0)
+ {
+ first_op_addr_num = i;
+ need_change = 1;
+ }
+ break;
+ case RELOAD_FOR_INPUT_ADDRESS:
+ if (++first_inpaddr_num[rld[i].opnum] >= 0)
+ {
+ first_inpaddr_num[rld[i].opnum] = i;
+ need_change = 1;
+ }
+ break;
+ case RELOAD_FOR_OUTPUT_ADDRESS:
+ if (++first_outpaddr_num[rld[i].opnum] >= 0)
+ {
+ first_outpaddr_num[rld[i].opnum] = i;
+ need_change = 1;
+ }
+ break;
+ default:
+ break;
+ }
+ }
- if (op_addr_reloads > 1)
- for (i = 0; i < n_reloads; i++)
- if (reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR)
- reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
+ if (need_change)
+ {
+ for (i = 0; i < n_reloads; i++)
+ {
+ int first_num, type;
+
+ switch (rld[i].when_needed)
+ {
+ case RELOAD_FOR_OPADDR_ADDR:
+ first_num = first_op_addr_num;
+ type = RELOAD_FOR_OPERAND_ADDRESS;
+ break;
+ case RELOAD_FOR_INPADDR_ADDRESS:
+ first_num = first_inpaddr_num[rld[i].opnum];
+ type = RELOAD_FOR_INPUT_ADDRESS;
+ break;
+ case RELOAD_FOR_OUTADDR_ADDRESS:
+ first_num = first_outpaddr_num[rld[i].opnum];
+ type = RELOAD_FOR_OUTPUT_ADDRESS;
+ break;
+ default:
+ continue;
+ }
+ if (first_num < 0)
+ continue;
+ else if (i > first_num)
+ rld[i].when_needed = type;
+ else
+ {
+ /* Check if the only TYPE reload that uses reload I is
+ reload FIRST_NUM. */
+ for (j = n_reloads - 1; j > first_num; j--)
+ {
+ if (rld[j].when_needed == type
+ && (rld[i].secondary_p
+ ? rld[j].secondary_in_reload == i
+ : reg_mentioned_p (rld[i].in, rld[j].in)))
+ {
+ rld[i].when_needed = type;
+ break;
+ }
+ }
+ }
+ }
+ }
}
/* See if we have any reloads that are now allowed to be merged
check for the most common cases. */
for (i = 0; i < n_reloads; i++)
- if (reload_in[i] != 0 && reload_out[i] == 0
- && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
- || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
- || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
+ if (rld[i].in != 0 && rld[i].out == 0
+ && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
+ || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
+ || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
for (j = 0; j < n_reloads; j++)
- if (i != j && reload_in[j] != 0 && reload_out[j] == 0
- && reload_when_needed[j] == reload_when_needed[i]
- && MATCHES (reload_in[i], reload_in[j])
- && reload_reg_class[i] == reload_reg_class[j]
- && !reload_nocombine[i] && !reload_nocombine[j]
- && reload_reg_rtx[i] == reload_reg_rtx[j])
+ if (i != j && rld[j].in != 0 && rld[j].out == 0
+ && rld[j].when_needed == rld[i].when_needed
+ && MATCHES (rld[i].in, rld[j].in)
+ && rld[i].class == rld[j].class
+ && !rld[i].nocombine && !rld[j].nocombine
+ && rld[i].reg_rtx == rld[j].reg_rtx)
{
- reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
+ rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
transfer_replacements (i, j);
- reload_in[j] = 0;
+ rld[j].in = 0;
}
-#else /* no REGISTER_CONSTRAINTS */
- int noperands;
- int insn_code_number;
- int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
- register int i;
- rtx body = PATTERN (insn);
-
- n_reloads = 0;
- n_replacements = 0;
- n_earlyclobbers = 0;
- replace_reloads = replace;
- this_insn = insn;
-
- /* Find what kind of insn this is. NOPERANDS gets number of operands.
- Store the operand values in RECOG_OPERAND and the locations
- of the words in the insn that point to them in RECOG_OPERAND_LOC.
- Return if the insn needs no reload processing. */
-
- switch (GET_CODE (body))
- {
- case USE:
- case CLOBBER:
- case ASM_INPUT:
- case ADDR_VEC:
- case ADDR_DIFF_VEC:
- return;
-
- case PARALLEL:
- case SET:
- noperands = asm_noperands (body);
- if (noperands >= 0)
- {
- /* This insn is an `asm' with operands.
- First, find out how many operands, and allocate space. */
-
- insn_code_number = -1;
- /* ??? This is a bug! ???
- Give up and delete this insn if it has too many operands. */
- if (noperands > MAX_RECOG_OPERANDS)
- abort ();
-
- /* Now get the operand values out of the insn. */
-
- decode_asm_operands (body, recog_operand, recog_operand_loc,
- NULL_PTR, NULL_PTR);
- break;
- }
-
- default:
- /* Ordinary insn: recognize it, allocate space for operands and
- constraints, and get them out via insn_extract. */
-
- insn_code_number = recog_memoized (insn);
- noperands = insn_n_operands[insn_code_number];
- insn_extract (insn);
- }
-
- if (noperands == 0)
- return;
+#ifdef HAVE_cc0
+ /* If we made any reloads for addresses, see if they violate a
+ "no input reloads" requirement for this insn. But loads that we
+ do after the insn (such as for output addresses) are fine. */
+ if (no_input_reloads)
+ for (i = 0; i < n_reloads; i++)
+ if (rld[i].in != 0
+ && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
+ && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
+ abort ();
+#endif
- for (i = 0; i < noperands; i++)
+ /* Compute reload_mode and reload_nregs. */
+ for (i = 0; i < n_reloads; i++)
{
- register RTX_CODE code = GET_CODE (recog_operand[i]);
- int is_set_dest = GET_CODE (body) == SET && (i == 0);
+ rld[i].mode
+ = (rld[i].inmode == VOIDmode
+ || (GET_MODE_SIZE (rld[i].outmode)
+ > GET_MODE_SIZE (rld[i].inmode)))
+ ? rld[i].outmode : rld[i].inmode;
- if (insn_code_number >= 0)
- if (insn_operand_address_p[insn_code_number][i])
- find_reloads_address (VOIDmode, NULL_PTR,
- recog_operand[i], recog_operand_loc[i],
- i, RELOAD_FOR_INPUT, ind_levels, insn);
-
- /* In these cases, we can't tell if the operand is an input
- or an output, so be conservative. In practice it won't be
- problem. */
-
- if (code == MEM)
- find_reloads_address (GET_MODE (recog_operand[i]),
- recog_operand_loc[i],
- XEXP (recog_operand[i], 0),
- &XEXP (recog_operand[i], 0),
- i, RELOAD_OTHER, ind_levels, insn);
- if (code == SUBREG)
- recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
- ind_levels, is_set_dest);
- if (code == REG)
- {
- register int regno = REGNO (recog_operand[i]);
- if (reg_equiv_constant[regno] != 0 && !is_set_dest)
- recog_operand[i] = *recog_operand_loc[i]
- = reg_equiv_constant[regno];
-#if 0 /* This might screw code in reload1.c to delete prior output-reload
- that feeds this insn. */
- if (reg_equiv_mem[regno] != 0)
- recog_operand[i] = *recog_operand_loc[i]
- = reg_equiv_mem[regno];
-#endif
- }
+ rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
}
- /* Perhaps an output reload can be combined with another
- to reduce needs by one. */
- if (!goal_earlyclobber)
- combine_reloads ();
-#endif /* no REGISTER_CONSTRAINTS */
+ return retval;
}
/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
static int
alternative_allows_memconst (constraint, altnum)
- char *constraint;
+ const char *constraint;
int altnum;
{
register int c;
OPNUM and TYPE identify the purpose of the reload.
IS_SET_DEST is true if X is the destination of a SET, which is not
- appropriate to be replaced by a constant. */
+ appropriate to be replaced by a constant.
+
+ INSN, if nonzero, is the insn in which we do the reload. It is used
+ to determine if we may generate output reloads, and where to put USEs
+ for pseudos that we have to replace with stack slots. */
static rtx
-find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
+find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
rtx x;
int opnum;
enum reload_type type;
int ind_levels;
int is_set_dest;
+ rtx insn;
{
register RTX_CODE code = GET_CODE (x);
- register char *fmt = GET_RTX_FORMAT (code);
+ register const char *fmt = GET_RTX_FORMAT (code);
register int i;
+ int copied;
if (code == REG)
{
if (reg_equiv_constant[regno] != 0 && !is_set_dest)
x = reg_equiv_constant[regno];
#if 0
-/* This creates (subreg (mem...)) which would cause an unnecessary
- reload of the mem. */
+ /* This creates (subreg (mem...)) which would cause an unnecessary
+ reload of the mem. */
else if (reg_equiv_mem[regno] != 0)
x = reg_equiv_mem[regno];
#endif
- else if (reg_equiv_address[regno] != 0)
+ else if (reg_equiv_memory_loc[regno]
+ && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
{
- /* If reg_equiv_address varies, it may be shared, so copy it. */
- /* We must rerun eliminate_regs, in case the elimination
- offsets have changed. */
- rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
- NULL_RTX),
- 0);
-
- if (rtx_varies_p (addr))
- addr = copy_rtx (addr);
-
- x = gen_rtx_MEM (GET_MODE (x), addr);
- RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
- find_reloads_address (GET_MODE (x), NULL_PTR,
- XEXP (x, 0),
- &XEXP (x, 0), opnum, type, ind_levels, 0);
+ rtx mem = make_memloc (x, regno);
+ if (reg_equiv_address[regno]
+ || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
+ {
+ /* If this is not a toplevel operand, find_reloads doesn't see
+ this substitution. We have to emit a USE of the pseudo so
+ that delete_output_reload can see it. */
+ if (replace_reloads && recog_data.operand[opnum] != x)
+ emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
+ x = mem;
+ find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
+ opnum, type, ind_levels, insn);
+ }
}
return x;
}
{
rtx tem = x;
find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
- opnum, type, ind_levels, 0);
+ opnum, type, ind_levels, insn);
return tem;
}
if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
{
- /* Check for SUBREG containing a REG that's equivalent to a constant.
+ /* Check for SUBREG containing a REG that's equivalent to a constant.
If the constant has a known value, truncate it right now.
Similarly if we are extracting a single-word of a multi-word
constant. If the constant is symbolic, allow it to be substituted
&& (tem = operand_subword (reg_equiv_constant[regno],
SUBREG_WORD (x), 0,
GET_MODE (SUBREG_REG (x)))) != 0)
- return tem;
+ {
+ /* TEM is now a word sized constant for the bits from X that
+ we wanted. However, TEM may be the wrong representation.
+
+ Use gen_lowpart_common to convert a CONST_INT into a
+ CONST_DOUBLE and vice versa as needed according to by the mode
+ of the SUBREG. */
+ tem = gen_lowpart_common (GET_MODE (x), tem);
+ if (!tem)
+ abort ();
+ return tem;
+ }
/* If the SUBREG is wider than a word, the above test will fail.
For example, we might have a SImode SUBREG of a DImode SUBREG_REG
&& GET_CODE (reg_equiv_constant[regno]) == CONST_INT
&& (GET_MODE_SIZE (GET_MODE (x))
< GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
- {
- int shift = SUBREG_WORD (x) * BITS_PER_WORD;
- if (WORDS_BIG_ENDIAN)
- shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
- - GET_MODE_BITSIZE (GET_MODE (x))
- - shift);
- /* Here we use the knowledge that CONST_INTs have a
- HOST_WIDE_INT field. */
- if (shift >= HOST_BITS_PER_WIDE_INT)
- shift = HOST_BITS_PER_WIDE_INT - 1;
- return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
- }
+ {
+ int shift = SUBREG_WORD (x) * BITS_PER_WORD;
+ if (WORDS_BIG_ENDIAN)
+ shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
+ - GET_MODE_BITSIZE (GET_MODE (x))
+ - shift);
+ /* Here we use the knowledge that CONST_INTs have a
+ HOST_WIDE_INT field. */
+ if (shift >= HOST_BITS_PER_WIDE_INT)
+ shift = HOST_BITS_PER_WIDE_INT - 1;
+ return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
+ }
if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
&& reg_equiv_constant[regno] != 0
#endif
&& (reg_equiv_address[regno] != 0
|| (reg_equiv_mem[regno] != 0
- && (! strict_memory_address_p (GET_MODE (x),
+ && (! strict_memory_address_p (GET_MODE (x),
XEXP (reg_equiv_mem[regno], 0))
- || ! offsettable_memref_p (reg_equiv_mem[regno])))))
- {
- int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
- /* We must rerun eliminate_regs, in case the elimination
- offsets have changed. */
- rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
- NULL_RTX),
- 0);
- if (BYTES_BIG_ENDIAN)
- {
- int size;
- size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
- offset += MIN (size, UNITS_PER_WORD);
- size = GET_MODE_SIZE (GET_MODE (x));
- offset -= MIN (size, UNITS_PER_WORD);
- }
- addr = plus_constant (addr, offset);
- x = gen_rtx_MEM (GET_MODE (x), addr);
- RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
- find_reloads_address (GET_MODE (x), NULL_PTR,
- XEXP (x, 0),
- &XEXP (x, 0), opnum, type, ind_levels, 0);
- }
-
+ || ! offsettable_memref_p (reg_equiv_mem[regno])
+ || num_not_at_initial_offset))))
+ x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
+ insn);
}
- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
- XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
- ind_levels, is_set_dest);
+ {
+ rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
+ ind_levels, is_set_dest, insn);
+ /* If we have replaced a reg with it's equivalent memory loc -
+ that can still be handled here e.g. if it's in a paradoxical
+ subreg - we must make the change in a copy, rather than using
+ a destructive change. This way, find_reloads can still elect
+ not to do the change. */
+ if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
+ {
+ x = shallow_copy_rtx (x);
+ copied = 1;
+ }
+ XEXP (x, i) = new_part;
+ }
}
return x;
}
rtx ad;
int regno;
{
-#if 0
- register int i;
-#endif
/* We must rerun eliminate_regs, in case the elimination
offsets have changed. */
- rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
-
-#if 0 /* We cannot safely reuse a memloc made here;
- if the pseudo appears twice, and its mem needs a reload,
- it gets two separate reloads assigned, but it only
- gets substituted with the second of them;
- then it can get used before that reload reg gets loaded up. */
- for (i = 0; i < n_memlocs; i++)
- if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
- return memlocs[i];
-#endif
+ rtx tem
+ = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
/* If TEM might contain a pseudo, we must copy it to avoid
modifying it when we do the substitution for the reload. */
tem = gen_rtx_MEM (GET_MODE (ad), tem);
RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
- memlocs[n_memlocs++] = tem;
return tem;
}
supports.
INSN, if nonzero, is the insn in which we do the reload. It is used
- to determine if we may generate output reloads.
+ to determine if we may generate output reloads, and where to put USEs
+ for pseudos that we have to replace with stack slots.
Value is nonzero if this address is reloaded or replaced as a whole.
This is interesting to the caller if the address is an autoincrement.
rtx insn;
{
register int regno;
+ int removed_and = 0;
rtx tem;
/* If the address is a register, see if it is a legitimate address and
&& strict_memory_address_p (mode, reg_equiv_constant[regno]))
{
*loc = ad = reg_equiv_constant[regno];
- return 1;
+ return 0;
}
- else if (reg_equiv_address[regno] != 0)
+ tem = reg_equiv_memory_loc[regno];
+ if (tem != 0)
{
- tem = make_memloc (ad, regno);
- find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
- &XEXP (tem, 0), opnum, ADDR_TYPE (type),
- ind_levels, insn);
- push_reload (tem, NULL_RTX, loc, NULL_PTR,
- reload_address_base_reg_class,
- GET_MODE (ad), VOIDmode, 0, 0,
- opnum, type);
- return 1;
+ if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
+ {
+ tem = make_memloc (ad, regno);
+ if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
+ {
+ find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
+ &XEXP (tem, 0), opnum, ADDR_TYPE (type),
+ ind_levels, insn);
+ }
+ /* We can avoid a reload if the register's equivalent memory
+ expression is valid as an indirect memory address.
+ But not all addresses are valid in a mem used as an indirect
+ address: only reg or reg+constant. */
+
+ if (ind_levels > 0
+ && strict_memory_address_p (mode, tem)
+ && (GET_CODE (XEXP (tem, 0)) == REG
+ || (GET_CODE (XEXP (tem, 0)) == PLUS
+ && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
+ && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
+ {
+ /* TEM is not the same as what we'll be replacing the
+ pseudo with after reload, put a USE in front of INSN
+ in the final reload pass. */
+ if (replace_reloads
+ && num_not_at_initial_offset
+ && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
+ {
+ *loc = tem;
+ emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
+ /* This doesn't really count as replacing the address
+ as a whole, since it is still a memory access. */
+ }
+ return 0;
+ }
+ ad = tem;
+ }
}
- /* We can avoid a reload if the register's equivalent memory expression
- is valid as an indirect memory address.
- But not all addresses are valid in a mem used as an indirect address:
- only reg or reg+constant. */
-
- else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
- && strict_memory_address_p (mode, reg_equiv_mem[regno])
- && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
- || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
- && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
- && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
- return 0;
-
/* The only remaining case where we can avoid a reload is if this is a
hard register that is valid as a base register and which is not the
subject of a CLOBBER in this insn. */
return 0;
/* If we do not have one of the cases above, we must do the reload. */
- push_reload (ad, NULL_RTX, loc, NULL_PTR, reload_address_base_reg_class,
+ push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
return 1;
}
return 0;
subst_reg_equivs_changed = 0;
- *loc = subst_reg_equivs (ad);
+ *loc = subst_reg_equivs (ad, insn);
if (! subst_reg_equivs_changed)
return 0;
while (0);
#endif
- /* The address is not valid. We have to figure out why. One possibility
- is that it is itself a MEM. This can happen when the frame pointer is
- being eliminated, a pseudo is not allocated to a hard register, and the
- offset between the frame and stack pointers is not its initial value.
- In that case the pseudo will have been replaced by a MEM referring to
- the stack pointer. */
+ /* The address is not valid. We have to figure out why. First see if
+ we have an outer AND and remove it if so. Then analyze what's inside. */
+
+ if (GET_CODE (ad) == AND)
+ {
+ removed_and = 1;
+ loc = &XEXP (ad, 0);
+ ad = *loc;
+ }
+
+ /* One possibility for why the address is invalid is that it is itself
+ a MEM. This can happen when the frame pointer is being eliminated, a
+ pseudo is not allocated to a hard register, and the offset between the
+ frame and stack pointers is not its initial value. In that case the
+ pseudo will have been replaced by a MEM referring to the
+ stack pointer. */
if (GET_CODE (ad) == MEM)
{
/* First ensure that the address in this MEM is valid. Then, unless
*memrefloc = copy_rtx (*memrefloc);
copy_replacements (tem, XEXP (*memrefloc, 0));
loc = &XEXP (*memrefloc, 0);
+ if (removed_and)
+ loc = &XEXP (*loc, 0);
}
/* Check similar cases as for indirect addresses as above except
/* Must use TEM here, not AD, since it is the one that will
have any subexpressions reloaded, if needed. */
push_reload (tem, NULL_RTX, loc, NULL_PTR,
- reload_address_base_reg_class, GET_MODE (tem),
+ BASE_REG_CLASS, GET_MODE (tem),
VOIDmode, 0,
0, opnum, type);
- return 1;
+ return ! removed_and;
}
else
return 0;
{
*memrefloc = copy_rtx (*memrefloc);
loc = &XEXP (*memrefloc, 0);
+ if (removed_and)
+ loc = &XEXP (*loc, 0);
}
+
if (double_reg_address_ok)
{
/* Unshare the sum as well. */
*loc = ad = copy_rtx (ad);
+
/* Reload the displacement into an index reg.
We assume the frame pointer or arg pointer is a base reg. */
find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
- reload_address_index_reg_class,
- GET_MODE (ad), opnum, type, ind_levels);
+ INDEX_REG_CLASS, GET_MODE (ad), opnum,
+ type, ind_levels);
+ return 0;
}
else
{
/* If the sum of two regs is not necessarily valid,
reload the sum into a base reg.
That will at least work. */
- find_reloads_address_part (ad, loc, reload_address_base_reg_class,
+ find_reloads_address_part (ad, loc, BASE_REG_CLASS,
Pmode, opnum, type, ind_levels);
}
- return 1;
+ return ! removed_and;
}
/* If we have an indexed stack slot, there are three possible reasons why
it might be invalid: The index might need to be reloaded, the address
might have been made by frame pointer elimination and hence have a
- constant out of range, or both reasons might apply.
+ constant out of range, or both reasons might apply.
We can easily check for an index needing reload, but even if that is the
case, we might also have an invalid constant. To avoid making the
that the index needs a reload and find_reloads_address_1 will take care
of it.
- There is still a case when we might generate an extra reload,
- however. In certain cases eliminate_regs will return a MEM for a REG
- (see the code there for details). In those cases, memory_address_p
- applied to our address will return 0 so we will think that our offset
- must be too large. But it might indeed be valid and the only problem
- is that a MEM is present where a REG should be. This case should be
- very rare and there doesn't seem to be any way to avoid it.
-
If we decide to do something here, it must be that
`double_reg_address_ok' is true and that this address rtl was made by
eliminate_regs. We generate a reload of the fp/sp/ap + constant and
*loc = ad = gen_rtx_PLUS (GET_MODE (ad),
plus_constant (XEXP (XEXP (ad, 0), 0),
INTVAL (XEXP (ad, 1))),
- XEXP (XEXP (ad, 0), 1));
- find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
- reload_address_base_reg_class,
+ XEXP (XEXP (ad, 0), 1));
+ find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
GET_MODE (ad), opnum, type, ind_levels);
find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
type, 0, insn);
- return 1;
+ return 0;
}
-
+
else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
&& GET_CODE (XEXP (ad, 0)) == PLUS
&& (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
XEXP (XEXP (ad, 0), 0),
plus_constant (XEXP (XEXP (ad, 0), 1),
INTVAL (XEXP (ad, 1))));
- find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
- reload_address_base_reg_class,
+ find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
GET_MODE (ad), opnum, type, ind_levels);
find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
type, 0, insn);
- return 1;
+ return 0;
}
-
+
/* See if address becomes valid when an eliminable register
in a sum is replaced. */
registers. */
subst_reg_equivs_changed = 0;
- tem = subst_reg_equivs (tem);
+ tem = subst_reg_equivs (tem, insn);
/* Make sure that didn't make the address invalid again. */
{
*memrefloc = copy_rtx (*memrefloc);
loc = &XEXP (*memrefloc, 0);
+ if (removed_and)
+ loc = &XEXP (*loc, 0);
}
- find_reloads_address_part (ad, loc, reload_address_base_reg_class,
- Pmode, opnum, type,
+ find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
ind_levels);
- return 1;
+ return ! removed_and;
}
return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
\f
/* Find all pseudo regs appearing in AD
that are eliminable in favor of equivalent values
- and do not have hard regs; replace them by their equivalents. */
+ and do not have hard regs; replace them by their equivalents.
+ INSN, if nonzero, is the insn in which we do the reload. We put USEs in
+ front of it for pseudos that we have to replace with stack slots. */
static rtx
-subst_reg_equivs (ad)
+subst_reg_equivs (ad, insn)
rtx ad;
+ rtx insn;
{
register RTX_CODE code = GET_CODE (ad);
register int i;
- register char *fmt;
+ register const char *fmt;
switch (code)
{
subst_reg_equivs_changed = 1;
return reg_equiv_constant[regno];
}
+ if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
+ {
+ rtx mem = make_memloc (ad, regno);
+ if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
+ {
+ subst_reg_equivs_changed = 1;
+ emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
+ return mem;
+ }
+ }
}
return ad;
&& GET_CODE (XEXP (ad, 1)) == CONST_INT)
return ad;
break;
-
+
default:
break;
}
fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
if (fmt[i] == 'e')
- XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
+ XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
return ad;
}
\f
&& reg_equiv_constant[regno] != 0)
op0 = reg_equiv_constant[regno];
else if (GET_CODE (op1) == REG
- && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
- && reg_renumber[regno] < 0
- && reg_equiv_constant[regno] != 0)
+ && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
+ && reg_renumber[regno] < 0
+ && reg_equiv_constant[regno] != 0)
op1 = reg_equiv_constant[regno];
else if (GET_CODE (op0) == PLUS
&& (tem = subst_indexed_address (op0)) != op0)
REGNO (op1) + SUBREG_WORD (orig_op1));
}
- if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
+ if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
|| code0 == ZERO_EXTEND || code1 == MEM)
{
find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
/* Handle a register that is equivalent to a memory location
which cannot be addressed directly. */
- if (reg_equiv_address[regno] != 0)
+ if (reg_equiv_memory_loc[regno] != 0
+ && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
{
rtx tem = make_memloc (XEXP (x, 0), regno);
- /* First reload the memory location's address.
- We can't use ADDR_TYPE (type) here, because we need to
- write back the value after reading it, hence we actually
- need two registers. */
- find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
- &XEXP (tem, 0), opnum, type,
- ind_levels, insn);
- /* Put this inside a new increment-expression. */
- x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
- /* Proceed to reload that, as if it contained a register. */
+ if (reg_equiv_address[regno]
+ || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
+ {
+ /* First reload the memory location's address.
+ We can't use ADDR_TYPE (type) here, because we need to
+ write back the value after reading it, hence we actually
+ need two registers. */
+ find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
+ &XEXP (tem, 0), opnum, type,
+ ind_levels, insn);
+ /* Put this inside a new increment-expression. */
+ x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
+ /* Proceed to reload that, as if it contained a register. */
+ }
}
/* If we have a hard register that is ok as an index,
memory location, since this will make it harder to
reuse address reloads, and increases register pressure.
Also don't do this if we can probably update x directly. */
- rtx equiv = reg_equiv_mem[regno];
+ rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
+ ? XEXP (x, 0)
+ : reg_equiv_mem[regno]);
int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
if (insn && GET_CODE (insn) == INSN && equiv
+ && memory_operand (equiv, GET_MODE (equiv))
#ifdef HAVE_cc0
&& ! sets_cc0_p (PATTERN (insn))
#endif
&& ! (icode != CODE_FOR_nothing
- && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
- && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
+ && ((*insn_data[icode].operand[0].predicate)
+ (equiv, Pmode))
+ && ((*insn_data[icode].operand[1].predicate)
+ (equiv, Pmode))))
{
loc = &XEXP (x, 0);
x = XEXP (x, 0);
reloadnum
= push_reload (x, x, loc, loc,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
- GET_MODE (x), GET_MODE (x), 0, 0,
- opnum, RELOAD_OTHER);
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
+ GET_MODE (x), GET_MODE (x), 0, 0,
+ opnum, RELOAD_OTHER);
+
+ /* If we created a new MEM based on reg_equiv_mem[REGNO], then
+ LOC above is part of the new MEM, not the MEM in INSN.
+
+ We must also replace the address of the MEM in INSN. */
+ if (&XEXP (x_orig, 0) != loc)
+ push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
+
}
else
{
reloadnum
= push_reload (x, NULL_RTX, loc, NULL_PTR,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), GET_MODE (x), 0, 0,
opnum, type);
- reload_inc[reloadnum]
+ rld[reloadnum].inc
= find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
-
+
value = 1;
}
of an equivalent address for a pseudo that was not allocated to a
hard register. Verify that the specified address is valid and
reload it into a register. */
- rtx tem = XEXP (x, 0);
+ /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
+ rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
register rtx link;
int reloadnum;
opnum, type, ind_levels, insn);
reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
- reload_inc[reloadnum]
+ rld[reloadnum].inc
= find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
link = FIND_REG_INC_NOTE (this_insn, tem);
find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
opnum, ADDR_TYPE (type), ind_levels, insn);
push_reload (*loc, NULL_RTX, loc, NULL_PTR,
- (context ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
if (reg_equiv_constant[regno] != 0)
{
- find_reloads_address_part (reg_equiv_constant[regno], loc,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ find_reloads_address_part (reg_equiv_constant[regno], loc,
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), opnum, type, ind_levels);
return 1;
}
if (reg_equiv_mem[regno] != 0)
{
push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
#endif
- if (reg_equiv_address[regno] != 0)
+ if (reg_equiv_memory_loc[regno]
+ && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
{
- x = make_memloc (x, regno);
- find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
- opnum, ADDR_TYPE (type), ind_levels, insn);
+ rtx tem = make_memloc (x, regno);
+ if (reg_equiv_address[regno] != 0
+ || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
+ {
+ x = tem;
+ find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
+ &XEXP (x, 0), opnum, ADDR_TYPE (type),
+ ind_levels, insn);
+ }
}
if (reg_renumber[regno] >= 0)
: REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
{
push_reload (x, NULL_RTX, loc, NULL_PTR,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
if (regno_clobbered_p (regno, this_insn))
{
push_reload (x, NULL_RTX, loc, NULL_PTR,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
: REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
{
push_reload (x, NULL_RTX, loc, NULL_PTR,
- (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class),
+ (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
is larger than the class size, then reload the whole SUBREG. */
else
{
- enum reg_class class = (context
- ? reload_address_index_reg_class
- : reload_address_base_reg_class);
+ enum reg_class class = (context ? INDEX_REG_CLASS
+ : BASE_REG_CLASS);
if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
> reg_class_size[class])
{
+ x = find_reloads_subreg_address (x, 0, opnum, type,
+ ind_levels, insn);
push_reload (x, NULL_RTX, loc, NULL_PTR, class,
GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
}
break;
-
+
default:
break;
}
{
- register char *fmt = GET_RTX_FORMAT (code);
+ register const char *fmt = GET_RTX_FORMAT (code);
register int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
&& (! LEGITIMATE_CONSTANT_P (x)
|| PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
{
- rtx tem = x = force_const_mem (mode, x);
+ rtx tem;
+
+ /* If this is a CONST_INT, it could have been created by a
+ plus_constant call in eliminate_regs, which means it may be
+ on the reload_obstack. reload_obstack will be freed later, so
+ we can't allow such RTL to be put in the constant pool. There
+ is code in force_const_mem to check for this case, but it doesn't
+ work because we have already popped off the reload_obstack, so
+ rtl_obstack == saveable_obstack is true at this point. */
+ if (GET_CODE (x) == CONST_INT)
+ tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
+ else
+ tem = x = force_const_mem (mode, x);
+
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
opnum, type, ind_levels, 0);
}
&& (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
|| PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
{
- rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
+ rtx tem;
+
+ /* See comment above. */
+ if (GET_CODE (XEXP (x, 1)) == CONST_INT)
+ tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
+ else
+ tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
mode, VOIDmode, 0, 0, opnum, type);
}
\f
+/* X, a subreg of a pseudo, is a part of an address that needs to be
+ reloaded.
+
+ If the pseudo is equivalent to a memory location that cannot be directly
+ addressed, make the necessary address reloads.
+
+ If address reloads have been necessary, or if the address is changed
+ by register elimination, return the rtx of the memory location;
+ otherwise, return X.
+
+ If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
+ memory location.
+
+ OPNUM and TYPE identify the purpose of the reload.
+
+ IND_LEVELS says how many levels of indirect addressing are
+ supported at this point in the address.
+
+ INSN, if nonzero, is the insn in which we do the reload. It is used
+ to determine where to put USEs for pseudos that we have to replace with
+ stack slots. */
+
+static rtx
+find_reloads_subreg_address (x, force_replace, opnum, type,
+ ind_levels, insn)
+ rtx x;
+ int force_replace;
+ int opnum;
+ enum reload_type type;
+ int ind_levels;
+ rtx insn;
+{
+ int regno = REGNO (SUBREG_REG (x));
+
+ if (reg_equiv_memory_loc[regno])
+ {
+ /* If the address is not directly addressable, or if the address is not
+ offsettable, then it must be replaced. */
+ if (! force_replace
+ && (reg_equiv_address[regno]
+ || ! offsettable_memref_p (reg_equiv_mem[regno])))
+ force_replace = 1;
+
+ if (force_replace || num_not_at_initial_offset)
+ {
+ rtx tem = make_memloc (SUBREG_REG (x), regno);
+
+ /* If the address changes because of register elimination, then
+ it must be replaced. */
+ if (force_replace
+ || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
+ {
+ int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
+
+ if (BYTES_BIG_ENDIAN)
+ {
+ int size;
+
+ size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
+ offset += MIN (size, UNITS_PER_WORD);
+ size = GET_MODE_SIZE (GET_MODE (x));
+ offset -= MIN (size, UNITS_PER_WORD);
+ }
+ XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
+ PUT_MODE (tem, GET_MODE (x));
+ find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
+ &XEXP (tem, 0), opnum, ADDR_TYPE (type),
+ ind_levels, insn);
+ /* If this is not a toplevel operand, find_reloads doesn't see
+ this substitution. We have to emit a USE of the pseudo so
+ that delete_output_reload can see it. */
+ if (replace_reloads && recog_data.operand[opnum] != x)
+ emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
+ x = tem;
+ }
+ }
+ }
+ return x;
+}
+\f
/* Substitute into the current INSN the registers into which we have reloaded
the things that need reloading. The array `replacements'
says contains the locations of all pointers that must be changed
for (i = 0; i < n_replacements; i++)
{
register struct replacement *r = &replacements[i];
- register rtx reloadreg = reload_reg_rtx[r->what];
+ register rtx reloadreg = rld[r->what].reg_rtx;
if (reloadreg)
{
/* Encapsulate RELOADREG so its machine mode matches what
*r->where = reloadreg;
}
/* If reload got no reg and isn't optional, something's wrong. */
- else if (! reload_optional[r->what])
+ else if (! rld[r->what].optional)
abort ();
}
}
{
int i, j;
enum rtx_code code = GET_CODE (x);
- char *fmt = GET_RTX_FORMAT (code);
+ const char *fmt = GET_RTX_FORMAT (code);
struct replacement *r;
/* We can't support X being a SUBREG because we might then need to know its
for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
{
- rtx reloadreg = reload_reg_rtx[r->what];
+ rtx reloadreg = rld[r->what].reg_rtx;
if (reloadreg && r->where == loc)
{
{
register int i;
register RTX_CODE code;
- register char *fmt;
+ register const char *fmt;
if (x == 0)
return 0;
}
return (endregno > i
- && regno < i + (i < FIRST_PSEUDO_REGISTER
+ && regno < i + (i < FIRST_PSEUDO_REGISTER
? HARD_REGNO_NREGS (i, GET_MODE (x))
: 1));
return 0;
x = SET_SRC (x);
goto repeat;
-
+
default:
break;
}
we check if any register number in X conflicts with the relevant register
numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
contains a MEM (we don't bother checking for memory addresses that can't
- conflict because we expect this to be a rare case.
+ conflict because we expect this to be a rare case.
This function is similar to reg_overlap_mention_p in rtlanal.c except
that we look at equivalences for pseudos that didn't get hard registers. */
{
int regno, endregno;
- if (GET_CODE (x) == SUBREG)
+ /* Overly conservative. */
+ if (GET_CODE (x) == STRICT_LOW_PART)
+ x = XEXP (x, 0);
+
+ /* If either argument is a constant, then modifying X can not affect IN. */
+ if (CONSTANT_P (x) || CONSTANT_P (in))
+ return 0;
+ else if (GET_CODE (x) == SUBREG)
{
regno = REGNO (SUBREG_REG (x));
if (regno < FIRST_PSEUDO_REGISTER)
abort ();
}
}
- else if (CONSTANT_P (x))
- return 0;
else if (GET_CODE (x) == MEM)
return refers_to_mem_for_reload_p (in);
else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
refers_to_mem_for_reload_p (x)
rtx x;
{
- char *fmt;
+ const char *fmt;
int i;
if (GET_CODE (x) == MEM)
if (GET_CODE (x) == REG)
return (REGNO (x) >= FIRST_PSEUDO_REGISTER
&& reg_equiv_memory_loc[REGNO (x)]);
-
+
fmt = GET_RTX_FORMAT (GET_CODE (x));
for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
if (fmt[i] == 'e'
&& (GET_CODE (XEXP (x, i)) == MEM
|| refers_to_mem_for_reload_p (XEXP (x, i))))
return 1;
-
+
return 0;
}
\f
else
return 0;
- /* On some machines, certain regs must always be rejected
- because they don't behave the way ordinary registers do. */
-
-#ifdef OVERLAPPING_REGNO_P
- if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
- && OVERLAPPING_REGNO_P (regno))
- return 0;
-#endif
-
/* Scan insns back from INSN, looking for one that copies
a value into or out of GOAL.
Stop and give up if we reach a label. */
/* If we don't want spill regs ... */
&& (! (reload_reg_p != 0
&& reload_reg_p != (short *) (HOST_WIDE_INT) 1)
- /* ... then ignore insns introduced by reload; they aren't useful
- and can cause results in reload_as_needed to be different
- from what they were when calculating the need for spills.
- If we notice an input-reload insn here, we will reject it below,
- but it might hide a usable equivalent. That makes bad code.
- It may even abort: perhaps no reg was spilled for this insn
- because it was assumed we would find that equivalent. */
+ /* ... then ignore insns introduced by reload; they aren't useful
+ and can cause results in reload_as_needed to be different
+ from what they were when calculating the need for spills.
+ If we notice an input-reload insn here, we will reject it below,
+ but it might hide a usable equivalent. That makes bad code.
+ It may even abort: perhaps no reg was spilled for this insn
+ because it was assumed we would find that equivalent. */
|| INSN_UID (p) < reload_first_uid))
{
rtx tem;
&& (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
||
(goal_const && rtx_equal_p (SET_SRC (pat), goal)
+ /* When looking for stack pointer + const,
+ make sure we don't use a stack adjust. */
+ && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
&& (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
|| (goal_mem
&& (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
&& reload_reg_p[valueno] >= 0)
return 0;
- /* On some machines, certain regs must always be rejected
- because they don't behave the way ordinary registers do. */
-
-#ifdef OVERLAPPING_REGNO_P
- if (OVERLAPPING_REGNO_P (valueno))
- return 0;
-#endif
-
nregs = HARD_REGNO_NREGS (regno, mode);
valuenregs = HARD_REGNO_NREGS (valueno, mode);
{
int i;
for (i = 0; i < n_reloads; i++)
- if (reload_reg_rtx[i] != 0 && reload_in[i])
+ if (rld[i].reg_rtx != 0 && rld[i].in)
{
- int regno1 = REGNO (reload_reg_rtx[i]);
+ int regno1 = REGNO (rld[i].reg_rtx);
int nregs1 = HARD_REGNO_NREGS (regno1,
- GET_MODE (reload_reg_rtx[i]));
+ GET_MODE (rld[i].reg_rtx));
if (regno1 < valueno + valuenregs
&& regno1 + nregs1 > valueno)
return 0;
|| need_stable_sp))
return 0;
-#ifdef NON_SAVING_SETJMP
+#ifdef NON_SAVING_SETJMP
if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
&& NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
return 0;
#endif
-#ifdef INSN_CLOBBERS_REGNO_P
- if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
- && INSN_CLOBBERS_REGNO_P (p, valueno))
- || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
- && INSN_CLOBBERS_REGNO_P (p, regno)))
- return 0;
-#endif
-
if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
{
+ pat = PATTERN (p);
+
+ /* Watch out for unspec_volatile, and volatile asms. */
+ if (volatile_insn_p (pat))
+ return 0;
+
/* If this insn P stores in either GOAL or VALUE, return 0.
If GOAL is a memory ref and this insn writes memory, return 0.
If GOAL is a memory ref and its address is not constant,
and this insn P changes a register used in GOAL, return 0. */
- pat = PATTERN (p);
if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
{
register rtx dest = SET_DEST (pat);
if (goal_mem_addr_varies
&& reg_overlap_mentioned_for_reload_p (dest, goal))
return 0;
+ if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
+ return 0;
}
else if (goal_mem && GET_CODE (dest) == MEM
&& ! push_operand (dest, GET_MODE (dest)))
&& reg_overlap_mentioned_for_reload_p (dest,
goal))
return 0;
+ if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
+ return 0;
}
else if (goal_mem && GET_CODE (dest) == MEM
&& ! push_operand (dest, GET_MODE (dest)))
rtx x, inced;
{
register enum rtx_code code = GET_CODE (x);
- register char *fmt;
+ register const char *fmt;
register int i;
if (code == MEM)
return 0;
}
-static char *reload_when_needed_name[] =
+static const char *reload_when_needed_name[] =
{
- "RELOAD_FOR_INPUT",
- "RELOAD_FOR_OUTPUT",
+ "RELOAD_FOR_INPUT",
+ "RELOAD_FOR_OUTPUT",
"RELOAD_FOR_INSN",
"RELOAD_FOR_INPUT_ADDRESS",
"RELOAD_FOR_INPADDR_ADDRESS",
"RELOAD_FOR_OUTPUT_ADDRESS",
"RELOAD_FOR_OUTADDR_ADDRESS",
- "RELOAD_FOR_OPERAND_ADDRESS",
+ "RELOAD_FOR_OPERAND_ADDRESS",
"RELOAD_FOR_OPADDR_ADDR",
- "RELOAD_OTHER",
+ "RELOAD_OTHER",
"RELOAD_FOR_OTHER_ADDRESS"
};
-static char *reg_class_names[] = REG_CLASS_NAMES;
+static const char * const reg_class_names[] = REG_CLASS_NAMES;
/* These functions are used to print the variables set by 'find_reloads' */
FILE *f;
{
int r;
- char *prefix;
+ const char *prefix;
if (! f)
f = stderr;
{
fprintf (f, "Reload %d: ", r);
- if (reload_in[r] != 0)
+ if (rld[r].in != 0)
{
fprintf (f, "reload_in (%s) = ",
- GET_MODE_NAME (reload_inmode[r]));
- print_inline_rtx (f, reload_in[r], 24);
+ GET_MODE_NAME (rld[r].inmode));
+ print_inline_rtx (f, rld[r].in, 24);
fprintf (f, "\n\t");
}
- if (reload_out[r] != 0)
+ if (rld[r].out != 0)
{
fprintf (f, "reload_out (%s) = ",
- GET_MODE_NAME (reload_outmode[r]));
- print_inline_rtx (f, reload_out[r], 24);
+ GET_MODE_NAME (rld[r].outmode));
+ print_inline_rtx (f, rld[r].out, 24);
fprintf (f, "\n\t");
}
- fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
+ fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
fprintf (f, "%s (opnum = %d)",
- reload_when_needed_name[(int) reload_when_needed[r]],
- reload_opnum[r]);
+ reload_when_needed_name[(int) rld[r].when_needed],
+ rld[r].opnum);
- if (reload_optional[r])
+ if (rld[r].optional)
fprintf (f, ", optional");
- if (reload_inc[r] != 0)
- fprintf (f, ", inc by %d", reload_inc[r]);
+ if (rld[r].nongroup)
+ fprintf (stderr, ", nongroup");
+
+ if (rld[r].inc != 0)
+ fprintf (f, ", inc by %d", rld[r].inc);
- if (reload_nocombine[r])
+ if (rld[r].nocombine)
fprintf (f, ", can't combine");
- if (reload_secondary_p[r])
+ if (rld[r].secondary_p)
fprintf (f, ", secondary_reload_p");
- if (reload_in_reg[r] != 0)
+ if (rld[r].in_reg != 0)
{
fprintf (f, "\n\treload_in_reg: ");
- print_inline_rtx (f, reload_in_reg[r], 24);
+ print_inline_rtx (f, rld[r].in_reg, 24);
+ }
+
+ if (rld[r].out_reg != 0)
+ {
+ fprintf (f, "\n\treload_out_reg: ");
+ print_inline_rtx (f, rld[r].out_reg, 24);
}
- if (reload_reg_rtx[r] != 0)
+ if (rld[r].reg_rtx != 0)
{
fprintf (f, "\n\treload_reg_rtx: ");
- print_inline_rtx (f, reload_reg_rtx[r], 24);
+ print_inline_rtx (f, rld[r].reg_rtx, 24);
}
prefix = "\n\t";
- if (reload_secondary_in_reload[r] != -1)
+ if (rld[r].secondary_in_reload != -1)
{
fprintf (f, "%ssecondary_in_reload = %d",
- prefix, reload_secondary_in_reload[r]);
+ prefix, rld[r].secondary_in_reload);
prefix = ", ";
}
- if (reload_secondary_out_reload[r] != -1)
+ if (rld[r].secondary_out_reload != -1)
fprintf (f, "%ssecondary_out_reload = %d\n",
- prefix, reload_secondary_out_reload[r]);
+ prefix, rld[r].secondary_out_reload);
prefix = "\n\t";
- if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
+ if (rld[r].secondary_in_icode != CODE_FOR_nothing)
{
- fprintf (f, "%ssecondary_in_icode = %s", prefix, insn_name[r]);
+ fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
+ insn_data[rld[r].secondary_in_icode].name);
prefix = ", ";
}
- if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
- fprintf (f, "%ssecondary_out_icode = %s", prefix, insn_name[r]);
+ if (rld[r].secondary_out_icode != CODE_FOR_nothing)
+ fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
+ insn_data[rld[r].secondary_out_icode].name);
fprintf (f, "\n");
}
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