/* Define per-register tables for data flow info and register allocation.
- Copyright (C) 1987 Free Software Foundation, Inc.
+ Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2003, 2004 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA. */
+#ifndef GCC_REGS_H
+#define GCC_REGS_H
+#include "varray.h"
+#include "obstack.h"
+#include "hard-reg-set.h"
+#include "basic-block.h"
#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
-/* Get the number of consecutive hard regs required to hold the REG rtx R.
- When something may be an explicit hard reg, REG_SIZE is the only
- valid way to get this value. You cannot get it from the regno. */
+/* When you only have the mode of a pseudo register before it has a hard
+ register chosen for it, this reports the size of each hard register
+ a pseudo in such a mode would get allocated to. A target may
+ override this. */
-#define REG_SIZE(R) \
- ((mode_size[(int) GET_MODE (R)] + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+#ifndef REGMODE_NATURAL_SIZE
+#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
+#endif
+
+#ifndef SMALL_REGISTER_CLASSES
+#define SMALL_REGISTER_CLASSES 0
+#endif
/* Maximum register number used in this function, plus one. */
extern int max_regno;
-/* Maximum number of SCRATCH rtx's in each block of this function. */
+/* Register information indexed by register number */
+typedef struct reg_info_def
+{ /* fields set by reg_scan */
+ int first_uid; /* UID of first insn to use (REG n) */
+ int last_uid; /* UID of last insn to use (REG n) */
+
+ /* fields set by reg_scan & flow_analysis */
+ int sets; /* # of times (REG n) is set */
+
+ /* fields set by flow_analysis */
+ int refs; /* # of times (REG n) is used or set */
+ int freq; /* # estimated frequency (REG n) is used or set */
+ int deaths; /* # of times (REG n) dies */
+ int live_length; /* # of instructions (REG n) is live */
+ int calls_crossed; /* # of calls (REG n) is live across */
+ int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
+ int basic_block; /* # of basic blocks (REG n) is used in */
+} reg_info;
+
+extern varray_type reg_n_info;
+
+/* Indexed by n, gives number of times (REG n) is used or set. */
+
+#define REG_N_REFS(N) (VARRAY_REG (reg_n_info, N)->refs)
-extern int max_scratch;
+/* Estimate frequency of references to register N. */
-/* Indexed by n, gives number of times (REG n) is used or set.
- References within loops may be counted more times. */
+#define REG_FREQ(N) (VARRAY_REG (reg_n_info, N)->freq)
-extern int *reg_n_refs;
+/* The weights for each insn varries from 0 to REG_FREQ_BASE.
+ This constant does not need to be high, as in infrequently executed
+ regions we want to count instructions equivalently to optimize for
+ size instead of speed. */
+#define REG_FREQ_MAX 1000
-/* Indexed by n, gives number of times (REG n) is set. */
+/* Compute register frequency from the BB frequency. When optimizing for size,
+ or profile driven feedback is available and the function is never executed,
+ frequency is always equivalent. Otherwise rescale the basic block
+ frequency. */
+#define REG_FREQ_FROM_BB(bb) (optimize_size \
+ || (flag_branch_probabilities \
+ && !ENTRY_BLOCK_PTR->count) \
+ ? REG_FREQ_MAX \
+ : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
+ ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
+ : 1)
-extern short *reg_n_sets;
+/* Indexed by n, gives number of times (REG n) is set.
+ ??? both regscan and flow allocate space for this. We should settle
+ on just copy. */
+
+#define REG_N_SETS(N) (VARRAY_REG (reg_n_info, N)->sets)
/* Indexed by N, gives number of insns in which register N dies.
Note that if register N is live around loops, it can die
So this is only a reliable indicator of how many regions of life there are
for registers that are contained in one basic block. */
-extern short *reg_n_deaths;
+#define REG_N_DEATHS(N) (VARRAY_REG (reg_n_info, N)->deaths)
/* Get the number of consecutive words required to hold pseudo-reg N. */
/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
-extern int *reg_n_calls_crossed;
+#define REG_N_CALLS_CROSSED(N) (VARRAY_REG (reg_n_info, N)->calls_crossed)
+
+/* Indexed by N, gives number of CALL_INSNS that may throw, across which
+ (REG n) is live. */
+
+#define REG_N_THROWING_CALLS_CROSSED(N) \
+ (VARRAY_REG (reg_n_info, N)->throw_calls_crossed)
/* Total number of instructions at which (REG n) is live.
The larger this is, the less priority (REG n) gets for
-1 is used to mark a pseudo reg which has a constant or memory equivalent
and is used infrequently enough that it should not get a hard register.
-2 is used to mark a pseudo reg for a parameter, when a frame pointer
- is not required. global-alloc.c makes an allocno for this but does
+ is not required. global.c makes an allocno for this but does
not try to assign a hard register to it. */
-extern int *reg_live_length;
+#define REG_LIVE_LENGTH(N) (VARRAY_REG (reg_n_info, N)->live_length)
/* Vector of substitutions of register numbers,
- used to map pseudo regs into hardware regs. */
+ used to map pseudo regs into hardware regs.
+
+ This can't be folded into reg_n_info without changing all of the
+ machine dependent directories, since the reload functions
+ in the machine dependent files access it. */
extern short *reg_renumber;
-/* Vector indexed by hardware reg
- saying whether that reg is ever used. */
+/* Vector indexed by hardware reg saying whether that reg is ever used. */
extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
-/* Vector indexed by hardware reg giving its name. */
+/* Like regs_ever_live, but saying whether reg is set by asm statements. */
+
+extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
+
+/* Vector indexed by machine mode saying whether there are regs of that mode. */
+
+extern bool have_regs_of_mode [MAX_MACHINE_MODE];
-extern char *reg_names[FIRST_PSEUDO_REGISTER];
+/* For each hard register, the widest mode object that it can contain.
+ This will be a MODE_INT mode if the register can hold integers. Otherwise
+ it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
+ register. */
+
+extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
/* Vector indexed by regno; gives uid of first insn using that reg.
This is computed by reg_scan for use by cse and loop.
It is sometimes adjusted for subsequent changes during loop,
but not adjusted by cse even if cse invalidates it. */
-extern int *regno_first_uid;
+#define REGNO_FIRST_UID(N) (VARRAY_REG (reg_n_info, N)->first_uid)
/* Vector indexed by regno; gives uid of last insn using that reg.
This is computed by reg_scan for use by cse and loop.
but not adjusted by cse even if cse invalidates it.
This is harmless since cse won't scan through a loop end. */
-extern int *regno_last_uid;
-
-/* Vector indexed by regno; contains 1 for a register is considered a pointer.
- Reloading, etc. will use a pointer register rather than a non-pointer
- as the base register in an address, when there is a choice of two regs. */
-
-extern char *regno_pointer_flag;
-#define REGNO_POINTER_FLAG(REGNO) regno_pointer_flag[REGNO]
+#define REGNO_LAST_UID(N) (VARRAY_REG (reg_n_info, N)->last_uid)
/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
that have to go in the same hard reg. */
extern rtx regs_may_share;
-/* Vector mapping pseudo regno into the REG rtx for that register.
- This is computed by reg_scan. */
-
-extern rtx *regno_reg_rtx;
-
/* Flag set by local-alloc or global-alloc if they decide to allocate
something in a call-clobbered register. */
#ifndef CALLER_SAVE_PROFITABLE
#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
#endif
+
+/* On most machines a register class is likely to be spilled if it
+ only has one register. */
+#ifndef CLASS_LIKELY_SPILLED_P
+#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
+#endif
+
+/* Select a register mode required for caller save of hard regno REGNO. */
+#ifndef HARD_REGNO_CALLER_SAVE_MODE
+#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
+ choose_hard_reg_mode (REGNO, NREGS, false)
+#endif
+
+/* Registers that get partially clobbered by a call in a given mode.
+ These must not be call used registers. */
+#ifndef HARD_REGNO_CALL_PART_CLOBBERED
+#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
+#endif
+
+/* Allocate reg_n_info tables */
+extern void allocate_reg_info (size_t, int, int);
+
+/* Specify number of hard registers given machine mode occupy. */
+extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
+
+#endif /* GCC_REGS_H */