/* Define per-register tables for data flow info and register allocation.
Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000 Free Software Foundation, Inc.
+ 1999, 2000, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+#ifndef GCC_REGS_H
+#define GCC_REGS_H
#include "varray.h"
+#include "obstack.h"
+#include "hard-reg-set.h"
+#include "basic-block.h"
#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
-/* Get the number of consecutive hard regs required to hold the REG or
- SUBREG rtx R.
- When something may be an explicit hard reg, REG_SIZE is the only
- valid way to get this value. You cannot get it from the regno.
-
- A target may override this definition, the case where you would do
- this is where there are registers which are smaller than WORD_SIZE
- such as the SFmode registers on sparc64. */
-
-#ifndef REG_SIZE
-#define REG_SIZE(R) \
- ((mode_size[(int) GET_MODE (R)] + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-#endif
-
/* When you only have the mode of a pseudo register before it has a hard
register chosen for it, this reports the size of each hard register
- a pseudo in such a mode would get allocated to. Like REG_SIZE, a
- target may override this. */
+ a pseudo in such a mode would get allocated to. A target may
+ override this. */
#ifndef REGMODE_NATURAL_SIZE
#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
extern int max_regno;
-/* Register information indexed by register number */
-typedef struct reg_info_def
-{ /* fields set by reg_scan */
- int first_uid; /* UID of first insn to use (REG n) */
- int last_uid; /* UID of last insn to use (REG n) */
- int last_note_uid; /* UID of last note to use (REG n) */
+/* REG_N_REFS and REG_N_SETS are initialized by a call to
+ regstat_init_n_sets_and_refs from the current values of
+ DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
+ should only be used if a pass need to change these values in some
+ magical way or or the pass needs to have accurate values for these
+ and is not using incremental df scanning.
+
+ At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
+ should be made to regstat_free_n_sets_and_refs.
+
+ Local alloc seems to play pretty loose with these values.
+ REG_N_REFS is set to 0 if the register is used in an asm.
+ Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
+ REG_N_SETS for three address insns. Other passes seem to have
+ other special values. */
- /* fields set by reg_scan & flow_analysis */
- int sets; /* # of times (REG n) is set */
- /* fields set by flow_analysis */
+
+/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
+
+struct regstat_n_sets_and_refs_t
+{
+ int sets; /* # of times (REG n) is set */
int refs; /* # of times (REG n) is used or set */
+};
+
+extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
+
+/* Indexed by n, gives number of times (REG n) is used or set. */
+static inline int
+REG_N_REFS(int regno)
+{
+ return regstat_n_sets_and_refs[regno].refs;
+}
+
+/* Indexed by n, gives number of times (REG n) is used or set. */
+#define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
+#define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
+
+/* Indexed by n, gives number of times (REG n) is set. */
+static inline int
+REG_N_SETS (int regno)
+{
+ return regstat_n_sets_and_refs[regno].sets;
+}
+
+/* Indexed by n, gives number of times (REG n) is set. */
+#define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
+#define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
+
+
+/* Functions defined in reg-stat.c. */
+extern void regstat_init_n_sets_and_refs (void);
+extern void regstat_free_n_sets_and_refs (void);
+extern void regstat_compute_ri (void);
+extern void regstat_free_ri (void);
+extern bitmap regstat_get_setjmp_crosses (void);
+extern void regstat_compute_calls_crossed (void);
+extern void regstat_free_calls_crossed (void);
+
+
+/* Register information indexed by register number. This structure is
+ initialized by calling regstat_compute_ri and is destroyed by
+ calling regstat_free_ri. */
+struct reg_info_t
+{
+ int freq; /* # estimated frequency (REG n) is used or set */
int deaths; /* # of times (REG n) dies */
int live_length; /* # of instructions (REG n) is live */
int calls_crossed; /* # of calls (REG n) is live across */
+ int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
int basic_block; /* # of basic blocks (REG n) is used in */
- char changes_mode; /* whether (SUBREG (REG n)) exists and
- is illegal. */
-} reg_info;
+};
-extern varray_type reg_n_info;
+extern struct reg_info_t *reg_info_p;
-/* Indexed by n, gives number of times (REG n) is used or set.
- References within loops may be counted more times. */
+/* The number allocated elements of reg_info_p. */
+extern size_t reg_info_p_size;
-#define REG_N_REFS(N) (VARRAY_REG (reg_n_info, N)->refs)
+/* Estimate frequency of references to register N. */
-/* Indexed by n, gives number of times (REG n) is set.
- ??? both regscan and flow allocate space for this. We should settle
- on just copy. */
+#define REG_FREQ(N) (reg_info_p[N].freq)
-#define REG_N_SETS(N) (VARRAY_REG (reg_n_info, N)->sets)
+/* The weights for each insn varries from 0 to REG_FREQ_BASE.
+ This constant does not need to be high, as in infrequently executed
+ regions we want to count instructions equivalently to optimize for
+ size instead of speed. */
+#define REG_FREQ_MAX 1000
+
+/* Compute register frequency from the BB frequency. When optimizing for size,
+ or profile driven feedback is available and the function is never executed,
+ frequency is always equivalent. Otherwise rescale the basic block
+ frequency. */
+#define REG_FREQ_FROM_BB(bb) (optimize_size \
+ || (flag_branch_probabilities \
+ && !ENTRY_BLOCK_PTR->count) \
+ ? REG_FREQ_MAX \
+ : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
+ ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
+ : 1)
/* Indexed by N, gives number of insns in which register N dies.
Note that if register N is live around loops, it can die
So this is only a reliable indicator of how many regions of life there are
for registers that are contained in one basic block. */
-#define REG_N_DEATHS(N) (VARRAY_REG (reg_n_info, N)->deaths)
-
-/* Indexed by N; says whether a pseudo register N was ever used
- within a SUBREG that changes the mode of the reg in some way
- that is illegal for a given class (usually floating-point)
- of registers. */
-
-#define REG_CHANGES_MODE(N) (VARRAY_REG (reg_n_info, N)->changes_mode)
+#define REG_N_DEATHS(N) (reg_info_p[N].deaths)
/* Get the number of consecutive words required to hold pseudo-reg N. */
/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
-#define REG_N_CALLS_CROSSED(N) (VARRAY_REG (reg_n_info, N)->calls_crossed)
+#define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
-/* Total number of instructions at which (REG n) is live.
- The larger this is, the less priority (REG n) gets for
- allocation in a hard register (in global-alloc).
- This is set in flow.c and remains valid for the rest of the compilation
- of the function; it is used to control register allocation.
+/* Indexed by N, gives number of CALL_INSNS that may throw, across which
+ (REG n) is live. */
+
+#define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
+
+/* Total number of instructions at which (REG n) is live. The larger
+ this is, the less priority (REG n) gets for allocation in a hard
+ register (in global-alloc). This is set in df-problems.c whenever
+ register info is requested and remains valid for the rest of the
+ compilation of the function; it is used to control register
+ allocation.
local-alloc.c may alter this number to change the priority.
is not required. global.c makes an allocno for this but does
not try to assign a hard register to it. */
-#define REG_LIVE_LENGTH(N) (VARRAY_REG (reg_n_info, N)->live_length)
+#define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length)
+
+/* Indexed by n, gives number of basic block that (REG n) is used in.
+ If the value is REG_BLOCK_GLOBAL (-1),
+ it means (REG n) is used in more than one basic block.
+ REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
+ This information remains valid for the rest of the compilation
+ of the current function; it is used to control register allocation. */
+
+#define REG_BLOCK_UNKNOWN 0
+#define REG_BLOCK_GLOBAL -1
+
+#define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
/* Vector of substitutions of register numbers,
used to map pseudo regs into hardware regs.
extern short *reg_renumber;
-/* Vector indexed by hardware reg
- saying whether that reg is ever used. */
-
-extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
+/* Vector indexed by machine mode saying whether there are regs of that mode. */
-/* Vector indexed by hardware reg giving its name. */
-
-extern const char * reg_names[FIRST_PSEUDO_REGISTER];
+extern bool have_regs_of_mode [MAX_MACHINE_MODE];
/* For each hard register, the widest mode object that it can contain.
This will be a MODE_INT mode if the register can hold integers. Otherwise
extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
-/* Vector indexed by regno; gives uid of first insn using that reg.
- This is computed by reg_scan for use by cse and loop.
- It is sometimes adjusted for subsequent changes during loop,
- but not adjusted by cse even if cse invalidates it. */
-
-#define REGNO_FIRST_UID(N) (VARRAY_REG (reg_n_info, N)->first_uid)
-
-/* Vector indexed by regno; gives uid of last insn using that reg.
- This is computed by reg_scan for use by cse and loop.
- It is sometimes adjusted for subsequent changes during loop,
- but not adjusted by cse even if cse invalidates it.
- This is harmless since cse won't scan through a loop end. */
-
-#define REGNO_LAST_UID(N) (VARRAY_REG (reg_n_info, N)->last_uid)
-
-/* Similar, but includes insns that mention the reg in their notes. */
-
-#define REGNO_LAST_NOTE_UID(N) (VARRAY_REG (reg_n_info, N)->last_note_uid)
-
-/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
- that have to go in the same hard reg. */
-extern rtx regs_may_share;
-
/* Flag set by local-alloc or global-alloc if they decide to allocate
something in a call-clobbered register. */
/* Select a register mode required for caller save of hard regno REGNO. */
#ifndef HARD_REGNO_CALLER_SAVE_MODE
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
- choose_hard_reg_mode (REGNO, NREGS)
+ choose_hard_reg_mode (REGNO, NREGS, false)
#endif
-/* Registers that get partially clobbered by a call in a given mode.
+/* Registers that get partially clobbered by a call in a given mode.
These must not be call used registers. */
#ifndef HARD_REGNO_CALL_PART_CLOBBERED
#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
#endif
-/* Allocate reg_n_info tables */
-extern void allocate_reg_info PARAMS ((size_t, int, int));
+/* Specify number of hard registers given machine mode occupy. */
+extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
+
+/* Return an exclusive upper bound on the registers occupied by hard
+ register (reg:MODE REGNO). */
+
+static inline unsigned int
+end_hard_regno (enum machine_mode mode, unsigned int regno)
+{
+ return regno + hard_regno_nregs[regno][(int) mode];
+}
+
+/* Likewise for hard register X. */
+
+#define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
+
+/* Likewise for hard or pseudo register X. */
+
+#define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
+
+/* Add to REGS all the registers required to store a value of mode MODE
+ in register REGNO. */
+
+static inline void
+add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
+ unsigned int regno)
+{
+ unsigned int end_regno;
+
+ end_regno = end_hard_regno (mode, regno);
+ do
+ SET_HARD_REG_BIT (*regs, regno);
+ while (++regno < end_regno);
+}
+
+/* Likewise, but remove the registers. */
+
+static inline void
+remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
+ unsigned int regno)
+{
+ unsigned int end_regno;
+
+ end_regno = end_hard_regno (mode, regno);
+ do
+ CLEAR_HARD_REG_BIT (*regs, regno);
+ while (++regno < end_regno);
+}
+
+/* Return true if REGS contains the whole of (reg:MODE REGNO). */
+
+static inline bool
+in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
+ unsigned int regno)
+{
+ unsigned int end_regno;
+
+ if (!TEST_HARD_REG_BIT (regs, regno))
+ return false;
+
+ end_regno = end_hard_regno (mode, regno);
+ while (++regno < end_regno)
+ if (!TEST_HARD_REG_BIT (regs, regno))
+ return false;
+
+ return true;
+}
+
+/* Return true if (reg:MODE REGNO) includes an element of REGS. */
+
+static inline bool
+overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
+ unsigned int regno)
+{
+ unsigned int end_regno;
+
+ if (TEST_HARD_REG_BIT (regs, regno))
+ return true;
+
+ end_regno = end_hard_regno (mode, regno);
+ while (++regno < end_regno)
+ if (TEST_HARD_REG_BIT (regs, regno))
+ return true;
+
+ return false;
+}
+
+#endif /* GCC_REGS_H */
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