/* Register renaming for the GNU compiler.
- Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+ Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005
+ Free Software Foundation, Inc.
This file is part of GCC.
#include "toplev.h"
#include "obstack.h"
-#ifndef REG_MODE_OK_FOR_BASE_P
-#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
-#endif
-
-static const char *const reg_class_names[] = REG_CLASS_NAMES;
-
struct du_chain
{
struct du_chain *next_chain;
HARD_REG_SET *pset = (HARD_REG_SET *) data;
unsigned int regno;
int nregs;
+
+ if (GET_CODE (x) == SUBREG)
+ x = SUBREG_REG (x);
if (!REG_P (x))
return;
regno = REGNO (x);
nregs = hard_regno_nregs[regno][GET_MODE (x)];
/* There must not be pseudos at this point. */
- if (regno + nregs > FIRST_PSEUDO_REGISTER)
- abort ();
+ gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
while (nregs-- > 0)
SET_HARD_REG_BIT (*pset, regno + nregs);
int nregs = hard_regno_nregs[regno][GET_MODE (reg)];
/* There must not be pseudos at this point. */
- if (regno + nregs > FIRST_PSEUDO_REGISTER)
- abort ();
+ gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
while (nregs-- > 0)
CLEAR_HARD_REG_BIT (*pset, regno + nregs);
if (action == mark_read)
{
- if (! exact_match)
- abort ();
+ gcc_assert (exact_match);
/* ??? Class NO_REGS can happen if the md file makes use of
EXTRA_CONSTRAINTS to match registers. Which is arguably
rtx op1 = orig_op1;
rtx *locI = NULL;
rtx *locB = NULL;
+ rtx *locB_reg = NULL;
if (GET_CODE (op0) == SUBREG)
{
int index_op;
if (REG_OK_FOR_INDEX_P (op0)
- && REG_MODE_OK_FOR_BASE_P (op1, mode))
+ && REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
index_op = 0;
else if (REG_OK_FOR_INDEX_P (op1)
- && REG_MODE_OK_FOR_BASE_P (op0, mode))
+ && REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
index_op = 1;
- else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
+ else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
index_op = 0;
- else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
+ else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
index_op = 1;
else if (REG_OK_FOR_INDEX_P (op1))
index_op = 1;
index_op = 0;
locI = &XEXP (x, index_op);
- locB = &XEXP (x, !index_op);
+ locB_reg = &XEXP (x, !index_op);
}
else if (code0 == REG)
{
scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode);
if (locB)
scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode);
+ if (locB_reg)
+ scan_rtx_address (insn, locB_reg, MODE_BASE_REG_REG_CLASS (mode),
+ action, mode);
return;
}
case SET:
scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN, 0);
- scan_rtx (insn, &SET_DEST (x), cl, action, OP_OUT, 0);
+ scan_rtx (insn, &SET_DEST (x), cl, action,
+ GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0);
return;
case STRICT_LOW_PART:
case POST_MODIFY:
case PRE_MODIFY:
/* Should only happen inside MEM. */
- abort ();
+ gcc_unreachable ();
case CLOBBER:
- scan_rtx (insn, &SET_DEST (x), cl, action, OP_OUT, 1);
+ scan_rtx (insn, &SET_DEST (x), cl, action,
+ GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0);
return;
case EXPR_LIST:
static void
kill_value (rtx x, struct value_data *vd)
{
- /* SUBREGS are supposed to have been eliminated by now. But some
- ports, e.g. i386 sse, use them to smuggle vector type information
- through to instruction selection. Each such SUBREG should simplify,
- so if we get a NULL we've done something wrong elsewhere. */
+ rtx orig_rtx = x;
if (GET_CODE (x) == SUBREG)
- x = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
- GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
+ {
+ x = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
+ GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
+ if (x == NULL_RTX)
+ x = SUBREG_REG (orig_rtx);
+ }
if (REG_P (x))
{
unsigned int regno = REGNO (x);
rtx op1 = orig_op1;
rtx *locI = NULL;
rtx *locB = NULL;
+ rtx *locB_reg = NULL;
if (GET_CODE (op0) == SUBREG)
{
int index_op;
if (REG_OK_FOR_INDEX_P (op0)
- && REG_MODE_OK_FOR_BASE_P (op1, mode))
+ && REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
index_op = 0;
else if (REG_OK_FOR_INDEX_P (op1)
- && REG_MODE_OK_FOR_BASE_P (op0, mode))
+ && REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
index_op = 1;
- else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
+ else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
index_op = 0;
- else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
+ else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
index_op = 1;
else if (REG_OK_FOR_INDEX_P (op1))
index_op = 1;
index_op = 0;
locI = &XEXP (x, index_op);
- locB = &XEXP (x, !index_op);
+ locB_reg = &XEXP (x, !index_op);
}
else if (code0 == REG)
{
changed |= replace_oldest_value_addr (locB,
MODE_BASE_REG_CLASS (mode),
mode, insn, vd);
+ if (locB_reg)
+ changed |= replace_oldest_value_addr (locB_reg,
+ MODE_BASE_REG_REG_CLASS (mode),
+ mode, insn, vd);
return changed;
}
{
struct value_data *all_vd;
bool need_refresh;
- basic_block bb, bbp = 0;
+ basic_block bb;
+ sbitmap visited;
need_refresh = false;
all_vd = xmalloc (sizeof (struct value_data) * last_basic_block);
+ visited = sbitmap_alloc (last_basic_block - (INVALID_BLOCK + 1));
+ sbitmap_zero (visited);
+
FOR_EACH_BB (bb)
{
+ SET_BIT (visited, bb->index - (INVALID_BLOCK + 1));
+
/* If a block has a single predecessor, that we've already
processed, begin with the value data that was live at
the end of the predecessor block. */
/* ??? Ought to use more intelligent queuing of blocks. */
- if (bb->pred)
- for (bbp = bb; bbp && bbp != bb->pred->src; bbp = bbp->prev_bb);
- if (bb->pred
- && ! bb->pred->pred_next
- && ! (bb->pred->flags & (EDGE_ABNORMAL_CALL | EDGE_EH))
- && bb->pred->src != ENTRY_BLOCK_PTR
- && bbp)
- all_vd[bb->index] = all_vd[bb->pred->src->index];
+ if (single_pred_p (bb)
+ && TEST_BIT (visited,
+ single_pred (bb)->index - (INVALID_BLOCK + 1))
+ && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
+ all_vd[bb->index] = all_vd[single_pred (bb)->index];
else
init_value_data (all_vd + bb->index);
need_refresh = true;
}
+ sbitmap_free (visited);
+
if (need_refresh)
{
if (dump_file)
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