/* Move registers around to reduce number of move instructions needed.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
/* This module looks for cases where matching constraints would force
#include "config.h"
#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
#include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
#include "tm_p.h"
#include "insn-config.h"
#include "flags.h"
#include "function.h"
#include "expr.h"
-#include "insn-flags.h"
#include "basic-block.h"
+#include "except.h"
#include "toplev.h"
+#include "reload.h"
-static int perhaps_ends_bb_p PARAMS ((rtx));
-static int optimize_reg_copy_1 PARAMS ((rtx, rtx, rtx));
-static void optimize_reg_copy_2 PARAMS ((rtx, rtx, rtx));
-static void optimize_reg_copy_3 PARAMS ((rtx, rtx, rtx));
-static rtx gen_add3_insn PARAMS ((rtx, rtx, rtx));
-static void copy_src_to_dest PARAMS ((rtx, rtx, rtx, int));
+
+/* Turn STACK_GROWS_DOWNWARD into a boolean. */
+#ifdef STACK_GROWS_DOWNWARD
+#undef STACK_GROWS_DOWNWARD
+#define STACK_GROWS_DOWNWARD 1
+#else
+#define STACK_GROWS_DOWNWARD 0
+#endif
+
+static int perhaps_ends_bb_p (rtx);
+static int optimize_reg_copy_1 (rtx, rtx, rtx);
+static void optimize_reg_copy_2 (rtx, rtx, rtx);
+static void optimize_reg_copy_3 (rtx, rtx, rtx);
+static void copy_src_to_dest (rtx, rtx, rtx, int);
static int *regmove_bb_head;
struct match {
int early_clobber[MAX_RECOG_OPERANDS];
};
-static rtx discover_flags_reg PARAMS ((void));
-static void mark_flags_life_zones PARAMS ((rtx));
-static void flags_set_1 PARAMS ((rtx, rtx, void *));
-
-static int try_auto_increment PARAMS ((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
-static int find_matches PARAMS ((rtx, struct match *));
-static int fixup_match_1 PARAMS ((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
-;
-static int reg_is_remote_constant_p PARAMS ((rtx, rtx, rtx));
-static int stable_and_no_regs_but_for_p PARAMS ((rtx, rtx, rtx));
-static int regclass_compatible_p PARAMS ((int, int));
-static int replacement_quality PARAMS ((rtx));
-static int fixup_match_2 PARAMS ((rtx, rtx, rtx, rtx, FILE *));
-
-/* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
+static rtx discover_flags_reg (void);
+static void mark_flags_life_zones (rtx);
+static void flags_set_1 (rtx, rtx, void *);
+
+static int try_auto_increment (rtx, rtx, rtx, rtx, HOST_WIDE_INT, int);
+static int find_matches (rtx, struct match *);
+static void replace_in_call_usage (rtx *, unsigned int, rtx, rtx);
+static int fixup_match_1 (rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *);
+static int reg_is_remote_constant_p (rtx, rtx, rtx);
+static int stable_and_no_regs_but_for_p (rtx, rtx, rtx);
+static int regclass_compatible_p (int, int);
+static int replacement_quality (rtx);
+static int fixup_match_2 (rtx, rtx, rtx, rtx, FILE *);
+
+/* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
causing too much register allocation problems. */
static int
-regclass_compatible_p (class0, class1)
- int class0, class1;
+regclass_compatible_p (int class0, int class1)
{
return (class0 == class1
|| (reg_class_subset_p (class0, class1)
&& ! CLASS_LIKELY_SPILLED_P (class1)));
}
-/* Generate and return an insn body to add r1 and c,
- storing the result in r0. */
-static rtx
-gen_add3_insn (r0, r1, c)
- rtx r0, r1, c;
-{
- int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
-
- if (icode == CODE_FOR_nothing
- || ! ((*insn_data[icode].operand[0].predicate)
- (r0, insn_data[icode].operand[0].mode))
- || ! ((*insn_data[icode].operand[1].predicate)
- (r1, insn_data[icode].operand[1].mode))
- || ! ((*insn_data[icode].operand[2].predicate)
- (c, insn_data[icode].operand[2].mode)))
- return NULL_RTX;
-
- return (GEN_FCN (icode) (r0, r1, c));
-}
-
-
/* INC_INSN is an instruction that adds INCREMENT to REG.
Try to fold INC_INSN as a post/pre in/decrement into INSN.
Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
Return nonzero for success. */
static int
-try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
- rtx reg, insn, inc_insn ,inc_insn_set;
- HOST_WIDE_INT increment;
- int pre;
+try_auto_increment (rtx insn, rtx inc_insn, rtx inc_insn_set, rtx reg,
+ HOST_WIDE_INT increment, int pre)
{
enum rtx_code inc_code;
/* Can't use the size of SET_SRC, we might have something like
(sign_extend:SI (mem:QI ... */
rtx use = find_use_as_address (pset, reg, 0);
- if (use != 0 && use != (rtx) 1)
+ if (use != 0 && use != (rtx) (size_t) 1)
{
int size = GET_MODE_SIZE (GET_MODE (use));
if (0
{
if (inc_insn_set)
validate_change
- (inc_insn,
+ (inc_insn,
&SET_SRC (inc_insn_set),
XEXP (SET_SRC (inc_insn_set), 0), 1);
validate_change (insn, &XEXP (use, 0),
gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
if (apply_change_group ())
{
+ /* If there is a REG_DEAD note on this insn, we must
+ change this not to REG_UNUSED meaning that the register
+ is set, but the value is dead. Failure to do so will
+ result in a sched1 abort -- when it recomputes lifetime
+ information, the number of REG_DEAD notes will have
+ changed. */
+ rtx note = find_reg_note (insn, REG_DEAD, reg);
+ if (note)
+ PUT_MODE (note, REG_UNUSED);
+
REG_NOTES (insn)
= gen_rtx_EXPR_LIST (REG_INC,
reg, REG_NOTES (insn));
if (! inc_insn_set)
- {
- PUT_CODE (inc_insn, NOTE);
- NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
- NOTE_SOURCE_FILE (inc_insn) = 0;
- }
+ delete_insn (inc_insn);
return 1;
}
}
if no flags were found. Return pc_rtx if we got confused. */
static rtx
-discover_flags_reg ()
+discover_flags_reg (void)
{
rtx tmp;
tmp = gen_rtx_REG (word_mode, 10000);
- tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
+ tmp = gen_add3_insn (tmp, tmp, const2_rtx);
- /* If we get something that isn't a simple set, or a
+ /* If we get something that isn't a simple set, or a
[(set ..) (clobber ..)], this whole function will go wrong. */
if (GET_CODE (tmp) == SET)
return NULL_RTX;
scratch or something. We only care about hard regs.
Moreover we don't like the notion of subregs of hard regs. */
if (GET_CODE (tmp) == SUBREG
- && GET_CODE (SUBREG_REG (tmp)) == REG
+ && REG_P (SUBREG_REG (tmp))
&& REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
return pc_rtx;
- found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
+ found = (REG_P (tmp) && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
return (found ? tmp : NULL_RTX);
}
/* It is a tedious task identifying when the flags register is live and
when it is safe to optimize. Since we process the instruction stream
multiple times, locate and record these live zones by marking the
- mode of the instructions --
+ mode of the instructions --
QImode is used on the instruction at which the flags becomes live.
static int flags_set_1_set;
static void
-mark_flags_life_zones (flags)
- rtx flags;
+mark_flags_life_zones (rtx flags)
{
int flags_regno;
int flags_nregs;
- int block;
+ basic_block block;
#ifdef HAVE_cc0
/* If we found a flags register on a cc0 host, bail. */
else if (flags != cc0_rtx)
flags = pc_rtx;
#endif
-
+
/* Simple cases first: if no flags, clear all modes. If confusing,
mark the entire function as being in a flags shadow. */
if (flags == NULL_RTX || flags == pc_rtx)
{
enum machine_mode mode = (flags ? HImode : VOIDmode);
rtx insn;
- for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
+ for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
PUT_MODE (insn, mode);
return;
}
flags_nregs = 1;
#else
flags_regno = REGNO (flags);
- flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
+ flags_nregs = hard_regno_nregs[flags_regno][GET_MODE (flags)];
#endif
flags_set_1_rtx = flags;
/* Process each basic block. */
- for (block = n_basic_blocks - 1; block >= 0; block--)
+ FOR_EACH_BB_REVERSE (block)
{
rtx insn, end;
int live;
- insn = BLOCK_HEAD (block);
- end = BLOCK_END (block);
+ insn = BB_HEAD (block);
+ end = BB_END (block);
/* Look out for the (unlikely) case of flags being live across
basic block boundaries. */
{
int i;
for (i = 0; i < flags_nregs; ++i)
- live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
+ live |= REGNO_REG_SET_P (block->global_live_at_start,
flags_regno + i);
}
#endif
#endif
PUT_MODE (insn, (live ? HImode : VOIDmode));
- /* In either case, birth is denoted simply by it's presence
+ /* In either case, birth is denoted simply by its presence
as the destination of a set. */
flags_set_1_set = 0;
note_stores (PATTERN (insn), flags_set_1, NULL);
/* A subroutine of mark_flags_life_zones, called through note_stores. */
static void
-flags_set_1 (x, pat, data)
- rtx x, pat;
- void *data ATTRIBUTE_UNUSED;
+flags_set_1 (rtx x, rtx pat, void *data ATTRIBUTE_UNUSED)
{
if (GET_CODE (pat) == SET
&& reg_overlap_mentioned_p (x, flags_set_1_rtx))
a candidate for tying to a hard register, since the output might in
turn be a candidate to be tied to a different hard register. */
static int
-replacement_quality(reg)
- rtx reg;
+replacement_quality (rtx reg)
{
int src_regno;
/* Bad if this isn't a register at all. */
- if (GET_CODE (reg) != REG)
+ if (!REG_P (reg))
return 0;
/* If this register is not meant to get a hard register,
\f
/* Return 1 if INSN might end a basic block. */
-static int perhaps_ends_bb_p (insn)
- rtx insn;
+static int perhaps_ends_bb_p (rtx insn)
{
switch (GET_CODE (insn))
{
/* A CALL_INSN might be the last insn of a basic block, if it is inside
an EH region or if there are nonlocal gotos. Note that this test is
very conservative. */
- return flag_exceptions || nonlocal_goto_handler_labels;
-
+ if (nonlocal_goto_handler_labels)
+ return 1;
+ /* Fall through. */
default:
- /* All others never end a basic block. */
- return 0;
+ return can_throw_internal (insn);
}
}
\f
Search forward to see if SRC dies before either it or DEST is modified,
but don't scan past the end of a basic block. If so, we can replace SRC
- with DEST and let SRC die in INSN.
+ with DEST and let SRC die in INSN.
This will reduce the number of registers live in that range and may enable
DEST to be tied to SRC, thus often saving one register in addition to a
register-register copy. */
static int
-optimize_reg_copy_1 (insn, dest, src)
- rtx insn;
- rtx dest;
- rtx src;
+optimize_reg_copy_1 (rtx insn, rtx dest, rtx src)
{
rtx p, q;
rtx note;
int sregno = REGNO (src);
int dregno = REGNO (dest);
- /* We don't want to mess with hard regs if register classes are small. */
+ /* We don't want to mess with hard regs if register classes are small. */
if (sregno == dregno
|| (SMALL_REGISTER_CLASSES
&& (sregno < FIRST_PSEUDO_REGISTER
continue;
if (reg_set_p (src, p) || reg_set_p (dest, p)
+ /* If SRC is an asm-declared register, it must not be replaced
+ in any asm. Unfortunately, the REG_EXPR tree for the asm
+ variable may be absent in the SRC rtx, so we can't check the
+ actual register declaration easily (the asm operand will have
+ it, though). To avoid complicating the test for a rare case,
+ we just don't perform register replacement for a hard reg
+ mentioned in an asm. */
+ || (sregno < FIRST_PSEUDO_REGISTER
+ && asm_noperands (PATTERN (p)) >= 0
+ && reg_overlap_mentioned_p (src, PATTERN (p)))
+ /* Don't change hard registers used by a call. */
+ || (CALL_P (p) && sregno < FIRST_PSEUDO_REGISTER
+ && find_reg_fusage (p, USE, src))
/* Don't change a USE of a register. */
|| (GET_CODE (PATTERN (p)) == USE
&& reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
/* If the insn in which SRC dies is a CALL_INSN, don't count it
as a call that has been crossed. Otherwise, count it. */
- if (q != p && GET_CODE (q) == CALL_INSN)
+ if (q != p && CALL_P (q))
{
/* Similarly, total calls for SREGNO, total calls beyond
the death note for DREGNO. */
this for hard registers since the substitutions we may make might fail. */
static void
-optimize_reg_copy_2 (insn, dest, src)
- rtx insn;
- rtx dest;
- rtx src;
+optimize_reg_copy_2 (rtx insn, rtx dest, rtx src)
{
rtx p, q;
rtx set;
PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
- if (GET_CODE (q) == CALL_INSN)
+ if (CALL_P (q))
{
REG_N_CALLS_CROSSED (dregno)--;
REG_N_CALLS_CROSSED (sregno)++;
if (reg_set_p (src, p)
|| find_reg_note (p, REG_DEAD, dest)
- || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
+ || (CALL_P (p) && REG_N_CALLS_CROSSED (sregno) == 0))
break;
}
}
/* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
Look if SRC dies there, and if it is only set once, by loading
- it from memory. If so, try to encorporate the zero/sign extension
+ it from memory. If so, try to incorporate the zero/sign extension
into the memory read, change SRC to the mode of DEST, and alter
the remaining accesses to use the appropriate SUBREG. This allows
SRC and DEST to be tied later. */
static void
-optimize_reg_copy_3 (insn, dest, src)
- rtx insn;
- rtx dest;
- rtx src;
+optimize_reg_copy_3 (rtx insn, rtx dest, rtx src)
{
rtx src_reg = XEXP (src, 0);
int src_no = REGNO (src_reg);
int dst_no = REGNO (dest);
- rtx p, set, subreg;
+ rtx p, set;
enum machine_mode old_mode;
if (src_no < FIRST_PSEUDO_REGISTER
|| dst_no < FIRST_PSEUDO_REGISTER
|| ! find_reg_note (insn, REG_DEAD, src_reg)
+ || REG_N_DEATHS (src_no) != 1
|| REG_N_SETS (src_no) != 1)
return;
for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
return;
if (! (set = single_set (p))
- || GET_CODE (SET_SRC (set)) != MEM
+ || !MEM_P (SET_SRC (set))
+ /* If there's a REG_EQUIV note, this must be an insn that loads an
+ argument. Prefer keeping the note over doing this optimization. */
+ || find_reg_note (p, REG_EQUIV, NULL_RTX)
|| SET_DEST (set) != src_reg)
return;
- /* Be conserative: although this optimization is also valid for
+ /* Be conservative: although this optimization is also valid for
volatile memory references, that could cause trouble in later passes. */
if (MEM_VOLATILE_P (SET_SRC (set)))
return;
/* Now walk forward making additional replacements. We want to be able
to undo all the changes if a later substitution fails. */
- subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
while (p = NEXT_INSN (p), p != insn)
{
if (! INSN_P (p))
continue;
- /* Make a tenative change. */
- validate_replace_rtx_group (src_reg, subreg, p);
+ /* Make a tentative change. */
+ validate_replace_rtx_group (src_reg,
+ gen_lowpart_SUBREG (old_mode, src_reg),
+ p);
}
validate_replace_rtx_group (src, src_reg, insn);
PUT_MODE (src_reg, old_mode);
XEXP (src, 0) = src_reg;
}
+ else
+ {
+ rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
+ if (note)
+ remove_note (p, note);
+ }
}
\f
instead moving the value to dest directly before the operation. */
static void
-copy_src_to_dest (insn, src, dest, old_max_uid)
- rtx insn;
- rtx src;
- rtx dest;
- int old_max_uid;
+copy_src_to_dest (rtx insn, rtx src, rtx dest, int old_max_uid)
{
rtx seq;
rtx link;
parameter when there is no frame pointer that is not allocated a register.
For now, we just reject them, rather than incrementing the live length. */
- if (GET_CODE (src) == REG
+ if (REG_P (src)
&& REG_LIVE_LENGTH (REGNO (src)) > 0
- && GET_CODE (dest) == REG
- && !RTX_UNCHANGING_P (dest)
+ && REG_P (dest)
&& REG_LIVE_LENGTH (REGNO (dest)) > 0
&& (set = single_set (insn)) != NULL_RTX
&& !reg_mentioned_p (dest, SET_SRC (set))
/* Generate the src->dest move. */
start_sequence ();
emit_move_insn (dest, src);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
/* If this sequence uses new registers, we may not use it. */
if (old_num_regs != reg_rtx_no
p_move_notes = ®_NOTES (move_insn);
p_insn_notes = ®_NOTES (insn);
- /* Move any notes mentioning src to the move instruction */
+ /* Move any notes mentioning src to the move instruction. */
for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
{
next = XEXP (link, 1);
*p_move_notes = NULL_RTX;
*p_insn_notes = NULL_RTX;
- /* Is the insn the head of a basic block? If so extend it */
+ /* Is the insn the head of a basic block? If so extend it. */
insn_uid = INSN_UID (insn);
move_uid = INSN_UID (move_insn);
if (insn_uid < old_max_uid)
bb = regmove_bb_head[insn_uid];
if (bb >= 0)
{
- BLOCK_HEAD (bb) = move_insn;
+ BB_HEAD (BASIC_BLOCK (bb)) = move_insn;
regmove_bb_head[insn_uid] = -1;
}
}
if (REGNO_LAST_UID (src_regno) == insn_uid)
REGNO_LAST_UID (src_regno) = move_uid;
-
- if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
- REGNO_LAST_NOTE_UID (src_regno) = move_uid;
}
}
the first insn in the function. */
static int
-reg_is_remote_constant_p (reg, insn, first)
- rtx reg;
- rtx insn;
- rtx first;
+reg_is_remote_constant_p (rtx reg, rtx insn, rtx first)
{
- register rtx p;
+ rtx p;
if (REG_N_SETS (REGNO (reg)) != 1)
return 0;
continue;
s = single_set (XEXP (p, 0));
if (s != 0
- && GET_CODE (SET_DEST (s)) == REG
+ && REG_P (SET_DEST (s))
&& REGNO (SET_DEST (s)) == REGNO (reg))
{
/* The register is set in the same basic block. */
continue;
s = single_set (p);
if (s != 0
- && GET_CODE (SET_DEST (s)) == REG
+ && REG_P (SET_DEST (s))
&& REGNO (SET_DEST (s)) == REGNO (reg))
{
/* This is the instruction which sets REG. If there is a
(set (reg100) (plus reg100 offset2-offset1)) */
/* ??? What does this comment mean? */
-/* cse disrupts preincrement / postdecrement squences when it finds a
+/* cse disrupts preincrement / postdecrement sequences when it finds a
hard register as ultimate source, like the frame pointer. */
static int
-fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
- rtx insn, dst, src, offset;
- FILE *regmove_dump_file;
+fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset, FILE *regmove_dump_file)
{
rtx p, dst_death = 0;
int length, num_calls = 0;
if (perhaps_ends_bb_p (p))
break;
else if (! INSN_P (p))
- continue;
+ continue;
if (find_regno_note (p, REG_DEAD, REGNO (dst)))
dst_death = p;
&& GET_CODE (SET_SRC (pset)) == PLUS
&& XEXP (SET_SRC (pset), 0) == src
&& GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
- {
+ {
HOST_WIDE_INT newconst
= INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
#ifdef AUTO_INC_DEC
for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
{
- if (GET_CODE (p) == CODE_LABEL
- || GET_CODE (p) == JUMP_INSN)
+ if (LABEL_P (p)
+ || JUMP_P (p))
break;
if (! INSN_P (p))
continue;
}
for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
{
- if (GET_CODE (p) == CODE_LABEL
- || GET_CODE (p) == JUMP_INSN)
+ if (LABEL_P (p)
+ || JUMP_P (p))
break;
if (! INSN_P (p))
continue;
#endif
return 1;
}
- }
+ }
if (reg_set_p (dst, PATTERN (p)))
- break;
+ break;
/* If we have passed a call instruction, and the
pseudo-reg SRC is not already live across a call,
/* reg_set_p is overly conservative for CALL_INSNS, thinks that all
hard regs are clobbered. Thus, we only use it for src for
non-call insns. */
- if (GET_CODE (p) == CALL_INSN)
- {
+ if (CALL_P (p))
+ {
if (! dst_death)
num_calls++;
- if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
- break;
+ if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
+ break;
if (call_used_regs [REGNO (dst)]
|| find_reg_fusage (p, CLOBBER, dst))
break;
- }
+ }
else if (reg_set_p (src, PATTERN (p)))
- break;
+ break;
}
return 0;
}
+/* Main entry for the register move optimization.
+ F is the first instruction.
+ NREGS is one plus the highest pseudo-reg number used in the instruction.
+ REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
+ (or 0 if none should be output). */
+
void
-regmove_optimize (f, nregs, regmove_dump_file)
- rtx f;
- int nregs;
- FILE *regmove_dump_file;
+regmove_optimize (rtx f, int nregs, FILE *regmove_dump_file)
{
int old_max_uid = get_max_uid ();
rtx insn;
int pass;
int i;
rtx copy_src, copy_dst;
+ basic_block bb;
+
+ /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
+ confused by non-call exceptions ending blocks. */
+ if (flag_non_call_exceptions)
+ return;
/* Find out where a potential flags register is live, and so that we
- can supress some optimizations in those zones. */
+ can suppress some optimizations in those zones. */
mark_flags_life_zones (discover_flags_reg ());
- regno_src_regno = (int *) xmalloc (sizeof *regno_src_regno * nregs);
+ regno_src_regno = xmalloc (sizeof *regno_src_regno * nregs);
for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
- regmove_bb_head = (int *) xmalloc (sizeof (int) * (old_max_uid + 1));
+ regmove_bb_head = xmalloc (sizeof (int) * (old_max_uid + 1));
for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
- for (i = 0; i < n_basic_blocks; i++)
- regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
+ FOR_EACH_BB (bb)
+ regmove_bb_head[INSN_UID (BB_HEAD (bb))] = bb->index;
/* A forward/backward pass. Replace output operands with input operands. */
if (flag_expensive_optimizations && ! pass
&& (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
|| GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
- && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
- && GET_CODE (SET_DEST(set)) == REG)
+ && REG_P (XEXP (SET_SRC (set), 0))
+ && REG_P (SET_DEST (set)))
optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
if (flag_expensive_optimizations && ! pass
- && GET_CODE (SET_SRC (set)) == REG
- && GET_CODE (SET_DEST(set)) == REG)
+ && REG_P (SET_SRC (set))
+ && REG_P (SET_DEST (set)))
{
/* If this is a register-register copy where SRC is not dead,
see if we can optimize it. If this optimization succeeds,
if (regno_src_regno[REGNO (SET_DEST (set))] < 0
&& SET_SRC (set) != SET_DEST (set))
{
- int srcregno = REGNO (SET_SRC(set));
+ int srcregno = REGNO (SET_SRC (set));
if (regno_src_regno[srcregno] >= 0)
srcregno = regno_src_regno[srcregno];
regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
}
}
}
- if (! flag_regmove)
- continue;
+ if (! flag_regmove)
+ continue;
if (! find_matches (insn, &match))
continue;
src = recog_data.operand[op_no];
dst = recog_data.operand[match_no];
- if (GET_CODE (src) != REG)
+ if (!REG_P (src))
continue;
src_subreg = src;
&& GET_MODE_SIZE (GET_MODE (dst))
>= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
{
- src_subreg
- = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
- src, SUBREG_WORD (dst));
dst = SUBREG_REG (dst);
+ src_subreg = lowpart_subreg (GET_MODE (dst),
+ src, GET_MODE (src));
+ if (!src_subreg)
+ continue;
}
- if (GET_CODE (dst) != REG
+ if (!REG_P (dst)
|| REGNO (dst) < FIRST_PSEUDO_REGISTER)
continue;
if (recog_data.operand[match_no] != SET_DEST (set))
continue;
- /* If the operands already match, then there is nothing to do. */
+ /* If the operands already match, then there is nothing to do. */
if (operands_match_p (src, dst))
continue;
dst_class = reg_preferred_class (REGNO (dst));
if (! regclass_compatible_p (src_class, dst_class))
continue;
-
+
+ if (GET_MODE (src) != GET_MODE (dst))
+ continue;
+
if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
op_no, match_no,
regmove_dump_file))
dst = recog_data.operand[match_no];
src = recog_data.operand[op_no];
- if (GET_CODE (src) != REG)
+ if (!REG_P (src))
continue;
- if (GET_CODE (dst) != REG
+ if (!REG_P (dst)
|| REGNO (dst) < FIRST_PSEUDO_REGISTER
- || REG_LIVE_LENGTH (REGNO (dst)) < 0)
+ || REG_LIVE_LENGTH (REGNO (dst)) < 0
+ || GET_MODE (src) != GET_MODE (dst))
continue;
- /* If the operands already match, then there is nothing to do. */
+ /* If the operands already match, then there is nothing to do. */
if (operands_match_p (src, dst))
continue;
if (! set)
continue;
+ /* Note that single_set ignores parts of a parallel set for
+ which one of the destinations is REG_UNUSED. We can't
+ handle that here, since we can wind up rewriting things
+ such that a single register is set twice within a single
+ parallel. */
+ if (reg_set_p (src, insn))
+ continue;
+
/* match_no/dst must be a write-only operand, and
operand_operand/src must be a read-only operand. */
if (match.use[op_no] != READ
}
src_class = reg_preferred_class (REGNO (src));
dst_class = reg_preferred_class (REGNO (dst));
- if (! regclass_compatible_p (src_class, dst_class))
+
+ if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
{
- if (!copy_src)
- {
- copy_src = src;
- copy_dst = dst;
- }
+ /* We used to force the copy here like in other cases, but
+ it produces worse code, as it eliminates no copy
+ instructions and the copy emitted will be produced by
+ reload anyway. On patterns with multiple alternatives,
+ there may be better solution available.
+
+ In particular this change produced slower code for numeric
+ i387 programs. */
+
continue;
}
- /* Can not modify an earlier insn to set dst if this insn
- uses an old value in the source. */
- if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
+ if (! regclass_compatible_p (src_class, dst_class))
{
if (!copy_src)
{
continue;
}
- if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
+ /* Can not modify an earlier insn to set dst if this insn
+ uses an old value in the source. */
+ if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
{
if (!copy_src)
{
continue;
}
-
/* If src is set once in a different basic block,
and is set equal to a constant, then do not use
it for this optimization, as this would make it
no longer equivalent to a constant. */
- if (reg_is_remote_constant_p (src, insn, f))
+ if (reg_is_remote_constant_p (src, insn, f))
{
if (!copy_src)
{
/* If we have passed a call instruction, and the
pseudo-reg DST is not already live across a call,
then don't perform the optimization. */
- if (GET_CODE (p) == CALL_INSN)
+ if (CALL_P (p))
{
num_calls++;
}
/* If we weren't able to replace any of the alternatives, try an
- alternative appoach of copying the source to the destination. */
+ alternative approach of copying the source to the destination. */
if (!success && copy_src != NULL_RTX)
copy_src_to_dest (insn, copy_src, copy_dst, old_max_uid);
/* In fixup_match_1, some insns may have been inserted after basic block
ends. Fix that here. */
- for (i = 0; i < n_basic_blocks; i++)
+ FOR_EACH_BB (bb)
{
- rtx end = BLOCK_END (i);
+ rtx end = BB_END (bb);
rtx new = end;
rtx next = NEXT_INSN (new);
while (next != 0 && INSN_UID (next) >= old_max_uid
- && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
+ && (bb->next_bb == EXIT_BLOCK_PTR || BB_HEAD (bb->next_bb) != next))
new = next, next = NEXT_INSN (new);
- BLOCK_END (i) = new;
+ BB_END (bb) = new;
}
done:
Initialize the info in MATCHP based on the constraints. */
static int
-find_matches (insn, matchp)
- rtx insn;
- struct match *matchp;
+find_matches (rtx insn, struct match *matchp)
{
int likely_spilled[MAX_RECOG_OPERANDS];
int op_no;
if (*p == ',')
i++;
- while ((c = *p++) != '\0' && c != ',')
- switch (c)
- {
- case '=':
- break;
- case '+':
- break;
- case '&':
- matchp->early_clobber[op_no] = 1;
- break;
- case '%':
- matchp->commutative[op_no] = op_no + 1;
- matchp->commutative[op_no + 1] = op_no;
- break;
- case '0': case '1': case '2': case '3': case '4':
- case '5': case '6': case '7': case '8': case '9':
- c -= '0';
- if (c < op_no && likely_spilled[(unsigned char) c])
+ while ((c = *p) != '\0' && c != ',')
+ {
+ switch (c)
+ {
+ case '=':
break;
- matchp->with[op_no] = c;
- any_matches = 1;
- if (matchp->commutative[op_no] >= 0)
- matchp->with[matchp->commutative[op_no]] = c;
- break;
+ case '+':
+ break;
+ case '&':
+ matchp->early_clobber[op_no] = 1;
+ break;
+ case '%':
+ matchp->commutative[op_no] = op_no + 1;
+ matchp->commutative[op_no + 1] = op_no;
+ break;
+
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
+ {
+ char *end;
+ unsigned long match_ul = strtoul (p, &end, 10);
+ int match = match_ul;
+
+ p = end;
+
+ if (match < op_no && likely_spilled[match])
+ continue;
+ matchp->with[op_no] = match;
+ any_matches = 1;
+ if (matchp->commutative[op_no] >= 0)
+ matchp->with[matchp->commutative[op_no]] = match;
+ }
+ continue;
+
case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
case 'C': case 'D': case 'W': case 'Y': case 'Z':
- if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
+ if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p) ))
likely_spilled[op_no] = 1;
break;
}
+ p += CONSTRAINT_LEN (c, p);
+ }
}
return any_matches;
}
assumed to be in INSN. */
static void
-replace_in_call_usage (loc, dst_reg, src, insn)
- rtx *loc;
- int dst_reg;
- rtx src;
- rtx insn;
+replace_in_call_usage (rtx *loc, unsigned int dst_reg, rtx src, rtx insn)
{
rtx x = *loc;
enum rtx_code code;
if (! x)
return;
-
+
code = GET_CODE (x);
if (code == REG)
{
if (REGNO (x) != dst_reg)
return;
-
+
validate_change (insn, loc, src, 1);
return;
}
-
+
/* Process each of our operands recursively. */
fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
Return nonzero for success. */
static int
-fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
- match_number, regmove_dump_file)
- rtx insn, set, src, src_subreg, dst;
- int backward, operand_number, match_number;
- FILE *regmove_dump_file;
+fixup_match_1 (rtx insn, rtx set, rtx src, rtx src_subreg, rtx dst,
+ int backward, int operand_number, int match_number,
+ FILE *regmove_dump_file)
{
rtx p;
rtx post_inc = 0, post_inc_set = 0, search_end = 0;
int success = 0;
int num_calls = 0, s_num_calls = 0;
enum rtx_code code = NOTE;
- HOST_WIDE_INT insn_const = 0, newconst;
+ HOST_WIDE_INT insn_const = 0, newconst = 0;
rtx overlap = 0; /* need to move insn ? */
rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note = NULL_RTX;
int length, s_length;
- /* If SRC is marked as unchanging, we may not change it.
- ??? Maybe we could get better code by removing the unchanging bit
- instead, and changing it back if we don't succeed? */
- if (RTX_UNCHANGING_P (src))
- return 0;
-
if (! src_note)
{
/* Look for (set (regX) (op regA constX))
for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
{
- if (GET_CODE (p) == CALL_INSN)
+ if (CALL_P (p))
replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p),
REGNO (dst), src, p);
-
+
/* ??? We can't scan past the end of a basic block without updating
the register lifetime info (REG_DEAD/basic_block_live_at_start). */
if (perhaps_ends_bb_p (p))
hard register. */
&& ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
&& single_set (p)
- && GET_CODE (SET_DEST (single_set (p))) == REG
+ && REG_P (SET_DEST (single_set (p)))
&& (REGNO (SET_DEST (single_set (p)))
< FIRST_PSEUDO_REGISTER))
/* We may only emit an insn directly after P if we
/* If we have passed a call instruction, and the pseudo-reg SRC is not
already live across a call, then don't perform the optimization. */
- if (GET_CODE (p) == CALL_INSN)
+ if (CALL_P (p))
{
if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
break;
rtx notes = REG_NOTES (insn);
emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
- PUT_CODE (insn, NOTE);
- NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
- NOTE_SOURCE_FILE (insn) = 0;
+ delete_insn (insn);
/* emit_insn_after_with_line_notes has no
return value, so search for the new insn. */
insn = p;
if (note && CONSTANT_P (XEXP (note, 0)))
{
- for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
+ for (q = PREV_INSN (insn); q; q = PREV_INSN (q))
{
/* ??? We can't scan past the end of a basic block without
updating the register lifetime info
q = 0;
break;
}
- if (GET_CODE (p) == CALL_INSN)
+ if (CALL_P (p))
num_calls2++;
}
if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
&& validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
{
- PUT_CODE (q, NOTE);
- NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
- NOTE_SOURCE_FILE (q) = 0;
+ delete_insn (q);
REG_N_SETS (REGNO (src))--;
REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
{
/* ??? We can't scan past the end of a basic block without updating
the register lifetime info
- (REG_DEAD/basic_block_live_at_start). */
+ (REG_DEAD/basic_block_live_at_start). */
if (perhaps_ends_bb_p (q))
break;
else if (! INSN_P (q))
}
-/* return nonzero if X is stable and mentions no regsiters but for
+/* Return nonzero if X is stable and mentions no registers but for
mentioning SRC or mentioning / changing DST . If in doubt, presume
it is unstable.
The rationale is that we want to check if we can move an insn easily
- while just paying attention to SRC and DST. A register is considered
- stable if it has the RTX_UNCHANGING_P bit set, but that would still
- leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
- want any registers but SRC and DST. */
+ while just paying attention to SRC and DST. */
static int
-stable_and_no_regs_but_for_p (x, src, dst)
- rtx x, src, dst;
+stable_and_no_regs_but_for_p (rtx x, rtx src, rtx dst)
{
RTX_CODE code = GET_CODE (x);
switch (GET_RTX_CLASS (code))
{
- case '<': case '1': case 'c': case '2': case 'b': case '3':
+ case RTX_UNARY:
+ case RTX_BIN_ARITH:
+ case RTX_COMM_ARITH:
+ case RTX_COMPARE:
+ case RTX_COMM_COMPARE:
+ case RTX_TERNARY:
+ case RTX_BITFIELD_OPS:
{
int i;
const char *fmt = GET_RTX_FORMAT (code);
return 0;
return 1;
}
- case 'o':
+ case RTX_OBJ:
if (code == REG)
return x == src || x == dst;
/* If this is a MEM, look inside - there might be a register hidden in
if (code == MEM
&& ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst))
return 0;
- /* fall through */
+ /* Fall through. */
default:
return ! rtx_unstable_p (x);
}
}
\f
-/* Track stack adjustments and stack memory references. Attempt to
- reduce the number of stack adjustments by back-propogating across
+/* Track stack adjustments and stack memory references. Attempt to
+ reduce the number of stack adjustments by back-propagating across
the memory references.
This is intended primarily for use with targets that do not define
(e.g. x86 fp regs) which would ordinarily have to be implemented
as a sub/mov pair due to restrictions in calls.c.
- Propogation stops when any of the insns that need adjusting are
+ Propagation stops when any of the insns that need adjusting are
(a) no longer valid because we've exceeded their range, (b) a
non-trivial push instruction, or (c) a call instruction.
struct csa_memlist *next;
};
-static int stack_memref_p PARAMS ((rtx));
-static rtx single_set_for_csa PARAMS ((rtx));
-static void free_csa_memlist PARAMS ((struct csa_memlist *));
-static struct csa_memlist *record_one_stack_memref
- PARAMS ((rtx, rtx *, struct csa_memlist *));
-static int try_apply_stack_adjustment
- PARAMS ((rtx, struct csa_memlist *, HOST_WIDE_INT, HOST_WIDE_INT));
-static void combine_stack_adjustments_for_block PARAMS ((basic_block));
-static int record_stack_memrefs PARAMS ((rtx *, void *));
+static int stack_memref_p (rtx);
+static rtx single_set_for_csa (rtx);
+static void free_csa_memlist (struct csa_memlist *);
+static struct csa_memlist *record_one_stack_memref (rtx, rtx *,
+ struct csa_memlist *);
+static int try_apply_stack_adjustment (rtx, struct csa_memlist *,
+ HOST_WIDE_INT, HOST_WIDE_INT);
+static void combine_stack_adjustments_for_block (basic_block);
+static int record_stack_memrefs (rtx *, void *);
/* Main entry point for stack adjustment combination. */
void
-combine_stack_adjustments ()
+combine_stack_adjustments (void)
{
- int i;
+ basic_block bb;
- for (i = 0; i < n_basic_blocks; ++i)
- combine_stack_adjustments_for_block (BASIC_BLOCK (i));
+ FOR_EACH_BB (bb)
+ combine_stack_adjustments_for_block (bb);
}
/* Recognize a MEM of the form (sp) or (plus sp const). */
static int
-stack_memref_p (x)
- rtx x;
+stack_memref_p (rtx x)
{
- if (GET_CODE (x) != MEM)
+ if (!MEM_P (x))
return 0;
x = XEXP (x, 0);
tying fp and sp adjustments. */
static rtx
-single_set_for_csa (insn)
- rtx insn;
+single_set_for_csa (rtx insn)
{
int i;
rtx tmp = single_set (insn);
if (tmp)
return tmp;
- if (GET_CODE (insn) != INSN
+ if (!NONJUMP_INSN_P (insn)
|| GET_CODE (PATTERN (insn)) != PARALLEL)
return NULL_RTX;
/* Free the list of csa_memlist nodes. */
static void
-free_csa_memlist (memlist)
- struct csa_memlist *memlist;
+free_csa_memlist (struct csa_memlist *memlist)
{
struct csa_memlist *next;
for (; memlist ; memlist = next)
It is already known that the memory is stack_memref_p. */
static struct csa_memlist *
-record_one_stack_memref (insn, mem, next_memlist)
- rtx insn, *mem;
- struct csa_memlist *next_memlist;
+record_one_stack_memref (rtx insn, rtx *mem, struct csa_memlist *next_memlist)
{
struct csa_memlist *ml;
- ml = (struct csa_memlist *) xmalloc (sizeof (*ml));
+ ml = xmalloc (sizeof (*ml));
if (XEXP (*mem, 0) == stack_pointer_rtx)
ml->sp_offset = 0;
as each of the memories in MEMLIST. Return true on success. */
static int
-try_apply_stack_adjustment (insn, memlist, new_adjust, delta)
- rtx insn;
- struct csa_memlist *memlist;
- HOST_WIDE_INT new_adjust, delta;
+try_apply_stack_adjustment (rtx insn, struct csa_memlist *memlist, HOST_WIDE_INT new_adjust,
+ HOST_WIDE_INT delta)
{
struct csa_memlist *ml;
rtx set;
- /* We know INSN matches single_set_for_csa, because that's what we
- recognized earlier. However, if INSN is not single_set, it is
- doing double duty as a barrier for frame pointer memory accesses,
- which we are not recording. Therefore, an adjust insn that is not
- single_set may not have a positive delta applied. */
-
- if (delta > 0 && ! single_set (insn))
- return 0;
set = single_set_for_csa (insn);
validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (new_adjust), 1);
for (ml = memlist; ml ; ml = ml->next)
- {
- HOST_WIDE_INT c = ml->sp_offset - delta;
- rtx new = gen_rtx_MEM (GET_MODE (*ml->mem),
- plus_constant (stack_pointer_rtx, c));
-
- /* Don't reference memory below the stack pointer. */
- if (c < 0)
- {
- cancel_changes (0);
- return 0;
- }
-
- MEM_COPY_ATTRIBUTES (new, *ml->mem);
- validate_change (ml->insn, ml->mem, new, 1);
- }
+ validate_change
+ (ml->insn, ml->mem,
+ replace_equiv_address_nv (*ml->mem,
+ plus_constant (stack_pointer_rtx,
+ ml->sp_offset - delta)), 1);
if (apply_change_group ())
{
};
static int
-record_stack_memrefs (xp, data)
- rtx *xp;
- void *data;
+record_stack_memrefs (rtx *xp, void *data)
{
rtx x = *xp;
struct record_stack_memrefs_data *d =
if (!reg_mentioned_p (stack_pointer_rtx, x))
return -1;
/* We are not able to handle correctly all possible memrefs containing
- stack pointer, so this check is neccesary. */
+ stack pointer, so this check is necessary. */
if (stack_memref_p (x))
{
d->memlist = record_one_stack_memref (d->insn, xp, d->memlist);
}
return 1;
case REG:
- /* ??? We want be able to handle non-memory stack pointer references
- later. For now just discard all insns refering to stack pointer
- outside mem expressions. We would probably want to teach
- validate_replace to simplify expressions first. */
- if (x == stack_pointer_rtx)
+ /* ??? We want be able to handle non-memory stack pointer
+ references later. For now just discard all insns referring to
+ stack pointer outside mem expressions. We would probably
+ want to teach validate_replace to simplify expressions first.
+
+ We can't just compare with STACK_POINTER_RTX because the
+ reference to the stack pointer might be in some other mode.
+ In particular, an explicit clobber in an asm statement will
+ result in a QImode clobber. */
+ if (REGNO (x) == STACK_POINTER_REGNUM)
return 1;
break;
default:
/* Subroutine of combine_stack_adjustments, called for each basic block. */
-static void
-combine_stack_adjustments_for_block (bb)
- basic_block bb;
+static void
+combine_stack_adjustments_for_block (basic_block bb)
{
HOST_WIDE_INT last_sp_adjust = 0;
rtx last_sp_set = NULL_RTX;
struct csa_memlist *memlist = NULL;
- rtx pending_delete;
- rtx insn, next;
+ rtx insn, next, set;
struct record_stack_memrefs_data data;
+ bool end_of_block = false;
- for (insn = bb->head; ; insn = next)
+ for (insn = BB_HEAD (bb); !end_of_block ; insn = next)
{
- rtx set;
-
- pending_delete = NULL_RTX;
+ end_of_block = insn == BB_END (bb);
next = NEXT_INSN (insn);
if (! INSN_P (insn))
- goto processed;
+ continue;
set = single_set_for_csa (insn);
if (set)
{
last_sp_set = insn;
last_sp_adjust = this_adjust;
- goto processed;
+ continue;
}
/* If not all recorded memrefs can be adjusted, or the
adjustment is now too large for a constant addition,
- we cannot merge the two stack adjustments. */
- if (! try_apply_stack_adjustment (last_sp_set, memlist,
- last_sp_adjust + this_adjust,
- this_adjust))
+ we cannot merge the two stack adjustments.
+
+ Also we need to be careful to not move stack pointer
+ such that we create stack accesses outside the allocated
+ area. We can combine an allocation into the first insn,
+ or a deallocation into the second insn. We can not
+ combine an allocation followed by a deallocation.
+
+ The only somewhat frequent occurrence of the later is when
+ a function allocates a stack frame but does not use it.
+ For this case, we would need to analyze rtl stream to be
+ sure that allocated area is really unused. This means not
+ only checking the memory references, but also all registers
+ or global memory references possibly containing a stack
+ frame address.
+
+ Perhaps the best way to address this problem is to teach
+ gcc not to allocate stack for objects never used. */
+
+ /* Combine an allocation into the first instruction. */
+ if (STACK_GROWS_DOWNWARD ? this_adjust <= 0 : this_adjust >= 0)
{
- free_csa_memlist (memlist);
- memlist = NULL;
- last_sp_set = insn;
- last_sp_adjust = this_adjust;
- goto processed;
+ if (try_apply_stack_adjustment (last_sp_set, memlist,
+ last_sp_adjust + this_adjust,
+ this_adjust))
+ {
+ /* It worked! */
+ delete_insn (insn);
+ last_sp_adjust += this_adjust;
+ continue;
+ }
}
- /* It worked! */
- pending_delete = insn;
- last_sp_adjust += this_adjust;
-
- /* If, by some accident, the adjustments cancel out,
- delete both insns and start from scratch. */
- if (last_sp_adjust == 0)
+ /* Otherwise we have a deallocation. Do not combine with
+ a previous allocation. Combine into the second insn. */
+ else if (STACK_GROWS_DOWNWARD
+ ? last_sp_adjust >= 0 : last_sp_adjust <= 0)
{
- if (last_sp_set == bb->head)
- bb->head = NEXT_INSN (last_sp_set);
- flow_delete_insn (last_sp_set);
-
- free_csa_memlist (memlist);
- memlist = NULL;
- last_sp_set = NULL_RTX;
+ if (try_apply_stack_adjustment (insn, memlist,
+ last_sp_adjust + this_adjust,
+ -last_sp_adjust))
+ {
+ /* It worked! */
+ delete_insn (last_sp_set);
+ last_sp_set = insn;
+ last_sp_adjust += this_adjust;
+ free_csa_memlist (memlist);
+ memlist = NULL;
+ continue;
+ }
}
- goto processed;
+ /* Combination failed. Restart processing from here. If
+ deallocation+allocation conspired to cancel, we can
+ delete the old deallocation insn. */
+ if (last_sp_set && last_sp_adjust == 0)
+ delete_insn (insn);
+ free_csa_memlist (memlist);
+ memlist = NULL;
+ last_sp_set = insn;
+ last_sp_adjust = this_adjust;
+ continue;
}
/* Find a predecrement of exactly the previous adjustment and
turn it into a direct store. Obviously we can't do this if
there were any intervening uses of the stack pointer. */
if (memlist == NULL
- && GET_CODE (dest) == MEM
+ && MEM_P (dest)
&& ((GET_CODE (XEXP (dest, 0)) == PRE_DEC
&& (last_sp_adjust
== (HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (dest))))
&& ! reg_mentioned_p (stack_pointer_rtx, src)
&& memory_address_p (GET_MODE (dest), stack_pointer_rtx)
&& validate_change (insn, &SET_DEST (set),
- change_address (dest, VOIDmode,
- stack_pointer_rtx), 0))
+ replace_equiv_address (dest,
+ stack_pointer_rtx),
+ 0))
{
- if (last_sp_set == bb->head)
- bb->head = NEXT_INSN (last_sp_set);
- flow_delete_insn (last_sp_set);
-
+ delete_insn (last_sp_set);
free_csa_memlist (memlist);
memlist = NULL;
last_sp_set = NULL_RTX;
last_sp_adjust = 0;
- goto processed;
+ continue;
}
}
data.insn = insn;
data.memlist = memlist;
- if (GET_CODE (insn) != CALL_INSN && last_sp_set
+ if (!CALL_P (insn) && last_sp_set
&& !for_each_rtx (&PATTERN (insn), record_stack_memrefs, &data))
{
memlist = data.memlist;
- goto processed;
+ continue;
}
memlist = data.memlist;
- /* Otherwise, we were not able to process the instruction.
+ /* Otherwise, we were not able to process the instruction.
Do not continue collecting data across such a one. */
if (last_sp_set
- && (GET_CODE (insn) == CALL_INSN
+ && (CALL_P (insn)
|| reg_mentioned_p (stack_pointer_rtx, PATTERN (insn))))
{
+ if (last_sp_set && last_sp_adjust == 0)
+ delete_insn (last_sp_set);
free_csa_memlist (memlist);
memlist = NULL;
last_sp_set = NULL_RTX;
last_sp_adjust = 0;
}
-
- processed:
- if (insn == bb->end)
- break;
-
- if (pending_delete)
- flow_delete_insn (pending_delete);
}
- if (pending_delete)
- {
- bb->end = PREV_INSN (pending_delete);
- flow_delete_insn (pending_delete);
- }
+ if (last_sp_set && last_sp_adjust == 0)
+ delete_insn (last_sp_set);
}
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