/* Compute register class preferences for pseudo-registers.
Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
- 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA. */
/* This file contains two passes of the compiler: reg_scan and reg_class.
#include "config.h"
#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "hard-reg-set.h"
#include "rtl.h"
+#include "expr.h"
#include "tm_p.h"
-#include "hard-reg-set.h"
#include "flags.h"
#include "basic-block.h"
#include "regs.h"
#include "toplev.h"
#include "output.h"
#include "ggc.h"
+#include "timevar.h"
+#include "hashtab.h"
+#include "target.h"
-#ifndef REGISTER_MOVE_COST
-#define REGISTER_MOVE_COST(m, x, y) 2
-#endif
-
-static void init_reg_sets_1 PARAMS ((void));
-static void init_reg_modes PARAMS ((void));
+static void init_reg_sets_1 (void);
+static void init_reg_autoinc (void);
/* If we have auto-increment or auto-decrement and we can have secondary
reloads, we are not allowed to use classes requiring secondary
reloads for pseudos auto-incremented since reload can't handle it. */
-
-#ifdef AUTO_INC_DEC
-#if defined(SECONDARY_INPUT_RELOAD_CLASS) || defined(SECONDARY_OUTPUT_RELOAD_CLASS)
+/* We leave it to target hooks to decide if we have secondary reloads, so
+ assume that we might have them. */
+#if defined(AUTO_INC_DEC) /* */
#define FORBIDDEN_INC_DEC_CLASSES
#endif
-#endif
\f
/* Register tables used by many passes. */
/* Data for initializing the above. */
-static char initial_fixed_regs[] = FIXED_REGISTERS;
+static const char initial_fixed_regs[] = FIXED_REGISTERS;
/* Indexed by hard register number, contains 1 for registers
that are fixed use or are clobbered by function calls.
/* Data for initializing the above. */
-static char initial_call_used_regs[] = CALL_USED_REGISTERS;
-
+static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
+
+/* This is much like call_used_regs, except it doesn't have to
+ be a superset of FIXED_REGISTERS. This vector indicates
+ what is really call clobbered, and is used when defining
+ regs_invalidated_by_call. */
+
+#ifdef CALL_REALLY_USED_REGISTERS
+char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
+#endif
+
+#ifdef CALL_REALLY_USED_REGISTERS
+#define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
+#else
+#define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
+#endif
+
+
/* Indexed by hard register number, contains 1 for registers that are
fixed use or call used registers that cannot hold quantities across
calls even if we are willing to save and restore them. call fixed
and are also considered fixed. */
char global_regs[FIRST_PSEUDO_REGISTER];
-
+
+/* Contains 1 for registers that are set or clobbered by calls. */
+/* ??? Ideally, this would be just call_used_regs plus global_regs, but
+ for someone's bright idea to have call_used_regs strictly include
+ fixed_regs. Which leaves us guessing as to the set of fixed_regs
+ that are actually preserved. We know for sure that those associated
+ with the local stack frame are safe, but scant others. */
+
+HARD_REG_SET regs_invalidated_by_call;
+
/* Table of register numbers in the order in which to try to use them. */
#ifdef REG_ALLOC_ORDER
int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
/* The same information, but as an array of unsigned ints. We copy from
these unsigned ints to the table above. We do this so the tm.h files
- do not have to be aware of the wordsize for machines with <= 64 regs. */
+ do not have to be aware of the wordsize for machines with <= 64 regs.
+ Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
#define N_REG_INTS \
- ((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT)
+ ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
-static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
+static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
= REG_CLASS_CONTENTS;
/* For each reg class, number of regs it contains. */
/* For each reg class, table listing all the containing classes. */
-enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
+static enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
/* For each reg class, table listing all the classes contained in it. */
-enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
+static enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
/* For each pair of reg classes,
a largest reg class contained in their union. */
enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
-/* Array containing all of the register names. Unless
- DEBUG_REGISTER_NAMES is defined, use the copy in print-rtl.c. */
+/* Array containing all of the register names. */
-#ifdef DEBUG_REGISTER_NAMES
const char * reg_names[] = REGISTER_NAMES;
-#endif
+
+/* Array containing all of the register class names. */
+
+const char * reg_class_names[] = REG_CLASS_NAMES;
/* For each hard register, the widest mode object that it can contain.
This will be a MODE_INT mode if the register can hold integers. Otherwise
enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
+/* 1 if there is a register of given mode. */
+
+bool have_regs_of_mode [MAX_MACHINE_MODE];
+
+/* 1 if class does contain register of given mode. */
+
+static char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
+
/* Maximum cost of moving from a register in one class to a register in
another class. Based on REGISTER_MOVE_COST. */
static int forbidden_inc_dec_class[N_REG_CLASSES];
-/* Indexed by n, is non-zero if (REG n) is used in an auto-inc or auto-dec
+/* Indexed by n, is nonzero if (REG n) is used in an auto-inc or auto-dec
context. */
static char *in_inc_dec;
#endif /* FORBIDDEN_INC_DEC_CLASSES */
-#ifdef CLASS_CANNOT_CHANGE_MODE
-
-/* These are the classes containing only registers that can be used in
- a SUBREG expression that changes the mode of the register in some
- way that is illegal. */
-
-static int class_can_change_mode[N_REG_CLASSES];
-
-/* Registers, including pseudos, which change modes in some way that
- is illegal. */
-
-static regset reg_changes_mode;
-
-#endif /* CLASS_CANNOT_CHANGE_MODE */
-
-#ifdef HAVE_SECONDARY_RELOADS
-
/* Sample MEM values for use by memory_move_secondary_cost. */
-static rtx top_of_stack[MAX_MACHINE_MODE];
-
-#endif /* HAVE_SECONDARY_RELOADS */
+static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
/* Linked list of reg_info structures allocated for reg_n_info array.
Grouping all of the allocated structures together in one lump
struct reg_info_data *next; /* next set of reg_info structures */
size_t min_index; /* minimum index # */
size_t max_index; /* maximum index # */
- char used_p; /* non-zero if this has been used previously */
+ char used_p; /* nonzero if this has been used previously */
reg_info data[1]; /* beginning of the reg_info data */
};
static struct reg_info_data *reg_info_head;
/* No more global register variables may be declared; true once
- regclass has been initialized. */
+ regclass has been initialized. */
static int no_global_reg_vars = 0;
+/* Specify number of hard registers given machine mode occupy. */
+unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
/* Function called only once to initialize the above data on reg usage.
Once this is done, various switches may override. */
void
-init_reg_sets ()
+init_reg_sets (void)
{
- register int i, j;
+ int i, j;
/* First copy the register information from the initial int form into
the regsets. */
{
CLEAR_HARD_REG_SET (reg_class_contents[i]);
+ /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
- if (int_reg_class_contents[i][j / HOST_BITS_PER_INT]
- & ((unsigned) 1 << (j % HOST_BITS_PER_INT)))
+ if (int_reg_class_contents[i][j / 32]
+ & ((unsigned) 1 << (j % 32)))
SET_HARD_REG_BIT (reg_class_contents[i], j);
}
+ /* Sanity check: make sure the target macros FIXED_REGISTERS and
+ CALL_USED_REGISTERS had the right number of initializers. */
+ gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
+ gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
+
memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
memset (global_regs, 0, sizeof global_regs);
- /* Do any additional initialization regsets may need */
- INIT_ONCE_REG_SET ();
-
#ifdef REG_ALLOC_ORDER
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
inv_reg_alloc_order[reg_alloc_order[i]] = i;
`fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
static void
-init_reg_sets_1 ()
+init_reg_sets_1 (void)
{
- register unsigned int i, j;
- register unsigned int /* enum machine_mode */ m;
- char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
- char allocatable_regs_of_mode [MAX_MACHINE_MODE];
+ unsigned int i, j;
+ unsigned int /* enum machine_mode */ m;
/* This macro allows the fixed or call-used registers
and the register classes to depend on target flags. */
/* Compute number of hard regs in each class. */
- memset ((char *) reg_class_size, 0, sizeof reg_class_size);
+ memset (reg_class_size, 0, sizeof reg_class_size);
for (i = 0; i < N_REG_CLASSES; i++)
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
{
for (j = 0; j < N_REG_CLASSES; j++)
{
-#ifdef HARD_REG_SET
- register /* Declare it register if it's a scalar. */
-#endif
- HARD_REG_SET c;
- register int k;
+ HARD_REG_SET c;
+ int k;
COPY_HARD_REG_SET (c, reg_class_contents[i]);
IOR_HARD_REG_SET (c, reg_class_contents[j]);
continue;
subclass1:
- /* keep the largest subclass */ /* SPEE 900308 */
+ /* Keep the largest subclass. */ /* SPEE 900308 */
GO_IF_HARD_REG_SUBSET (reg_class_contents[k],
reg_class_contents[(int) reg_class_subunion[i][j]],
subclass2);
{
for (j = 0; j < N_REG_CLASSES; j++)
{
-#ifdef HARD_REG_SET
- register /* Declare it register if it's a scalar. */
-#endif
- HARD_REG_SET c;
- register int k;
+ HARD_REG_SET c;
+ int k;
COPY_HARD_REG_SET (c, reg_class_contents[i]);
IOR_HARD_REG_SET (c, reg_class_contents[j]);
CLEAR_HARD_REG_SET (fixed_reg_set);
CLEAR_HARD_REG_SET (call_used_reg_set);
CLEAR_HARD_REG_SET (call_fixed_reg_set);
+ CLEAR_HARD_REG_SET (regs_invalidated_by_call);
memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
+ /* call_used_regs must include fixed_regs. */
+ gcc_assert (!fixed_regs[i] || call_used_regs[i]);
+#ifdef CALL_REALLY_USED_REGISTERS
+ /* call_used_regs must include call_really_used_regs. */
+ gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
+#endif
+
if (fixed_regs[i])
SET_HARD_REG_BIT (fixed_reg_set, i);
else
SET_HARD_REG_BIT (call_fixed_reg_set, i);
if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i)))
SET_HARD_REG_BIT (losing_caller_save_reg_set, i);
+
+ /* There are a couple of fixed registers that we know are safe to
+ exclude from being clobbered by calls:
+
+ The frame pointer is always preserved across calls. The arg pointer
+ is if it is fixed. The stack pointer usually is, unless
+ RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
+ If we are generating PIC code, the PIC offset table register is
+ preserved across calls, though the target can override that. */
+
+ if (i == STACK_POINTER_REGNUM)
+ ;
+ else if (global_regs[i])
+ SET_HARD_REG_BIT (regs_invalidated_by_call, i);
+ else if (i == FRAME_POINTER_REGNUM)
+ ;
+#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ else if (i == HARD_FRAME_POINTER_REGNUM)
+ ;
+#endif
+#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
+ ;
+#endif
+#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+ else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
+ ;
+#endif
+ else if (CALL_REALLY_USED_REGNO_P (i))
+ SET_HARD_REG_BIT (regs_invalidated_by_call, i);
}
+
+ memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
- memset (allocatable_regs_of_mode, 0, sizeof (allocatable_regs_of_mode));
- for (m = 0; m < MAX_MACHINE_MODE; m++)
+ for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
for (i = 0; i < N_REG_CLASSES; i++)
- for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
- if (!fixed_regs [j] && TEST_HARD_REG_BIT (reg_class_contents[i], j)
- && HARD_REGNO_MODE_OK (j, m))
- {
- contains_reg_of_mode [i][m] = 1;
- allocatable_regs_of_mode [m] = 1;
- break;
- }
+ if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i])
+ for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
+ if (!fixed_regs [j] && TEST_HARD_REG_BIT (reg_class_contents[i], j)
+ && HARD_REGNO_MODE_OK (j, m))
+ {
+ contains_reg_of_mode [i][m] = 1;
+ have_regs_of_mode [m] = 1;
+ break;
+ }
/* Initialize the move cost table. Find every subset of each class
and take the maximum cost of moving any subset to any other. */
- for (m = 0; m < MAX_MACHINE_MODE; m++)
- if (allocatable_regs_of_mode [m])
+ for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
+ if (have_regs_of_mode [m])
{
for (i = 0; i < N_REG_CLASSES; i++)
if (contains_reg_of_mode [i][m])
}
else
{
- cost = i == j ? 2 : REGISTER_MOVE_COST (m, i, j);
+ cost = REGISTER_MOVE_COST (m, i, j);
for (p2 = ®_class_subclasses[j][0];
*p2 != LIM_REG_CLASSES;
may_move_out_cost[m][i][j] = 65536;
}
}
-
-#ifdef CLASS_CANNOT_CHANGE_MODE
- {
- HARD_REG_SET c;
- COMPL_HARD_REG_SET (c, reg_class_contents[CLASS_CANNOT_CHANGE_MODE]);
-
- for (i = 0; i < N_REG_CLASSES; i++)
- {
- GO_IF_HARD_REG_SUBSET (reg_class_contents[i], c, ok_class);
- class_can_change_mode [i] = 0;
- continue;
- ok_class:
- class_can_change_mode [i] = 1;
- }
- }
-#endif /* CLASS_CANNOT_CHANGE_MODE */
}
/* Compute the table of register modes.
These values are used to record death information for individual registers
(as opposed to a multi-register mode). */
-static void
-init_reg_modes ()
+void
+init_reg_modes_once (void)
{
- register int i;
+ int i, j;
+
+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ for (j = 0; j < MAX_MACHINE_MODE; j++)
+ hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
- reg_raw_mode[i] = choose_hard_reg_mode (i, 1);
+ reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
/* If we couldn't find a valid mode, just use the previous mode.
??? One situation in which we need to do this is on the mips where
initialize the register modes. */
void
-init_regs ()
+init_regs (void)
{
/* This finishes what was started by init_reg_sets, but couldn't be done
until after register usage was specified. */
init_reg_sets_1 ();
- init_reg_modes ();
+ init_reg_autoinc ();
+}
+
+/* Initialize some fake stack-frame MEM references for use in
+ memory_move_secondary_cost. */
-#ifdef HAVE_SECONDARY_RELOADS
+void
+init_fake_stack_mems (void)
+{
{
- /* Make some fake stack-frame MEM references for use in
- memory_move_secondary_cost. */
int i;
for (i = 0; i < MAX_MACHINE_MODE; i++)
top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx);
- ggc_add_rtx_root (top_of_stack, MAX_MACHINE_MODE);
}
-#endif
}
-#ifdef HAVE_SECONDARY_RELOADS
/* Compute extra cost of moving registers to/from memory due to reloads.
Only needed if secondary reloads are required for memory moves. */
int
-memory_move_secondary_cost (mode, class, in)
- enum machine_mode mode;
- enum reg_class class;
- int in;
+memory_move_secondary_cost (enum machine_mode mode, enum reg_class class, int in)
{
enum reg_class altclass;
int partial_cost = 0;
/* We need a memory reference to feed to SECONDARY... macros. */
- /* mem may be unused even if the SECONDARY_ macros are defined. */
+ /* mem may be unused even if the SECONDARY_ macros are defined. */
rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
- if (in)
- {
-#ifdef SECONDARY_INPUT_RELOAD_CLASS
- altclass = SECONDARY_INPUT_RELOAD_CLASS (class, mode, mem);
-#else
- altclass = NO_REGS;
-#endif
- }
- else
- {
-#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
- altclass = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, mem);
-#else
- altclass = NO_REGS;
-#endif
- }
+ altclass = secondary_reload_class (in ? 1 : 0, class, mode, mem);
if (altclass == NO_REGS)
return 0;
what it is, so MEMORY_MOVE_COST really ought not to be calling
here in that case.
- I'm tempted to put in an abort here, but returning this will
+ I'm tempted to put in an assert here, but returning this will
probably only give poor estimates, which is what we would've
had before this code anyways. */
return partial_cost;
secondary reload. */
return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
}
-#endif
/* Return a machine mode that is legitimate for hard reg REGNO and large
- enough to save nregs. If we can't find one, return VOIDmode. */
+ enough to save nregs. If we can't find one, return VOIDmode.
+ If CALL_SAVED is true, only consider modes that are call saved. */
enum machine_mode
-choose_hard_reg_mode (regno, nregs)
- unsigned int regno ATTRIBUTE_UNUSED;
- unsigned int nregs;
+choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
+ unsigned int nregs, bool call_saved)
{
+ unsigned int /* enum machine_mode */ m;
enum machine_mode found_mode = VOIDmode, mode;
/* We first look for the largest integer mode that can be validly
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
- if (HARD_REGNO_NREGS (regno, mode) == nregs
- && HARD_REGNO_MODE_OK (regno, mode))
+ if ((unsigned) hard_regno_nregs[regno][mode] == nregs
+ && HARD_REGNO_MODE_OK (regno, mode)
+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
found_mode = mode;
if (found_mode != VOIDmode)
for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
- if (HARD_REGNO_NREGS (regno, mode) == nregs
- && HARD_REGNO_MODE_OK (regno, mode))
+ if ((unsigned) hard_regno_nregs[regno][mode] == nregs
+ && HARD_REGNO_MODE_OK (regno, mode)
+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
+ found_mode = mode;
+
+ if (found_mode != VOIDmode)
+ return found_mode;
+
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ if ((unsigned) hard_regno_nregs[regno][mode] == nregs
+ && HARD_REGNO_MODE_OK (regno, mode)
+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
+ found_mode = mode;
+
+ if (found_mode != VOIDmode)
+ return found_mode;
+
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ if ((unsigned) hard_regno_nregs[regno][mode] == nregs
+ && HARD_REGNO_MODE_OK (regno, mode)
+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
found_mode = mode;
if (found_mode != VOIDmode)
return found_mode;
/* Iterate over all of the CCmodes. */
- for (mode = CCmode; mode < NUM_MACHINE_MODES; ++mode)
- if (HARD_REGNO_NREGS (regno, mode) == nregs
- && HARD_REGNO_MODE_OK (regno, mode))
- return mode;
+ for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
+ {
+ mode = (enum machine_mode) m;
+ if ((unsigned) hard_regno_nregs[regno][mode] == nregs
+ && HARD_REGNO_MODE_OK (regno, mode)
+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
+ return mode;
+ }
/* We can't find a mode valid for this register. */
return VOIDmode;
call-used register if CALL_USED. */
void
-fix_register (name, fixed, call_used)
- const char *name;
- int fixed, call_used;
+fix_register (const char *name, int fixed, int call_used)
{
int i;
static const char * const what_option[2][2] = {
{ "call-saved", "call-used" },
{ "no-such-option", "fixed" }};
-
- error ("can't use '%s' as a %s register", name,
+
+ error ("can't use '%s' as a %s register", name,
what_option[fixed][call_used]);
}
else
{
fixed_regs[i] = fixed;
call_used_regs[i] = call_used;
+#ifdef CALL_REALLY_USED_REGISTERS
+ if (fixed == 0)
+ call_really_used_regs[i] = call_used;
+#endif
}
}
else
{
- warning ("unknown register name: %s", name);
+ warning (0, "unknown register name: %s", name);
}
}
/* Mark register number I as global. */
void
-globalize_reg (i)
- int i;
+globalize_reg (int i)
{
if (fixed_regs[i] == 0 && no_global_reg_vars)
error ("global register variable follows a function definition");
if (global_regs[i])
{
- warning ("register used for two global register variables");
+ warning (0, "register used for two global register variables");
return;
}
if (call_used_regs[i] && ! fixed_regs[i])
- warning ("call-clobbered register used for global register variable");
+ warning (0, "call-clobbered register used for global register variable");
global_regs[i] = 1;
+ /* If we're globalizing the frame pointer, we need to set the
+ appropriate regs_invalidated_by_call bit, even if it's already
+ set in fixed_regs. */
+ if (i != STACK_POINTER_REGNUM)
+ SET_HARD_REG_BIT (regs_invalidated_by_call, i);
+
/* If already fixed, nothing else to do. */
if (fixed_regs[i])
return;
fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
+#ifdef CALL_REALLY_USED_REGISTERS
+ call_really_used_regs[i] = 1;
+#endif
n_non_fixed_regs--;
SET_HARD_REG_BIT (fixed_reg_set, i);
int mem_cost;
};
-/* Structure used to record preferrences of given pseudo. */
+/* Structure used to record preferences of given pseudo. */
struct reg_pref
{
/* (enum reg_class) prefclass is the preferred class. */
static struct costs init_cost;
-/* Record preferrences of each pseudo.
+/* Record preferences of each pseudo.
This is available after `regclass' is run. */
static struct reg_pref *reg_pref;
-/* Allocated buffers for reg_pref. */
+/* Allocated buffers for reg_pref. */
static struct reg_pref *reg_pref_buffer;
-/* Account for the fact that insns within a loop are executed very commonly,
- but don't keep doing this as loops go too deep. */
+/* Frequency of executions of current insn. */
-static int loop_cost;
+static int frequency;
-static rtx scan_one_insn PARAMS ((rtx, int));
-static void record_operand_costs PARAMS ((rtx, struct costs *, struct reg_pref *));
-static void dump_regclass PARAMS ((FILE *));
-static void record_reg_classes PARAMS ((int, int, rtx *, enum machine_mode *,
- const char **, rtx,
- struct costs *, struct reg_pref *));
-static int copy_cost PARAMS ((rtx, enum machine_mode,
- enum reg_class, int));
-static void record_address_regs PARAMS ((rtx, enum reg_class, int));
+static rtx scan_one_insn (rtx, int);
+static void record_operand_costs (rtx, struct costs *, struct reg_pref *);
+static void dump_regclass (FILE *);
+static void record_reg_classes (int, int, rtx *, enum machine_mode *,
+ const char **, rtx, struct costs *,
+ struct reg_pref *);
+static int copy_cost (rtx, enum machine_mode, enum reg_class, int,
+ secondary_reload_info *);
+static void record_address_regs (rtx, enum reg_class, int);
#ifdef FORBIDDEN_INC_DEC_CLASSES
-static int auto_inc_dec_reg_p PARAMS ((rtx, enum machine_mode));
+static int auto_inc_dec_reg_p (rtx, enum machine_mode);
#endif
-static void reg_scan_mark_refs PARAMS ((rtx, rtx, int, unsigned int));
+static void reg_scan_mark_refs (rtx, rtx, int, unsigned int);
/* Return the reg_class in which pseudo reg number REGNO is best allocated.
This function is sometimes called before the info has been computed.
When that happens, just return GENERAL_REGS, which is innocuous. */
enum reg_class
-reg_preferred_class (regno)
- int regno;
+reg_preferred_class (int regno)
{
if (reg_pref == 0)
return GENERAL_REGS;
}
enum reg_class
-reg_alternate_class (regno)
- int regno;
+reg_alternate_class (int regno)
{
if (reg_pref == 0)
return ALL_REGS;
/* Initialize some global data for this pass. */
void
-regclass_init ()
+regclass_init (void)
{
int i;
before regclass is run. */
reg_pref = NULL;
- /* No more global register variables may be declared. */
+ /* No more global register variables may be declared. */
no_global_reg_vars = 1;
}
\f
/* Dump register costs. */
static void
-dump_regclass (dump)
- FILE *dump;
+dump_regclass (FILE *dump)
{
- static const char *const reg_class_names[] = REG_CLASS_NAMES;
int i;
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
{
- enum reg_class class;
+ int /* enum reg_class */ class;
if (REG_N_REFS (i))
{
fprintf (dump, " Register %i costs:", i);
- for (class = 0; class < N_REG_CLASSES; class++)
- fprintf (dump, " %s:%i", reg_class_names[(int) class],
- costs[i].cost[class]);
+ for (class = 0; class < (int) N_REG_CLASSES; class++)
+ if (contains_reg_of_mode [(enum reg_class) class][PSEUDO_REGNO_MODE (i)]
+#ifdef FORBIDDEN_INC_DEC_CLASSES
+ && (!in_inc_dec[i]
+ || !forbidden_inc_dec_class[(enum reg_class) class])
+#endif
+#ifdef CANNOT_CHANGE_MODE_CLASS
+ && ! invalid_mode_change_p (i, (enum reg_class) class,
+ PSEUDO_REGNO_MODE (i))
+#endif
+ )
+ fprintf (dump, " %s:%i", reg_class_names[class],
+ costs[i].cost[(enum reg_class) class]);
fprintf (dump, " MEM:%i\n", costs[i].mem_cost);
}
}
/* Calculate the costs of insn operands. */
static void
-record_operand_costs (insn, op_costs, reg_pref)
- rtx insn;
- struct costs *op_costs;
- struct reg_pref *reg_pref;
+record_operand_costs (rtx insn, struct costs *op_costs,
+ struct reg_pref *reg_pref)
{
const char *constraints[MAX_RECOG_OPERANDS];
enum machine_mode modes[MAX_RECOG_OPERANDS];
Then handle any address registers. Finally record the desired
classes for any pseudos, doing it twice if some pair of
operands are commutative. */
-
+
for (i = 0; i < recog_data.n_operands; i++)
{
op_costs[i] = init_cost;
if (GET_CODE (recog_data.operand[i]) == SUBREG)
- {
- rtx inner = SUBREG_REG (recog_data.operand[i]);
-#ifdef CLASS_CANNOT_CHANGE_MODE
- if (GET_CODE (inner) == REG
- && CLASS_CANNOT_CHANGE_MODE_P (modes[i], GET_MODE (inner)))
- SET_REGNO_REG_SET (reg_changes_mode, REGNO (inner));
-#endif
- recog_data.operand[i] = inner;
- }
+ recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
- if (GET_CODE (recog_data.operand[i]) == MEM)
+ if (MEM_P (recog_data.operand[i]))
record_address_regs (XEXP (recog_data.operand[i], 0),
- BASE_REG_CLASS, loop_cost * 2);
- else if (constraints[i][0] == 'p')
+ MODE_BASE_REG_CLASS (modes[i]), frequency * 2);
+ else if (constraints[i][0] == 'p'
+ || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
record_address_regs (recog_data.operand[i],
- BASE_REG_CLASS, loop_cost * 2);
+ MODE_BASE_REG_CLASS (modes[i]), frequency * 2);
}
/* Check for commutative in a separate loop so everything will
xconstraints[i] = constraints[i+1];
xconstraints[i+1] = constraints[i];
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
- recog_data.operand, modes,
+ recog_data.operand, modes,
xconstraints, insn, op_costs, reg_pref);
}
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
- recog_data.operand, modes,
+ recog_data.operand, modes,
constraints, insn, op_costs, reg_pref);
}
\f
there. */
static rtx
-scan_one_insn (insn, pass)
- rtx insn;
- int pass;
+scan_one_insn (rtx insn, int pass)
{
- enum rtx_code code = GET_CODE (insn);
enum rtx_code pat_code;
rtx set, note;
int i, j;
struct costs op_costs[MAX_RECOG_OPERANDS];
- if (GET_RTX_CLASS (code) != 'i')
+ if (!INSN_P (insn))
return insn;
pat_code = GET_CODE (PATTERN (insn));
it represents a savings, rather than a cost, if the
parameter is stored in memory. Record this fact. */
- if (set != 0 && GET_CODE (SET_DEST (set)) == REG
- && GET_CODE (SET_SRC (set)) == MEM
+ if (set != 0 && REG_P (SET_DEST (set))
+ && MEM_P (SET_SRC (set))
&& (note = find_reg_note (insn, REG_EQUIV,
NULL_RTX)) != 0
- && GET_CODE (XEXP (note, 0)) == MEM)
+ && MEM_P (XEXP (note, 0)))
{
costs[REGNO (SET_DEST (set))].mem_cost
-= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set)),
GENERAL_REGS, 1)
- * loop_cost);
+ * frequency);
record_address_regs (XEXP (SET_SRC (set), 0),
- BASE_REG_CLASS, loop_cost * 2);
+ MODE_BASE_REG_CLASS (VOIDmode), frequency * 2);
return insn;
}
&& CONSTANT_P (recog_data.operand[1])
&& ! rtx_equal_p (recog_data.operand[0], recog_data.operand[1])
&& ! rtx_equal_p (recog_data.operand[0], recog_data.operand[2])
- && GET_CODE (recog_data.operand[0]) == REG
+ && REG_P (recog_data.operand[0])
&& MODES_TIEABLE_P (GET_MODE (recog_data.operand[0]),
recog_data.operand_mode[1]))
{
We need not check for code_label here;
while a basic block can start with a code_label,
INSN could not be at the beginning of that block. */
- if (previnsn == 0 || GET_CODE (previnsn) == JUMP_INSN)
+ if (previnsn == 0 || JUMP_P (previnsn))
{
- int b;
- for (b = 0; b < n_basic_blocks; b++)
- if (insn == BLOCK_HEAD (b))
- BLOCK_HEAD (b) = newinsn;
+ basic_block b;
+ FOR_EACH_BB (b)
+ if (insn == BB_HEAD (b))
+ BB_HEAD (b) = newinsn;
}
/* This makes one more setting of new insns's dest. */
REG_N_SETS (REGNO (recog_data.operand[0]))++;
+ REG_N_REFS (REGNO (recog_data.operand[0]))++;
+ REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
*recog_data.operand_loc[1] = recog_data.operand[0];
+ REG_N_REFS (REGNO (recog_data.operand[0]))++;
+ REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
for (i = recog_data.n_dups - 1; i >= 0; i--)
if (recog_data.dup_num[i] == 1)
- *recog_data.dup_loc[i] = recog_data.operand[0];
+ {
+ *recog_data.dup_loc[i] = recog_data.operand[0];
+ REG_N_REFS (REGNO (recog_data.operand[0]))++;
+ REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
+ }
return PREV_INSN (newinsn);
}
its register. */
for (i = 0; i < recog_data.n_operands; i++)
- if (GET_CODE (recog_data.operand[i]) == REG
+ if (REG_P (recog_data.operand[i])
&& REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER)
{
int regno = REGNO (recog_data.operand[i]);
struct costs *p = &costs[regno], *q = &op_costs[i];
- p->mem_cost += q->mem_cost * loop_cost;
+ p->mem_cost += q->mem_cost * frequency;
for (j = 0; j < N_REG_CLASSES; j++)
- p->cost[j] += q->cost[j] * loop_cost;
+ p->cost[j] += q->cost[j] * frequency;
}
return insn;
}
-/* This is a pass of the compiler that scans all instructions
- and calculates the preferred class for each pseudo-register.
- This information can be accessed later by calling `reg_preferred_class'.
- This pass comes just before local register allocation. */
+/* Initialize information about which register classes can be used for
+ pseudos that are auto-incremented or auto-decremented. */
-void
-regclass (f, nregs, dump)
- rtx f;
- int nregs;
- FILE *dump;
+static void
+init_reg_autoinc (void)
{
- register rtx insn;
- register int i;
- int pass;
-
- init_recog ();
-
- costs = (struct costs *) xmalloc (nregs * sizeof (struct costs));
-
-#ifdef CLASS_CANNOT_CHANGE_MODE
- reg_changes_mode = BITMAP_XMALLOC();
-#endif
-
#ifdef FORBIDDEN_INC_DEC_CLASSES
-
- in_inc_dec = (char *) xmalloc (nregs);
-
- /* Initialize information about which register classes can be used for
- pseudos that are auto-incremented or auto-decremented. It would
- seem better to put this in init_reg_sets, but we need to be able
- to allocate rtx, which we can't do that early. */
+ int i;
for (i = 0; i < N_REG_CLASSES; i++)
{
- rtx r = gen_rtx_REG (VOIDmode, 0);
+ rtx r = gen_rtx_raw_REG (VOIDmode, 0);
enum machine_mode m;
- register int j;
+ int j;
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
m = (enum machine_mode) ((int) m + 1))
if (HARD_REGNO_MODE_OK (j, m))
{
+ enum reg_class base_class = MODE_BASE_REG_CLASS (VOIDmode);
+
PUT_MODE (r, m);
/* If a register is not directly suitable for an
requires secondary reloads, disallow its class from
being used in such addresses. */
- if ((0
-#ifdef SECONDARY_RELOAD_CLASS
- || (SECONDARY_RELOAD_CLASS (BASE_REG_CLASS, m, r)
- != NO_REGS)
-#else
-#ifdef SECONDARY_INPUT_RELOAD_CLASS
- || (SECONDARY_INPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r)
- != NO_REGS)
-#endif
-#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
- || (SECONDARY_OUTPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r)
- != NO_REGS)
-#endif
-#endif
- )
+ if ((secondary_reload_class (1, base_class, m, r)
+ || secondary_reload_class (1, base_class, m, r))
&& ! auto_inc_dec_reg_p (r, m))
forbidden_inc_dec_class[i] = 1;
}
}
}
#endif /* FORBIDDEN_INC_DEC_CLASSES */
+}
+
+/* This is a pass of the compiler that scans all instructions
+ and calculates the preferred class for each pseudo-register.
+ This information can be accessed later by calling `reg_preferred_class'.
+ This pass comes just before local register allocation. */
+
+void
+regclass (rtx f, int nregs, FILE *dump)
+{
+ rtx insn;
+ int i;
+ int pass;
+
+ init_recog ();
+
+ costs = xmalloc (nregs * sizeof (struct costs));
+
+#ifdef FORBIDDEN_INC_DEC_CLASSES
+
+ in_inc_dec = xmalloc (nregs);
+
+#endif /* FORBIDDEN_INC_DEC_CLASSES */
/* Normally we scan the insns once and determine the best class to use for
each register. However, if -fexpensive_optimizations are on, we do so
for (pass = 0; pass <= flag_expensive_optimizations; pass++)
{
- int index;
+ basic_block bb;
if (dump)
- fprintf (dump, "\n\nPass %i\n\n",pass);
+ fprintf (dump, "\n\nPass %i\n\n",pass);
/* Zero out our accumulation of the cost of each class for each reg. */
- memset ((char *) costs, 0, nregs * sizeof (struct costs));
+ memset (costs, 0, nregs * sizeof (struct costs));
#ifdef FORBIDDEN_INC_DEC_CLASSES
memset (in_inc_dec, 0, nregs);
if (!optimize)
{
- loop_cost = 1;
+ frequency = REG_FREQ_MAX;
for (insn = f; insn; insn = NEXT_INSN (insn))
insn = scan_one_insn (insn, pass);
}
else
- for (index = 0; index < n_basic_blocks; index++)
+ FOR_EACH_BB (bb)
{
- basic_block bb = BASIC_BLOCK (index);
-
/* Show that an insn inside a loop is likely to be executed three
times more than insns outside a loop. This is much more
aggressive than the assumptions made elsewhere and is being
tried as an experiment. */
- if (optimize_size)
- loop_cost = 1;
- else
- loop_cost = 1 << (2 * MIN (bb->loop_depth, 5));
- for (insn = bb->head; ; insn = NEXT_INSN (insn))
+ frequency = REG_FREQ_FROM_BB (bb);
+ for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
{
insn = scan_one_insn (insn, pass);
- if (insn == bb->end)
+ if (insn == BB_END (bb))
break;
}
}
-
+
/* Now for each register look at how desirable each class is
and find which class is preferred. Store that in
`prefclass'. Record in `altclass' the largest register
class any of whose registers is better than memory. */
-
+
if (pass == 0)
reg_pref = reg_pref_buffer;
if (dump)
- {
+ {
dump_regclass (dump);
fprintf (dump,"\n");
}
for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
{
- register int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
+ int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
enum reg_class best = ALL_REGS, alt = NO_REGS;
/* This is an enum reg_class, but we call it an int
to save lots of casts. */
- register int class;
- register struct costs *p = &costs[i];
+ int class;
+ struct costs *p = &costs[i];
/* In non-optimizing compilation REG_N_REFS is not initialized
yet. */
- if (optimize && !REG_N_REFS (i))
+ if (optimize && !REG_N_REFS (i) && !REG_N_SETS (i))
continue;
for (class = (int) ALL_REGS - 1; class > 0; class--)
{
/* Ignore classes that are too small for this operand or
- invalid for a operand that was auto-incremented. */
- if (CLASS_MAX_NREGS (class, PSEUDO_REGNO_MODE (i))
- > reg_class_size[class]
+ invalid for an operand that was auto-incremented. */
+ if (!contains_reg_of_mode [class][PSEUDO_REGNO_MODE (i)]
#ifdef FORBIDDEN_INC_DEC_CLASSES
|| (in_inc_dec[i] && forbidden_inc_dec_class[class])
#endif
-#ifdef CLASS_CANNOT_CHANGE_MODE
- || (REGNO_REG_SET_P (reg_changes_mode, i)
- && ! class_can_change_mode [class])
+#ifdef CANNOT_CHANGE_MODE_CLASS
+ || invalid_mode_change_p (i, (enum reg_class) class,
+ PSEUDO_REGNO_MODE (i))
#endif
)
;
best = (enum reg_class) class;
}
else if (p->cost[class] == best_cost)
- best = reg_class_subunion[(int)best][class];
+ best = reg_class_subunion[(int) best][class];
}
/* Record the alternate register class; i.e., a class for which
#ifdef FORBIDDEN_INC_DEC_CLASSES
&& ! (in_inc_dec[i] && forbidden_inc_dec_class[class])
#endif
-#ifdef CLASS_CANNOT_CHANGE_MODE
- && ! (REGNO_REG_SET_P (reg_changes_mode, i)
- && ! class_can_change_mode [class])
+#ifdef CANNOT_CHANGE_MODE_CLASS
+ && ! invalid_mode_change_p (i, (enum reg_class) class,
+ PSEUDO_REGNO_MODE (i))
#endif
)
alt = reg_class_subunion[(int) alt][class];
-
+
/* If we don't add any classes, nothing to try. */
if (alt == best)
alt = NO_REGS;
- if (dump
+ if (dump
&& (reg_pref[i].prefclass != (int) best
|| reg_pref[i].altclass != (int) alt))
{
- static const char *const reg_class_names[] = REG_CLASS_NAMES;
fprintf (dump, " Register %i", i);
if (alt == ALL_REGS || best == ALL_REGS)
fprintf (dump, " pref %s\n", reg_class_names[(int) best]);
#ifdef FORBIDDEN_INC_DEC_CLASSES
free (in_inc_dec);
#endif
-#ifdef CLASS_CANNOT_CHANGE_MODE
- BITMAP_XFREE (reg_changes_mode);
-#endif
free (costs);
}
\f
This procedure works alternative by alternative. For each alternative
we assume that we will be able to allocate all pseudos to their ideal
register class and calculate the cost of using that alternative. Then
- we compute for each operand that is a pseudo-register, the cost of
+ we compute for each operand that is a pseudo-register, the cost of
having the pseudo allocated to each register class and using it in that
alternative. To this cost is added the cost of the alternative.
alternatives. */
static void
-record_reg_classes (n_alts, n_ops, ops, modes,
- constraints, insn, op_costs, reg_pref)
- int n_alts;
- int n_ops;
- rtx *ops;
- enum machine_mode *modes;
- const char **constraints;
- rtx insn;
- struct costs *op_costs;
- struct reg_pref *reg_pref;
+record_reg_classes (int n_alts, int n_ops, rtx *ops,
+ enum machine_mode *modes, const char **constraints,
+ rtx insn, struct costs *op_costs,
+ struct reg_pref *reg_pref)
{
int alt;
int i, j;
classes[i] = NO_REGS;
allows_mem[i] = 0;
- /* If this operand has no constraints at all, we can conclude
+ /* If this operand has no constraints at all, we can conclude
nothing about it since anything is valid. */
if (*p == 0)
{
- if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)
- memset ((char *) &this_op_costs[i], 0, sizeof this_op_costs[i]);
+ if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
+ memset (&this_op_costs[i], 0, sizeof this_op_costs[i]);
continue;
}
classes[i] = classes[j];
allows_mem[i] = allows_mem[j];
- if (GET_CODE (op) != REG || REGNO (op) < FIRST_PSEUDO_REGISTER)
+ if (!REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER)
{
/* If this matches the other operand, we have no added
cost and we win. */
operand to the register used for the other operand. */
else if (classes[j] != NO_REGS)
- alt_cost += copy_cost (op, mode, classes[j], 1), win = 1;
+ {
+ alt_cost += copy_cost (op, mode, classes[j], 1, NULL);
+ win = 1;
+ }
}
- else if (GET_CODE (ops[j]) != REG
+ else if (!REG_P (ops[j])
|| REGNO (ops[j]) < FIRST_PSEUDO_REGISTER)
{
/* This op is a pseudo but the one it matches is not. */
-
+
/* If we can't put the other operand into a register, this
alternative can't be used. */
operand. */
else
- alt_cost += copy_cost (ops[j], mode, classes[j], 1);
+ alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL);
}
else
{
+ (recog_data.operand_type[i] != OP_IN
? may_move_out_cost[mode][(int) classes[i]][class]
: 0));
-
+
/* If the alternative actually allows memory, make things
a bit cheaper since we won't need an extra insn to
load it. */
any of the constraints. Collect the valid register classes
and see if this operand accepts memory. */
- while (*p && (c = *p++) != ',')
- switch (c)
- {
- case '*':
- /* Ignore the next letter for this pass. */
- p++;
- break;
+ while ((c = *p))
+ {
+ switch (c)
+ {
+ case ',':
+ break;
+ case '*':
+ /* Ignore the next letter for this pass. */
+ c = *++p;
+ break;
- case '?':
- alt_cost += 2;
- case '!': case '#': case '&':
- case '0': case '1': case '2': case '3': case '4':
- case '5': case '6': case '7': case '8': case '9':
- break;
+ case '?':
+ alt_cost += 2;
+ case '!': case '#': case '&':
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
+ break;
- case 'p':
- allows_addr = 1;
- win = address_operand (op, GET_MODE (op));
- /* We know this operand is an address, so we want it to be
- allocated to a register that can be the base of an
- address, ie BASE_REG_CLASS. */
- classes[i]
- = reg_class_subunion[(int) classes[i]]
- [(int) BASE_REG_CLASS];
- break;
+ case 'p':
+ allows_addr = 1;
+ win = address_operand (op, GET_MODE (op));
+ /* We know this operand is an address, so we want it to be
+ allocated to a register that can be the base of an
+ address, i.e. BASE_REG_CLASS. */
+ classes[i]
+ = reg_class_subunion[(int) classes[i]]
+ [(int) MODE_BASE_REG_CLASS (VOIDmode)];
+ break;
- case 'm': case 'o': case 'V':
- /* It doesn't seem worth distinguishing between offsettable
- and non-offsettable addresses here. */
- allows_mem[i] = 1;
- if (GET_CODE (op) == MEM)
- win = 1;
- break;
+ case 'm': case 'o': case 'V':
+ /* It doesn't seem worth distinguishing between offsettable
+ and non-offsettable addresses here. */
+ allows_mem[i] = 1;
+ if (MEM_P (op))
+ win = 1;
+ break;
- case '<':
- if (GET_CODE (op) == MEM
- && (GET_CODE (XEXP (op, 0)) == PRE_DEC
- || GET_CODE (XEXP (op, 0)) == POST_DEC))
- win = 1;
- break;
+ case '<':
+ if (MEM_P (op)
+ && (GET_CODE (XEXP (op, 0)) == PRE_DEC
+ || GET_CODE (XEXP (op, 0)) == POST_DEC))
+ win = 1;
+ break;
- case '>':
- if (GET_CODE (op) == MEM
- && (GET_CODE (XEXP (op, 0)) == PRE_INC
- || GET_CODE (XEXP (op, 0)) == POST_INC))
- win = 1;
- break;
+ case '>':
+ if (MEM_P (op)
+ && (GET_CODE (XEXP (op, 0)) == PRE_INC
+ || GET_CODE (XEXP (op, 0)) == POST_INC))
+ win = 1;
+ break;
- case 'E':
-#ifndef REAL_ARITHMETIC
- /* Match any floating double constant, but only if
- we can examine the bits of it reliably. */
- if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
- || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
- && GET_MODE (op) != VOIDmode && ! flag_pretend_float)
+ case 'E':
+ case 'F':
+ if (GET_CODE (op) == CONST_DOUBLE
+ || (GET_CODE (op) == CONST_VECTOR
+ && (GET_MODE_CLASS (GET_MODE (op))
+ == MODE_VECTOR_FLOAT)))
+ win = 1;
break;
-#endif
- if (GET_CODE (op) == CONST_DOUBLE)
- win = 1;
- break;
- case 'F':
- if (GET_CODE (op) == CONST_DOUBLE)
- win = 1;
- break;
+ case 'G':
+ case 'H':
+ if (GET_CODE (op) == CONST_DOUBLE
+ && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p))
+ win = 1;
+ break;
- case 'G':
- case 'H':
- if (GET_CODE (op) == CONST_DOUBLE
- && CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
- win = 1;
- break;
+ case 's':
+ if (GET_CODE (op) == CONST_INT
+ || (GET_CODE (op) == CONST_DOUBLE
+ && GET_MODE (op) == VOIDmode))
+ break;
+ case 'i':
+ if (CONSTANT_P (op)
+ && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)))
+ win = 1;
+ break;
- case 's':
- if (GET_CODE (op) == CONST_INT
- || (GET_CODE (op) == CONST_DOUBLE
- && GET_MODE (op) == VOIDmode))
+ case 'n':
+ if (GET_CODE (op) == CONST_INT
+ || (GET_CODE (op) == CONST_DOUBLE
+ && GET_MODE (op) == VOIDmode))
+ win = 1;
break;
- case 'i':
- if (CONSTANT_P (op)
-#ifdef LEGITIMATE_PIC_OPERAND_P
- && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
-#endif
- )
- win = 1;
- break;
- case 'n':
- if (GET_CODE (op) == CONST_INT
- || (GET_CODE (op) == CONST_DOUBLE
- && GET_MODE (op) == VOIDmode))
- win = 1;
- break;
+ case 'I':
+ case 'J':
+ case 'K':
+ case 'L':
+ case 'M':
+ case 'N':
+ case 'O':
+ case 'P':
+ if (GET_CODE (op) == CONST_INT
+ && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), c, p))
+ win = 1;
+ break;
- case 'I':
- case 'J':
- case 'K':
- case 'L':
- case 'M':
- case 'N':
- case 'O':
- case 'P':
- if (GET_CODE (op) == CONST_INT
- && CONST_OK_FOR_LETTER_P (INTVAL (op), c))
+ case 'X':
win = 1;
- break;
+ break;
- case 'X':
- win = 1;
- break;
+ case 'g':
+ if (MEM_P (op)
+ || (CONSTANT_P (op)
+ && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))))
+ win = 1;
+ allows_mem[i] = 1;
+ case 'r':
+ classes[i]
+ = reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS];
+ break;
- case 'g':
- if (GET_CODE (op) == MEM
- || (CONSTANT_P (op)
-#ifdef LEGITIMATE_PIC_OPERAND_P
- && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
-#endif
- ))
- win = 1;
- allows_mem[i] = 1;
- case 'r':
- classes[i]
- = reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS];
- break;
+ default:
+ if (REG_CLASS_FROM_CONSTRAINT (c, p) != NO_REGS)
+ classes[i]
+ = reg_class_subunion[(int) classes[i]]
+ [(int) REG_CLASS_FROM_CONSTRAINT (c, p)];
+#ifdef EXTRA_CONSTRAINT_STR
+ else if (EXTRA_CONSTRAINT_STR (op, c, p))
+ win = 1;
- default:
- if (REG_CLASS_FROM_LETTER (c) != NO_REGS)
- classes[i]
- = reg_class_subunion[(int) classes[i]]
- [(int) REG_CLASS_FROM_LETTER (c)];
-#ifdef EXTRA_CONSTRAINT
- else if (EXTRA_CONSTRAINT (op, c))
- win = 1;
+ if (EXTRA_MEMORY_CONSTRAINT (c, p))
+ {
+ /* Every MEM can be reloaded to fit. */
+ allows_mem[i] = 1;
+ if (MEM_P (op))
+ win = 1;
+ }
+ if (EXTRA_ADDRESS_CONSTRAINT (c, p))
+ {
+ /* Every address can be reloaded to fit. */
+ allows_addr = 1;
+ if (address_operand (op, GET_MODE (op)))
+ win = 1;
+ /* We know this operand is an address, so we want it to
+ be allocated to a register that can be the base of an
+ address, i.e. BASE_REG_CLASS. */
+ classes[i]
+ = reg_class_subunion[(int) classes[i]]
+ [(int) MODE_BASE_REG_CLASS (VOIDmode)];
+ }
#endif
+ break;
+ }
+ p += CONSTRAINT_LEN (c, p);
+ if (c == ',')
break;
- }
+ }
constraints[i] = p;
register preferencing. If some register class is valid, compute
the costs of moving the pseudo into that class. */
- if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)
+ if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
{
if (classes[i] == NO_REGS)
{
/* We must always fail if the operand is a REG, but
we did not find a suitable class.
-
+
Otherwise we may perform an uninitialized read
from this_op_costs after the `continue' statement
below. */
the proper class, there is no cost for this alternative. */
else if (win
- || (GET_CODE (op) == REG
+ || (REG_P (op)
&& reg_fits_class_p (op, classes[i], 0, GET_MODE (op))))
;
else if (classes[i] != NO_REGS)
{
if (recog_data.operand_type[i] != OP_OUT)
- alt_cost += copy_cost (op, mode, classes[i], 1);
+ alt_cost += copy_cost (op, mode, classes[i], 1, NULL);
if (recog_data.operand_type[i] != OP_IN)
- alt_cost += copy_cost (op, mode, classes[i], 0);
+ alt_cost += copy_cost (op, mode, classes[i], 0, NULL);
}
/* The only other way this alternative can be used is if this is a
about this alternative. */
for (i = 0; i < n_ops; i++)
- if (GET_CODE (ops[i]) == REG
+ if (REG_P (ops[i])
&& REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
{
struct costs *pp = &op_costs[i], *qq = &this_op_costs[i];
and one operand is a pseudo with the other a hard reg or a pseudo
that prefers a register that is in its own register class then
we may want to adjust the cost of that register class to -1.
-
+
Avoid the adjustment if the source does not die to avoid stressing of
- register allocator by preferrencing two coliding registers into single
+ register allocator by preferrencing two colliding registers into single
class.
Also avoid the adjustment if a copy between registers of the class
if ((set = single_set (insn)) != 0
&& ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set)
- && GET_CODE (ops[0]) == REG && GET_CODE (ops[1]) == REG
+ && REG_P (ops[0]) && REG_P (ops[1])
&& find_regno_note (insn, REG_DEAD, REGNO (ops[1])))
for (i = 0; i <= 1; i++)
if (REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
enum reg_class pref = reg_pref[regno].prefclass;
if ((reg_class_size[(unsigned char) pref]
- == CLASS_MAX_NREGS (pref, mode))
+ == (unsigned) CLASS_MAX_NREGS (pref, mode))
&& REGISTER_MOVE_COST (mode, pref, pref) < 10 * 2)
op_costs[i].cost[(unsigned char) pref] = -1;
}
else if (regno < FIRST_PSEUDO_REGISTER)
for (class = 0; class < N_REG_CLASSES; class++)
if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
- && reg_class_size[class] == CLASS_MAX_NREGS (class, mode))
+ && reg_class_size[class] == (unsigned) CLASS_MAX_NREGS (class, mode))
{
if (reg_class_size[class] == 1)
op_costs[i].cost[class] = -1;
else
{
- for (nr = 0; nr < HARD_REGNO_NREGS (regno, mode); nr++)
+ for (nr = 0; nr < (unsigned) hard_regno_nregs[regno][mode]; nr++)
{
if (! TEST_HARD_REG_BIT (reg_class_contents[class],
regno + nr))
break;
}
- if (nr == HARD_REGNO_NREGS (regno,mode))
+ if (nr == (unsigned) hard_regno_nregs[regno][mode])
op_costs[i].cost[class] = -1;
}
}
}
}
\f
-/* Compute the cost of loading X into (if TO_P is non-zero) or from (if
+/* Compute the cost of loading X into (if TO_P is nonzero) or from (if
TO_P is zero) a register of class CLASS in mode MODE.
X must not be a pseudo. */
static int
-copy_cost (x, mode, class, to_p)
- rtx x;
- enum machine_mode mode ATTRIBUTE_UNUSED;
- enum reg_class class;
- int to_p ATTRIBUTE_UNUSED;
+copy_cost (rtx x, enum machine_mode mode, enum reg_class class, int to_p,
+ secondary_reload_info *prev_sri)
{
-#ifdef HAVE_SECONDARY_RELOADS
enum reg_class secondary_class = NO_REGS;
-#endif
+ secondary_reload_info sri;
/* If X is a SCRATCH, there is actually nothing to move since we are
assuming optimal allocation. */
/* Get the class we will actually use for a reload. */
class = PREFERRED_RELOAD_CLASS (x, class);
-#ifdef HAVE_SECONDARY_RELOADS
- /* If we need a secondary reload (we assume here that we are using
- the secondary reload as an intermediate, not a scratch register), the
+ /* If we need a secondary reload for an intermediate, the
cost is that to load the input into the intermediate register, then
- to copy them. We use a special value of TO_P to avoid recursion. */
+ to copy it. */
-#ifdef SECONDARY_INPUT_RELOAD_CLASS
- if (to_p == 1)
- secondary_class = SECONDARY_INPUT_RELOAD_CLASS (class, mode, x);
-#endif
-
-#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
- if (! to_p)
- secondary_class = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, x);
-#endif
+ sri.prev_sri = prev_sri;
+ sri.extra_cost = 0;
+ secondary_class = targetm.secondary_reload (to_p, x, class, mode, &sri);
if (secondary_class != NO_REGS)
return (move_cost[mode][(int) secondary_class][(int) class]
- + copy_cost (x, mode, secondary_class, 2));
-#endif /* HAVE_SECONDARY_RELOADS */
+ + sri.extra_cost
+ + copy_cost (x, mode, secondary_class, to_p, &sri));
/* For memory, use the memory move cost, for (hard) registers, use the
cost to move between the register classes, and use 2 for everything
else (constants). */
- if (GET_CODE (x) == MEM || class == NO_REGS)
- return MEMORY_MOVE_COST (mode, class, to_p);
+ if (MEM_P (x) || class == NO_REGS)
+ return sri.extra_cost + MEMORY_MOVE_COST (mode, class, to_p);
- else if (GET_CODE (x) == REG)
- return move_cost[mode][(int) REGNO_REG_CLASS (REGNO (x))][(int) class];
+ else if (REG_P (x))
+ return (sri.extra_cost
+ + move_cost[mode][(int) REGNO_REG_CLASS (REGNO (x))][(int) class]);
else
/* If this is a constant, we may eventually want to call rtx_cost here. */
- return COSTS_N_INSNS (1);
+ return sri.extra_cost + COSTS_N_INSNS (1);
}
\f
/* Record the pseudo registers we must reload into hard registers
can represent half-cost adjustments). */
static void
-record_address_regs (x, class, scale)
- rtx x;
- enum reg_class class;
- int scale;
+record_address_regs (rtx x, enum reg_class class, int scale)
{
- register enum rtx_code code = GET_CODE (x);
+ enum rtx_code code = GET_CODE (x);
switch (code)
{
{
rtx arg0 = XEXP (x, 0);
rtx arg1 = XEXP (x, 1);
- register enum rtx_code code0 = GET_CODE (arg0);
- register enum rtx_code code1 = GET_CODE (arg1);
+ enum rtx_code code0 = GET_CODE (arg0);
+ enum rtx_code code1 = GET_CODE (arg1);
/* Look inside subregs. */
if (code0 == SUBREG)
/* If index and base registers are the same on this machine, just
record registers in any non-constant operands. We assume here,
- as well as in the tests below, that all addresses are in
+ as well as in the tests below, that all addresses are in
canonical form. */
- else if (INDEX_REG_CLASS == BASE_REG_CLASS)
+ else if (INDEX_REG_CLASS == MODE_BASE_REG_CLASS (VOIDmode))
{
record_address_regs (arg0, class, scale);
if (! CONSTANT_P (arg1))
record_address_regs (arg0, INDEX_REG_CLASS, scale);
/* If both operands are registers but one is already a hard register
- of index or base class, give the other the class that the hard
- register is not. */
+ of index or reg-base class, give the other the class that the
+ hard register is not. */
-#ifdef REG_OK_FOR_BASE_P
else if (code0 == REG && code1 == REG
&& REGNO (arg0) < FIRST_PSEUDO_REGISTER
- && (REG_OK_FOR_BASE_P (arg0) || REG_OK_FOR_INDEX_P (arg0)))
+ && (REG_MODE_OK_FOR_REG_BASE_P (arg0, VOIDmode)
+ || REG_OK_FOR_INDEX_P (arg0)))
record_address_regs (arg1,
- REG_OK_FOR_BASE_P (arg0)
- ? INDEX_REG_CLASS : BASE_REG_CLASS,
+ REG_MODE_OK_FOR_REG_BASE_P (arg0, VOIDmode)
+ ? INDEX_REG_CLASS
+ : MODE_BASE_REG_REG_CLASS (VOIDmode),
scale);
else if (code0 == REG && code1 == REG
&& REGNO (arg1) < FIRST_PSEUDO_REGISTER
- && (REG_OK_FOR_BASE_P (arg1) || REG_OK_FOR_INDEX_P (arg1)))
+ && (REG_MODE_OK_FOR_REG_BASE_P (arg1, VOIDmode)
+ || REG_OK_FOR_INDEX_P (arg1)))
record_address_regs (arg0,
- REG_OK_FOR_BASE_P (arg1)
- ? INDEX_REG_CLASS : BASE_REG_CLASS,
+ REG_MODE_OK_FOR_REG_BASE_P (arg1, VOIDmode)
+ ? INDEX_REG_CLASS
+ : MODE_BASE_REG_REG_CLASS (VOIDmode),
scale);
-#endif
/* If one operand is known to be a pointer, it must be the base
with the other operand the index. Likewise if the other operand
else if ((code0 == REG && REG_POINTER (arg0))
|| code1 == MULT)
{
- record_address_regs (arg0, BASE_REG_CLASS, scale);
+ record_address_regs (arg0, MODE_BASE_REG_REG_CLASS (VOIDmode),
+ scale);
record_address_regs (arg1, INDEX_REG_CLASS, scale);
}
else if ((code1 == REG && REG_POINTER (arg1))
|| code0 == MULT)
{
record_address_regs (arg0, INDEX_REG_CLASS, scale);
- record_address_regs (arg1, BASE_REG_CLASS, scale);
+ record_address_regs (arg1, MODE_BASE_REG_REG_CLASS (VOIDmode),
+ scale);
}
/* Otherwise, count equal chances that each might be a base
else
{
- record_address_regs (arg0, BASE_REG_CLASS, scale / 2);
+ record_address_regs (arg0, MODE_BASE_REG_REG_CLASS (VOIDmode),
+ scale / 2);
record_address_regs (arg0, INDEX_REG_CLASS, scale / 2);
- record_address_regs (arg1, BASE_REG_CLASS, scale / 2);
+ record_address_regs (arg1, MODE_BASE_REG_REG_CLASS (VOIDmode),
+ scale / 2);
record_address_regs (arg1, INDEX_REG_CLASS, scale / 2);
}
}
if it ends up in the wrong place. */
case POST_MODIFY:
case PRE_MODIFY:
- record_address_regs (XEXP (x, 0), BASE_REG_CLASS, 2 * scale);
+ record_address_regs (XEXP (x, 0), MODE_BASE_REG_CLASS (VOIDmode),
+ 2 * scale);
if (REG_P (XEXP (XEXP (x, 1), 1)))
record_address_regs (XEXP (XEXP (x, 1), 1),
INDEX_REG_CLASS, 2 * scale);
show it is being used in an INC_DEC context. */
#ifdef FORBIDDEN_INC_DEC_CLASSES
- if (GET_CODE (XEXP (x, 0)) == REG
+ if (REG_P (XEXP (x, 0))
&& REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
in_inc_dec[REGNO (XEXP (x, 0))] = 1;
#endif
case REG:
{
- register struct costs *pp = &costs[REGNO (x)];
- register int i;
+ struct costs *pp = &costs[REGNO (x)];
+ int i;
pp->mem_cost += (MEMORY_MOVE_COST (Pmode, class, 1) * scale) / 2;
default:
{
- register const char *fmt = GET_RTX_FORMAT (code);
- register int i;
+ const char *fmt = GET_RTX_FORMAT (code);
+ int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
if (fmt[i] == 'e')
record_address_regs (XEXP (x, i), class, scale);
to an object of MODE. */
static int
-auto_inc_dec_reg_p (reg, mode)
- rtx reg;
- enum machine_mode mode;
+auto_inc_dec_reg_p (rtx reg, enum machine_mode mode)
{
if (HAVE_POST_INCREMENT
&& memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
/* Allocate enough space to hold NUM_REGS registers for the tables used for
reg_scan and flow_analysis that are indexed by the register number. If
- NEW_P is non zero, initialize all of the registers, otherwise only
+ NEW_P is nonzero, initialize all of the registers, otherwise only
initialize the new registers allocated. The same table is kept from
function to function, only reallocating it when we need more room. If
- RENUMBER_P is non zero, allocate the reg_renumber array also. */
+ RENUMBER_P is nonzero, allocate the reg_renumber array also. */
void
-allocate_reg_info (num_regs, new_p, renumber_p)
- size_t num_regs;
- int new_p;
- int renumber_p;
+allocate_reg_info (size_t num_regs, int new_p, int renumber_p)
{
size_t size_info;
size_t size_renumber;
{
size_t old_allocated = regno_allocated;
- regno_allocated = num_regs + (num_regs / 20); /* add some slop space */
+ regno_allocated = num_regs + (num_regs / 20); /* Add some slop space. */
size_renumber = regno_allocated * sizeof (short);
if (!reg_n_info)
{
VARRAY_REG_INIT (reg_n_info, regno_allocated, "reg_n_info");
- renumber = (short *) xmalloc (size_renumber);
- reg_pref_buffer = (struct reg_pref *) xmalloc (regno_allocated
- * sizeof (struct reg_pref));
+ renumber = xmalloc (size_renumber);
+ reg_pref_buffer = xmalloc (regno_allocated
+ * sizeof (struct reg_pref));
}
-
else
{
VARRAY_GROW (reg_n_info, regno_allocated);
- if (new_p) /* if we're zapping everything, no need to realloc */
+ if (new_p) /* If we're zapping everything, no need to realloc. */
{
- free ((char *)renumber);
- free ((char *)reg_pref);
- renumber = (short *) xmalloc (size_renumber);
- reg_pref_buffer = (struct reg_pref *) xmalloc (regno_allocated
- * sizeof (struct reg_pref));
+ free ((char *) renumber);
+ free ((char *) reg_pref);
+ renumber = xmalloc (size_renumber);
+ reg_pref_buffer = xmalloc (regno_allocated
+ * sizeof (struct reg_pref));
}
else
{
- renumber = (short *) xrealloc ((char *)renumber, size_renumber);
- reg_pref_buffer = (struct reg_pref *) xrealloc ((char *)reg_pref_buffer,
- regno_allocated
- * sizeof (struct reg_pref));
+ renumber = xrealloc (renumber, size_renumber);
+ reg_pref_buffer = xrealloc (reg_pref_buffer,
+ regno_allocated
+ * sizeof (struct reg_pref));
}
}
size_info = (regno_allocated - old_allocated) * sizeof (reg_info)
+ sizeof (struct reg_info_data) - sizeof (reg_info);
- reg_data = (struct reg_info_data *) xcalloc (size_info, 1);
+ reg_data = xcalloc (size_info, 1);
reg_data->min_index = old_allocated;
reg_data->max_index = regno_allocated - 1;
reg_data->next = reg_info_head;
{
/* Loop through each of the segments allocated for the actual
reg_info pages, and set up the pointers, zero the pages, etc. */
- for (reg_data = reg_info_head;
+ for (reg_data = reg_info_head;
reg_data && reg_data->max_index >= min;
reg_data = reg_data->next)
{
if (!reg_data->used_p) /* page just allocated with calloc */
reg_data->used_p = 1; /* no need to zero */
else
- memset ((char *) ®_data->data[local_min], 0,
- sizeof (reg_info) * (max - min_index - local_min + 1));
+ memset (®_data->data[local_min], 0,
+ sizeof (reg_info) * (max - min_index - local_min + 1));
for (i = min_index+local_min; i <= max; i++)
{
if (renumber_p)
reg_renumber = renumber;
-
- /* Tell the regset code about the new number of registers */
- MAX_REGNO_REG_SET (num_regs, new_p, renumber_p);
}
/* Free up the space allocated by allocate_reg_info. */
void
-free_reg_info ()
+free_reg_info (void)
{
if (reg_n_info)
{
for (reg_data = reg_info_head; reg_data; reg_data = reg_next)
{
reg_next = reg_data->next;
- free ((char *)reg_data);
+ free ((char *) reg_data);
}
free (reg_pref_buffer);
- reg_pref_buffer = (struct reg_pref *)0;
- reg_info_head = (struct reg_info_data *)0;
- renumber = (short *)0;
+ reg_pref_buffer = (struct reg_pref *) 0;
+ reg_info_head = (struct reg_info_data *) 0;
+ renumber = (short *) 0;
}
regno_allocated = 0;
reg_n_max = 0;
int max_parallel;
-/* Used as a temporary to record the largest number of registers in
+/* Used as a temporary to record the largest number of registers in
PARALLEL in a SET_DEST. This is added to max_parallel. */
static int max_set_parallel;
void
-reg_scan (f, nregs, repeat)
- rtx f;
- unsigned int nregs;
- int repeat ATTRIBUTE_UNUSED;
+reg_scan (rtx f, unsigned int nregs)
{
- register rtx insn;
+ rtx insn;
+
+ timevar_push (TV_REG_SCAN);
allocate_reg_info (nregs, TRUE, FALSE);
max_parallel = 3;
max_set_parallel = 0;
for (insn = f; insn; insn = NEXT_INSN (insn))
- if (GET_CODE (insn) == INSN
- || GET_CODE (insn) == CALL_INSN
- || GET_CODE (insn) == JUMP_INSN)
+ if (INSN_P (insn))
{
- if (GET_CODE (PATTERN (insn)) == PARALLEL
- && XVECLEN (PATTERN (insn), 0) > max_parallel)
- max_parallel = XVECLEN (PATTERN (insn), 0);
- reg_scan_mark_refs (PATTERN (insn), insn, 0, 0);
+ rtx pat = PATTERN (insn);
+ if (GET_CODE (pat) == PARALLEL
+ && XVECLEN (pat, 0) > max_parallel)
+ max_parallel = XVECLEN (pat, 0);
+ reg_scan_mark_refs (pat, insn, 0, 0);
if (REG_NOTES (insn))
reg_scan_mark_refs (REG_NOTES (insn), insn, 1, 0);
}
max_parallel += max_set_parallel;
+
+ timevar_pop (TV_REG_SCAN);
}
/* Update 'regscan' information by looking at the insns
such a REG. We only update information for those. */
void
-reg_scan_update (first, last, old_max_regno)
- rtx first;
- rtx last;
- unsigned int old_max_regno;
+reg_scan_update (rtx first, rtx last, unsigned int old_max_regno)
{
- register rtx insn;
+ rtx insn;
allocate_reg_info (max_reg_num (), FALSE, FALSE);
for (insn = first; insn != last; insn = NEXT_INSN (insn))
- if (GET_CODE (insn) == INSN
- || GET_CODE (insn) == CALL_INSN
- || GET_CODE (insn) == JUMP_INSN)
+ if (INSN_P (insn))
{
- if (GET_CODE (PATTERN (insn)) == PARALLEL
- && XVECLEN (PATTERN (insn), 0) > max_parallel)
- max_parallel = XVECLEN (PATTERN (insn), 0);
- reg_scan_mark_refs (PATTERN (insn), insn, 0, old_max_regno);
+ rtx pat = PATTERN (insn);
+ if (GET_CODE (pat) == PARALLEL
+ && XVECLEN (pat, 0) > max_parallel)
+ max_parallel = XVECLEN (pat, 0);
+ reg_scan_mark_refs (pat, insn, 0, old_max_regno);
if (REG_NOTES (insn))
reg_scan_mark_refs (REG_NOTES (insn), insn, 1, old_max_regno);
greater than or equal to MIN_REGNO. */
static void
-reg_scan_mark_refs (x, insn, note_flag, min_regno)
- rtx x;
- rtx insn;
- int note_flag;
- unsigned int min_regno;
+reg_scan_mark_refs (rtx x, rtx insn, int note_flag, unsigned int min_regno)
{
- register enum rtx_code code;
- register rtx dest;
- register rtx note;
+ enum rtx_code code;
+ rtx dest;
+ rtx note;
+ if (!x)
+ return;
code = GET_CODE (x);
switch (code)
{
case CONST:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case CC0:
case PC:
case SYMBOL_REF:
if (regno >= min_regno)
{
- REGNO_LAST_NOTE_UID (regno) = INSN_UID (insn);
if (!note_flag)
REGNO_LAST_UID (regno) = INSN_UID (insn);
if (REGNO_FIRST_UID (regno) == 0)
REGNO_FIRST_UID (regno) = INSN_UID (insn);
+ /* If we are called by reg_scan_update() (indicated by min_regno
+ being set), we also need to update the reference count. */
+ if (min_regno)
+ REG_N_REFS (regno)++;
}
}
break;
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag, min_regno);
break;
+ case CLOBBER:
+ {
+ rtx reg = XEXP (x, 0);
+ if (REG_P (reg)
+ && REGNO (reg) >= min_regno)
+ {
+ REG_N_SETS (REGNO (reg))++;
+ REG_N_REFS (REGNO (reg))++;
+ }
+ else if (MEM_P (reg))
+ reg_scan_mark_refs (XEXP (reg, 0), insn, note_flag, min_regno);
+ }
+ break;
+
case SET:
/* Count a set of the destination if it is a register. */
for (dest = SET_DEST (x);
if (GET_CODE (dest) == PARALLEL)
max_set_parallel = MAX (max_set_parallel, XVECLEN (dest, 0) - 1);
- if (GET_CODE (dest) == REG
+ if (REG_P (dest)
&& REGNO (dest) >= min_regno)
- REG_N_SETS (REGNO (dest))++;
+ {
+ REG_N_SETS (REGNO (dest))++;
+ REG_N_REFS (REGNO (dest))++;
+ }
/* If this is setting a pseudo from another pseudo or the sum of a
pseudo and a constant integer and the other pseudo is known to be
Likewise if it is setting the destination from an address or from a
value equivalent to an address or to the sum of an address and
something else.
-
+
But don't do any of this if the pseudo corresponds to a user
variable since it should have already been set as a pointer based
on the type. */
- if (GET_CODE (SET_DEST (x)) == REG
+ if (REG_P (SET_DEST (x))
&& REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
&& REGNO (SET_DEST (x)) >= min_regno
/* If the destination pseudo is set more than once, then other
sets might not be to a pointer value (consider access to a
- union in two threads of control in the presense of global
+ union in two threads of control in the presence of global
optimizations). So only set REG_POINTER on the destination
pseudo if this is the only set of that pseudo. */
&& REG_N_SETS (REGNO (SET_DEST (x))) == 1
&& ! REG_USERVAR_P (SET_DEST (x))
&& ! REG_POINTER (SET_DEST (x))
- && ((GET_CODE (SET_SRC (x)) == REG
+ && ((REG_P (SET_SRC (x))
&& REG_POINTER (SET_SRC (x)))
|| ((GET_CODE (SET_SRC (x)) == PLUS
|| GET_CODE (SET_SRC (x)) == LO_SUM)
&& GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
- && GET_CODE (XEXP (SET_SRC (x), 0)) == REG
+ && REG_P (XEXP (SET_SRC (x), 0))
&& REG_POINTER (XEXP (SET_SRC (x), 0)))
|| GET_CODE (SET_SRC (x)) == CONST
|| GET_CODE (SET_SRC (x)) == SYMBOL_REF
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
REG_POINTER (SET_DEST (x)) = 1;
+ /* If this is setting a register from a register or from a simple
+ conversion of a register, propagate REG_EXPR. */
+ if (REG_P (dest))
+ {
+ rtx src = SET_SRC (x);
+
+ while (GET_CODE (src) == SIGN_EXTEND
+ || GET_CODE (src) == ZERO_EXTEND
+ || GET_CODE (src) == TRUNCATE
+ || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
+ src = XEXP (src, 0);
+
+ if (!REG_ATTRS (dest) && REG_P (src))
+ REG_ATTRS (dest) = REG_ATTRS (src);
+ if (!REG_ATTRS (dest) && MEM_P (src))
+ set_reg_attrs_from_mem (dest, src);
+ }
+
/* ... fall through ... */
default:
{
- register const char *fmt = GET_RTX_FORMAT (code);
- register int i;
+ const char *fmt = GET_RTX_FORMAT (code);
+ int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
reg_scan_mark_refs (XEXP (x, i), insn, note_flag, min_regno);
else if (fmt[i] == 'E' && XVEC (x, i) != 0)
{
- register int j;
+ int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag, min_regno);
}
is also in C2. */
int
-reg_class_subset_p (c1, c2)
- register enum reg_class c1;
- register enum reg_class c2;
+reg_class_subset_p (enum reg_class c1, enum reg_class c2)
{
if (c1 == c2) return 1;
if (c2 == ALL_REGS)
win:
return 1;
- GO_IF_HARD_REG_SUBSET (reg_class_contents[(int)c1],
- reg_class_contents[(int)c2],
+ GO_IF_HARD_REG_SUBSET (reg_class_contents[(int) c1],
+ reg_class_contents[(int) c2],
win);
return 0;
}
/* Return nonzero if there is a register that is in both C1 and C2. */
int
-reg_classes_intersect_p (c1, c2)
- register enum reg_class c1;
- register enum reg_class c2;
+reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
{
-#ifdef HARD_REG_SET
- register
-#endif
- HARD_REG_SET c;
+ HARD_REG_SET c;
if (c1 == c2) return 1;
return 0;
}
-/* Release any memory allocated by register sets. */
+#ifdef CANNOT_CHANGE_MODE_CLASS
+
+struct subregs_of_mode_node
+{
+ unsigned int block;
+ unsigned char modes[MAX_MACHINE_MODE];
+};
+
+static htab_t subregs_of_mode;
+
+static hashval_t
+som_hash (const void *x)
+{
+ const struct subregs_of_mode_node *a = x;
+ return a->block;
+}
+
+static int
+som_eq (const void *x, const void *y)
+{
+ const struct subregs_of_mode_node *a = x;
+ const struct subregs_of_mode_node *b = y;
+ return a->block == b->block;
+}
void
-regset_release_memory ()
+init_subregs_of_mode (void)
{
- bitmap_release_memory ();
+ if (subregs_of_mode)
+ htab_empty (subregs_of_mode);
+ else
+ subregs_of_mode = htab_create (100, som_hash, som_eq, free);
}
+
+void
+record_subregs_of_mode (rtx subreg)
+{
+ struct subregs_of_mode_node dummy, *node;
+ enum machine_mode mode;
+ unsigned int regno;
+ void **slot;
+
+ if (!REG_P (SUBREG_REG (subreg)))
+ return;
+
+ regno = REGNO (SUBREG_REG (subreg));
+ mode = GET_MODE (subreg);
+
+ if (regno < FIRST_PSEUDO_REGISTER)
+ return;
+
+ dummy.block = regno & -8;
+ slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
+ dummy.block, INSERT);
+ node = *slot;
+ if (node == NULL)
+ {
+ node = xcalloc (1, sizeof (*node));
+ node->block = regno & -8;
+ *slot = node;
+ }
+
+ node->modes[mode] |= 1 << (regno & 7);
+}
+
+/* Set bits in *USED which correspond to registers which can't change
+ their mode from FROM to any mode in which REGNO was encountered. */
+
+void
+cannot_change_mode_set_regs (HARD_REG_SET *used, enum machine_mode from,
+ unsigned int regno)
+{
+ struct subregs_of_mode_node dummy, *node;
+ enum machine_mode to;
+ unsigned char mask;
+ unsigned int i;
+
+ dummy.block = regno & -8;
+ node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
+ if (node == NULL)
+ return;
+
+ mask = 1 << (regno & 7);
+ for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
+ if (node->modes[to] & mask)
+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ if (!TEST_HARD_REG_BIT (*used, i)
+ && REG_CANNOT_CHANGE_MODE_P (i, from, to))
+ SET_HARD_REG_BIT (*used, i);
+}
+
+/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
+ mode. */
+
+bool
+invalid_mode_change_p (unsigned int regno, enum reg_class class,
+ enum machine_mode from)
+{
+ struct subregs_of_mode_node dummy, *node;
+ enum machine_mode to;
+ unsigned char mask;
+
+ dummy.block = regno & -8;
+ node = htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
+ if (node == NULL)
+ return false;
+
+ mask = 1 << (regno & 7);
+ for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
+ if (node->modes[to] & mask)
+ if (CANNOT_CHANGE_MODE_CLASS (from, to, class))
+ return true;
+
+ return false;
+}
+#endif /* CANNOT_CHANGE_MODE_CLASS */
+
+#include "gt-regclass.h"
OSDN Git Service
