* config/cris/predicates.md: New file.

[pf3gnuchains/gcc-fork.git] / gcc / postreload.c

diff --git a/gcc/postreload.c b/gcc/postreload.c
index 3b15118..16cb818 100644 (file)
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -1,6 +1,6 @@
 /* Perform simple optimizations to clean up the result of reload.
    Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-   1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+   1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
 
 This file is part of GCC.
 
@@ -118,6 +118,19 @@ reload_cse_simplify (rtx insn, rtx testreg)
       int count = 0;
       rtx value = NULL_RTX;
 
+      /* Registers mentioned in the clobber list for an asm cannot be reused
+        within the body of the asm.  Invalidate those registers now so that
+        we don't try to substitute values for them.  */
+      if (asm_noperands (body) >= 0)
+       {
+         for (i = XVECLEN (body, 0) - 1; i >= 0; --i)
+           {
+             rtx part = XVECEXP (body, 0, i);
+             if (GET_CODE (part) == CLOBBER && REG_P (XEXP (part, 0)))
+               cselib_invalidate_rtx (XEXP (part, 0));
+           }
+       }
+
       /* If every action in a PARALLEL is a noop, we can delete
         the entire PARALLEL.  */
       for (i = XVECLEN (body, 0) - 1; i >= 0; --i)
@@ -280,7 +293,7 @@ reload_cse_simplify_set (rtx set, rtx insn)
                  if (this_val == trunc_int_for_mode (this_val, GET_MODE (src)))
                    break;
                default:
-                 abort ();
+                 gcc_unreachable ();
                }
              this_rtx = GEN_INT (this_val);
            }
@@ -414,7 +427,7 @@ reload_cse_simplify_operands (rtx insn, rtx testreg)
             extension.  Punt on this for now.  */
          if (! set)
            continue;
-         /* If the destination is a also MEM or a STRICT_LOW_PART, no
+         /* If the destination is also a MEM or a STRICT_LOW_PART, no
             extension applies.
             Also, if there is an explicit extension, we don't have to
             worry about an implicit one.  */
@@ -992,11 +1005,9 @@ reload_combine_note_store (rtx dst, rtx set, void *data ATTRIBUTE_UNUSED)
 
   /* note_stores might have stripped a STRICT_LOW_PART, so we have to be
      careful with registers / register parts that are not full words.
-
-     Similarly for ZERO_EXTRACT and SIGN_EXTRACT.  */
+     Similarly for ZERO_EXTRACT.  */
   if (GET_CODE (set) != SET
       || GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
-      || GET_CODE (SET_DEST (set)) == SIGN_EXTRACT
       || GET_CODE (SET_DEST (set)) == STRICT_LOW_PART)
     {
       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
@@ -1057,8 +1068,7 @@ reload_combine_note_use (rtx *xp, rtx insn)
       if (REG_P (SET_DEST (x)))
        {
          /* No spurious CLOBBERs of pseudo registers may remain.  */
-         if (REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
-           abort ();
+         gcc_assert (REGNO (SET_DEST (x)) < FIRST_PSEUDO_REGISTER);
          return;
        }
       break;
@@ -1078,8 +1088,7 @@ reload_combine_note_use (rtx *xp, rtx insn)
        int nregs;
 
        /* No spurious USEs of pseudo registers may remain.  */
-       if (regno >= FIRST_PSEUDO_REGISTER)
-         abort ();
+       gcc_assert (regno < FIRST_PSEUDO_REGISTER);
 
        nregs = hard_regno_nregs[regno][GET_MODE (x)];
 
@@ -1233,10 +1242,8 @@ reload_cse_move2add (rtx first)
 
              if (GET_CODE (src) == CONST_INT && reg_base_reg[regno] < 0)
                {
-                 rtx new_src =
-                   GEN_INT (trunc_int_for_mode (INTVAL (src)
-                                                - reg_offset[regno],
-                                                GET_MODE (reg)));
+                 rtx new_src = gen_int_mode (INTVAL (src) - reg_offset[regno],
+                                             GET_MODE (reg));
                  /* (set (reg) (plus (reg) (const_int 0))) is not canonical;
                     use (set (reg) (reg)) instead.
                     We don't delete this insn, nor do we convert it into a
@@ -1273,9 +1280,8 @@ reload_cse_move2add (rtx first)
                            {
                              rtx narrow_reg = gen_rtx_REG (narrow_mode,
                                                            REGNO (reg));
-                             rtx narrow_src =
-                               GEN_INT (trunc_int_for_mode (INTVAL (src),
-                                                            narrow_mode));
+                             rtx narrow_src = gen_int_mode (INTVAL (src),
+                                                            narrow_mode);
                              rtx new_set =
                                gen_rtx_SET (VOIDmode,
                                             gen_rtx_STRICT_LOW_PART (VOIDmode,
@@ -1324,10 +1330,10 @@ reload_cse_move2add (rtx first)
                      HOST_WIDE_INT base_offset = reg_offset[REGNO (src)];
                      HOST_WIDE_INT regno_offset = reg_offset[regno];
                      rtx new_src =
-                       GEN_INT (trunc_int_for_mode (added_offset
-                                                    + base_offset
-                                                    - regno_offset,
-                                                    GET_MODE (reg)));
+                       gen_int_mode (added_offset
+                                     + base_offset
+                                     - regno_offset,
+                                     GET_MODE (reg));
                      int success = 0;
 
                      if (new_src == const0_rtx)
@@ -1375,13 +1381,14 @@ reload_cse_move2add (rtx first)
 
       /* If INSN is a conditional branch, we try to extract an
         implicit set out of it.  */
-      if (any_condjump_p (insn) && onlyjump_p (insn))
+      if (any_condjump_p (insn))
        {
          rtx cnd = fis_get_condition (insn);
 
          if (cnd != NULL_RTX
              && GET_CODE (cnd) == NE
              && REG_P (XEXP (cnd, 0))
+             && !reg_set_p (XEXP (cnd, 0), insn)
              /* The following two checks, which are also in
                 move2add_note_store, are intended to reduce the
                 number of calls to gen_rtx_SET to avoid memory
@@ -1445,10 +1452,9 @@ move2add_note_store (rtx dst, rtx set, void *data ATTRIBUTE_UNUSED)
 
   regno += REGNO (dst);
 
-  if (SCALAR_INT_MODE_P (mode)
+  if (SCALAR_INT_MODE_P (GET_MODE (dst))
       && hard_regno_nregs[regno][mode] == 1 && GET_CODE (set) == SET
       && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT
-      && GET_CODE (SET_DEST (set)) != SIGN_EXTRACT
       && GET_CODE (SET_DEST (set)) != STRICT_LOW_PART)
     {
       rtx src = SET_SRC (set);