/* Expand the basic unary and binary arithmetic operations, for GNU compiler.
Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
- Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
+ 2011 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 2, or (at your option) any later
+Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to the Free
-Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
-02110-1301, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
-#include "toplev.h"
+#include "diagnostic-core.h"
/* Include insn-config.h before expr.h so that HAVE_conditional_move
is properly defined. */
#include "recog.h"
#include "reload.h"
#include "ggc.h"
-#include "real.h"
#include "basic-block.h"
#include "target.h"
-/* Each optab contains info on how this target machine
- can perform a particular operation
- for all sizes and kinds of operands.
+struct target_optabs default_target_optabs;
+struct target_libfuncs default_target_libfuncs;
+#if SWITCHABLE_TARGET
+struct target_optabs *this_target_optabs = &default_target_optabs;
+struct target_libfuncs *this_target_libfuncs = &default_target_libfuncs;
+#endif
- The operation to be performed is often specified
- by passing one of these optabs as an argument.
+#define libfunc_hash \
+ (this_target_libfuncs->x_libfunc_hash)
- See expr.h for documentation of these optabs. */
+/* Contains the optab used for each rtx code. */
+optab code_to_optab[NUM_RTX_CODE + 1];
-optab optab_table[OTI_MAX];
+static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
+ enum machine_mode *);
+static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
-rtx libfunc_table[LTI_MAX];
+/* Debug facility for use in GDB. */
+void debug_optab_libfuncs (void);
-/* Tables of patterns for converting one mode to another. */
-convert_optab convert_optab_table[COI_MAX];
+/* Prefixes for the current version of decimal floating point (BID vs. DPD) */
+#if ENABLE_DECIMAL_BID_FORMAT
+#define DECIMAL_PREFIX "bid_"
+#else
+#define DECIMAL_PREFIX "dpd_"
+#endif
+\f
+/* Used for libfunc_hash. */
-/* Contains the optab used for each rtx code. */
-optab code_to_optab[NUM_RTX_CODE + 1];
+static hashval_t
+hash_libfunc (const void *p)
+{
+ const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
-/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
- gives the gen_function to make a branch to test that condition. */
+ return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
+ ^ e->optab);
+}
-rtxfun bcc_gen_fctn[NUM_RTX_CODE];
+/* Used for libfunc_hash. */
-/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
- gives the insn code to make a store-condition insn
- to test that condition. */
+static int
+eq_libfunc (const void *p, const void *q)
+{
+ const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
+ const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
-enum insn_code setcc_gen_code[NUM_RTX_CODE];
+ return (e1->optab == e2->optab
+ && e1->mode1 == e2->mode1
+ && e1->mode2 == e2->mode2);
+}
-#ifdef HAVE_conditional_move
-/* Indexed by the machine mode, gives the insn code to make a conditional
- move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
- setcc_gen_code to cut down on the number of named patterns. Consider a day
- when a lot more rtx codes are conditional (eg: for the ARM). */
+/* Return libfunc corresponding operation defined by OPTAB converting
+ from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
+ if no libfunc is available. */
+rtx
+convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
+ enum machine_mode mode2)
+{
+ struct libfunc_entry e;
+ struct libfunc_entry **slot;
-enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
-#endif
+ e.optab = (size_t) (optab - &convert_optab_table[0]);
+ e.mode1 = mode1;
+ e.mode2 = mode2;
+ slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
+ if (!slot)
+ {
+ if (optab->libcall_gen)
+ {
+ optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
+ slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
+ if (slot)
+ return (*slot)->libfunc;
+ else
+ return NULL;
+ }
+ return NULL;
+ }
+ return (*slot)->libfunc;
+}
-/* Indexed by the machine mode, gives the insn code for vector conditional
- operation. */
-
-enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
-enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
-
-/* The insn generating function can not take an rtx_code argument.
- TRAP_RTX is used as an rtx argument. Its code is replaced with
- the code to be used in the trap insn and all other fields are ignored. */
-static GTY(()) rtx trap_rtx;
-
-static int add_equal_note (rtx, rtx, enum rtx_code, rtx, rtx);
-static rtx widen_operand (rtx, enum machine_mode, enum machine_mode, int,
- int);
-static void prepare_cmp_insn (rtx *, rtx *, enum rtx_code *, rtx,
- enum machine_mode *, int *,
- enum can_compare_purpose);
-static enum insn_code can_fix_p (enum machine_mode, enum machine_mode, int,
- int *);
-static enum insn_code can_float_p (enum machine_mode, enum machine_mode, int);
-static optab new_optab (void);
-static convert_optab new_convert_optab (void);
-static inline optab init_optab (enum rtx_code);
-static inline optab init_optabv (enum rtx_code);
-static inline convert_optab init_convert_optab (enum rtx_code);
-static void init_libfuncs (optab, int, int, const char *, int);
-static void init_integral_libfuncs (optab, const char *, int);
-static void init_floating_libfuncs (optab, const char *, int);
-static void init_interclass_conv_libfuncs (convert_optab, const char *,
- enum mode_class, enum mode_class);
-static void init_intraclass_conv_libfuncs (convert_optab, const char *,
- enum mode_class, bool);
-static void emit_cmp_and_jump_insn_1 (rtx, rtx, enum machine_mode,
- enum rtx_code, int, rtx);
-static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
- enum machine_mode *, int *);
-static rtx widen_clz (enum machine_mode, rtx, rtx);
-static rtx expand_parity (enum machine_mode, rtx, rtx);
-static enum rtx_code get_rtx_code (enum tree_code, bool);
-static rtx vector_compare_rtx (tree, bool, enum insn_code);
-
-/* Current libcall id. It doesn't matter what these are, as long
- as they are unique to each libcall that is emitted. */
-static HOST_WIDE_INT libcall_id = 0;
-
-#ifndef HAVE_conditional_trap
-#define HAVE_conditional_trap 0
-#define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX)
-#endif
+/* Return libfunc corresponding operation defined by OPTAB in MODE.
+ Trigger lazy initialization if needed, return NULL if no libfunc is
+ available. */
+rtx
+optab_libfunc (optab optab, enum machine_mode mode)
+{
+ struct libfunc_entry e;
+ struct libfunc_entry **slot;
-/* Prefixes for the current version of decimal floating point (BID vs. DPD) */
-#if ENABLE_DECIMAL_BID_FORMAT
-#define DECIMAL_PREFIX "bid_"
-#else
-#define DECIMAL_PREFIX "dpd_"
-#endif
+ e.optab = (size_t) (optab - &optab_table[0]);
+ e.mode1 = mode;
+ e.mode2 = VOIDmode;
+ slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
+ if (!slot)
+ {
+ if (optab->libcall_gen)
+ {
+ optab->libcall_gen (optab, optab->libcall_basename,
+ optab->libcall_suffix, mode);
+ slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
+ &e, NO_INSERT);
+ if (slot)
+ return (*slot)->libfunc;
+ else
+ return NULL;
+ }
+ return NULL;
+ }
+ return (*slot)->libfunc;
+}
\f
/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
}
if (GET_RTX_CLASS (code) == RTX_UNARY)
- note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
+ switch (code)
+ {
+ case FFS:
+ case CLZ:
+ case CTZ:
+ case CLRSB:
+ case POPCOUNT:
+ case PARITY:
+ case BSWAP:
+ if (GET_MODE (op0) != VOIDmode && GET_MODE (target) != GET_MODE (op0))
+ {
+ note = gen_rtx_fmt_e (code, GET_MODE (op0), copy_rtx (op0));
+ if (GET_MODE_SIZE (GET_MODE (op0))
+ > GET_MODE_SIZE (GET_MODE (target)))
+ note = simplify_gen_unary (TRUNCATE, GET_MODE (target),
+ note, GET_MODE (op0));
+ else
+ note = simplify_gen_unary (ZERO_EXTEND, GET_MODE (target),
+ note, GET_MODE (op0));
+ break;
+ }
+ /* FALLTHRU */
+ default:
+ note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
+ break;
+ }
else
note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
return 1;
}
\f
+/* Given two input operands, OP0 and OP1, determine what the correct from_mode
+ for a widening operation would be. In most cases this would be OP0, but if
+ that's a constant it'll be VOIDmode, which isn't useful. */
+
+static enum machine_mode
+widened_mode (enum machine_mode to_mode, rtx op0, rtx op1)
+{
+ enum machine_mode m0 = GET_MODE (op0);
+ enum machine_mode m1 = GET_MODE (op1);
+ enum machine_mode result;
+
+ if (m0 == VOIDmode && m1 == VOIDmode)
+ return to_mode;
+ else if (m0 == VOIDmode || GET_MODE_SIZE (m0) < GET_MODE_SIZE (m1))
+ result = m1;
+ else
+ result = m0;
+
+ if (GET_MODE_SIZE (result) > GET_MODE_SIZE (to_mode))
+ return to_mode;
+
+ return result;
+}
+\f
+/* Find a widening optab even if it doesn't widen as much as we want.
+ E.g. if from_mode is HImode, and to_mode is DImode, and there is no
+ direct HI->SI insn, then return SI->DI, if that exists.
+ If PERMIT_NON_WIDENING is non-zero then this can be used with
+ non-widening optabs also. */
+
+enum insn_code
+find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode,
+ enum machine_mode from_mode,
+ int permit_non_widening,
+ enum machine_mode *found_mode)
+{
+ for (; (permit_non_widening || from_mode != to_mode)
+ && GET_MODE_SIZE (from_mode) <= GET_MODE_SIZE (to_mode)
+ && from_mode != VOIDmode;
+ from_mode = GET_MODE_WIDER_MODE (from_mode))
+ {
+ enum insn_code handler = widening_optab_handler (op, to_mode,
+ from_mode);
+
+ if (handler != CODE_FOR_nothing)
+ {
+ if (found_mode)
+ *found_mode = from_mode;
+ return handler;
+ }
+ }
+
+ return CODE_FOR_nothing;
+}
+\f
/* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
not actually do a sign-extend or zero-extend, but can leave the
part to OP. */
result = gen_reg_rtx (mode);
- emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
+ emit_clobber (result);
emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
return result;
}
\f
-/* Return the optab used for computing the operation given by
- the tree code, CODE. This function is not always usable (for
- example, it cannot give complete results for multiplication
- or division) but probably ought to be relied on more widely
- throughout the expander. */
+/* Return the optab used for computing the operation given by the tree code,
+ CODE and the tree EXP. This function is not always usable (for example, it
+ cannot give complete results for multiplication or division) but probably
+ ought to be relied on more widely throughout the expander. */
optab
-optab_for_tree_code (enum tree_code code, tree type)
+optab_for_tree_code (enum tree_code code, const_tree type,
+ enum optab_subtype subtype)
{
bool trapv;
switch (code)
case FLOOR_DIV_EXPR:
case ROUND_DIV_EXPR:
case EXACT_DIV_EXPR:
+ if (TYPE_SATURATING(type))
+ return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
case LSHIFT_EXPR:
+ if (TREE_CODE (type) == VECTOR_TYPE)
+ {
+ if (subtype == optab_vector)
+ return TYPE_SATURATING (type) ? NULL : vashl_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
+ if (TYPE_SATURATING(type))
+ return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
return ashl_optab;
case RSHIFT_EXPR:
+ if (TREE_CODE (type) == VECTOR_TYPE)
+ {
+ if (subtype == optab_vector)
+ return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
case LROTATE_EXPR:
+ if (TREE_CODE (type) == VECTOR_TYPE)
+ {
+ if (subtype == optab_vector)
+ return vrotl_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
return rotl_optab;
case RROTATE_EXPR:
+ if (TREE_CODE (type) == VECTOR_TYPE)
+ {
+ if (subtype == optab_vector)
+ return vrotr_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
return rotr_optab;
case MAX_EXPR:
case DOT_PROD_EXPR:
return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
+ case WIDEN_MULT_PLUS_EXPR:
+ return (TYPE_UNSIGNED (type)
+ ? (TYPE_SATURATING (type)
+ ? usmadd_widen_optab : umadd_widen_optab)
+ : (TYPE_SATURATING (type)
+ ? ssmadd_widen_optab : smadd_widen_optab));
+
+ case WIDEN_MULT_MINUS_EXPR:
+ return (TYPE_UNSIGNED (type)
+ ? (TYPE_SATURATING (type)
+ ? usmsub_widen_optab : umsub_widen_optab)
+ : (TYPE_SATURATING (type)
+ ? ssmsub_widen_optab : smsub_widen_optab));
+
+ case FMA_EXPR:
+ return fma_optab;
+
case REDUC_MAX_EXPR:
return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
return vec_shr_optab;
case VEC_WIDEN_MULT_HI_EXPR:
- return TYPE_UNSIGNED (type) ?
+ return TYPE_UNSIGNED (type) ?
vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
case VEC_WIDEN_MULT_LO_EXPR:
- return TYPE_UNSIGNED (type) ?
+ return TYPE_UNSIGNED (type) ?
vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
+ case VEC_WIDEN_LSHIFT_HI_EXPR:
+ return TYPE_UNSIGNED (type) ?
+ vec_widen_ushiftl_hi_optab : vec_widen_sshiftl_hi_optab;
+
+ case VEC_WIDEN_LSHIFT_LO_EXPR:
+ return TYPE_UNSIGNED (type) ?
+ vec_widen_ushiftl_lo_optab : vec_widen_sshiftl_lo_optab;
+
case VEC_UNPACK_HI_EXPR:
return TYPE_UNSIGNED (type) ?
vec_unpacku_hi_optab : vec_unpacks_hi_optab;
case VEC_UNPACK_LO_EXPR:
- return TYPE_UNSIGNED (type) ?
+ return TYPE_UNSIGNED (type) ?
vec_unpacku_lo_optab : vec_unpacks_lo_optab;
case VEC_UNPACK_FLOAT_HI_EXPR:
case VEC_UNPACK_FLOAT_LO_EXPR:
/* The signedness is determined from input operand. */
- return TYPE_UNSIGNED (type) ?
+ return TYPE_UNSIGNED (type) ?
vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
case VEC_PACK_TRUNC_EXPR:
{
case POINTER_PLUS_EXPR:
case PLUS_EXPR:
+ if (TYPE_SATURATING(type))
+ return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
return trapv ? addv_optab : add_optab;
case MINUS_EXPR:
+ if (TYPE_SATURATING(type))
+ return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
return trapv ? subv_optab : sub_optab;
case MULT_EXPR:
+ if (TYPE_SATURATING(type))
+ return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
return trapv ? smulv_optab : smul_optab;
case NEGATE_EXPR:
+ if (TYPE_SATURATING(type))
+ return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
return trapv ? negv_optab : neg_optab;
case ABS_EXPR:
E.g, when called to expand the following operations, this is how
the arguments will be initialized:
nops OP0 OP1 WIDE_OP
- widening-sum 2 oprnd0 - oprnd1
+ widening-sum 2 oprnd0 - oprnd1
widening-dot-product 3 oprnd0 oprnd1 oprnd2
widening-mult 2 oprnd0 oprnd1 -
type-promotion (vec-unpack) 1 oprnd0 - - */
rtx
-expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target,
- int unsignedp)
-{
+expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op,
+ rtx target, int unsignedp)
+{
+ struct expand_operand eops[4];
tree oprnd0, oprnd1, oprnd2;
- enum machine_mode wmode = 0, tmode0, tmode1 = 0;
+ enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
optab widen_pattern_optab;
- int icode;
- enum machine_mode xmode0, xmode1 = 0, wxmode = 0;
- rtx temp;
- rtx pat;
- rtx xop0, xop1, wxop;
- int nops = TREE_OPERAND_LENGTH (exp);
+ enum insn_code icode;
+ int nops = TREE_CODE_LENGTH (ops->code);
+ int op;
- oprnd0 = TREE_OPERAND (exp, 0);
+ oprnd0 = ops->op0;
tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
widen_pattern_optab =
- optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0));
- icode = (int) widen_pattern_optab->handlers[(int) tmode0].insn_code;
+ optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default);
+ if (ops->code == WIDEN_MULT_PLUS_EXPR
+ || ops->code == WIDEN_MULT_MINUS_EXPR)
+ icode = find_widening_optab_handler (widen_pattern_optab,
+ TYPE_MODE (TREE_TYPE (ops->op2)),
+ tmode0, 0);
+ else
+ icode = optab_handler (widen_pattern_optab, tmode0);
gcc_assert (icode != CODE_FOR_nothing);
- xmode0 = insn_data[icode].operand[1].mode;
if (nops >= 2)
{
- oprnd1 = TREE_OPERAND (exp, 1);
+ oprnd1 = ops->op1;
tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
- xmode1 = insn_data[icode].operand[2].mode;
}
/* The last operand is of a wider mode than the rest of the operands. */
if (nops == 2)
- {
- wmode = tmode1;
- wxmode = xmode1;
- }
+ wmode = tmode1;
else if (nops == 3)
{
gcc_assert (tmode1 == tmode0);
gcc_assert (op1);
- oprnd2 = TREE_OPERAND (exp, 2);
+ oprnd2 = ops->op2;
wmode = TYPE_MODE (TREE_TYPE (oprnd2));
- wxmode = insn_data[icode].operand[3].mode;
}
- if (!wide_op)
- wmode = wxmode = insn_data[icode].operand[0].mode;
-
- if (!target
- || ! (*insn_data[icode].operand[0].predicate) (target, wmode))
- temp = gen_reg_rtx (wmode);
- else
- temp = target;
-
- xop0 = op0;
- xop1 = op1;
- wxop = wide_op;
-
- /* In case the insn wants input operands in modes different from
- those of the actual operands, convert the operands. It would
- seem that we don't need to convert CONST_INTs, but we do, so
- that they're properly zero-extended, sign-extended or truncated
- for their mode. */
-
- if (GET_MODE (op0) != xmode0 && xmode0 != VOIDmode)
- xop0 = convert_modes (xmode0,
- GET_MODE (op0) != VOIDmode
- ? GET_MODE (op0)
- : tmode0,
- xop0, unsignedp);
-
+ op = 0;
+ create_output_operand (&eops[op++], target, TYPE_MODE (ops->type));
+ create_convert_operand_from (&eops[op++], op0, tmode0, unsignedp);
if (op1)
- if (GET_MODE (op1) != xmode1 && xmode1 != VOIDmode)
- xop1 = convert_modes (xmode1,
- GET_MODE (op1) != VOIDmode
- ? GET_MODE (op1)
- : tmode1,
- xop1, unsignedp);
-
+ create_convert_operand_from (&eops[op++], op1, tmode1, unsignedp);
if (wide_op)
- if (GET_MODE (wide_op) != wxmode && wxmode != VOIDmode)
- wxop = convert_modes (wxmode,
- GET_MODE (wide_op) != VOIDmode
- ? GET_MODE (wide_op)
- : wmode,
- wxop, unsignedp);
-
- /* Now, if insn's predicates don't allow our operands, put them into
- pseudo regs. */
-
- if (! (*insn_data[icode].operand[1].predicate) (xop0, xmode0)
- && xmode0 != VOIDmode)
- xop0 = copy_to_mode_reg (xmode0, xop0);
-
- if (op1)
- {
- if (! (*insn_data[icode].operand[2].predicate) (xop1, xmode1)
- && xmode1 != VOIDmode)
- xop1 = copy_to_mode_reg (xmode1, xop1);
-
- if (wide_op)
- {
- if (! (*insn_data[icode].operand[3].predicate) (wxop, wxmode)
- && wxmode != VOIDmode)
- wxop = copy_to_mode_reg (wxmode, wxop);
-
- pat = GEN_FCN (icode) (temp, xop0, xop1, wxop);
- }
- else
- pat = GEN_FCN (icode) (temp, xop0, xop1);
- }
- else
- {
- if (wide_op)
- {
- if (! (*insn_data[icode].operand[2].predicate) (wxop, wxmode)
- && wxmode != VOIDmode)
- wxop = copy_to_mode_reg (wxmode, wxop);
-
- pat = GEN_FCN (icode) (temp, xop0, wxop);
- }
- else
- pat = GEN_FCN (icode) (temp, xop0);
- }
-
- emit_insn (pat);
- return temp;
+ create_convert_operand_from (&eops[op++], wide_op, wmode, unsignedp);
+ expand_insn (icode, op, eops);
+ return eops[0].value;
}
/* Generate code to perform an operation specified by TERNARY_OPTAB
expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
rtx op1, rtx op2, rtx target, int unsignedp)
{
- int icode = (int) ternary_optab->handlers[(int) mode].insn_code;
- enum machine_mode mode0 = insn_data[icode].operand[1].mode;
- enum machine_mode mode1 = insn_data[icode].operand[2].mode;
- enum machine_mode mode2 = insn_data[icode].operand[3].mode;
- rtx temp;
- rtx pat;
- rtx xop0 = op0, xop1 = op1, xop2 = op2;
-
- gcc_assert (ternary_optab->handlers[(int) mode].insn_code
- != CODE_FOR_nothing);
-
- if (!target || !insn_data[icode].operand[0].predicate (target, mode))
- temp = gen_reg_rtx (mode);
- else
- temp = target;
-
- /* In case the insn wants input operands in modes different from
- those of the actual operands, convert the operands. It would
- seem that we don't need to convert CONST_INTs, but we do, so
- that they're properly zero-extended, sign-extended or truncated
- for their mode. */
-
- if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
- xop0 = convert_modes (mode0,
- GET_MODE (op0) != VOIDmode
- ? GET_MODE (op0)
- : mode,
- xop0, unsignedp);
-
- if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
- xop1 = convert_modes (mode1,
- GET_MODE (op1) != VOIDmode
- ? GET_MODE (op1)
- : mode,
- xop1, unsignedp);
-
- if (GET_MODE (op2) != mode2 && mode2 != VOIDmode)
- xop2 = convert_modes (mode2,
- GET_MODE (op2) != VOIDmode
- ? GET_MODE (op2)
- : mode,
- xop2, unsignedp);
-
- /* Now, if insn's predicates don't allow our operands, put them into
- pseudo regs. */
+ struct expand_operand ops[4];
+ enum insn_code icode = optab_handler (ternary_optab, mode);
- if (!insn_data[icode].operand[1].predicate (xop0, mode0)
- && mode0 != VOIDmode)
- xop0 = copy_to_mode_reg (mode0, xop0);
+ gcc_assert (optab_handler (ternary_optab, mode) != CODE_FOR_nothing);
- if (!insn_data[icode].operand[2].predicate (xop1, mode1)
- && mode1 != VOIDmode)
- xop1 = copy_to_mode_reg (mode1, xop1);
-
- if (!insn_data[icode].operand[3].predicate (xop2, mode2)
- && mode2 != VOIDmode)
- xop2 = copy_to_mode_reg (mode2, xop2);
-
- pat = GEN_FCN (icode) (temp, xop0, xop1, xop2);
-
- emit_insn (pat);
- return temp;
+ create_output_operand (&ops[0], target, mode);
+ create_convert_operand_from (&ops[1], op0, mode, unsignedp);
+ create_convert_operand_from (&ops[2], op1, mode, unsignedp);
+ create_convert_operand_from (&ops[3], op2, mode, unsignedp);
+ expand_insn (icode, 4, ops);
+ return ops[0].value;
}
/* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
rtx
-expand_vec_shift_expr (tree vec_shift_expr, rtx target)
+expand_vec_shift_expr (sepops ops, rtx target)
{
+ struct expand_operand eops[3];
enum insn_code icode;
rtx rtx_op1, rtx_op2;
- enum machine_mode mode1;
- enum machine_mode mode2;
- enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr));
- tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0);
- tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1);
+ enum machine_mode mode = TYPE_MODE (ops->type);
+ tree vec_oprnd = ops->op0;
+ tree shift_oprnd = ops->op1;
optab shift_optab;
- rtx pat;
- switch (TREE_CODE (vec_shift_expr))
+ switch (ops->code)
{
case VEC_RSHIFT_EXPR:
shift_optab = vec_shr_optab;
gcc_unreachable ();
}
- icode = (int) shift_optab->handlers[(int) mode].insn_code;
+ icode = optab_handler (shift_optab, mode);
gcc_assert (icode != CODE_FOR_nothing);
- mode1 = insn_data[icode].operand[1].mode;
- mode2 = insn_data[icode].operand[2].mode;
-
rtx_op1 = expand_normal (vec_oprnd);
- if (!(*insn_data[icode].operand[1].predicate) (rtx_op1, mode1)
- && mode1 != VOIDmode)
- rtx_op1 = force_reg (mode1, rtx_op1);
-
rtx_op2 = expand_normal (shift_oprnd);
- if (!(*insn_data[icode].operand[2].predicate) (rtx_op2, mode2)
- && mode2 != VOIDmode)
- rtx_op2 = force_reg (mode2, rtx_op2);
- if (!target
- || ! (*insn_data[icode].operand[0].predicate) (target, mode))
- target = gen_reg_rtx (mode);
+ create_output_operand (&eops[0], target, mode);
+ create_input_operand (&eops[1], rtx_op1, GET_MODE (rtx_op1));
+ create_convert_operand_from_type (&eops[2], rtx_op2, TREE_TYPE (shift_oprnd));
+ expand_insn (icode, 3, eops);
- /* Emit instruction */
- pat = GEN_FCN (icode) (target, rtx_op1, rtx_op2);
- gcc_assert (pat);
- emit_insn (pat);
+ return eops[0].value;
+}
- return target;
+/* Create a new vector value in VMODE with all elements set to OP. The
+ mode of OP must be the element mode of VMODE. If OP is a constant,
+ then the return value will be a constant. */
+
+static rtx
+expand_vector_broadcast (enum machine_mode vmode, rtx op)
+{
+ enum insn_code icode;
+ rtvec vec;
+ rtx ret;
+ int i, n;
+
+ gcc_checking_assert (VECTOR_MODE_P (vmode));
+
+ n = GET_MODE_NUNITS (vmode);
+ vec = rtvec_alloc (n);
+ for (i = 0; i < n; ++i)
+ RTVEC_ELT (vec, i) = op;
+
+ if (CONSTANT_P (op))
+ return gen_rtx_CONST_VECTOR (vmode, vec);
+
+ /* ??? If the target doesn't have a vec_init, then we have no easy way
+ of performing this operation. Most of this sort of generic support
+ is hidden away in the vector lowering support in gimple. */
+ icode = optab_handler (vec_init_optab, vmode);
+ if (icode == CODE_FOR_nothing)
+ return NULL;
+
+ ret = gen_reg_rtx (vmode);
+ emit_insn (GEN_FCN (icode) (ret, gen_rtx_PARALLEL (vmode, vec)));
+
+ return ret;
}
/* This subroutine of expand_doubleword_shift handles the cases in which
/* If we can compute the condition at compile time, pick the
appropriate subroutine. */
tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
- if (tmp != 0 && GET_CODE (tmp) == CONST_INT)
+ if (tmp != 0 && CONST_INT_P (tmp))
{
if (tmp == const0_rtx)
return expand_superword_shift (binoptab, outof_input, superword_op1,
NO_DEFER_POP;
do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
- 0, 0, subword_label);
+ 0, 0, subword_label, -1);
OK_DEFER_POP;
if (!expand_superword_shift (binoptab, outof_input, superword_op1,
If we want to multiply two two-word values and have normal and widening
multiplies of single-word values, we can do this with three smaller
- multiplications. Note that we do not make a REG_NO_CONFLICT block here
- because we are not operating on one word at a time.
+ multiplications.
The multiplication proceeds as follows:
_______________________
/* OP1_HIGH should now be dead. */
adjust = expand_binop (word_mode, add_optab, adjust, temp,
- adjust, 0, OPTAB_DIRECT);
+ NULL_RTX, 0, OPTAB_DIRECT);
if (target && !REG_P (target))
target = NULL_RTX;
product_high = operand_subword (product, high, 1, mode);
adjust = expand_binop (word_mode, add_optab, product_high, adjust,
- REG_P (product_high) ? product_high : adjust,
- 0, OPTAB_DIRECT);
+ NULL_RTX, 0, OPTAB_DIRECT);
emit_move_insn (product_high, adjust);
return product;
}
return rtx_equal_p (op1, target);
}
+/* Return true if BINOPTAB implements a shift operation. */
+
+static bool
+shift_optab_p (optab binoptab)
+{
+ switch (binoptab->code)
+ {
+ case ASHIFT:
+ case SS_ASHIFT:
+ case US_ASHIFT:
+ case ASHIFTRT:
+ case LSHIFTRT:
+ case ROTATE:
+ case ROTATERT:
+ return true;
+
+ default:
+ return false;
+ }
+}
+
+/* Return true if BINOPTAB implements a commutative binary operation. */
+
+static bool
+commutative_optab_p (optab binoptab)
+{
+ return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
+ || binoptab == smul_widen_optab
+ || binoptab == umul_widen_optab
+ || binoptab == smul_highpart_optab
+ || binoptab == umul_highpart_optab);
+}
+
+/* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
+ optimizing, and if the operand is a constant that costs more than
+ 1 instruction, force the constant into a register and return that
+ register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
+
+static rtx
+avoid_expensive_constant (enum machine_mode mode, optab binoptab,
+ int opn, rtx x, bool unsignedp)
+{
+ bool speed = optimize_insn_for_speed_p ();
+
+ if (mode != VOIDmode
+ && optimize
+ && CONSTANT_P (x)
+ && rtx_cost (x, binoptab->code, opn, speed) > set_src_cost (x, speed))
+ {
+ if (CONST_INT_P (x))
+ {
+ HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
+ if (intval != INTVAL (x))
+ x = GEN_INT (intval);
+ }
+ else
+ x = convert_modes (mode, VOIDmode, x, unsignedp);
+ x = force_reg (mode, x);
+ }
+ return x;
+}
/* Helper function for expand_binop: handle the case where there
is an insn that directly implements the indicated operation.
expand_binop_directly (enum machine_mode mode, optab binoptab,
rtx op0, rtx op1,
rtx target, int unsignedp, enum optab_methods methods,
- int commutative_op, rtx last)
+ rtx last)
{
- int icode = (int) binoptab->handlers[(int) mode].insn_code;
- enum machine_mode mode0 = insn_data[icode].operand[1].mode;
- enum machine_mode mode1 = insn_data[icode].operand[2].mode;
- enum machine_mode tmp_mode;
+ enum machine_mode from_mode = widened_mode (mode, op0, op1);
+ enum insn_code icode = find_widening_optab_handler (binoptab, mode,
+ from_mode, 1);
+ enum machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
+ enum machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
+ enum machine_mode mode0, mode1, tmp_mode;
+ struct expand_operand ops[3];
+ bool commutative_p;
rtx pat;
rtx xop0 = op0, xop1 = op1;
- rtx temp;
-
- if (target)
- temp = target;
- else
- temp = gen_reg_rtx (mode);
-
+ rtx swap;
+
/* If it is a commutative operator and the modes would match
if we would swap the operands, we can save the conversions. */
- if (commutative_op)
+ commutative_p = commutative_optab_p (binoptab);
+ if (commutative_p
+ && GET_MODE (xop0) != xmode0 && GET_MODE (xop1) != xmode1
+ && GET_MODE (xop0) == xmode1 && GET_MODE (xop1) == xmode1)
{
- if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
- && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
- {
- rtx tmp;
-
- tmp = op0; op0 = op1; op1 = tmp;
- tmp = xop0; xop0 = xop1; xop1 = tmp;
- }
+ swap = xop0;
+ xop0 = xop1;
+ xop1 = swap;
}
-
+
+ /* If we are optimizing, force expensive constants into a register. */
+ xop0 = avoid_expensive_constant (xmode0, binoptab, 0, xop0, unsignedp);
+ if (!shift_optab_p (binoptab))
+ xop1 = avoid_expensive_constant (xmode1, binoptab, 1, xop1, unsignedp);
+
/* In case the insn wants input operands in modes different from
those of the actual operands, convert the operands. It would
seem that we don't need to convert CONST_INTs, but we do, so
that they're properly zero-extended, sign-extended or truncated
for their mode. */
-
- if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
- xop0 = convert_modes (mode0,
- GET_MODE (op0) != VOIDmode
- ? GET_MODE (op0)
- : mode,
- xop0, unsignedp);
-
- if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
- xop1 = convert_modes (mode1,
- GET_MODE (op1) != VOIDmode
- ? GET_MODE (op1)
- : mode,
- xop1, unsignedp);
-
+
+ mode0 = GET_MODE (xop0) != VOIDmode ? GET_MODE (xop0) : mode;
+ if (xmode0 != VOIDmode && xmode0 != mode0)
+ {
+ xop0 = convert_modes (xmode0, mode0, xop0, unsignedp);
+ mode0 = xmode0;
+ }
+
+ mode1 = GET_MODE (xop1) != VOIDmode ? GET_MODE (xop1) : mode;
+ if (xmode1 != VOIDmode && xmode1 != mode1)
+ {
+ xop1 = convert_modes (xmode1, mode1, xop1, unsignedp);
+ mode1 = xmode1;
+ }
+
+ /* If operation is commutative,
+ try to make the first operand a register.
+ Even better, try to make it the same as the target.
+ Also try to make the last operand a constant. */
+ if (commutative_p
+ && swap_commutative_operands_with_target (target, xop0, xop1))
+ {
+ swap = xop1;
+ xop1 = xop0;
+ xop0 = swap;
+ }
+
/* Now, if insn's predicates don't allow our operands, put them into
pseudo regs. */
-
- if (!insn_data[icode].operand[1].predicate (xop0, mode0)
- && mode0 != VOIDmode)
- xop0 = copy_to_mode_reg (mode0, xop0);
-
- if (!insn_data[icode].operand[2].predicate (xop1, mode1)
- && mode1 != VOIDmode)
- xop1 = copy_to_mode_reg (mode1, xop1);
-
- if (binoptab == vec_pack_trunc_optab
+
+ if (binoptab == vec_pack_trunc_optab
|| binoptab == vec_pack_usat_optab
|| binoptab == vec_pack_ssat_optab
|| binoptab == vec_pack_ufix_trunc_optab
{
/* The mode of the result is different then the mode of the
arguments. */
- tmp_mode = insn_data[icode].operand[0].mode;
+ tmp_mode = insn_data[(int) icode].operand[0].mode;
if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
- return 0;
+ {
+ delete_insns_since (last);
+ return NULL_RTX;
+ }
}
else
tmp_mode = mode;
- if (!insn_data[icode].operand[0].predicate (temp, tmp_mode))
- temp = gen_reg_rtx (tmp_mode);
-
- pat = GEN_FCN (icode) (temp, xop0, xop1);
+ create_output_operand (&ops[0], target, tmp_mode);
+ create_input_operand (&ops[1], xop0, mode0);
+ create_input_operand (&ops[2], xop1, mode1);
+ pat = maybe_gen_insn (icode, 3, ops);
if (pat)
{
/* If PAT is composed of more than one insn, try to add an appropriate
REG_EQUAL note to it. If we can't because TEMP conflicts with an
operand, call expand_binop again, this time without a target. */
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
- && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
+ && ! add_equal_note (pat, ops[0].value, binoptab->code,
+ ops[1].value, ops[2].value))
{
delete_insns_since (last);
return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
unsignedp, methods);
}
-
+
emit_insn (pat);
- return temp;
+ return ops[0].value;
}
-
delete_insns_since (last);
return NULL_RTX;
}
enum optab_methods next_methods
= (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
? OPTAB_WIDEN : methods);
- enum mode_class class;
+ enum mode_class mclass;
enum machine_mode wider_mode;
+ rtx libfunc;
rtx temp;
- int commutative_op = 0;
- int shift_op = (binoptab->code == ASHIFT
- || binoptab->code == ASHIFTRT
- || binoptab->code == LSHIFTRT
- || binoptab->code == ROTATE
- || binoptab->code == ROTATERT);
rtx entry_last = get_last_insn ();
rtx last;
- class = GET_MODE_CLASS (mode);
+ mclass = GET_MODE_CLASS (mode);
/* If subtracting an integer constant, convert this into an addition of
the negated constant. */
- if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
+ if (binoptab == sub_optab && CONST_INT_P (op1))
{
op1 = negate_rtx (mode, op1);
binoptab = add_optab;
}
- /* If we are inside an appropriately-short loop and we are optimizing,
- force expensive constants into a register. */
- if (CONSTANT_P (op0) && optimize
- && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
- {
- if (GET_MODE (op0) != VOIDmode)
- op0 = convert_modes (mode, VOIDmode, op0, unsignedp);
- op0 = force_reg (mode, op0);
- }
-
- if (CONSTANT_P (op1) && optimize
- && ! shift_op && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
- {
- if (GET_MODE (op1) != VOIDmode)
- op1 = convert_modes (mode, VOIDmode, op1, unsignedp);
- op1 = force_reg (mode, op1);
- }
-
/* Record where to delete back to if we backtrack. */
last = get_last_insn ();
- /* If operation is commutative,
- try to make the first operand a register.
- Even better, try to make it the same as the target.
- Also try to make the last operand a constant. */
- if (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
- || binoptab == smul_widen_optab
- || binoptab == umul_widen_optab
- || binoptab == smul_highpart_optab
- || binoptab == umul_highpart_optab)
- {
- commutative_op = 1;
-
- if (swap_commutative_operands_with_target (target, op0, op1))
- {
- temp = op1;
- op1 = op0;
- op0 = temp;
- }
- }
-
/* If we can do it with a three-operand insn, do so. */
if (methods != OPTAB_MUST_WIDEN
- && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ && find_widening_optab_handler (binoptab, mode,
+ widened_mode (mode, op0, op1), 1)
+ != CODE_FOR_nothing)
{
temp = expand_binop_directly (mode, binoptab, op0, op1, target,
- unsignedp, methods, commutative_op, last);
+ unsignedp, methods, last);
if (temp)
return temp;
}
/* If we were trying to rotate, and that didn't work, try rotating
the other direction before falling back to shifts and bitwise-or. */
if (((binoptab == rotl_optab
- && rotr_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (rotr_optab, mode) != CODE_FOR_nothing)
|| (binoptab == rotr_optab
- && rotl_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing))
- && class == MODE_INT)
+ && optab_handler (rotl_optab, mode) != CODE_FOR_nothing))
+ && mclass == MODE_INT)
{
optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
rtx newop1;
- unsigned int bits = GET_MODE_BITSIZE (mode);
+ unsigned int bits = GET_MODE_PRECISION (mode);
- if (GET_CODE (op1) == CONST_INT)
- newop1 = GEN_INT (bits - INTVAL (op1));
+ if (CONST_INT_P (op1))
+ newop1 = GEN_INT (bits - INTVAL (op1));
else if (targetm.shift_truncation_mask (mode) == bits - 1)
- newop1 = negate_rtx (mode, op1);
+ newop1 = negate_rtx (GET_MODE (op1), op1);
else
- newop1 = expand_binop (mode, sub_optab,
+ newop1 = expand_binop (GET_MODE (op1), sub_optab,
GEN_INT (bits), op1,
NULL_RTX, unsignedp, OPTAB_DIRECT);
-
+
temp = expand_binop_directly (mode, otheroptab, op0, newop1,
- target, unsignedp, methods,
- commutative_op, last);
+ target, unsignedp, methods, last);
if (temp)
return temp;
}
takes operands of this mode and makes a wider mode. */
if (binoptab == smul_optab
- && GET_MODE_WIDER_MODE (mode) != VOIDmode
- && (((unsignedp ? umul_widen_optab : smul_widen_optab)
- ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
+ && GET_MODE_2XWIDER_MODE (mode) != VOIDmode
+ && (widening_optab_handler ((unsignedp ? umul_widen_optab
+ : smul_widen_optab),
+ GET_MODE_2XWIDER_MODE (mode), mode)
!= CODE_FOR_nothing))
{
- temp = expand_binop (GET_MODE_WIDER_MODE (mode),
+ temp = expand_binop (GET_MODE_2XWIDER_MODE (mode),
unsignedp ? umul_widen_optab : smul_widen_optab,
op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
if (temp != 0)
{
if (GET_MODE_CLASS (mode) == MODE_INT
- && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
- GET_MODE_BITSIZE (GET_MODE (temp))))
+ && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (temp)))
return gen_lowpart (mode, temp);
else
return convert_to_mode (mode, temp, unsignedp);
}
}
- /* Look for a wider mode of the same class for which we think we
- can open-code the operation. Check for a widening multiply at the
- wider mode as well. */
+ /* If this is a vector shift by a scalar, see if we can do a vector
+ shift by a vector. If so, broadcast the scalar into a vector. */
+ if (mclass == MODE_VECTOR_INT)
+ {
+ optab otheroptab = NULL;
- if (CLASS_HAS_WIDER_MODES_P (class)
- && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
- for (wider_mode = GET_MODE_WIDER_MODE (mode);
+ if (binoptab == ashl_optab)
+ otheroptab = vashl_optab;
+ else if (binoptab == ashr_optab)
+ otheroptab = vashr_optab;
+ else if (binoptab == lshr_optab)
+ otheroptab = vlshr_optab;
+ else if (binoptab == rotl_optab)
+ otheroptab = vrotl_optab;
+ else if (binoptab == rotr_optab)
+ otheroptab = vrotr_optab;
+
+ if (otheroptab && optab_handler (otheroptab, mode) != CODE_FOR_nothing)
+ {
+ rtx vop1 = expand_vector_broadcast (mode, op1);
+ if (vop1)
+ {
+ temp = expand_binop_directly (mode, otheroptab, op0, vop1,
+ target, unsignedp, methods, last);
+ if (temp)
+ return temp;
+ }
+ }
+ }
+
+ /* Certain vector operations can be implemented with vector permutation. */
+ if (VECTOR_MODE_P (mode))
+ {
+ enum tree_code tcode = ERROR_MARK;
+ rtx sel;
+
+ if (binoptab == vec_interleave_high_optab)
+ tcode = VEC_INTERLEAVE_HIGH_EXPR;
+ else if (binoptab == vec_interleave_low_optab)
+ tcode = VEC_INTERLEAVE_LOW_EXPR;
+ else if (binoptab == vec_extract_even_optab)
+ tcode = VEC_EXTRACT_EVEN_EXPR;
+ else if (binoptab == vec_extract_odd_optab)
+ tcode = VEC_EXTRACT_ODD_EXPR;
+
+ if (tcode != ERROR_MARK
+ && can_vec_perm_for_code_p (tcode, mode, &sel))
+ {
+ temp = expand_vec_perm (mode, op0, op1, sel, target);
+ gcc_assert (temp != NULL);
+ return temp;
+ }
+ }
+
+ /* Look for a wider mode of the same class for which we think we
+ can open-code the operation. Check for a widening multiply at the
+ wider mode as well. */
+
+ if (CLASS_HAS_WIDER_MODES_P (mclass)
+ && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
+ for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
+ if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing
|| (binoptab == smul_optab
&& GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
- && (((unsignedp ? umul_widen_optab : smul_widen_optab)
- ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
+ && (find_widening_optab_handler ((unsignedp
+ ? umul_widen_optab
+ : smul_widen_optab),
+ GET_MODE_WIDER_MODE (wider_mode),
+ mode, 0)
!= CODE_FOR_nothing)))
{
rtx xop0 = op0, xop1 = op1;
|| binoptab == xor_optab
|| binoptab == add_optab || binoptab == sub_optab
|| binoptab == smul_optab || binoptab == ashl_optab)
- && class == MODE_INT)
- no_extend = 1;
+ && mclass == MODE_INT)
+ {
+ no_extend = 1;
+ xop0 = avoid_expensive_constant (mode, binoptab, 0,
+ xop0, unsignedp);
+ if (binoptab != ashl_optab)
+ xop1 = avoid_expensive_constant (mode, binoptab, 1,
+ xop1, unsignedp);
+ }
xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
unsignedp, OPTAB_DIRECT);
if (temp)
{
- if (class != MODE_INT
- || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
- GET_MODE_BITSIZE (wider_mode)))
+ if (mclass != MODE_INT
+ || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
{
if (target == 0)
target = gen_reg_rtx (mode);
}
}
+ /* If operation is commutative,
+ try to make the first operand a register.
+ Even better, try to make it the same as the target.
+ Also try to make the last operand a constant. */
+ if (commutative_optab_p (binoptab)
+ && swap_commutative_operands_with_target (target, op0, op1))
+ {
+ temp = op1;
+ op1 = op0;
+ op0 = temp;
+ }
+
/* These can be done a word at a time. */
if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) > UNITS_PER_WORD
- && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
{
int i;
rtx insns;
- rtx equiv_value;
/* If TARGET is the same as one of the operands, the REG_EQUAL note
won't be accurate, so use a new target. */
- if (target == 0 || target == op0 || target == op1)
+ if (target == 0
+ || target == op0
+ || target == op1
+ || !valid_multiword_target_p (target))
target = gen_reg_rtx (mode);
start_sequence ();
if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
{
- if (binoptab->code != UNKNOWN)
- equiv_value
- = gen_rtx_fmt_ee (binoptab->code, mode,
- copy_rtx (op0), copy_rtx (op1));
- else
- equiv_value = 0;
-
- emit_no_conflict_block (insns, target, op0, op1, equiv_value);
+ emit_insn (insns);
return target;
}
}
/* Synthesize double word shifts from single word shifts. */
if ((binoptab == lshr_optab || binoptab == ashl_optab
|| binoptab == ashr_optab)
- && class == MODE_INT
- && (GET_CODE (op1) == CONST_INT || !optimize_size)
+ && mclass == MODE_INT
+ && (CONST_INT_P (op1) || optimize_insn_for_speed_p ())
&& GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
- && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
- && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
- && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
+ && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode)
+ && optab_handler (binoptab, word_mode) != CODE_FOR_nothing
+ && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
+ && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
{
unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
enum machine_mode op1_mode;
op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
/* Apply the truncation to constant shifts. */
- if (double_shift_mask > 0 && GET_CODE (op1) == CONST_INT)
+ if (double_shift_mask > 0 && CONST_INT_P (op1))
op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
if (op1 == CONST0_RTX (op1_mode))
|| (shift_mask == BITS_PER_WORD - 1
&& double_shift_mask == BITS_PER_WORD * 2 - 1))
{
- rtx insns, equiv_value;
+ rtx insns;
rtx into_target, outof_target;
rtx into_input, outof_input;
int left_shift, outof_word;
/* If TARGET is the same as one of the operands, the REG_EQUAL note
won't be accurate, so use a new target. */
- if (target == 0 || target == op0 || target == op1)
+ if (target == 0
+ || target == op0
+ || target == op1
+ || !valid_multiword_target_p (target))
target = gen_reg_rtx (mode);
start_sequence ();
insns = get_insns ();
end_sequence ();
- equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
- emit_no_conflict_block (insns, target, op0, op1, equiv_value);
+ emit_insn (insns);
return target;
}
end_sequence ();
/* Synthesize double word rotates from single word shifts. */
if ((binoptab == rotl_optab || binoptab == rotr_optab)
- && class == MODE_INT
- && GET_CODE (op1) == CONST_INT
- && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
- && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
- && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
+ && mclass == MODE_INT
+ && CONST_INT_P (op1)
+ && GET_MODE_PRECISION (mode) == 2 * BITS_PER_WORD
+ && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
+ && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
{
rtx insns;
rtx into_target, outof_target;
opportunities, and second because if target and op0 happen to be MEMs
designating the same location, we would risk clobbering it too early
in the code sequence we generate below. */
- if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
+ if (target == 0
+ || target == op0
+ || target == op1
+ || !REG_P (target)
+ || !valid_multiword_target_p (target))
target = gen_reg_rtx (mode);
start_sequence ();
if (inter != 0)
{
- /* One may be tempted to wrap the insns in a REG_NO_CONFLICT
- block to help the register allocator a bit. But a multi-word
- rotate will need all the input bits when setting the output
- bits, so there clearly is a conflict between the input and
- output registers. So we can't use a no-conflict block here. */
emit_insn (insns);
return target;
}
/* These can be done a word at a time by propagating carries. */
if ((binoptab == add_optab || binoptab == sub_optab)
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
- && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
{
unsigned int i;
optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
xtarget = gen_reg_rtx (mode);
- if (target == 0 || !REG_P (target))
+ if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target))
target = xtarget;
/* Indicate for flow that the entire target reg is being set. */
if (REG_P (target))
- emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
+ emit_clobber (xtarget);
/* Do the actual arithmetic. */
for (i = 0; i < nwords; i++)
if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
{
- if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
+ if (optab_handler (mov_optab, mode) != CODE_FOR_nothing
|| ! rtx_equal_p (target, xtarget))
{
rtx temp = emit_move_insn (target, xtarget);
- set_unique_reg_note (temp,
- REG_EQUAL,
- gen_rtx_fmt_ee (binoptab->code, mode,
- copy_rtx (xop0),
- copy_rtx (xop1)));
+ set_dst_reg_note (temp, REG_EQUAL,
+ gen_rtx_fmt_ee (binoptab->code, mode,
+ copy_rtx (xop0),
+ copy_rtx (xop1)),
+ target);
}
else
target = xtarget;
try using a signed widening multiply. */
if (binoptab == smul_optab
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
- && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
- && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (smul_optab, word_mode) != CODE_FOR_nothing
+ && optab_handler (add_optab, word_mode) != CODE_FOR_nothing)
{
rtx product = NULL_RTX;
-
- if (umul_widen_optab->handlers[(int) mode].insn_code
- != CODE_FOR_nothing)
+ if (widening_optab_handler (umul_widen_optab, mode, word_mode)
+ != CODE_FOR_nothing)
{
product = expand_doubleword_mult (mode, op0, op1, target,
true, methods);
}
if (product == NULL_RTX
- && smul_widen_optab->handlers[(int) mode].insn_code
- != CODE_FOR_nothing)
+ && widening_optab_handler (smul_widen_optab, mode, word_mode)
+ != CODE_FOR_nothing)
{
product = expand_doubleword_mult (mode, op0, op1, target,
false, methods);
if (product != NULL_RTX)
{
- if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ if (optab_handler (mov_optab, mode) != CODE_FOR_nothing)
{
temp = emit_move_insn (target ? target : product, product);
- set_unique_reg_note (temp,
- REG_EQUAL,
- gen_rtx_fmt_ee (MULT, mode,
- copy_rtx (op0),
- copy_rtx (op1)));
+ set_dst_reg_note (temp,
+ REG_EQUAL,
+ gen_rtx_fmt_ee (MULT, mode,
+ copy_rtx (op0),
+ copy_rtx (op1)),
+ target ? target : product);
}
return product;
}
/* It can't be open-coded in this mode.
Use a library call if one is available and caller says that's ok. */
- if (binoptab->handlers[(int) mode].libfunc
+ libfunc = optab_libfunc (binoptab, mode);
+ if (libfunc
&& (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
{
rtx insns;
start_sequence ();
- if (shift_op)
+ if (shift_optab_p (binoptab))
{
op1_mode = targetm.libgcc_shift_count_mode ();
/* Specify unsigned here,
/* Pass 1 for NO_QUEUE so we don't lose any increments
if the libcall is cse'd or moved. */
- value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
+ value = emit_library_call_value (libfunc,
NULL_RTX, LCT_CONST, mode, 2,
op0, mode, op1x, op1_mode);
/* Look for a wider mode of the same class for which it appears we can do
the operation. */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if ((binoptab->handlers[(int) wider_mode].insn_code
- != CODE_FOR_nothing)
+ if (find_widening_optab_handler (binoptab, wider_mode, mode, 1)
+ != CODE_FOR_nothing
|| (methods == OPTAB_LIB
- && binoptab->handlers[(int) wider_mode].libfunc))
+ && optab_libfunc (binoptab, wider_mode)))
{
rtx xop0 = op0, xop1 = op1;
int no_extend = 0;
|| binoptab == xor_optab
|| binoptab == add_optab || binoptab == sub_optab
|| binoptab == smul_optab || binoptab == ashl_optab)
- && class == MODE_INT)
+ && mclass == MODE_INT)
no_extend = 1;
xop0 = widen_operand (xop0, wider_mode, mode,
unsignedp, methods);
if (temp)
{
- if (class != MODE_INT
- || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
- GET_MODE_BITSIZE (wider_mode)))
+ if (mclass != MODE_INT
+ || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
{
if (target == 0)
target = gen_reg_rtx (mode);
{
rtx temp;
optab direct_optab = unsignedp ? uoptab : soptab;
- struct optab wide_soptab;
+ struct optab_d wide_soptab;
/* Do it without widening, if possible. */
temp = expand_binop (mode, direct_optab, op0, op1, target,
/* Try widening to a signed int. Make a fake signed optab that
hides any signed insn for direct use. */
wide_soptab = *soptab;
- wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
- wide_soptab.handlers[(int) mode].libfunc = 0;
+ set_optab_handler (&wide_soptab, mode, CODE_FOR_nothing);
+ /* We don't want to generate new hash table entries from this fake
+ optab. */
+ wide_soptab.libcall_gen = NULL;
temp = expand_binop (mode, &wide_soptab, op0, op1, target,
unsignedp, OPTAB_WIDEN);
if (temp || methods == OPTAB_WIDEN)
return temp;
- /* Use the right width lib call if that exists. */
+ /* Use the right width libcall if that exists. */
temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
if (temp || methods == OPTAB_LIB)
return temp;
- /* Must widen and use a lib call, use either signed or unsigned. */
+ /* Must widen and use a libcall, use either signed or unsigned. */
temp = expand_binop (mode, &wide_soptab, op0, op1, target,
unsignedp, methods);
if (temp != 0)
int unsignedp)
{
enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
- enum mode_class class;
+ enum mode_class mclass;
enum machine_mode wider_mode;
rtx entry_last = get_last_insn ();
rtx last;
- class = GET_MODE_CLASS (mode);
+ mclass = GET_MODE_CLASS (mode);
if (!targ0)
targ0 = gen_reg_rtx (mode);
/* Record where to go back to if we fail. */
last = get_last_insn ();
- if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
{
- int icode = (int) unoptab->handlers[(int) mode].insn_code;
- enum machine_mode mode0 = insn_data[icode].operand[2].mode;
- rtx pat;
- rtx xop0 = op0;
-
- if (GET_MODE (xop0) != VOIDmode
- && GET_MODE (xop0) != mode0)
- xop0 = convert_to_mode (mode0, xop0, unsignedp);
-
- /* Now, if insn doesn't accept these operands, put them into pseudos. */
- if (!insn_data[icode].operand[2].predicate (xop0, mode0))
- xop0 = copy_to_mode_reg (mode0, xop0);
+ struct expand_operand ops[3];
+ enum insn_code icode = optab_handler (unoptab, mode);
- /* We could handle this, but we should always be called with a pseudo
- for our targets and all insns should take them as outputs. */
- gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
- gcc_assert (insn_data[icode].operand[1].predicate (targ1, mode));
-
- pat = GEN_FCN (icode) (targ0, targ1, xop0);
- if (pat)
- {
- emit_insn (pat);
- return 1;
- }
- else
- delete_insns_since (last);
+ create_fixed_operand (&ops[0], targ0);
+ create_fixed_operand (&ops[1], targ1);
+ create_convert_operand_from (&ops[2], op0, mode, unsignedp);
+ if (maybe_expand_insn (icode, 3, ops))
+ return 1;
}
/* It can't be done in this mode. Can we do it in a wider mode? */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if (unoptab->handlers[(int) wider_mode].insn_code
- != CODE_FOR_nothing)
+ if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
{
rtx t0 = gen_reg_rtx (wider_mode);
rtx t1 = gen_reg_rtx (wider_mode);
int unsignedp)
{
enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
- enum mode_class class;
+ enum mode_class mclass;
enum machine_mode wider_mode;
rtx entry_last = get_last_insn ();
rtx last;
- class = GET_MODE_CLASS (mode);
-
- /* If we are inside an appropriately-short loop and we are optimizing,
- force expensive constants into a register. */
- if (CONSTANT_P (op0) && optimize
- && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
- op0 = force_reg (mode, op0);
-
- if (CONSTANT_P (op1) && optimize
- && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
- op1 = force_reg (mode, op1);
+ mclass = GET_MODE_CLASS (mode);
if (!targ0)
targ0 = gen_reg_rtx (mode);
/* Record where to go back to if we fail. */
last = get_last_insn ();
- if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ if (optab_handler (binoptab, mode) != CODE_FOR_nothing)
{
- int icode = (int) binoptab->handlers[(int) mode].insn_code;
+ struct expand_operand ops[4];
+ enum insn_code icode = optab_handler (binoptab, mode);
enum machine_mode mode0 = insn_data[icode].operand[1].mode;
enum machine_mode mode1 = insn_data[icode].operand[2].mode;
- rtx pat;
rtx xop0 = op0, xop1 = op1;
- /* In case the insn wants input operands in modes different from
- those of the actual operands, convert the operands. It would
- seem that we don't need to convert CONST_INTs, but we do, so
- that they're properly zero-extended, sign-extended or truncated
- for their mode. */
-
- if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
- xop0 = convert_modes (mode0,
- GET_MODE (op0) != VOIDmode
- ? GET_MODE (op0)
- : mode,
- xop0, unsignedp);
-
- if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
- xop1 = convert_modes (mode1,
- GET_MODE (op1) != VOIDmode
- ? GET_MODE (op1)
- : mode,
- xop1, unsignedp);
-
- /* Now, if insn doesn't accept these operands, put them into pseudos. */
- if (!insn_data[icode].operand[1].predicate (xop0, mode0))
- xop0 = copy_to_mode_reg (mode0, xop0);
-
- if (!insn_data[icode].operand[2].predicate (xop1, mode1))
- xop1 = copy_to_mode_reg (mode1, xop1);
-
- /* We could handle this, but we should always be called with a pseudo
- for our targets and all insns should take them as outputs. */
- gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
- gcc_assert (insn_data[icode].operand[3].predicate (targ1, mode));
-
- pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
- if (pat)
- {
- emit_insn (pat);
- return 1;
- }
- else
- delete_insns_since (last);
+ /* If we are optimizing, force expensive constants into a register. */
+ xop0 = avoid_expensive_constant (mode0, binoptab, 0, xop0, unsignedp);
+ xop1 = avoid_expensive_constant (mode1, binoptab, 1, xop1, unsignedp);
+
+ create_fixed_operand (&ops[0], targ0);
+ create_convert_operand_from (&ops[1], op0, mode, unsignedp);
+ create_convert_operand_from (&ops[2], op1, mode, unsignedp);
+ create_fixed_operand (&ops[3], targ1);
+ if (maybe_expand_insn (icode, 4, ops))
+ return 1;
+ delete_insns_since (last);
}
/* It can't be done in this mode. Can we do it in a wider mode? */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if (binoptab->handlers[(int) wider_mode].insn_code
- != CODE_FOR_nothing)
+ if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing)
{
rtx t0 = gen_reg_rtx (wider_mode);
rtx t1 = gen_reg_rtx (wider_mode);
enum machine_mode libval_mode;
rtx libval;
rtx insns;
+ rtx libfunc;
/* Exactly one of TARG0 or TARG1 should be non-NULL. */
gcc_assert (!targ0 != !targ1);
mode = GET_MODE (op0);
- if (!binoptab->handlers[(int) mode].libfunc)
+ libfunc = optab_libfunc (binoptab, mode);
+ if (!libfunc)
return false;
/* The value returned by the library function will have twice as
libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
MODE_INT);
start_sequence ();
- libval = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
- NULL_RTX, LCT_CONST,
+ libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
libval_mode, 2,
op0, mode,
op1, mode);
/* Try calculating
(clz:narrow x)
as
- (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
+ (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
+
+ A similar operation can be used for clrsb. UNOPTAB says which operation
+ we are trying to expand. */
static rtx
-widen_clz (enum machine_mode mode, rtx op0, rtx target)
+widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
{
- enum mode_class class = GET_MODE_CLASS (mode);
- if (CLASS_HAS_WIDER_MODES_P (class))
+ enum mode_class mclass = GET_MODE_CLASS (mode);
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
enum machine_mode wider_mode;
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if (clz_optab->handlers[(int) wider_mode].insn_code
- != CODE_FOR_nothing)
+ if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
{
rtx xop0, temp, last;
if (target == 0)
target = gen_reg_rtx (mode);
- xop0 = widen_operand (op0, wider_mode, mode, true, false);
- temp = expand_unop (wider_mode, clz_optab, xop0, NULL_RTX, true);
+ xop0 = widen_operand (op0, wider_mode, mode,
+ unoptab != clrsb_optab, false);
+ temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
+ unoptab != clrsb_optab);
if (temp != 0)
temp = expand_binop (wider_mode, sub_optab, temp,
- GEN_INT (GET_MODE_BITSIZE (wider_mode)
- - GET_MODE_BITSIZE (mode)),
+ GEN_INT (GET_MODE_PRECISION (wider_mode)
+ - GET_MODE_PRECISION (mode)),
target, true, OPTAB_DIRECT);
if (temp == 0)
delete_insns_since (last);
return 0;
}
+/* Try calculating clz of a double-word quantity as two clz's of word-sized
+ quantities, choosing which based on whether the high word is nonzero. */
+static rtx
+expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
+{
+ rtx xop0 = force_reg (mode, op0);
+ rtx subhi = gen_highpart (word_mode, xop0);
+ rtx sublo = gen_lowpart (word_mode, xop0);
+ rtx hi0_label = gen_label_rtx ();
+ rtx after_label = gen_label_rtx ();
+ rtx seq, temp, result;
+
+ /* If we were not given a target, use a word_mode register, not a
+ 'mode' register. The result will fit, and nobody is expecting
+ anything bigger (the return type of __builtin_clz* is int). */
+ if (!target)
+ target = gen_reg_rtx (word_mode);
+
+ /* In any case, write to a word_mode scratch in both branches of the
+ conditional, so we can ensure there is a single move insn setting
+ 'target' to tag a REG_EQUAL note on. */
+ result = gen_reg_rtx (word_mode);
+
+ start_sequence ();
+
+ /* If the high word is not equal to zero,
+ then clz of the full value is clz of the high word. */
+ emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
+ word_mode, true, hi0_label);
+
+ temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
+ if (!temp)
+ goto fail;
+
+ if (temp != result)
+ convert_move (result, temp, true);
+
+ emit_jump_insn (gen_jump (after_label));
+ emit_barrier ();
+
+ /* Else clz of the full value is clz of the low word plus the number
+ of bits in the high word. */
+ emit_label (hi0_label);
+
+ temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
+ if (!temp)
+ goto fail;
+ temp = expand_binop (word_mode, add_optab, temp,
+ GEN_INT (GET_MODE_BITSIZE (word_mode)),
+ result, true, OPTAB_DIRECT);
+ if (!temp)
+ goto fail;
+ if (temp != result)
+ convert_move (result, temp, true);
+
+ emit_label (after_label);
+ convert_move (target, result, true);
+
+ seq = get_insns ();
+ end_sequence ();
+
+ add_equal_note (seq, target, CLZ, xop0, 0);
+ emit_insn (seq);
+ return target;
+
+ fail:
+ end_sequence ();
+ return 0;
+}
+
/* Try calculating
(bswap:narrow x)
as
static rtx
widen_bswap (enum machine_mode mode, rtx op0, rtx target)
{
- enum mode_class class = GET_MODE_CLASS (mode);
+ enum mode_class mclass = GET_MODE_CLASS (mode);
enum machine_mode wider_mode;
rtx x, last;
- if (!CLASS_HAS_WIDER_MODES_P (class))
+ if (!CLASS_HAS_WIDER_MODES_P (mclass))
return NULL_RTX;
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
- if (bswap_optab->handlers[wider_mode].insn_code != CODE_FOR_nothing)
+ if (optab_handler (bswap_optab, wider_mode) != CODE_FOR_nothing)
goto found;
return NULL_RTX;
x = widen_operand (op0, wider_mode, mode, true, true);
x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
+ gcc_assert (GET_MODE_PRECISION (wider_mode) == GET_MODE_BITSIZE (wider_mode)
+ && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode));
if (x != 0)
x = expand_shift (RSHIFT_EXPR, wider_mode, x,
- size_int (GET_MODE_BITSIZE (wider_mode)
- - GET_MODE_BITSIZE (mode)),
+ GET_MODE_BITSIZE (wider_mode)
+ - GET_MODE_BITSIZE (mode),
NULL_RTX, true);
if (x != 0)
t0 = expand_unop (word_mode, bswap_optab,
operand_subword_force (op, 1, mode), NULL_RTX, true);
- if (target == 0)
+ if (target == 0 || !valid_multiword_target_p (target))
target = gen_reg_rtx (mode);
if (REG_P (target))
- emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
+ emit_clobber (target);
emit_move_insn (operand_subword (target, 0, 1, mode), t0);
emit_move_insn (operand_subword (target, 1, 1, mode), t1);
static rtx
expand_parity (enum machine_mode mode, rtx op0, rtx target)
{
- enum mode_class class = GET_MODE_CLASS (mode);
- if (CLASS_HAS_WIDER_MODES_P (class))
+ enum mode_class mclass = GET_MODE_CLASS (mode);
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
enum machine_mode wider_mode;
for (wider_mode = mode; wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if (popcount_optab->handlers[(int) wider_mode].insn_code
- != CODE_FOR_nothing)
+ if (optab_handler (popcount_optab, wider_mode) != CODE_FOR_nothing)
{
rtx xop0, temp, last;
return 0;
}
+/* Try calculating ctz(x) as K - clz(x & -x) ,
+ where K is GET_MODE_PRECISION(mode) - 1.
+
+ Both __builtin_ctz and __builtin_clz are undefined at zero, so we
+ don't have to worry about what the hardware does in that case. (If
+ the clz instruction produces the usual value at 0, which is K, the
+ result of this code sequence will be -1; expand_ffs, below, relies
+ on this. It might be nice to have it be K instead, for consistency
+ with the (very few) processors that provide a ctz with a defined
+ value, but that would take one more instruction, and it would be
+ less convenient for expand_ffs anyway. */
+
+static rtx
+expand_ctz (enum machine_mode mode, rtx op0, rtx target)
+{
+ rtx seq, temp;
+
+ if (optab_handler (clz_optab, mode) == CODE_FOR_nothing)
+ return 0;
+
+ start_sequence ();
+
+ temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
+ if (temp)
+ temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
+ true, OPTAB_DIRECT);
+ if (temp)
+ temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
+ if (temp)
+ temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_PRECISION (mode) - 1),
+ temp, target,
+ true, OPTAB_DIRECT);
+ if (temp == 0)
+ {
+ end_sequence ();
+ return 0;
+ }
+
+ seq = get_insns ();
+ end_sequence ();
+
+ add_equal_note (seq, temp, CTZ, op0, 0);
+ emit_insn (seq);
+ return temp;
+}
+
+
+/* Try calculating ffs(x) using ctz(x) if we have that instruction, or
+ else with the sequence used by expand_clz.
+
+ The ffs builtin promises to return zero for a zero value and ctz/clz
+ may have an undefined value in that case. If they do not give us a
+ convenient value, we have to generate a test and branch. */
+static rtx
+expand_ffs (enum machine_mode mode, rtx op0, rtx target)
+{
+ HOST_WIDE_INT val = 0;
+ bool defined_at_zero = false;
+ rtx temp, seq;
+
+ if (optab_handler (ctz_optab, mode) != CODE_FOR_nothing)
+ {
+ start_sequence ();
+
+ temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
+ if (!temp)
+ goto fail;
+
+ defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
+ }
+ else if (optab_handler (clz_optab, mode) != CODE_FOR_nothing)
+ {
+ start_sequence ();
+ temp = expand_ctz (mode, op0, 0);
+ if (!temp)
+ goto fail;
+
+ if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
+ {
+ defined_at_zero = true;
+ val = (GET_MODE_PRECISION (mode) - 1) - val;
+ }
+ }
+ else
+ return 0;
+
+ if (defined_at_zero && val == -1)
+ /* No correction needed at zero. */;
+ else
+ {
+ /* We don't try to do anything clever with the situation found
+ on some processors (eg Alpha) where ctz(0:mode) ==
+ bitsize(mode). If someone can think of a way to send N to -1
+ and leave alone all values in the range 0..N-1 (where N is a
+ power of two), cheaper than this test-and-branch, please add it.
+
+ The test-and-branch is done after the operation itself, in case
+ the operation sets condition codes that can be recycled for this.
+ (This is true on i386, for instance.) */
+
+ rtx nonzero_label = gen_label_rtx ();
+ emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
+ mode, true, nonzero_label);
+
+ convert_move (temp, GEN_INT (-1), false);
+ emit_label (nonzero_label);
+ }
+
+ /* temp now has a value in the range -1..bitsize-1. ffs is supposed
+ to produce a value in the range 0..bitsize. */
+ temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
+ target, false, OPTAB_DIRECT);
+ if (!temp)
+ goto fail;
+
+ seq = get_insns ();
+ end_sequence ();
+
+ add_equal_note (seq, temp, FFS, op0, 0);
+ emit_insn (seq);
+ return temp;
+
+ fail:
+ end_sequence ();
+ return 0;
+}
+
/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
conditions, VAL may already be a SUBREG against which we cannot generate
a further SUBREG. In this case, we expect forcing the value into a
const struct real_format *fmt;
int bitpos, word, nwords, i;
enum machine_mode imode;
- HOST_WIDE_INT hi, lo;
+ double_int mask;
rtx temp, insns;
/* The format has to have a simple sign bit. */
nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
}
- if (bitpos < HOST_BITS_PER_WIDE_INT)
- {
- hi = 0;
- lo = (HOST_WIDE_INT) 1 << bitpos;
- }
- else
- {
- hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
- lo = 0;
- }
+ mask = double_int_setbit (double_int_zero, bitpos);
if (code == ABS)
- lo = ~lo, hi = ~hi;
+ mask = double_int_not (mask);
- if (target == 0 || target == op0)
+ if (target == 0
+ || target == op0
+ || (nwords > 1 && !valid_multiword_target_p (target)))
target = gen_reg_rtx (mode);
if (nwords > 1)
{
temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
op0_piece,
- immed_double_const (lo, hi, imode),
+ immed_double_int_const (mask, imode),
targ_piece, 1, OPTAB_LIB_WIDEN);
if (temp != targ_piece)
emit_move_insn (targ_piece, temp);
insns = get_insns ();
end_sequence ();
- temp = gen_rtx_fmt_e (code, mode, copy_rtx (op0));
- emit_no_conflict_block (insns, target, op0, NULL_RTX, temp);
+ emit_insn (insns);
}
else
{
temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
gen_lowpart (imode, op0),
- immed_double_const (lo, hi, imode),
+ immed_double_int_const (mask, imode),
gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
target = lowpart_subreg_maybe_copy (mode, temp, imode);
- set_unique_reg_note (get_last_insn (), REG_EQUAL,
- gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
+ set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+ target);
}
return target;
}
+/* As expand_unop, but will fail rather than attempt the operation in a
+ different mode or with a libcall. */
+static rtx
+expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
+ int unsignedp)
+{
+ if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
+ {
+ struct expand_operand ops[2];
+ enum insn_code icode = optab_handler (unoptab, mode);
+ rtx last = get_last_insn ();
+ rtx pat;
+
+ create_output_operand (&ops[0], target, mode);
+ create_convert_operand_from (&ops[1], op0, mode, unsignedp);
+ pat = maybe_gen_insn (icode, 2, ops);
+ if (pat)
+ {
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
+ && ! add_equal_note (pat, ops[0].value, unoptab->code,
+ ops[1].value, NULL_RTX))
+ {
+ delete_insns_since (last);
+ return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
+ }
+
+ emit_insn (pat);
+
+ return ops[0].value;
+ }
+ }
+ return 0;
+}
+
/* Generate code to perform an operation specified by UNOPTAB
on operand OP0, with result having machine-mode MODE.
expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
int unsignedp)
{
- enum mode_class class;
+ enum mode_class mclass = GET_MODE_CLASS (mode);
enum machine_mode wider_mode;
rtx temp;
- rtx last = get_last_insn ();
- rtx pat;
-
- class = GET_MODE_CLASS (mode);
-
- if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
- {
- int icode = (int) unoptab->handlers[(int) mode].insn_code;
- enum machine_mode mode0 = insn_data[icode].operand[1].mode;
- rtx xop0 = op0;
-
- if (target)
- temp = target;
- else
- temp = gen_reg_rtx (mode);
+ rtx libfunc;
- if (GET_MODE (xop0) != VOIDmode
- && GET_MODE (xop0) != mode0)
- xop0 = convert_to_mode (mode0, xop0, unsignedp);
-
- /* Now, if insn doesn't accept our operand, put it into a pseudo. */
+ temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
+ if (temp)
+ return temp;
- if (!insn_data[icode].operand[1].predicate (xop0, mode0))
- xop0 = copy_to_mode_reg (mode0, xop0);
+ /* It can't be done in this mode. Can we open-code it in a wider mode? */
- if (!insn_data[icode].operand[0].predicate (temp, mode))
- temp = gen_reg_rtx (mode);
+ /* Widening (or narrowing) clz needs special treatment. */
+ if (unoptab == clz_optab)
+ {
+ temp = widen_leading (mode, op0, target, unoptab);
+ if (temp)
+ return temp;
- pat = GEN_FCN (icode) (temp, xop0);
- if (pat)
+ if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
+ && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
{
- if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
- && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
- {
- delete_insns_since (last);
- return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
- }
-
- emit_insn (pat);
-
- return temp;
+ temp = expand_doubleword_clz (mode, op0, target);
+ if (temp)
+ return temp;
}
- else
- delete_insns_since (last);
- }
- /* It can't be done in this mode. Can we open-code it in a wider mode? */
+ goto try_libcall;
+ }
- /* Widening clz needs special treatment. */
- if (unoptab == clz_optab)
+ if (unoptab == clrsb_optab)
{
- temp = widen_clz (mode, op0, target);
+ temp = widen_leading (mode, op0, target, unoptab);
if (temp)
return temp;
- else
- goto try_libcall;
+ goto try_libcall;
}
/* Widening (or narrowing) bswap needs special treatment. */
return temp;
if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
- && unoptab->handlers[word_mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
{
temp = expand_doubleword_bswap (mode, op0, target);
if (temp)
goto try_libcall;
}
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
+ if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
{
rtx xop0 = op0;
+ rtx last = get_last_insn ();
/* For certain operations, we need not actually extend
the narrow operand, as long as we will truncate the
xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
(unoptab == neg_optab
|| unoptab == one_cmpl_optab)
- && class == MODE_INT);
+ && mclass == MODE_INT);
temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
unsignedp);
if (temp)
{
- if (class != MODE_INT
- || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
- GET_MODE_BITSIZE (wider_mode)))
+ if (mclass != MODE_INT
+ || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
{
if (target == 0)
target = gen_reg_rtx (mode);
/* These can be done a word at a time. */
if (unoptab == one_cmpl_optab
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) > UNITS_PER_WORD
- && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
{
int i;
rtx insns;
- if (target == 0 || target == op0)
+ if (target == 0 || target == op0 || !valid_multiword_target_p (target))
target = gen_reg_rtx (mode);
start_sequence ();
insns = get_insns ();
end_sequence ();
- emit_no_conflict_block (insns, target, op0, NULL_RTX,
- gen_rtx_fmt_e (unoptab->code, mode,
- copy_rtx (op0)));
+ emit_insn (insns);
return target;
}
return temp;
}
+ /* Try implementing ffs (x) in terms of clz (x). */
+ if (unoptab == ffs_optab)
+ {
+ temp = expand_ffs (mode, op0, target);
+ if (temp)
+ return temp;
+ }
+
+ /* Try implementing ctz (x) in terms of clz (x). */
+ if (unoptab == ctz_optab)
+ {
+ temp = expand_ctz (mode, op0, target);
+ if (temp)
+ return temp;
+ }
+
try_libcall:
/* Now try a library call in this mode. */
- if (unoptab->handlers[(int) mode].libfunc)
+ libfunc = optab_libfunc (unoptab, mode);
+ if (libfunc)
{
rtx insns;
rtx value;
+ rtx eq_value;
enum machine_mode outmode = mode;
/* All of these functions return small values. Thus we choose to
have them return something that isn't a double-word. */
if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
- || unoptab == popcount_optab || unoptab == parity_optab)
+ || unoptab == clrsb_optab || unoptab == popcount_optab
+ || unoptab == parity_optab)
outmode
- = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node)));
+ = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node),
+ optab_libfunc (unoptab, mode)));
start_sequence ();
/* Pass 1 for NO_QUEUE so we don't lose any increments
if the libcall is cse'd or moved. */
- value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
- NULL_RTX, LCT_CONST, outmode,
+ value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
1, op0, mode);
insns = get_insns ();
end_sequence ();
target = gen_reg_rtx (outmode);
- emit_libcall_block (insns, target, value,
- gen_rtx_fmt_e (unoptab->code, outmode, op0));
+ eq_value = gen_rtx_fmt_e (unoptab->code, mode, op0);
+ if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
+ eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
+ else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
+ eq_value = simplify_gen_unary (ZERO_EXTEND, outmode, eq_value, mode);
+ emit_libcall_block (insns, target, value, eq_value);
return target;
}
/* It can't be done in this mode. Can we do it in a wider mode? */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
{
- if ((unoptab->handlers[(int) wider_mode].insn_code
- != CODE_FOR_nothing)
- || unoptab->handlers[(int) wider_mode].libfunc)
+ if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing
+ || optab_libfunc (unoptab, wider_mode))
{
rtx xop0 = op0;
+ rtx last = get_last_insn ();
/* For certain operations, we need not actually extend
the narrow operand, as long as we will truncate the
xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
(unoptab == neg_optab
|| unoptab == one_cmpl_optab)
- && class == MODE_INT);
+ && mclass == MODE_INT);
temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
unsignedp);
/* If we are generating clz using wider mode, adjust the
- result. */
- if (unoptab == clz_optab && temp != 0)
+ result. Similarly for clrsb. */
+ if ((unoptab == clz_optab || unoptab == clrsb_optab)
+ && temp != 0)
temp = expand_binop (wider_mode, sub_optab, temp,
- GEN_INT (GET_MODE_BITSIZE (wider_mode)
- - GET_MODE_BITSIZE (mode)),
+ GEN_INT (GET_MODE_PRECISION (wider_mode)
+ - GET_MODE_PRECISION (mode)),
target, true, OPTAB_DIRECT);
if (temp)
{
- if (class != MODE_INT)
+ if (mclass != MODE_INT)
{
if (target == 0)
target = gen_reg_rtx (mode);
}
/* If we have a MAX insn, we can do this as MAX (x, -x). */
- if (smax_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
+ if (optab_handler (smax_optab, mode) != CODE_FOR_nothing
&& !HONOR_SIGNED_ZEROS (mode))
{
rtx last = get_last_insn ();
value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
where W is the width of MODE. */
- if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
+ if (GET_MODE_CLASS (mode) == MODE_INT
+ && BRANCH_COST (optimize_insn_for_speed_p (),
+ false) >= 2)
{
rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
- size_int (GET_MODE_BITSIZE (mode) - 1),
+ GET_MODE_PRECISION (mode) - 1,
NULL_RTX, 0);
temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
NO_DEFER_POP;
do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
- NULL_RTX, NULL_RTX, op1);
+ NULL_RTX, NULL_RTX, op1, -1);
op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
target, target, 0);
return target;
}
-/* A subroutine of expand_copysign, perform the copysign operation using the
- abs and neg primitives advertised to exist on the target. The assumption
- is that we have a split register file, and leaving op0 in fp registers,
- and not playing with subregs so much, will help the register allocator. */
+/* Emit code to compute the one's complement absolute value of OP0
+ (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
+ (TARGET may be NULL_RTX.) The return value says where the result
+ actually is to be found.
-static rtx
-expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
- int bitpos, bool op0_is_abs)
+ MODE is the mode of the operand; the mode of the result is
+ different but can be deduced from MODE. */
+
+rtx
+expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
{
- enum machine_mode imode;
- int icode;
- rtx sign, label;
+ rtx temp;
- if (target == op1)
- target = NULL_RTX;
+ /* Not applicable for floating point modes. */
+ if (FLOAT_MODE_P (mode))
+ return NULL_RTX;
- /* Check if the back end provides an insn that handles signbit for the
- argument's mode. */
- icode = (int) signbit_optab->handlers [(int) mode].insn_code;
- if (icode != CODE_FOR_nothing)
- {
- imode = insn_data[icode].operand[0].mode;
- sign = gen_reg_rtx (imode);
- emit_unop_insn (icode, sign, op1, UNKNOWN);
- }
- else
+ /* If we have a MAX insn, we can do this as MAX (x, ~x). */
+ if (optab_handler (smax_optab, mode) != CODE_FOR_nothing)
{
- HOST_WIDE_INT hi, lo;
+ rtx last = get_last_insn ();
- if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
- {
- imode = int_mode_for_mode (mode);
- if (imode == BLKmode)
+ temp = expand_unop (mode, one_cmpl_optab, op0, NULL_RTX, 0);
+ if (temp != 0)
+ temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
+ OPTAB_WIDEN);
+
+ if (temp != 0)
+ return temp;
+
+ delete_insns_since (last);
+ }
+
+ /* If this machine has expensive jumps, we can do one's complement
+ absolute value of X as (((signed) x >> (W-1)) ^ x). */
+
+ if (GET_MODE_CLASS (mode) == MODE_INT
+ && BRANCH_COST (optimize_insn_for_speed_p (),
+ false) >= 2)
+ {
+ rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
+ GET_MODE_PRECISION (mode) - 1,
+ NULL_RTX, 0);
+
+ temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
+ OPTAB_LIB_WIDEN);
+
+ if (temp != 0)
+ return temp;
+ }
+
+ return NULL_RTX;
+}
+
+/* A subroutine of expand_copysign, perform the copysign operation using the
+ abs and neg primitives advertised to exist on the target. The assumption
+ is that we have a split register file, and leaving op0 in fp registers,
+ and not playing with subregs so much, will help the register allocator. */
+
+static rtx
+expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+ int bitpos, bool op0_is_abs)
+{
+ enum machine_mode imode;
+ enum insn_code icode;
+ rtx sign, label;
+
+ if (target == op1)
+ target = NULL_RTX;
+
+ /* Check if the back end provides an insn that handles signbit for the
+ argument's mode. */
+ icode = optab_handler (signbit_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ {
+ imode = insn_data[(int) icode].operand[0].mode;
+ sign = gen_reg_rtx (imode);
+ emit_unop_insn (icode, sign, op1, UNKNOWN);
+ }
+ else
+ {
+ double_int mask;
+
+ if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
+ {
+ imode = int_mode_for_mode (mode);
+ if (imode == BLKmode)
return NULL_RTX;
op1 = gen_lowpart (imode, op1);
}
op1 = operand_subword_force (op1, word, mode);
}
- if (bitpos < HOST_BITS_PER_WIDE_INT)
- {
- hi = 0;
- lo = (HOST_WIDE_INT) 1 << bitpos;
- }
- else
- {
- hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
- lo = 0;
- }
+ mask = double_int_setbit (double_int_zero, bitpos);
- sign = gen_reg_rtx (imode);
sign = expand_binop (imode, and_optab, op1,
- immed_double_const (lo, hi, imode),
+ immed_double_int_const (mask, imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
}
int bitpos, bool op0_is_abs)
{
enum machine_mode imode;
- HOST_WIDE_INT hi, lo;
+ double_int mask;
int word, nwords, i;
rtx temp, insns;
nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
}
- if (bitpos < HOST_BITS_PER_WIDE_INT)
- {
- hi = 0;
- lo = (HOST_WIDE_INT) 1 << bitpos;
- }
- else
- {
- hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
- lo = 0;
- }
+ mask = double_int_setbit (double_int_zero, bitpos);
- if (target == 0 || target == op0 || target == op1)
+ if (target == 0
+ || target == op0
+ || target == op1
+ || (nwords > 1 && !valid_multiword_target_p (target)))
target = gen_reg_rtx (mode);
if (nwords > 1)
if (i == word)
{
if (!op0_is_abs)
- op0_piece = expand_binop (imode, and_optab, op0_piece,
- immed_double_const (~lo, ~hi, imode),
- NULL_RTX, 1, OPTAB_LIB_WIDEN);
+ op0_piece
+ = expand_binop (imode, and_optab, op0_piece,
+ immed_double_int_const (double_int_not (mask),
+ imode),
+ NULL_RTX, 1, OPTAB_LIB_WIDEN);
op1 = expand_binop (imode, and_optab,
operand_subword_force (op1, i, mode),
- immed_double_const (lo, hi, imode),
+ immed_double_int_const (mask, imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
temp = expand_binop (imode, ior_optab, op0_piece, op1,
insns = get_insns ();
end_sequence ();
- emit_no_conflict_block (insns, target, op0, op1, NULL_RTX);
+ emit_insn (insns);
}
else
{
op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
- immed_double_const (lo, hi, imode),
+ immed_double_int_const (mask, imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
op0 = gen_lowpart (imode, op0);
if (!op0_is_abs)
op0 = expand_binop (imode, and_optab, op0,
- immed_double_const (~lo, ~hi, imode),
+ immed_double_int_const (double_int_not (mask),
+ imode),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
temp = expand_binop (imode, ior_optab, op0, op1,
if (fmt->signbit_ro >= 0
&& (GET_CODE (op0) == CONST_DOUBLE
- || (neg_optab->handlers[mode].insn_code != CODE_FOR_nothing
- && abs_optab->handlers[mode].insn_code != CODE_FOR_nothing)))
+ || (optab_handler (neg_optab, mode) != CODE_FOR_nothing
+ && optab_handler (abs_optab, mode) != CODE_FOR_nothing)))
{
temp = expand_copysign_absneg (mode, op0, op1, target,
fmt->signbit_ro, op0_is_abs);
with two operands: an output TARGET and an input OP0.
TARGET *must* be nonzero, and the output is always stored there.
CODE is an rtx code such that (CODE OP0) is an rtx that describes
- the value that is stored into TARGET. */
+ the value that is stored into TARGET.
-void
-emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
+ Return false if expansion failed. */
+
+bool
+maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0,
+ enum rtx_code code)
{
- rtx temp;
- enum machine_mode mode0 = insn_data[icode].operand[1].mode;
+ struct expand_operand ops[2];
rtx pat;
- temp = target;
-
- /* Now, if insn does not accept our operands, put them into pseudos. */
-
- if (!insn_data[icode].operand[1].predicate (op0, mode0))
- op0 = copy_to_mode_reg (mode0, op0);
-
- if (!insn_data[icode].operand[0].predicate (temp, GET_MODE (temp)))
- temp = gen_reg_rtx (GET_MODE (temp));
-
- pat = GEN_FCN (icode) (temp, op0);
+ create_output_operand (&ops[0], target, GET_MODE (target));
+ create_input_operand (&ops[1], op0, GET_MODE (op0));
+ pat = maybe_gen_insn (icode, 2, ops);
+ if (!pat)
+ return false;
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
- add_equal_note (pat, temp, code, op0, NULL_RTX);
+ add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
emit_insn (pat);
- if (temp != target)
- emit_move_insn (target, temp);
+ if (ops[0].value != target)
+ emit_move_insn (target, ops[0].value);
+ return true;
+}
+/* Generate an instruction whose insn-code is INSN_CODE,
+ with two operands: an output TARGET and an input OP0.
+ TARGET *must* be nonzero, and the output is always stored there.
+ CODE is an rtx code such that (CODE OP0) is an rtx that describes
+ the value that is stored into TARGET. */
+
+void
+emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code)
+{
+ bool ok = maybe_emit_unop_insn (icode, target, op0, code);
+ gcc_assert (ok);
}
\f
struct no_conflict_data
bool must_stay;
};
-/* Called via note_stores by emit_no_conflict_block and emit_libcall_block.
- Set P->must_stay if the currently examined clobber / store has to stay
- in the list of insns that constitute the actual no_conflict block /
- libcall block. */
+/* Called via note_stores by emit_libcall_block. Set P->must_stay if
+ the currently examined clobber / store has to stay in the list of
+ insns that constitute the actual libcall block. */
static void
-no_conflict_move_test (rtx dest, rtx set, void *p0)
+no_conflict_move_test (rtx dest, const_rtx set, void *p0)
{
- struct no_conflict_data *p= p0;
+ struct no_conflict_data *p= (struct no_conflict_data *) p0;
/* If this inns directly contributes to setting the target, it must stay. */
if (reg_overlap_mentioned_p (p->target, dest))
p->must_stay = true;
}
-/* Encapsulate the block starting at FIRST and ending with LAST, which is
- logically equivalent to EQUIV, so it gets manipulated as a unit if it
- is possible to do so. */
-
-void
-maybe_encapsulate_block (rtx first, rtx last, rtx equiv)
-{
- if (!flag_non_call_exceptions || !may_trap_p (equiv))
- {
- /* We can't attach the REG_LIBCALL and REG_RETVAL notes when the
- encapsulated region would not be in one basic block, i.e. when
- there is a control_flow_insn_p insn between FIRST and LAST. */
- bool attach_libcall_retval_notes = true;
- rtx insn, next = NEXT_INSN (last);
-
- for (insn = first; insn != next; insn = NEXT_INSN (insn))
- if (control_flow_insn_p (insn))
- {
- attach_libcall_retval_notes = false;
- break;
- }
-
- if (attach_libcall_retval_notes)
- {
- REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
- REG_NOTES (first));
- REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
- REG_NOTES (last));
- next = NEXT_INSN (last);
- for (insn = first; insn != next; insn = NEXT_INSN (insn))
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LIBCALL_ID,
- GEN_INT (libcall_id),
- REG_NOTES (insn));
- libcall_id++;
- }
- }
-}
-
-/* Emit code to perform a series of operations on a multi-word quantity, one
- word at a time.
-
- Such a block is preceded by a CLOBBER of the output, consists of multiple
- insns, each setting one word of the output, and followed by a SET copying
- the output to itself.
-
- Each of the insns setting words of the output receives a REG_NO_CONFLICT
- note indicating that it doesn't conflict with the (also multi-word)
- inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
- notes.
-
- INSNS is a block of code generated to perform the operation, not including
- the CLOBBER and final copy. All insns that compute intermediate values
- are first emitted, followed by the block as described above.
-
- TARGET, OP0, and OP1 are the output and inputs of the operations,
- respectively. OP1 may be zero for a unary operation.
-
- EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
- on the last insn.
-
- If TARGET is not a register, INSNS is simply emitted with no special
- processing. Likewise if anything in INSNS is not an INSN or if
- there is a libcall block inside INSNS.
-
- The final insn emitted is returned. */
-
-rtx
-emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv)
-{
- rtx prev, next, first, last, insn;
-
- if (!REG_P (target) || reload_in_progress)
- return emit_insn (insns);
- else
- for (insn = insns; insn; insn = NEXT_INSN (insn))
- if (!NONJUMP_INSN_P (insn)
- || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
- return emit_insn (insns);
-
- /* First emit all insns that do not store into words of the output and remove
- these from the list. */
- for (insn = insns; insn; insn = next)
- {
- rtx note;
- struct no_conflict_data data;
-
- next = NEXT_INSN (insn);
-
- /* Some ports (cris) create a libcall regions at their own. We must
- avoid any potential nesting of LIBCALLs. */
- if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
- remove_note (insn, note);
- if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
- remove_note (insn, note);
- if ((note = find_reg_note (insn, REG_LIBCALL_ID, NULL)) != NULL)
- remove_note (insn, note);
-
- data.target = target;
- data.first = insns;
- data.insn = insn;
- data.must_stay = 0;
- note_stores (PATTERN (insn), no_conflict_move_test, &data);
- if (! data.must_stay)
- {
- if (PREV_INSN (insn))
- NEXT_INSN (PREV_INSN (insn)) = next;
- else
- insns = next;
-
- if (next)
- PREV_INSN (next) = PREV_INSN (insn);
-
- add_insn (insn);
- }
- }
-
- prev = get_last_insn ();
-
- /* Now write the CLOBBER of the output, followed by the setting of each
- of the words, followed by the final copy. */
- if (target != op0 && target != op1)
- emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
-
- for (insn = insns; insn; insn = next)
- {
- next = NEXT_INSN (insn);
- add_insn (insn);
-
- if (op1 && REG_P (op1))
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
- REG_NOTES (insn));
-
- if (op0 && REG_P (op0))
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
- REG_NOTES (insn));
- }
-
- if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
- != CODE_FOR_nothing)
- {
- last = emit_move_insn (target, target);
- if (equiv)
- set_unique_reg_note (last, REG_EQUAL, equiv);
- }
- else
- {
- last = get_last_insn ();
-
- /* Remove any existing REG_EQUAL note from "last", or else it will
- be mistaken for a note referring to the full contents of the
- alleged libcall value when found together with the REG_RETVAL
- note added below. An existing note can come from an insn
- expansion at "last". */
- remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
- }
-
- if (prev == 0)
- first = get_insns ();
- else
- first = NEXT_INSN (prev);
-
- maybe_encapsulate_block (first, last, equiv);
-
- return last;
-}
\f
/* Emit code to make a call to a constant function or a library call.
loading constants into registers; doing so allows them to be safely cse'ed
between blocks. Then we emit all the other insns in the block, followed by
an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
- note with an operand of EQUIV.
-
- Moving assignments to pseudos outside of the block is done to improve
- the generated code, but is not required to generate correct code,
- hence being unable to move an assignment is not grounds for not making
- a libcall block. There are two reasons why it is safe to leave these
- insns inside the block: First, we know that these pseudos cannot be
- used in generated RTL outside the block since they are created for
- temporary purposes within the block. Second, CSE will not record the
- values of anything set inside a libcall block, so we know they must
- be dead at the end of the block.
-
- Except for the first group of insns (the ones setting pseudos), the
- block is delimited by REG_RETVAL and REG_LIBCALL notes. */
+ note with an operand of EQUIV. */
+
void
emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
{
rtx final_dest = target;
- rtx prev, next, first, last, insn;
+ rtx next, last, insn;
/* If this is a reg with REG_USERVAR_P set, then it could possibly turn
into a MEM later. Protect the libcall block from this change. */
/* If we're using non-call exceptions, a libcall corresponding to an
operation that may trap may also trap. */
- if (flag_non_call_exceptions && may_trap_p (equiv))
+ /* ??? See the comment in front of make_reg_eh_region_note. */
+ if (cfun->can_throw_non_call_exceptions && may_trap_p (equiv))
{
for (insn = insns; insn; insn = NEXT_INSN (insn))
if (CALL_P (insn))
{
rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
-
- if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
- remove_note (insn, note);
+ if (note)
+ {
+ int lp_nr = INTVAL (XEXP (note, 0));
+ if (lp_nr == 0 || lp_nr == INT_MIN)
+ remove_note (insn, note);
+ }
}
}
else
- /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
- reg note to indicate that this call cannot throw or execute a nonlocal
- goto (unless there is already a REG_EH_REGION note, in which case
- we update it). */
- for (insn = insns; insn; insn = NEXT_INSN (insn))
- if (CALL_P (insn))
- {
- rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
-
- if (note != 0)
- XEXP (note, 0) = constm1_rtx;
- else
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, constm1_rtx,
- REG_NOTES (insn));
- }
+ {
+ /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
+ reg note to indicate that this call cannot throw or execute a nonlocal
+ goto (unless there is already a REG_EH_REGION note, in which case
+ we update it). */
+ for (insn = insns; insn; insn = NEXT_INSN (insn))
+ if (CALL_P (insn))
+ make_reg_eh_region_note_nothrow_nononlocal (insn);
+ }
/* First emit all insns that set pseudos. Remove them from the list as
we go. Avoid insns that set pseudos which were referenced in previous
for (insn = insns; insn; insn = next)
{
rtx set = single_set (insn);
- rtx note;
-
- /* Some ports (cris) create a libcall regions at their own. We must
- avoid any potential nesting of LIBCALLs. */
- if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
- remove_note (insn, note);
- if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
- remove_note (insn, note);
- if ((note = find_reg_note (insn, REG_LIBCALL_ID, NULL)) != NULL)
- remove_note (insn, note);
next = NEXT_INSN (insn);
break;
}
- prev = get_last_insn ();
-
/* Write the remaining insns followed by the final copy. */
-
for (insn = insns; insn; insn = next)
{
next = NEXT_INSN (insn);
}
last = emit_move_insn (target, result);
- if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
- != CODE_FOR_nothing)
- set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
- else
- {
- /* Remove any existing REG_EQUAL note from "last", or else it will
- be mistaken for a note referring to the full contents of the
- libcall value when found together with the REG_RETVAL note added
- below. An existing note can come from an insn expansion at
- "last". */
- remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
- }
+ set_dst_reg_note (last, REG_EQUAL, copy_rtx (equiv), target);
if (final_dest != target)
emit_move_insn (final_dest, target);
-
- if (prev == 0)
- first = get_insns ();
- else
- first = NEXT_INSN (prev);
-
- maybe_encapsulate_block (first, last, equiv);
}
\f
/* Nonzero if we can perform a comparison of mode MODE straightforwardly.
can_compare_p (enum rtx_code code, enum machine_mode mode,
enum can_compare_purpose purpose)
{
+ rtx test;
+ test = gen_rtx_fmt_ee (code, mode, const0_rtx, const0_rtx);
do
{
- if (cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
- {
- if (purpose == ccp_jump)
- return bcc_gen_fctn[(int) code] != NULL;
- else if (purpose == ccp_store_flag)
- return setcc_gen_code[(int) code] != CODE_FOR_nothing;
- else
- /* There's only one cmov entry point, and it's allowed to fail. */
- return 1;
- }
+ enum insn_code icode;
+
if (purpose == ccp_jump
- && cbranch_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
- return 1;
- if (purpose == ccp_cmov
- && cmov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
- return 1;
+ && (icode = optab_handler (cbranch_optab, mode)) != CODE_FOR_nothing
+ && insn_operand_matches (icode, 0, test))
+ return 1;
if (purpose == ccp_store_flag
- && cstore_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ && (icode = optab_handler (cstore_optab, mode)) != CODE_FOR_nothing
+ && insn_operand_matches (icode, 1, test))
+ return 1;
+ if (purpose == ccp_cmov
+ && optab_handler (cmov_optab, mode) != CODE_FOR_nothing)
return 1;
+
mode = GET_MODE_WIDER_MODE (mode);
+ PUT_MODE (test, mode);
}
while (mode != VOIDmode);
*PMODE is the mode of the inputs (in case they are const_int).
*PUNSIGNEDP nonzero says that the operands are unsigned;
- this matters if they need to be widened.
+ this matters if they need to be widened (as given by METHODS).
If they have mode BLKmode, then SIZE specifies the size of both operands.
comparisons must have already been folded. */
static void
-prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
- enum machine_mode *pmode, int *punsignedp,
- enum can_compare_purpose purpose)
+prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
+ int unsignedp, enum optab_methods methods,
+ rtx *ptest, enum machine_mode *pmode)
{
enum machine_mode mode = *pmode;
- rtx x = *px, y = *py;
- int unsignedp = *punsignedp;
+ rtx libfunc, test;
+ enum machine_mode cmp_mode;
+ enum mode_class mclass;
- /* If we are inside an appropriately-short loop and we are optimizing,
- force expensive constants into a register. */
+ /* The other methods are not needed. */
+ gcc_assert (methods == OPTAB_DIRECT || methods == OPTAB_WIDEN
+ || methods == OPTAB_LIB_WIDEN);
+
+ /* If we are optimizing, force expensive constants into a register. */
if (CONSTANT_P (x) && optimize
- && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
+ && (rtx_cost (x, COMPARE, 0, optimize_insn_for_speed_p ())
+ > COSTS_N_INSNS (1)))
x = force_reg (mode, x);
if (CONSTANT_P (y) && optimize
- && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
+ && (rtx_cost (y, COMPARE, 1, optimize_insn_for_speed_p ())
+ > COSTS_N_INSNS (1)))
y = force_reg (mode, y);
#ifdef HAVE_cc0
/* Don't let both operands fail to indicate the mode. */
if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
x = force_reg (mode, x);
+ if (mode == VOIDmode)
+ mode = GET_MODE (x) != VOIDmode ? GET_MODE (x) : GET_MODE (y);
/* Handle all BLKmode compares. */
if (mode == BLKmode)
{
- enum machine_mode cmp_mode, result_mode;
+ enum machine_mode result_mode;
enum insn_code cmp_code;
tree length_type;
rtx libfunc;
cmp_mode != VOIDmode;
cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
{
- cmp_code = cmpmem_optab[cmp_mode];
+ cmp_code = direct_optab_handler (cmpmem_optab, cmp_mode);
if (cmp_code == CODE_FOR_nothing)
- cmp_code = cmpstr_optab[cmp_mode];
+ cmp_code = direct_optab_handler (cmpstr_optab, cmp_mode);
if (cmp_code == CODE_FOR_nothing)
- cmp_code = cmpstrn_optab[cmp_mode];
+ cmp_code = direct_optab_handler (cmpstrn_optab, cmp_mode);
if (cmp_code == CODE_FOR_nothing)
continue;
/* Must make sure the size fits the insn's mode. */
- if ((GET_CODE (size) == CONST_INT
+ if ((CONST_INT_P (size)
&& INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
|| (GET_MODE_BITSIZE (GET_MODE (size))
> GET_MODE_BITSIZE (cmp_mode)))
size = convert_to_mode (cmp_mode, size, 1);
emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
- *px = result;
- *py = const0_rtx;
- *pmode = result_mode;
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
+ *pmode = result_mode;
return;
}
+ if (methods != OPTAB_LIB && methods != OPTAB_LIB_WIDEN)
+ goto fail;
+
/* Otherwise call a library function, memcmp. */
libfunc = memcmp_libfunc;
length_type = sizetype;
size = convert_to_mode (TYPE_MODE (length_type), size,
TYPE_UNSIGNED (length_type));
- result = emit_library_call_value (libfunc, 0, LCT_PURE_MAKE_BLOCK,
+ result = emit_library_call_value (libfunc, 0, LCT_PURE,
result_mode, 3,
XEXP (x, 0), Pmode,
XEXP (y, 0), Pmode,
size, cmp_mode);
- *px = result;
- *py = const0_rtx;
+
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
*pmode = result_mode;
return;
}
/* Don't allow operands to the compare to trap, as that can put the
compare and branch in different basic blocks. */
- if (flag_non_call_exceptions)
+ if (cfun->can_throw_non_call_exceptions)
{
if (may_trap_p (x))
x = force_reg (mode, x);
y = force_reg (mode, y);
}
- *px = x;
- *py = y;
- if (can_compare_p (*pcomparison, mode, purpose))
- return;
+ if (GET_MODE_CLASS (mode) == MODE_CC)
+ {
+ gcc_assert (can_compare_p (comparison, CCmode, ccp_jump));
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
+ return;
+ }
+
+ mclass = GET_MODE_CLASS (mode);
+ test = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
+ cmp_mode = mode;
+ do
+ {
+ enum insn_code icode;
+ icode = optab_handler (cbranch_optab, cmp_mode);
+ if (icode != CODE_FOR_nothing
+ && insn_operand_matches (icode, 0, test))
+ {
+ rtx last = get_last_insn ();
+ rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
+ rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
+ if (op0 && op1
+ && insn_operand_matches (icode, 1, op0)
+ && insn_operand_matches (icode, 2, op1))
+ {
+ XEXP (test, 0) = op0;
+ XEXP (test, 1) = op1;
+ *ptest = test;
+ *pmode = cmp_mode;
+ return;
+ }
+ delete_insns_since (last);
+ }
+
+ if (methods == OPTAB_DIRECT || !CLASS_HAS_WIDER_MODES_P (mclass))
+ break;
+ cmp_mode = GET_MODE_WIDER_MODE (cmp_mode);
+ }
+ while (cmp_mode != VOIDmode);
- /* Handle a lib call just for the mode we are using. */
+ if (methods != OPTAB_LIB_WIDEN)
+ goto fail;
- if (cmp_optab->handlers[(int) mode].libfunc && !SCALAR_FLOAT_MODE_P (mode))
+ if (!SCALAR_FLOAT_MODE_P (mode))
{
- rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
rtx result;
+ /* Handle a libcall just for the mode we are using. */
+ libfunc = optab_libfunc (cmp_optab, mode);
+ gcc_assert (libfunc);
+
/* If we want unsigned, and this mode has a distinct unsigned
comparison routine, use that. */
- if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
- libfunc = ucmp_optab->handlers[(int) mode].libfunc;
+ if (unsignedp)
+ {
+ rtx ulibfunc = optab_libfunc (ucmp_optab, mode);
+ if (ulibfunc)
+ libfunc = ulibfunc;
+ }
- result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
+ result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
targetm.libgcc_cmp_return_mode (),
2, x, mode, y, mode);
/* There are two kinds of comparison routines. Biased routines
return 0/1/2, and unbiased routines return -1/0/1. Other parts
of gcc expect that the comparison operation is equivalent
- to the modified comparison. For signed comparisons compare the
+ to the modified comparison. For signed comparisons compare the
result against 1 in the biased case, and zero in the unbiased
case. For unsigned comparisons always compare against 1 after
biasing the unbiased result by adding 1. This gives us a way to
- represent LTU. */
- *px = result;
- *pmode = word_mode;
- *py = const1_rtx;
+ represent LTU.
+ The comparisons in the fixed-point helper library are always
+ biased. */
+ x = result;
+ y = const1_rtx;
- if (!TARGET_LIB_INT_CMP_BIASED)
+ if (!TARGET_LIB_INT_CMP_BIASED && !ALL_FIXED_POINT_MODE_P (mode))
{
- if (*punsignedp)
- *px = plus_constant (result, 1);
+ if (unsignedp)
+ x = plus_constant (result, 1);
else
- *py = const0_rtx;
+ y = const0_rtx;
}
- return;
+
+ *pmode = word_mode;
+ prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods,
+ ptest, pmode);
}
+ else
+ prepare_float_lib_cmp (x, y, comparison, ptest, pmode);
- gcc_assert (SCALAR_FLOAT_MODE_P (mode));
- prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
+ return;
+
+ fail:
+ *ptest = NULL_RTX;
}
/* Before emitting an insn with code ICODE, make sure that X, which is going
WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
that it is accepted by the operand predicate. Return the new value. */
-static rtx
-prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
+rtx
+prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
enum machine_mode wider_mode, int unsignedp)
{
if (mode != wider_mode)
x = convert_modes (wider_mode, mode, x, unsignedp);
- if (!insn_data[icode].operand[opnum].predicate
- (x, insn_data[icode].operand[opnum].mode))
+ if (!insn_operand_matches (icode, opnum, x))
{
if (reload_completed)
return NULL_RTX;
- x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
+ x = copy_to_mode_reg (insn_data[(int) icode].operand[opnum].mode, x);
}
return x;
}
/* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
- we can do the comparison.
- The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
- be NULL_RTX which indicates that only a comparison is to be generated. */
+ we can do the branch. */
static void
-emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
- enum rtx_code comparison, int unsignedp, rtx label)
+emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label)
{
- rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
- enum mode_class class = GET_MODE_CLASS (mode);
- enum machine_mode wider_mode = mode;
-
- /* Try combined insns first. */
- do
- {
- enum insn_code icode;
- PUT_MODE (test, wider_mode);
-
- if (label)
- {
- icode = cbranch_optab->handlers[(int) wider_mode].insn_code;
-
- if (icode != CODE_FOR_nothing
- && insn_data[icode].operand[0].predicate (test, wider_mode))
- {
- x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
- y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
- emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
- return;
- }
- }
-
- /* Handle some compares against zero. */
- icode = (int) tst_optab->handlers[(int) wider_mode].insn_code;
- if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
- {
- x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
- emit_insn (GEN_FCN (icode) (x));
- if (label)
- emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
- return;
- }
-
- /* Handle compares for which there is a directly suitable insn. */
-
- icode = (int) cmp_optab->handlers[(int) wider_mode].insn_code;
- if (icode != CODE_FOR_nothing)
- {
- x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
- y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
- emit_insn (GEN_FCN (icode) (x, y));
- if (label)
- emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
- return;
- }
-
- if (!CLASS_HAS_WIDER_MODES_P (class))
- break;
+ enum machine_mode optab_mode;
+ enum mode_class mclass;
+ enum insn_code icode;
- wider_mode = GET_MODE_WIDER_MODE (wider_mode);
- }
- while (wider_mode != VOIDmode);
+ mclass = GET_MODE_CLASS (mode);
+ optab_mode = (mclass == MODE_CC) ? CCmode : mode;
+ icode = optab_handler (cbranch_optab, optab_mode);
- gcc_unreachable ();
+ gcc_assert (icode != CODE_FOR_nothing);
+ gcc_assert (insn_operand_matches (icode, 0, test));
+ emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0), XEXP (test, 1), label));
}
/* Generate code to compare X with Y so that the condition codes are
ensure that the comparison RTL has the canonical form.
UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
- need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
- the proper branch condition code.
+ need to be widened. UNSIGNEDP is also used to select the proper
+ branch condition code.
If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
MODE is the mode of the inputs (in case they are const_int).
- COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
- be passed unchanged to emit_cmp_insn, then potentially converted into an
- unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
+ COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
+ It will be potentially converted into an unsigned variant based on
+ UNSIGNEDP to select a proper jump instruction. */
void
emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
enum machine_mode mode, int unsignedp, rtx label)
{
rtx op0 = x, op1 = y;
+ rtx test;
/* Swap operands and condition to ensure canonical RTL. */
- if (swap_commutative_operands_p (x, y))
+ if (swap_commutative_operands_p (x, y)
+ && can_compare_p (swap_condition (comparison), mode, ccp_jump))
{
- /* If we're not emitting a branch, callers are required to pass
- operands in an order conforming to canonical RTL. We relax this
- for commutative comparsions so callers using EQ don't need to do
- swapping by hand. */
- gcc_assert (label || (comparison == swap_condition (comparison)));
-
op0 = y, op1 = x;
comparison = swap_condition (comparison);
}
-#ifdef HAVE_cc0
- /* If OP0 is still a constant, then both X and Y must be constants.
- Force X into a register to create canonical RTL. */
+ /* If OP0 is still a constant, then both X and Y must be constants
+ or the opposite comparison is not supported. Force X into a register
+ to create canonical RTL. */
if (CONSTANT_P (op0))
op0 = force_reg (mode, op0);
-#endif
if (unsignedp)
comparison = unsigned_condition (comparison);
- prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
- ccp_jump);
- emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
+ prepare_cmp_insn (op0, op1, comparison, size, unsignedp, OPTAB_LIB_WIDEN,
+ &test, &mode);
+ emit_cmp_and_jump_insn_1 (test, mode, label);
}
-/* Like emit_cmp_and_jump_insns, but generate only the comparison. */
-
-void
-emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
- enum machine_mode mode, int unsignedp)
-{
- emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
-}
\f
/* Emit a library call comparison between floating point X and Y.
COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
static void
-prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
- enum machine_mode *pmode, int *punsignedp)
+prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
+ rtx *ptest, enum machine_mode *pmode)
{
- enum rtx_code comparison = *pcomparison;
enum rtx_code swapped = swap_condition (comparison);
enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
- rtx x = *px;
- rtx y = *py;
enum machine_mode orig_mode = GET_MODE (x);
- enum machine_mode mode;
+ enum machine_mode mode, cmp_mode;
+ rtx true_rtx, false_rtx;
rtx value, target, insns, equiv;
rtx libfunc = 0;
bool reversed_p = false;
+ cmp_mode = targetm.libgcc_cmp_return_mode ();
for (mode = orig_mode;
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- if ((libfunc = code_to_optab[comparison]->handlers[mode].libfunc))
+ if (code_to_optab[comparison]
+ && (libfunc = optab_libfunc (code_to_optab[comparison], mode)))
break;
- if ((libfunc = code_to_optab[swapped]->handlers[mode].libfunc))
+ if (code_to_optab[swapped]
+ && (libfunc = optab_libfunc (code_to_optab[swapped], mode)))
{
rtx tmp;
tmp = x; x = y; y = tmp;
break;
}
- if ((libfunc = code_to_optab[reversed]->handlers[mode].libfunc)
- && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, reversed))
+ if (code_to_optab[reversed]
+ && (libfunc = optab_libfunc (code_to_optab[reversed], mode)))
{
comparison = reversed;
reversed_p = true;
/* Attach a REG_EQUAL note describing the semantics of the libcall to
the RTL. The allows the RTL optimizers to delete the libcall if the
condition can be determined at compile-time. */
+ if (comparison == UNORDERED
+ || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
+ {
+ true_rtx = const_true_rtx;
+ false_rtx = const0_rtx;
+ }
+ else
+ {
+ switch (comparison)
+ {
+ case EQ:
+ true_rtx = const0_rtx;
+ false_rtx = const_true_rtx;
+ break;
+
+ case NE:
+ true_rtx = const_true_rtx;
+ false_rtx = const0_rtx;
+ break;
+
+ case GT:
+ true_rtx = const1_rtx;
+ false_rtx = const0_rtx;
+ break;
+
+ case GE:
+ true_rtx = const0_rtx;
+ false_rtx = constm1_rtx;
+ break;
+
+ case LT:
+ true_rtx = constm1_rtx;
+ false_rtx = const0_rtx;
+ break;
+
+ case LE:
+ true_rtx = const0_rtx;
+ false_rtx = const1_rtx;
+ break;
+
+ default:
+ gcc_unreachable ();
+ }
+ }
+
if (comparison == UNORDERED)
{
- rtx temp = simplify_gen_relational (NE, word_mode, mode, x, x);
- equiv = simplify_gen_relational (NE, word_mode, mode, y, y);
- equiv = simplify_gen_ternary (IF_THEN_ELSE, word_mode, word_mode,
+ rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
+ equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
+ equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
temp, const_true_rtx, equiv);
}
else
{
- equiv = simplify_gen_relational (comparison, word_mode, mode, x, y);
+ equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
- {
- rtx true_rtx, false_rtx;
-
- switch (comparison)
- {
- case EQ:
- true_rtx = const0_rtx;
- false_rtx = const_true_rtx;
- break;
-
- case NE:
- true_rtx = const_true_rtx;
- false_rtx = const0_rtx;
- break;
-
- case GT:
- true_rtx = const1_rtx;
- false_rtx = const0_rtx;
- break;
-
- case GE:
- true_rtx = const0_rtx;
- false_rtx = constm1_rtx;
- break;
-
- case LT:
- true_rtx = constm1_rtx;
- false_rtx = const0_rtx;
- break;
-
- case LE:
- true_rtx = const0_rtx;
- false_rtx = const1_rtx;
- break;
-
- default:
- gcc_unreachable ();
- }
- equiv = simplify_gen_ternary (IF_THEN_ELSE, word_mode, word_mode,
- equiv, true_rtx, false_rtx);
- }
+ equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
+ equiv, true_rtx, false_rtx);
}
start_sequence ();
value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
- word_mode, 2, x, mode, y, mode);
+ cmp_mode, 2, x, mode, y, mode);
insns = get_insns ();
end_sequence ();
- target = gen_reg_rtx (word_mode);
+ target = gen_reg_rtx (cmp_mode);
emit_libcall_block (insns, target, value, equiv);
if (comparison == UNORDERED
- || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
- comparison = reversed_p ? EQ : NE;
+ || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison)
+ || reversed_p)
+ *ptest = gen_rtx_fmt_ee (reversed_p ? EQ : NE, VOIDmode, target, false_rtx);
+ else
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, target, const0_rtx);
- *px = target;
- *py = const0_rtx;
- *pmode = word_mode;
- *pcomparison = comparison;
- *punsignedp = 0;
+ *pmode = cmp_mode;
}
\f
/* Generate code to indirectly jump to a location given in the rtx LOC. */
void
emit_indirect_jump (rtx loc)
{
- if (!insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate
- (loc, Pmode))
- loc = copy_to_mode_reg (Pmode, loc);
+ struct expand_operand ops[1];
- emit_jump_insn (gen_indirect_jump (loc));
+ create_address_operand (&ops[0], loc);
+ expand_jump_insn (CODE_FOR_indirect_jump, 1, ops);
emit_barrier ();
}
\f
enum machine_mode cmode, rtx op2, rtx op3,
enum machine_mode mode, int unsignedp)
{
- rtx tem, subtarget, comparison, insn;
+ rtx tem, comparison, last;
enum insn_code icode;
enum rtx_code reversed;
if (mode == VOIDmode)
mode = GET_MODE (op2);
- icode = movcc_gen_code[mode];
+ icode = direct_optab_handler (movcc_optab, mode);
if (icode == CODE_FOR_nothing)
return 0;
if (!target)
target = gen_reg_rtx (mode);
- subtarget = target;
-
- /* If the insn doesn't accept these operands, put them in pseudos. */
+ code = unsignedp ? unsigned_condition (code) : code;
+ comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
- if (!insn_data[icode].operand[0].predicate
- (subtarget, insn_data[icode].operand[0].mode))
- subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
-
- if (!insn_data[icode].operand[2].predicate
- (op2, insn_data[icode].operand[2].mode))
- op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
-
- if (!insn_data[icode].operand[3].predicate
- (op3, insn_data[icode].operand[3].mode))
- op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
-
- /* Everything should now be in the suitable form, so emit the compare insn
- and then the conditional move. */
-
- comparison
- = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
-
- /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
/* We can get const0_rtx or const_true_rtx in some circumstances. Just
return NULL and let the caller figure out how best to deal with this
situation. */
- if (GET_CODE (comparison) != code)
+ if (!COMPARISON_P (comparison))
return NULL_RTX;
- insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
-
- /* If that failed, then give up. */
- if (insn == 0)
- return 0;
-
- emit_insn (insn);
-
- if (subtarget != target)
- convert_move (target, subtarget, 0);
-
- return target;
+ do_pending_stack_adjust ();
+ last = get_last_insn ();
+ prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
+ GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
+ &comparison, &cmode);
+ if (comparison)
+ {
+ struct expand_operand ops[4];
+
+ create_output_operand (&ops[0], target, mode);
+ create_fixed_operand (&ops[1], comparison);
+ create_input_operand (&ops[2], op2, mode);
+ create_input_operand (&ops[3], op3, mode);
+ if (maybe_expand_insn (icode, 4, ops))
+ {
+ if (ops[0].value != target)
+ convert_move (target, ops[0].value, false);
+ return target;
+ }
+ }
+ delete_insns_since (last);
+ return NULL_RTX;
}
/* Return nonzero if a conditional move of mode MODE is supported.
int
can_conditionally_move_p (enum machine_mode mode)
{
- if (movcc_gen_code[mode] != CODE_FOR_nothing)
+ if (direct_optab_handler (movcc_optab, mode) != CODE_FOR_nothing)
return 1;
return 0;
enum machine_mode cmode, rtx op2, rtx op3,
enum machine_mode mode, int unsignedp)
{
- rtx tem, subtarget, comparison, insn;
+ rtx tem, comparison, last;
enum insn_code icode;
enum rtx_code reversed;
if (mode == VOIDmode)
mode = GET_MODE (op2);
- icode = addcc_optab->handlers[(int) mode].insn_code;
+ icode = optab_handler (addcc_optab, mode);
if (icode == CODE_FOR_nothing)
return 0;
if (!target)
target = gen_reg_rtx (mode);
- /* If the insn doesn't accept these operands, put them in pseudos. */
-
- if (!insn_data[icode].operand[0].predicate
- (target, insn_data[icode].operand[0].mode))
- subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
- else
- subtarget = target;
-
- if (!insn_data[icode].operand[2].predicate
- (op2, insn_data[icode].operand[2].mode))
- op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
+ code = unsignedp ? unsigned_condition (code) : code;
+ comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
- if (!insn_data[icode].operand[3].predicate
- (op3, insn_data[icode].operand[3].mode))
- op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
-
- /* Everything should now be in the suitable form, so emit the compare insn
- and then the conditional move. */
-
- comparison
- = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
-
- /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
/* We can get const0_rtx or const_true_rtx in some circumstances. Just
return NULL and let the caller figure out how best to deal with this
situation. */
- if (GET_CODE (comparison) != code)
+ if (!COMPARISON_P (comparison))
return NULL_RTX;
- insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
-
- /* If that failed, then give up. */
- if (insn == 0)
- return 0;
-
- emit_insn (insn);
-
- if (subtarget != target)
- convert_move (target, subtarget, 0);
-
- return target;
+ do_pending_stack_adjust ();
+ last = get_last_insn ();
+ prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
+ GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
+ &comparison, &cmode);
+ if (comparison)
+ {
+ struct expand_operand ops[4];
+
+ create_output_operand (&ops[0], target, mode);
+ create_fixed_operand (&ops[1], comparison);
+ create_input_operand (&ops[2], op2, mode);
+ create_input_operand (&ops[3], op3, mode);
+ if (maybe_expand_insn (icode, 4, ops))
+ {
+ if (ops[0].value != target)
+ convert_move (target, ops[0].value, false);
+ return target;
+ }
+ }
+ delete_insns_since (last);
+ return NULL_RTX;
}
\f
/* These functions attempt to generate an insn body, rather than
rtx
gen_add2_insn (rtx x, rtx y)
{
- int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
+ enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
- gcc_assert (insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode));
- gcc_assert (insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode));
- gcc_assert (insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode));
+ gcc_assert (insn_operand_matches (icode, 0, x));
+ gcc_assert (insn_operand_matches (icode, 1, x));
+ gcc_assert (insn_operand_matches (icode, 2, y));
return GEN_FCN (icode) (x, x, y);
}
/* Generate and return an insn body to add r1 and c,
storing the result in r0. */
+
rtx
gen_add3_insn (rtx r0, rtx r1, rtx c)
{
- int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
+ enum insn_code icode = optab_handler (add_optab, GET_MODE (r0));
if (icode == CODE_FOR_nothing
- || !(insn_data[icode].operand[0].predicate
- (r0, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (r1, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (c, insn_data[icode].operand[2].mode)))
+ || !insn_operand_matches (icode, 0, r0)
+ || !insn_operand_matches (icode, 1, r1)
+ || !insn_operand_matches (icode, 2, c))
return NULL_RTX;
return GEN_FCN (icode) (r0, r1, c);
int
have_add2_insn (rtx x, rtx y)
{
- int icode;
+ enum insn_code icode;
gcc_assert (GET_MODE (x) != VOIDmode);
- icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
+ icode = optab_handler (add_optab, GET_MODE (x));
if (icode == CODE_FOR_nothing)
return 0;
- if (!(insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode)))
+ if (!insn_operand_matches (icode, 0, x)
+ || !insn_operand_matches (icode, 1, x)
+ || !insn_operand_matches (icode, 2, y))
return 0;
return 1;
rtx
gen_sub2_insn (rtx x, rtx y)
{
- int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
+ enum insn_code icode = optab_handler (sub_optab, GET_MODE (x));
- gcc_assert (insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode));
- gcc_assert (insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode));
- gcc_assert (insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode));
+ gcc_assert (insn_operand_matches (icode, 0, x));
+ gcc_assert (insn_operand_matches (icode, 1, x));
+ gcc_assert (insn_operand_matches (icode, 2, y));
return GEN_FCN (icode) (x, x, y);
}
/* Generate and return an insn body to subtract r1 and c,
storing the result in r0. */
+
rtx
gen_sub3_insn (rtx r0, rtx r1, rtx c)
{
- int icode = (int) sub_optab->handlers[(int) GET_MODE (r0)].insn_code;
+ enum insn_code icode = optab_handler (sub_optab, GET_MODE (r0));
if (icode == CODE_FOR_nothing
- || !(insn_data[icode].operand[0].predicate
- (r0, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (r1, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (c, insn_data[icode].operand[2].mode)))
+ || !insn_operand_matches (icode, 0, r0)
+ || !insn_operand_matches (icode, 1, r1)
+ || !insn_operand_matches (icode, 2, c))
return NULL_RTX;
return GEN_FCN (icode) (r0, r1, c);
int
have_sub2_insn (rtx x, rtx y)
{
- int icode;
+ enum insn_code icode;
gcc_assert (GET_MODE (x) != VOIDmode);
- icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
+ icode = optab_handler (sub_optab, GET_MODE (x));
if (icode == CODE_FOR_nothing)
return 0;
- if (!(insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode)))
+ if (!insn_operand_matches (icode, 0, x)
+ || !insn_operand_matches (icode, 1, x)
+ || !insn_operand_matches (icode, 2, y))
return 0;
return 1;
#endif
tab = unsignedp ? zext_optab : sext_optab;
- return tab->handlers[to_mode][from_mode].insn_code;
+ return convert_optab_handler (tab, to_mode, from_mode);
}
/* Generate the body of an insn to extend Y (with mode MFROM)
enum insn_code icode;
tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
- icode = tab->handlers[fixmode][fltmode].insn_code;
+ icode = convert_optab_handler (tab, fixmode, fltmode);
if (icode != CODE_FOR_nothing)
{
*truncp_ptr = 0;
for this to work. We need to rework the fix* and ftrunc* patterns
and documentation. */
tab = unsignedp ? ufix_optab : sfix_optab;
- icode = tab->handlers[fixmode][fltmode].insn_code;
+ icode = convert_optab_handler (tab, fixmode, fltmode);
if (icode != CODE_FOR_nothing
- && ftrunc_optab->handlers[fltmode].insn_code != CODE_FOR_nothing)
+ && optab_handler (ftrunc_optab, fltmode) != CODE_FOR_nothing)
{
*truncp_ptr = 1;
return icode;
return CODE_FOR_nothing;
}
-static enum insn_code
+enum insn_code
can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
int unsignedp)
{
convert_optab tab;
tab = unsignedp ? ufloat_optab : sfloat_optab;
- return tab->handlers[fltmode][fixmode].insn_code;
+ return convert_optab_handler (tab, fltmode, fixmode);
+}
+
+/* Function supportable_convert_operation
+
+ Check whether an operation represented by the code CODE is a
+ convert operation that is supported by the target platform in
+ vector form (i.e., when operating on arguments of type VECTYPE_IN
+ producing a result of type VECTYPE_OUT).
+
+ Convert operations we currently support directly are FIX_TRUNC and FLOAT.
+ This function checks if these operations are supported
+ by the target platform either directly (via vector tree-codes), or via
+ target builtins.
+
+ Output:
+ - CODE1 is code of vector operation to be used when
+ vectorizing the operation, if available.
+ - DECL is decl of target builtin functions to be used
+ when vectorizing the operation, if available. In this case,
+ CODE1 is CALL_EXPR. */
+
+bool
+supportable_convert_operation (enum tree_code code,
+ tree vectype_out, tree vectype_in,
+ tree *decl, enum tree_code *code1)
+{
+ enum machine_mode m1,m2;
+ int truncp;
+
+ m1 = TYPE_MODE (vectype_out);
+ m2 = TYPE_MODE (vectype_in);
+
+ /* First check if we can done conversion directly. */
+ if ((code == FIX_TRUNC_EXPR
+ && can_fix_p (m1,m2,TYPE_UNSIGNED (vectype_out), &truncp)
+ != CODE_FOR_nothing)
+ || (code == FLOAT_EXPR
+ && can_float_p (m1,m2,TYPE_UNSIGNED (vectype_in))
+ != CODE_FOR_nothing))
+ {
+ *code1 = code;
+ return true;
+ }
+
+ /* Now check for builtin. */
+ if (targetm.vectorize.builtin_conversion
+ && targetm.vectorize.builtin_conversion (code, vectype_out, vectype_in))
+ {
+ *code1 = CALL_EXPR;
+ *decl = targetm.vectorize.builtin_conversion (code, vectype_out, vectype_in);
+ return true;
+ }
+ return false;
}
+
\f
/* Generate code to convert FROM to floating point
and store in TO. FROM must be fixed point and not VOIDmode.
int doing_unsigned = unsignedp;
if (fmode != GET_MODE (to)
- && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
+ && significand_size (fmode) < GET_MODE_PRECISION (GET_MODE (from)))
continue;
icode = can_float_p (fmode, imode, unsignedp);
}
}
- /* Unsigned integer, and no way to convert directly. For binary
- floating point modes, convert as signed, then conditionally adjust
- the result. */
- if (unsignedp && can_do_signed && !DECIMAL_FLOAT_MODE_P (GET_MODE (to)))
+ /* Unsigned integer, and no way to convert directly. Convert as signed,
+ then unconditionally adjust the result. */
+ if (unsignedp && can_do_signed)
{
rtx label = gen_label_rtx ();
rtx temp;
for (fmode = GET_MODE (to); fmode != VOIDmode;
fmode = GET_MODE_WIDER_MODE (fmode))
- if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
+ if (GET_MODE_PRECISION (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
&& can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
break;
/* Avoid double-rounding when TO is narrower than FROM. */
if ((significand_size (fmode) + 1)
- < GET_MODE_BITSIZE (GET_MODE (from)))
+ < GET_MODE_PRECISION (GET_MODE (from)))
{
rtx temp1;
rtx neglabel = gen_label_rtx ();
emit_label (neglabel);
temp = expand_binop (imode, and_optab, from, const1_rtx,
NULL_RTX, 1, OPTAB_LIB_WIDEN);
- temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
- NULL_RTX, 1);
+ temp1 = expand_shift (RSHIFT_EXPR, imode, from, 1, NULL_RTX, 1);
temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
OPTAB_LIB_WIDEN);
expand_float (target, temp, 0);
0, label);
- real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)));
+ real_2expN (&offset, GET_MODE_PRECISION (GET_MODE (from)), fmode);
temp = expand_binop (fmode, add_optab, target,
CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
target, 0, OPTAB_LIB_WIDEN);
if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
from = convert_to_mode (SImode, from, unsignedp);
- libfunc = tab->handlers[GET_MODE (to)][GET_MODE (from)].libfunc;
+ libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
gcc_assert (libfunc);
start_sequence ();
end_sequence ();
emit_libcall_block (insns, target, value,
- gen_rtx_FLOAT (GET_MODE (to), from));
+ gen_rtx_fmt_e (unsignedp ? UNSIGNED_FLOAT : FLOAT,
+ GET_MODE (to), from));
}
done:
if (icode != CODE_FOR_nothing)
{
+ rtx last = get_last_insn ();
if (fmode != GET_MODE (from))
from = convert_to_mode (fmode, from, 0);
if (imode != GET_MODE (to))
target = gen_reg_rtx (imode);
- emit_unop_insn (icode, target, from,
- doing_unsigned ? UNSIGNED_FIX : FIX);
- if (target != to)
- convert_move (to, target, unsignedp);
- return;
+ if (maybe_emit_unop_insn (icode, target, from,
+ doing_unsigned ? UNSIGNED_FIX : FIX))
+ {
+ if (target != to)
+ convert_move (to, target, unsignedp);
+ return;
+ }
+ delete_insns_since (last);
}
}
anything with a wider integer mode.
This code used to extend FP value into mode wider than the destination.
- This is not needed. Consider, for instance conversion from SFmode
+ This is needed for decimal float modes which cannot accurately
+ represent one plus the highest signed number of the same size, but
+ not for binary modes. Consider, for instance conversion from SFmode
into DImode.
The hot path through the code is dealing with inputs smaller than 2^63
and doing just the conversion, so there is no bits to lose.
In the other path we know the value is positive in the range 2^63..2^64-1
- inclusive. (as for other imput overflow happens and result is undefined)
+ inclusive. (as for other input overflow happens and result is undefined)
So we know that the most important bit set in mantissa corresponds to
2^63. The subtraction of 2^63 should not generate any rounding as it
simply clears out that bit. The rest is trivial. */
- if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
+ if (unsignedp && GET_MODE_PRECISION (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
for (fmode = GET_MODE (from); fmode != VOIDmode;
fmode = GET_MODE_WIDER_MODE (fmode))
- if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
- &must_trunc))
+ if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
+ && (!DECIMAL_FLOAT_MODE_P (fmode)
+ || GET_MODE_BITSIZE (fmode) > GET_MODE_PRECISION (GET_MODE (to))))
{
int bitsize;
REAL_VALUE_TYPE offset;
rtx limit, lab1, lab2, insn;
- bitsize = GET_MODE_BITSIZE (GET_MODE (to));
- real_2expN (&offset, bitsize - 1);
+ bitsize = GET_MODE_PRECISION (GET_MODE (to));
+ real_2expN (&offset, bitsize - 1, fmode);
limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
lab1 = gen_label_rtx ();
lab2 = gen_label_rtx ();
emit_label (lab2);
- if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
- != CODE_FOR_nothing)
+ if (optab_handler (mov_optab, GET_MODE (to)) != CODE_FOR_nothing)
{
/* Make a place for a REG_NOTE and add it. */
insn = emit_move_insn (to, to);
- set_unique_reg_note (insn,
- REG_EQUAL,
- gen_rtx_fmt_e (UNSIGNED_FIX,
- GET_MODE (to),
- copy_rtx (from)));
+ set_dst_reg_note (insn, REG_EQUAL,
+ gen_rtx_fmt_e (UNSIGNED_FIX, GET_MODE (to),
+ copy_rtx (from)),
+ to);
}
return;
rtx libfunc;
convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
- libfunc = tab->handlers[GET_MODE (to)][GET_MODE (from)].libfunc;
+ libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
gcc_assert (libfunc);
start_sequence ();
}
}
+/* Generate code to convert FROM or TO a fixed-point.
+ If UINTP is true, either TO or FROM is an unsigned integer.
+ If SATP is true, we need to saturate the result. */
+
+void
+expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
+{
+ enum machine_mode to_mode = GET_MODE (to);
+ enum machine_mode from_mode = GET_MODE (from);
+ convert_optab tab;
+ enum rtx_code this_code;
+ enum insn_code code;
+ rtx insns, value;
+ rtx libfunc;
+
+ if (to_mode == from_mode)
+ {
+ emit_move_insn (to, from);
+ return;
+ }
+
+ if (uintp)
+ {
+ tab = satp ? satfractuns_optab : fractuns_optab;
+ this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
+ }
+ else
+ {
+ tab = satp ? satfract_optab : fract_optab;
+ this_code = satp ? SAT_FRACT : FRACT_CONVERT;
+ }
+ code = convert_optab_handler (tab, to_mode, from_mode);
+ if (code != CODE_FOR_nothing)
+ {
+ emit_unop_insn (code, to, from, this_code);
+ return;
+ }
+
+ libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
+ gcc_assert (libfunc);
+
+ start_sequence ();
+ value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
+ 1, from, from_mode);
+ insns = get_insns ();
+ end_sequence ();
+
+ emit_libcall_block (insns, to, value,
+ gen_rtx_fmt_e (tab->code, to_mode, from));
+}
+
/* Generate code to convert FROM to fixed point and store in TO. FROM
must be floating point, TO must be signed. Use the conversion optab
TAB to do the conversion. */
for (imode = GET_MODE (to); imode != VOIDmode;
imode = GET_MODE_WIDER_MODE (imode))
{
- icode = tab->handlers[imode][fmode].insn_code;
+ icode = convert_optab_handler (tab, imode, fmode);
if (icode != CODE_FOR_nothing)
{
+ rtx last = get_last_insn ();
if (fmode != GET_MODE (from))
from = convert_to_mode (fmode, from, 0);
if (imode != GET_MODE (to))
target = gen_reg_rtx (imode);
- emit_unop_insn (icode, target, from, UNKNOWN);
+ if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
+ {
+ delete_insns_since (last);
+ continue;
+ }
if (target != to)
convert_move (to, target, 0);
return true;
have_insn_for (enum rtx_code code, enum machine_mode mode)
{
return (code_to_optab[(int) code] != 0
- && (code_to_optab[(int) code]->handlers[(int) mode].insn_code
+ && (optab_handler (code_to_optab[(int) code], mode)
!= CODE_FOR_nothing));
}
-/* Create a blank optab. */
-static optab
-new_optab (void)
-{
- int i;
- optab op = ggc_alloc (sizeof (struct optab));
- for (i = 0; i < NUM_MACHINE_MODES; i++)
- {
- op->handlers[i].insn_code = CODE_FOR_nothing;
- op->handlers[i].libfunc = 0;
- }
-
- return op;
-}
+/* Set all insn_code fields to CODE_FOR_nothing. */
-static convert_optab
-new_convert_optab (void)
+static void
+init_insn_codes (void)
{
- int i, j;
- convert_optab op = ggc_alloc (sizeof (struct convert_optab));
- for (i = 0; i < NUM_MACHINE_MODES; i++)
- for (j = 0; j < NUM_MACHINE_MODES; j++)
- {
- op->handlers[i][j].insn_code = CODE_FOR_nothing;
- op->handlers[i][j].libfunc = 0;
- }
- return op;
+ memset (optab_table, 0, sizeof (optab_table));
+ memset (convert_optab_table, 0, sizeof (convert_optab_table));
+ memset (direct_optab_table, 0, sizeof (direct_optab_table));
}
-/* Same, but fill in its code as CODE, and write it into the
- code_to_optab table. */
-static inline optab
-init_optab (enum rtx_code code)
+/* Initialize OP's code to CODE, and write it into the code_to_optab table. */
+static inline void
+init_optab (optab op, enum rtx_code code)
{
- optab op = new_optab ();
op->code = code;
code_to_optab[(int) code] = op;
- return op;
}
/* Same, but fill in its code as CODE, and do _not_ write it into
the code_to_optab table. */
-static inline optab
-init_optabv (enum rtx_code code)
+static inline void
+init_optabv (optab op, enum rtx_code code)
{
- optab op = new_optab ();
op->code = code;
- return op;
}
/* Conversion optabs never go in the code_to_optab table. */
-static inline convert_optab
-init_convert_optab (enum rtx_code code)
+static void
+init_convert_optab (convert_optab op, enum rtx_code code)
{
- convert_optab op = new_convert_optab ();
op->code = code;
- return op;
}
/* Initialize the libfunc fields of an entire group of entries in some
usually one of the characters '2', '3', or '4').
OPTABLE is the table in which libfunc fields are to be initialized.
- FIRST_MODE is the first machine mode index in the given optab to
- initialize.
- LAST_MODE is the last machine mode index in the given optab to
- initialize.
OPNAME is the generic (string) name of the operation.
SUFFIX is the character which specifies the number of operands for
the given generic operation.
+ MODE is the mode to generate for.
*/
static void
-init_libfuncs (optab optable, int first_mode, int last_mode,
- const char *opname, int suffix)
+gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
{
- int mode;
unsigned opname_len = strlen (opname);
+ const char *mname = GET_MODE_NAME (mode);
+ unsigned mname_len = strlen (mname);
+ int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
+ int len = prefix_len + opname_len + mname_len + 1 + 1;
+ char *libfunc_name = XALLOCAVEC (char, len);
+ char *p;
+ const char *q;
- for (mode = first_mode; (int) mode <= (int) last_mode;
- mode = (enum machine_mode) ((int) mode + 1))
+ p = libfunc_name;
+ *p++ = '_';
+ *p++ = '_';
+ if (targetm.libfunc_gnu_prefix)
{
- const char *mname = GET_MODE_NAME (mode);
- unsigned mname_len = strlen (mname);
- char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
- char *p;
- const char *q;
-
- p = libfunc_name;
+ *p++ = 'g';
+ *p++ = 'n';
+ *p++ = 'u';
*p++ = '_';
- *p++ = '_';
- for (q = opname; *q; )
- *p++ = *q++;
- for (q = mname; *q; q++)
- *p++ = TOLOWER (*q);
- *p++ = suffix;
- *p = '\0';
-
- optable->handlers[(int) mode].libfunc
- = init_one_libfunc (ggc_alloc_string (libfunc_name, p - libfunc_name));
}
+ for (q = opname; *q; )
+ *p++ = *q++;
+ for (q = mname; *q; q++)
+ *p++ = TOLOWER (*q);
+ *p++ = suffix;
+ *p = '\0';
+
+ set_optab_libfunc (optable, mode,
+ ggc_alloc_string (libfunc_name, p - libfunc_name));
}
-/* Initialize the libfunc fields of an entire group of entries in some
- optab which correspond to all integer mode operations. The parameters
- have the same meaning as similarly named ones for the `init_libfuncs'
- routine. (See above). */
+/* Like gen_libfunc, but verify that integer operation is involved. */
static void
-init_integral_libfuncs (optab optable, const char *opname, int suffix)
+gen_int_libfunc (optab optable, const char *opname, char suffix,
+ enum machine_mode mode)
{
- int maxsize = 2*BITS_PER_WORD;
+ int maxsize = 2 * BITS_PER_WORD;
+
+ if (GET_MODE_CLASS (mode) != MODE_INT)
+ return;
if (maxsize < LONG_LONG_TYPE_SIZE)
maxsize = LONG_LONG_TYPE_SIZE;
- init_libfuncs (optable, word_mode,
- mode_for_size (maxsize, MODE_INT, 0),
- opname, suffix);
+ if (GET_MODE_CLASS (mode) != MODE_INT
+ || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
+ return;
+ gen_libfunc (optable, opname, suffix, mode);
}
-/* Initialize the libfunc fields of an entire group of entries in some
- optab which correspond to all real mode operations. The parameters
- have the same meaning as similarly named ones for the `init_libfuncs'
- routine. (See above). */
+/* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
static void
-init_floating_libfuncs (optab optable, const char *opname, int suffix)
+gen_fp_libfunc (optab optable, const char *opname, char suffix,
+ enum machine_mode mode)
{
- char *dec_opname = alloca (sizeof (DECIMAL_PREFIX) + strlen (opname));
+ char *dec_opname;
- /* For BID support, change the name to have either a bid_ or dpd_ prefix
- depending on the low level floating format used. */
- memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
- strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
+ if (GET_MODE_CLASS (mode) == MODE_FLOAT)
+ gen_libfunc (optable, opname, suffix, mode);
+ if (DECIMAL_FLOAT_MODE_P (mode))
+ {
+ dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
+ /* For BID support, change the name to have either a bid_ or dpd_ prefix
+ depending on the low level floating format used. */
+ memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
+ strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
+ gen_libfunc (optable, dec_opname, suffix, mode);
+ }
+}
+
+/* Like gen_libfunc, but verify that fixed-point operation is involved. */
+
+static void
+gen_fixed_libfunc (optab optable, const char *opname, char suffix,
+ enum machine_mode mode)
+{
+ if (!ALL_FIXED_POINT_MODE_P (mode))
+ return;
+ gen_libfunc (optable, opname, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that signed fixed-point operation is
+ involved. */
+
+static void
+gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
+ enum machine_mode mode)
+{
+ if (!SIGNED_FIXED_POINT_MODE_P (mode))
+ return;
+ gen_libfunc (optable, opname, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that unsigned fixed-point operation is
+ involved. */
+
+static void
+gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
+ enum machine_mode mode)
+{
+ if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
+ return;
+ gen_libfunc (optable, opname, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that FP or INT operation is involved. */
+
+static void
+gen_int_fp_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
+ gen_fp_libfunc (optable, name, suffix, mode);
+ if (INTEGRAL_MODE_P (mode))
+ gen_int_libfunc (optable, name, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that FP or INT operation is involved
+ and add 'v' suffix for integer operation. */
+
+static void
+gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
+ gen_fp_libfunc (optable, name, suffix, mode);
+ if (GET_MODE_CLASS (mode) == MODE_INT)
+ {
+ int len = strlen (name);
+ char *v_name = XALLOCAVEC (char, len + 2);
+ strcpy (v_name, name);
+ v_name[len] = 'v';
+ v_name[len + 1] = 0;
+ gen_int_libfunc (optable, v_name, suffix, mode);
+ }
+}
+
+/* Like gen_libfunc, but verify that FP or INT or FIXED operation is
+ involved. */
+
+static void
+gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
+ gen_fp_libfunc (optable, name, suffix, mode);
+ if (INTEGRAL_MODE_P (mode))
+ gen_int_libfunc (optable, name, suffix, mode);
+ if (ALL_FIXED_POINT_MODE_P (mode))
+ gen_fixed_libfunc (optable, name, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
+ involved. */
+
+static void
+gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
+ gen_fp_libfunc (optable, name, suffix, mode);
+ if (INTEGRAL_MODE_P (mode))
+ gen_int_libfunc (optable, name, suffix, mode);
+ if (SIGNED_FIXED_POINT_MODE_P (mode))
+ gen_signed_fixed_libfunc (optable, name, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that INT or FIXED operation is
+ involved. */
+
+static void
+gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (INTEGRAL_MODE_P (mode))
+ gen_int_libfunc (optable, name, suffix, mode);
+ if (ALL_FIXED_POINT_MODE_P (mode))
+ gen_fixed_libfunc (optable, name, suffix, mode);
+}
- init_libfuncs (optable, MIN_MODE_FLOAT, MAX_MODE_FLOAT, opname, suffix);
- init_libfuncs (optable, MIN_MODE_DECIMAL_FLOAT, MAX_MODE_DECIMAL_FLOAT,
- dec_opname, suffix);
+/* Like gen_libfunc, but verify that INT or signed FIXED operation is
+ involved. */
+
+static void
+gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (INTEGRAL_MODE_P (mode))
+ gen_int_libfunc (optable, name, suffix, mode);
+ if (SIGNED_FIXED_POINT_MODE_P (mode))
+ gen_signed_fixed_libfunc (optable, name, suffix, mode);
+}
+
+/* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
+ involved. */
+
+static void
+gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
+ enum machine_mode mode)
+{
+ if (INTEGRAL_MODE_P (mode))
+ gen_int_libfunc (optable, name, suffix, mode);
+ if (UNSIGNED_FIXED_POINT_MODE_P (mode))
+ gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
}
/* Initialize the libfunc fields of an entire group of entries of an
similar to the ones for init_libfuncs, above, but instead of having
a mode name and an operand count these functions have two mode names
and no operand count. */
+
static void
-init_interclass_conv_libfuncs (convert_optab tab, const char *opname,
- enum mode_class from_class,
- enum mode_class to_class)
+gen_interclass_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
{
- enum machine_mode first_from_mode = GET_CLASS_NARROWEST_MODE (from_class);
- enum machine_mode first_to_mode = GET_CLASS_NARROWEST_MODE (to_class);
size_t opname_len = strlen (opname);
- size_t max_mname_len = 0;
+ size_t mname_len = 0;
- enum machine_mode fmode, tmode;
const char *fname, *tname;
const char *q;
+ int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
char *libfunc_name, *suffix;
char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
char *p;
depends on which underlying decimal floating point format is used. */
const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
- for (fmode = first_from_mode;
- fmode != VOIDmode;
- fmode = GET_MODE_WIDER_MODE (fmode))
- max_mname_len = MAX (max_mname_len, strlen (GET_MODE_NAME (fmode)));
-
- for (tmode = first_to_mode;
- tmode != VOIDmode;
- tmode = GET_MODE_WIDER_MODE (tmode))
- max_mname_len = MAX (max_mname_len, strlen (GET_MODE_NAME (tmode)));
+ mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
- nondec_name = alloca (2 + opname_len + 2*max_mname_len + 1 + 1);
+ nondec_name = XALLOCAVEC (char, prefix_len + opname_len + mname_len + 1 + 1);
nondec_name[0] = '_';
nondec_name[1] = '_';
- memcpy (&nondec_name[2], opname, opname_len);
- nondec_suffix = nondec_name + opname_len + 2;
+ if (targetm.libfunc_gnu_prefix)
+ {
+ nondec_name[2] = 'g';
+ nondec_name[3] = 'n';
+ nondec_name[4] = 'u';
+ nondec_name[5] = '_';
+ }
+
+ memcpy (&nondec_name[prefix_len], opname, opname_len);
+ nondec_suffix = nondec_name + opname_len + prefix_len;
- dec_name = alloca (2 + dec_len + opname_len + 2*max_mname_len + 1 + 1);
+ dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
dec_name[0] = '_';
dec_name[1] = '_';
memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
memcpy (&dec_name[2+dec_len], opname, opname_len);
dec_suffix = dec_name + dec_len + opname_len + 2;
- for (fmode = first_from_mode; fmode != VOIDmode;
- fmode = GET_MODE_WIDER_MODE (fmode))
- for (tmode = first_to_mode; tmode != VOIDmode;
- tmode = GET_MODE_WIDER_MODE (tmode))
- {
- fname = GET_MODE_NAME (fmode);
- tname = GET_MODE_NAME (tmode);
+ fname = GET_MODE_NAME (fmode);
+ tname = GET_MODE_NAME (tmode);
- if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
- {
- libfunc_name = dec_name;
- suffix = dec_suffix;
- }
- else
- {
- libfunc_name = nondec_name;
- suffix = nondec_suffix;
- }
+ if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
+ {
+ libfunc_name = dec_name;
+ suffix = dec_suffix;
+ }
+ else
+ {
+ libfunc_name = nondec_name;
+ suffix = nondec_suffix;
+ }
- p = suffix;
- for (q = fname; *q; p++, q++)
- *p = TOLOWER (*q);
- for (q = tname; *q; p++, q++)
- *p = TOLOWER (*q);
+ p = suffix;
+ for (q = fname; *q; p++, q++)
+ *p = TOLOWER (*q);
+ for (q = tname; *q; p++, q++)
+ *p = TOLOWER (*q);
- *p = '\0';
+ *p = '\0';
- tab->handlers[tmode][fmode].libfunc
- = init_one_libfunc (ggc_alloc_string (libfunc_name,
- p - libfunc_name));
- }
+ set_conv_libfunc (tab, tmode, fmode,
+ ggc_alloc_string (libfunc_name, p - libfunc_name));
}
-/* Initialize the libfunc fields of an entire group of entries of an
- intra-mode-class conversion optab. The string formation rules are
- similar to the ones for init_libfunc, above. WIDENING says whether
- the optab goes from narrow to wide modes or vice versa. These functions
- have two mode names _and_ an operand count. */
+/* Same as gen_interclass_conv_libfunc but verify that we are producing
+ int->fp conversion. */
+
+static void
+gen_int_to_fp_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (GET_MODE_CLASS (fmode) != MODE_INT)
+ return;
+ if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
+ return;
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* ufloat_optab is special by using floatun for FP and floatuns decimal fp
+ naming scheme. */
+
+static void
+gen_ufloat_conv_libfunc (convert_optab tab,
+ const char *opname ATTRIBUTE_UNUSED,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (DECIMAL_FLOAT_MODE_P (tmode))
+ gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
+ else
+ gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
+}
+
+/* Same as gen_interclass_conv_libfunc but verify that we are producing
+ fp->int conversion. */
+
+static void
+gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (GET_MODE_CLASS (fmode) != MODE_INT)
+ return;
+ if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
+ return;
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Same as gen_interclass_conv_libfunc but verify that we are producing
+ fp->int conversion with no decimal floating point involved. */
+
static void
-init_intraclass_conv_libfuncs (convert_optab tab, const char *opname,
- enum mode_class class, bool widening)
+gen_fp_to_int_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
+ return;
+ if (GET_MODE_CLASS (tmode) != MODE_INT)
+ return;
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
+ The string formation rules are
+ similar to the ones for init_libfunc, above. */
+
+static void
+gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
+ enum machine_mode tmode, enum machine_mode fmode)
{
- enum machine_mode first_mode = GET_CLASS_NARROWEST_MODE (class);
size_t opname_len = strlen (opname);
- size_t max_mname_len = 0;
+ size_t mname_len = 0;
- enum machine_mode nmode, wmode;
- const char *nname, *wname;
+ const char *fname, *tname;
const char *q;
+ int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
char *libfunc_name, *suffix;
char *p;
depends on which underlying decimal floating point format is used. */
const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
- for (nmode = first_mode; nmode != VOIDmode;
- nmode = GET_MODE_WIDER_MODE (nmode))
- max_mname_len = MAX (max_mname_len, strlen (GET_MODE_NAME (nmode)));
+ mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
- nondec_name = alloca (2 + opname_len + 2*max_mname_len + 1 + 1);
+ nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
nondec_name[0] = '_';
nondec_name[1] = '_';
- memcpy (&nondec_name[2], opname, opname_len);
- nondec_suffix = nondec_name + opname_len + 2;
+ if (targetm.libfunc_gnu_prefix)
+ {
+ nondec_name[2] = 'g';
+ nondec_name[3] = 'n';
+ nondec_name[4] = 'u';
+ nondec_name[5] = '_';
+ }
+ memcpy (&nondec_name[prefix_len], opname, opname_len);
+ nondec_suffix = nondec_name + opname_len + prefix_len;
- dec_name = alloca (2 + dec_len + opname_len + 2*max_mname_len + 1 + 1);
+ dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
dec_name[0] = '_';
dec_name[1] = '_';
memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
memcpy (&dec_name[2 + dec_len], opname, opname_len);
dec_suffix = dec_name + dec_len + opname_len + 2;
- for (nmode = first_mode; nmode != VOIDmode;
- nmode = GET_MODE_WIDER_MODE (nmode))
- for (wmode = GET_MODE_WIDER_MODE (nmode); wmode != VOIDmode;
- wmode = GET_MODE_WIDER_MODE (wmode))
- {
- nname = GET_MODE_NAME (nmode);
- wname = GET_MODE_NAME (wmode);
+ fname = GET_MODE_NAME (fmode);
+ tname = GET_MODE_NAME (tmode);
- if (DECIMAL_FLOAT_MODE_P(nmode) || DECIMAL_FLOAT_MODE_P(wmode))
- {
- libfunc_name = dec_name;
- suffix = dec_suffix;
- }
- else
- {
- libfunc_name = nondec_name;
- suffix = nondec_suffix;
- }
+ if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
+ {
+ libfunc_name = dec_name;
+ suffix = dec_suffix;
+ }
+ else
+ {
+ libfunc_name = nondec_name;
+ suffix = nondec_suffix;
+ }
- p = suffix;
- for (q = widening ? nname : wname; *q; p++, q++)
- *p = TOLOWER (*q);
- for (q = widening ? wname : nname; *q; p++, q++)
- *p = TOLOWER (*q);
+ p = suffix;
+ for (q = fname; *q; p++, q++)
+ *p = TOLOWER (*q);
+ for (q = tname; *q; p++, q++)
+ *p = TOLOWER (*q);
- *p++ = '2';
- *p = '\0';
+ *p++ = '2';
+ *p = '\0';
- tab->handlers[widening ? wmode : nmode]
- [widening ? nmode : wmode].libfunc
- = init_one_libfunc (ggc_alloc_string (libfunc_name,
- p - libfunc_name));
- }
+ set_conv_libfunc (tab, tmode, fmode,
+ ggc_alloc_string (libfunc_name, p - libfunc_name));
}
+/* Pick proper libcall for trunc_optab. We need to chose if we do
+ truncation or extension and interclass or intraclass. */
-rtx
-init_one_libfunc (const char *name)
+static void
+gen_trunc_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
{
- rtx symbol;
+ if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
+ return;
+ if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
+ return;
+ if (tmode == fmode)
+ return;
- /* Create a FUNCTION_DECL that can be passed to
- targetm.encode_section_info. */
- /* ??? We don't have any type information except for this is
- a function. Pretend this is "int foo()". */
- tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
- build_function_type (integer_type_node, NULL_TREE));
- DECL_ARTIFICIAL (decl) = 1;
- DECL_EXTERNAL (decl) = 1;
- TREE_PUBLIC (decl) = 1;
+ if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
+ || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
- symbol = XEXP (DECL_RTL (decl), 0);
+ if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
+ return;
+
+ if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
+ && GET_MODE_CLASS (fmode) == MODE_FLOAT)
+ || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
+ gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Pick proper libcall for extend_optab. We need to chose if we do
+ truncation or extension and interclass or intraclass. */
+
+static void
+gen_extend_conv_libfunc (convert_optab tab,
+ const char *opname ATTRIBUTE_UNUSED,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
+ return;
+ if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
+ return;
+ if (tmode == fmode)
+ return;
+
+ if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
+ || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+
+ if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
+ return;
+
+ if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
+ && GET_MODE_CLASS (fmode) == MODE_FLOAT)
+ || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
+ gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Pick proper libcall for fract_optab. We need to chose if we do
+ interclass or intraclass. */
+
+static void
+gen_fract_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (tmode == fmode)
+ return;
+ if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
+ return;
+
+ if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
+ gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
+ else
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Pick proper libcall for fractuns_optab. */
+
+static void
+gen_fractuns_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (tmode == fmode)
+ return;
+ /* One mode must be a fixed-point mode, and the other must be an integer
+ mode. */
+ if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
+ || (ALL_FIXED_POINT_MODE_P (fmode)
+ && GET_MODE_CLASS (tmode) == MODE_INT)))
+ return;
+
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Pick proper libcall for satfract_optab. We need to chose if we do
+ interclass or intraclass. */
+
+static void
+gen_satfract_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (tmode == fmode)
+ return;
+ /* TMODE must be a fixed-point mode. */
+ if (!ALL_FIXED_POINT_MODE_P (tmode))
+ return;
+
+ if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
+ gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
+ else
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* Pick proper libcall for satfractuns_optab. */
+
+static void
+gen_satfractuns_conv_libfunc (convert_optab tab,
+ const char *opname,
+ enum machine_mode tmode,
+ enum machine_mode fmode)
+{
+ if (tmode == fmode)
+ return;
+ /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
+ if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
+ return;
+
+ gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
+}
+
+/* A table of previously-created libfuncs, hashed by name. */
+static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
+
+/* Hashtable callbacks for libfunc_decls. */
+
+static hashval_t
+libfunc_decl_hash (const void *entry)
+{
+ return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree) entry));
+}
+
+static int
+libfunc_decl_eq (const void *entry1, const void *entry2)
+{
+ return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
+}
+
+/* Build a decl for a libfunc named NAME. */
+
+tree
+build_libfunc_function (const char *name)
+{
+ tree decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
+ get_identifier (name),
+ build_function_type (integer_type_node, NULL_TREE));
+ /* ??? We don't have any type information except for this is
+ a function. Pretend this is "int foo()". */
+ DECL_ARTIFICIAL (decl) = 1;
+ DECL_EXTERNAL (decl) = 1;
+ TREE_PUBLIC (decl) = 1;
+ gcc_assert (DECL_ASSEMBLER_NAME (decl));
/* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
are the flags assigned by targetm.encode_section_info. */
- SET_SYMBOL_REF_DECL (symbol, 0);
+ SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
+
+ return decl;
+}
+
+rtx
+init_one_libfunc (const char *name)
+{
+ tree id, decl;
+ void **slot;
+ hashval_t hash;
+
+ if (libfunc_decls == NULL)
+ libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
+ libfunc_decl_eq, NULL);
+
+ /* See if we have already created a libfunc decl for this function. */
+ id = get_identifier (name);
+ hash = IDENTIFIER_HASH_VALUE (id);
+ slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
+ decl = (tree) *slot;
+ if (decl == NULL)
+ {
+ /* Create a new decl, so that it can be passed to
+ targetm.encode_section_info. */
+ decl = build_libfunc_function (name);
+ *slot = decl;
+ }
+ return XEXP (DECL_RTL (decl), 0);
+}
+
+/* Adjust the assembler name of libfunc NAME to ASMSPEC. */
- return symbol;
+rtx
+set_user_assembler_libfunc (const char *name, const char *asmspec)
+{
+ tree id, decl;
+ void **slot;
+ hashval_t hash;
+
+ id = get_identifier (name);
+ hash = IDENTIFIER_HASH_VALUE (id);
+ slot = htab_find_slot_with_hash (libfunc_decls, id, hash, NO_INSERT);
+ gcc_assert (slot);
+ decl = (tree) *slot;
+ set_user_assembler_name (decl, asmspec);
+ return XEXP (DECL_RTL (decl), 0);
}
/* Call this to reset the function entry for one optab (OPTABLE) in mode
void
set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
{
+ rtx val;
+ struct libfunc_entry e;
+ struct libfunc_entry **slot;
+ e.optab = (size_t) (optable - &optab_table[0]);
+ e.mode1 = mode;
+ e.mode2 = VOIDmode;
+
if (name)
- optable->handlers[mode].libfunc = init_one_libfunc (name);
+ val = init_one_libfunc (name);
else
- optable->handlers[mode].libfunc = 0;
+ val = 0;
+ slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
+ if (*slot == NULL)
+ *slot = ggc_alloc_libfunc_entry ();
+ (*slot)->optab = (size_t) (optable - &optab_table[0]);
+ (*slot)->mode1 = mode;
+ (*slot)->mode2 = VOIDmode;
+ (*slot)->libfunc = val;
}
/* Call this to reset the function entry for one conversion optab
set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
enum machine_mode fmode, const char *name)
{
+ rtx val;
+ struct libfunc_entry e;
+ struct libfunc_entry **slot;
+ e.optab = (size_t) (optable - &convert_optab_table[0]);
+ e.mode1 = tmode;
+ e.mode2 = fmode;
+
if (name)
- optable->handlers[tmode][fmode].libfunc = init_one_libfunc (name);
+ val = init_one_libfunc (name);
else
- optable->handlers[tmode][fmode].libfunc = 0;
+ val = 0;
+ slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
+ if (*slot == NULL)
+ *slot = ggc_alloc_libfunc_entry ();
+ (*slot)->optab = (size_t) (optable - &convert_optab_table[0]);
+ (*slot)->mode1 = tmode;
+ (*slot)->mode2 = fmode;
+ (*slot)->libfunc = val;
}
-/* Call this once to initialize the contents of the optabs
+/* Call this to initialize the contents of the optabs
appropriately for the current target machine. */
void
init_optabs (void)
{
- unsigned int i;
- enum machine_mode int_mode;
-
- /* Start by initializing all tables to contain CODE_FOR_nothing. */
-
- for (i = 0; i < NUM_RTX_CODE; i++)
- setcc_gen_code[i] = CODE_FOR_nothing;
-
-#ifdef HAVE_conditional_move
- for (i = 0; i < NUM_MACHINE_MODES; i++)
- movcc_gen_code[i] = CODE_FOR_nothing;
-#endif
-
- for (i = 0; i < NUM_MACHINE_MODES; i++)
- {
- vcond_gen_code[i] = CODE_FOR_nothing;
- vcondu_gen_code[i] = CODE_FOR_nothing;
- }
-
- add_optab = init_optab (PLUS);
- addv_optab = init_optabv (PLUS);
- sub_optab = init_optab (MINUS);
- subv_optab = init_optabv (MINUS);
- smul_optab = init_optab (MULT);
- smulv_optab = init_optabv (MULT);
- smul_highpart_optab = init_optab (UNKNOWN);
- umul_highpart_optab = init_optab (UNKNOWN);
- smul_widen_optab = init_optab (UNKNOWN);
- umul_widen_optab = init_optab (UNKNOWN);
- usmul_widen_optab = init_optab (UNKNOWN);
- smadd_widen_optab = init_optab (UNKNOWN);
- umadd_widen_optab = init_optab (UNKNOWN);
- smsub_widen_optab = init_optab (UNKNOWN);
- umsub_widen_optab = init_optab (UNKNOWN);
- sdiv_optab = init_optab (DIV);
- sdivv_optab = init_optabv (DIV);
- sdivmod_optab = init_optab (UNKNOWN);
- udiv_optab = init_optab (UDIV);
- udivmod_optab = init_optab (UNKNOWN);
- smod_optab = init_optab (MOD);
- umod_optab = init_optab (UMOD);
- fmod_optab = init_optab (UNKNOWN);
- remainder_optab = init_optab (UNKNOWN);
- ftrunc_optab = init_optab (UNKNOWN);
- and_optab = init_optab (AND);
- ior_optab = init_optab (IOR);
- xor_optab = init_optab (XOR);
- ashl_optab = init_optab (ASHIFT);
- ashr_optab = init_optab (ASHIFTRT);
- lshr_optab = init_optab (LSHIFTRT);
- rotl_optab = init_optab (ROTATE);
- rotr_optab = init_optab (ROTATERT);
- smin_optab = init_optab (SMIN);
- smax_optab = init_optab (SMAX);
- umin_optab = init_optab (UMIN);
- umax_optab = init_optab (UMAX);
- pow_optab = init_optab (UNKNOWN);
- atan2_optab = init_optab (UNKNOWN);
+ if (libfunc_hash)
+ {
+ htab_empty (libfunc_hash);
+ /* We statically initialize the insn_codes with the equivalent of
+ CODE_FOR_nothing. Repeat the process if reinitialising. */
+ init_insn_codes ();
+ }
+ else
+ libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
+
+ init_optab (add_optab, PLUS);
+ init_optabv (addv_optab, PLUS);
+ init_optab (sub_optab, MINUS);
+ init_optabv (subv_optab, MINUS);
+ init_optab (ssadd_optab, SS_PLUS);
+ init_optab (usadd_optab, US_PLUS);
+ init_optab (sssub_optab, SS_MINUS);
+ init_optab (ussub_optab, US_MINUS);
+ init_optab (smul_optab, MULT);
+ init_optab (ssmul_optab, SS_MULT);
+ init_optab (usmul_optab, US_MULT);
+ init_optabv (smulv_optab, MULT);
+ init_optab (smul_highpart_optab, UNKNOWN);
+ init_optab (umul_highpart_optab, UNKNOWN);
+ init_optab (smul_widen_optab, UNKNOWN);
+ init_optab (umul_widen_optab, UNKNOWN);
+ init_optab (usmul_widen_optab, UNKNOWN);
+ init_optab (smadd_widen_optab, UNKNOWN);
+ init_optab (umadd_widen_optab, UNKNOWN);
+ init_optab (ssmadd_widen_optab, UNKNOWN);
+ init_optab (usmadd_widen_optab, UNKNOWN);
+ init_optab (smsub_widen_optab, UNKNOWN);
+ init_optab (umsub_widen_optab, UNKNOWN);
+ init_optab (ssmsub_widen_optab, UNKNOWN);
+ init_optab (usmsub_widen_optab, UNKNOWN);
+ init_optab (sdiv_optab, DIV);
+ init_optab (ssdiv_optab, SS_DIV);
+ init_optab (usdiv_optab, US_DIV);
+ init_optabv (sdivv_optab, DIV);
+ init_optab (sdivmod_optab, UNKNOWN);
+ init_optab (udiv_optab, UDIV);
+ init_optab (udivmod_optab, UNKNOWN);
+ init_optab (smod_optab, MOD);
+ init_optab (umod_optab, UMOD);
+ init_optab (fmod_optab, UNKNOWN);
+ init_optab (remainder_optab, UNKNOWN);
+ init_optab (ftrunc_optab, UNKNOWN);
+ init_optab (and_optab, AND);
+ init_optab (ior_optab, IOR);
+ init_optab (xor_optab, XOR);
+ init_optab (ashl_optab, ASHIFT);
+ init_optab (ssashl_optab, SS_ASHIFT);
+ init_optab (usashl_optab, US_ASHIFT);
+ init_optab (ashr_optab, ASHIFTRT);
+ init_optab (lshr_optab, LSHIFTRT);
+ init_optabv (vashl_optab, ASHIFT);
+ init_optabv (vashr_optab, ASHIFTRT);
+ init_optabv (vlshr_optab, LSHIFTRT);
+ init_optab (rotl_optab, ROTATE);
+ init_optab (rotr_optab, ROTATERT);
+ init_optab (smin_optab, SMIN);
+ init_optab (smax_optab, SMAX);
+ init_optab (umin_optab, UMIN);
+ init_optab (umax_optab, UMAX);
+ init_optab (pow_optab, UNKNOWN);
+ init_optab (atan2_optab, UNKNOWN);
+ init_optab (fma_optab, FMA);
+ init_optab (fms_optab, UNKNOWN);
+ init_optab (fnma_optab, UNKNOWN);
+ init_optab (fnms_optab, UNKNOWN);
/* These three have codes assigned exclusively for the sake of
have_insn_for. */
- mov_optab = init_optab (SET);
- movstrict_optab = init_optab (STRICT_LOW_PART);
- cmp_optab = init_optab (COMPARE);
-
- storent_optab = init_optab (UNKNOWN);
-
- ucmp_optab = init_optab (UNKNOWN);
- tst_optab = init_optab (UNKNOWN);
-
- eq_optab = init_optab (EQ);
- ne_optab = init_optab (NE);
- gt_optab = init_optab (GT);
- ge_optab = init_optab (GE);
- lt_optab = init_optab (LT);
- le_optab = init_optab (LE);
- unord_optab = init_optab (UNORDERED);
-
- neg_optab = init_optab (NEG);
- negv_optab = init_optabv (NEG);
- abs_optab = init_optab (ABS);
- absv_optab = init_optabv (ABS);
- addcc_optab = init_optab (UNKNOWN);
- one_cmpl_optab = init_optab (NOT);
- bswap_optab = init_optab (BSWAP);
- ffs_optab = init_optab (FFS);
- clz_optab = init_optab (CLZ);
- ctz_optab = init_optab (CTZ);
- popcount_optab = init_optab (POPCOUNT);
- parity_optab = init_optab (PARITY);
- sqrt_optab = init_optab (SQRT);
- floor_optab = init_optab (UNKNOWN);
- ceil_optab = init_optab (UNKNOWN);
- round_optab = init_optab (UNKNOWN);
- btrunc_optab = init_optab (UNKNOWN);
- nearbyint_optab = init_optab (UNKNOWN);
- rint_optab = init_optab (UNKNOWN);
- sincos_optab = init_optab (UNKNOWN);
- sin_optab = init_optab (UNKNOWN);
- asin_optab = init_optab (UNKNOWN);
- cos_optab = init_optab (UNKNOWN);
- acos_optab = init_optab (UNKNOWN);
- exp_optab = init_optab (UNKNOWN);
- exp10_optab = init_optab (UNKNOWN);
- exp2_optab = init_optab (UNKNOWN);
- expm1_optab = init_optab (UNKNOWN);
- ldexp_optab = init_optab (UNKNOWN);
- scalb_optab = init_optab (UNKNOWN);
- logb_optab = init_optab (UNKNOWN);
- ilogb_optab = init_optab (UNKNOWN);
- log_optab = init_optab (UNKNOWN);
- log10_optab = init_optab (UNKNOWN);
- log2_optab = init_optab (UNKNOWN);
- log1p_optab = init_optab (UNKNOWN);
- tan_optab = init_optab (UNKNOWN);
- atan_optab = init_optab (UNKNOWN);
- copysign_optab = init_optab (UNKNOWN);
- signbit_optab = init_optab (UNKNOWN);
-
- isinf_optab = init_optab (UNKNOWN);
-
- strlen_optab = init_optab (UNKNOWN);
- cbranch_optab = init_optab (UNKNOWN);
- cmov_optab = init_optab (UNKNOWN);
- cstore_optab = init_optab (UNKNOWN);
- push_optab = init_optab (UNKNOWN);
-
- reduc_smax_optab = init_optab (UNKNOWN);
- reduc_umax_optab = init_optab (UNKNOWN);
- reduc_smin_optab = init_optab (UNKNOWN);
- reduc_umin_optab = init_optab (UNKNOWN);
- reduc_splus_optab = init_optab (UNKNOWN);
- reduc_uplus_optab = init_optab (UNKNOWN);
-
- ssum_widen_optab = init_optab (UNKNOWN);
- usum_widen_optab = init_optab (UNKNOWN);
- sdot_prod_optab = init_optab (UNKNOWN);
- udot_prod_optab = init_optab (UNKNOWN);
-
- vec_extract_optab = init_optab (UNKNOWN);
- vec_extract_even_optab = init_optab (UNKNOWN);
- vec_extract_odd_optab = init_optab (UNKNOWN);
- vec_interleave_high_optab = init_optab (UNKNOWN);
- vec_interleave_low_optab = init_optab (UNKNOWN);
- vec_set_optab = init_optab (UNKNOWN);
- vec_init_optab = init_optab (UNKNOWN);
- vec_shl_optab = init_optab (UNKNOWN);
- vec_shr_optab = init_optab (UNKNOWN);
- vec_realign_load_optab = init_optab (UNKNOWN);
- movmisalign_optab = init_optab (UNKNOWN);
- vec_widen_umult_hi_optab = init_optab (UNKNOWN);
- vec_widen_umult_lo_optab = init_optab (UNKNOWN);
- vec_widen_smult_hi_optab = init_optab (UNKNOWN);
- vec_widen_smult_lo_optab = init_optab (UNKNOWN);
- vec_unpacks_hi_optab = init_optab (UNKNOWN);
- vec_unpacks_lo_optab = init_optab (UNKNOWN);
- vec_unpacku_hi_optab = init_optab (UNKNOWN);
- vec_unpacku_lo_optab = init_optab (UNKNOWN);
- vec_unpacks_float_hi_optab = init_optab (UNKNOWN);
- vec_unpacks_float_lo_optab = init_optab (UNKNOWN);
- vec_unpacku_float_hi_optab = init_optab (UNKNOWN);
- vec_unpacku_float_lo_optab = init_optab (UNKNOWN);
- vec_pack_trunc_optab = init_optab (UNKNOWN);
- vec_pack_usat_optab = init_optab (UNKNOWN);
- vec_pack_ssat_optab = init_optab (UNKNOWN);
- vec_pack_ufix_trunc_optab = init_optab (UNKNOWN);
- vec_pack_sfix_trunc_optab = init_optab (UNKNOWN);
-
- powi_optab = init_optab (UNKNOWN);
+ init_optab (mov_optab, SET);
+ init_optab (movstrict_optab, STRICT_LOW_PART);
+ init_optab (cbranch_optab, COMPARE);
+
+ init_optab (cmov_optab, UNKNOWN);
+ init_optab (cstore_optab, UNKNOWN);
+ init_optab (ctrap_optab, UNKNOWN);
+
+ init_optab (storent_optab, UNKNOWN);
+
+ init_optab (cmp_optab, UNKNOWN);
+ init_optab (ucmp_optab, UNKNOWN);
+
+ init_optab (eq_optab, EQ);
+ init_optab (ne_optab, NE);
+ init_optab (gt_optab, GT);
+ init_optab (ge_optab, GE);
+ init_optab (lt_optab, LT);
+ init_optab (le_optab, LE);
+ init_optab (unord_optab, UNORDERED);
+
+ init_optab (neg_optab, NEG);
+ init_optab (ssneg_optab, SS_NEG);
+ init_optab (usneg_optab, US_NEG);
+ init_optabv (negv_optab, NEG);
+ init_optab (abs_optab, ABS);
+ init_optabv (absv_optab, ABS);
+ init_optab (addcc_optab, UNKNOWN);
+ init_optab (one_cmpl_optab, NOT);
+ init_optab (bswap_optab, BSWAP);
+ init_optab (ffs_optab, FFS);
+ init_optab (clz_optab, CLZ);
+ init_optab (ctz_optab, CTZ);
+ init_optab (clrsb_optab, CLRSB);
+ init_optab (popcount_optab, POPCOUNT);
+ init_optab (parity_optab, PARITY);
+ init_optab (sqrt_optab, SQRT);
+ init_optab (floor_optab, UNKNOWN);
+ init_optab (ceil_optab, UNKNOWN);
+ init_optab (round_optab, UNKNOWN);
+ init_optab (btrunc_optab, UNKNOWN);
+ init_optab (nearbyint_optab, UNKNOWN);
+ init_optab (rint_optab, UNKNOWN);
+ init_optab (sincos_optab, UNKNOWN);
+ init_optab (sin_optab, UNKNOWN);
+ init_optab (asin_optab, UNKNOWN);
+ init_optab (cos_optab, UNKNOWN);
+ init_optab (acos_optab, UNKNOWN);
+ init_optab (exp_optab, UNKNOWN);
+ init_optab (exp10_optab, UNKNOWN);
+ init_optab (exp2_optab, UNKNOWN);
+ init_optab (expm1_optab, UNKNOWN);
+ init_optab (ldexp_optab, UNKNOWN);
+ init_optab (scalb_optab, UNKNOWN);
+ init_optab (significand_optab, UNKNOWN);
+ init_optab (logb_optab, UNKNOWN);
+ init_optab (ilogb_optab, UNKNOWN);
+ init_optab (log_optab, UNKNOWN);
+ init_optab (log10_optab, UNKNOWN);
+ init_optab (log2_optab, UNKNOWN);
+ init_optab (log1p_optab, UNKNOWN);
+ init_optab (tan_optab, UNKNOWN);
+ init_optab (atan_optab, UNKNOWN);
+ init_optab (copysign_optab, UNKNOWN);
+ init_optab (signbit_optab, UNKNOWN);
+
+ init_optab (isinf_optab, UNKNOWN);
+
+ init_optab (strlen_optab, UNKNOWN);
+ init_optab (push_optab, UNKNOWN);
+
+ init_optab (reduc_smax_optab, UNKNOWN);
+ init_optab (reduc_umax_optab, UNKNOWN);
+ init_optab (reduc_smin_optab, UNKNOWN);
+ init_optab (reduc_umin_optab, UNKNOWN);
+ init_optab (reduc_splus_optab, UNKNOWN);
+ init_optab (reduc_uplus_optab, UNKNOWN);
+
+ init_optab (ssum_widen_optab, UNKNOWN);
+ init_optab (usum_widen_optab, UNKNOWN);
+ init_optab (sdot_prod_optab, UNKNOWN);
+ init_optab (udot_prod_optab, UNKNOWN);
+
+ init_optab (vec_extract_optab, UNKNOWN);
+ init_optab (vec_extract_even_optab, UNKNOWN);
+ init_optab (vec_extract_odd_optab, UNKNOWN);
+ init_optab (vec_interleave_high_optab, UNKNOWN);
+ init_optab (vec_interleave_low_optab, UNKNOWN);
+ init_optab (vec_set_optab, UNKNOWN);
+ init_optab (vec_init_optab, UNKNOWN);
+ init_optab (vec_shl_optab, UNKNOWN);
+ init_optab (vec_shr_optab, UNKNOWN);
+ init_optab (vec_realign_load_optab, UNKNOWN);
+ init_optab (movmisalign_optab, UNKNOWN);
+ init_optab (vec_widen_umult_hi_optab, UNKNOWN);
+ init_optab (vec_widen_umult_lo_optab, UNKNOWN);
+ init_optab (vec_widen_smult_hi_optab, UNKNOWN);
+ init_optab (vec_widen_smult_lo_optab, UNKNOWN);
+ init_optab (vec_widen_ushiftl_hi_optab, UNKNOWN);
+ init_optab (vec_widen_ushiftl_lo_optab, UNKNOWN);
+ init_optab (vec_widen_sshiftl_hi_optab, UNKNOWN);
+ init_optab (vec_widen_sshiftl_lo_optab, UNKNOWN);
+ init_optab (vec_unpacks_hi_optab, UNKNOWN);
+ init_optab (vec_unpacks_lo_optab, UNKNOWN);
+ init_optab (vec_unpacku_hi_optab, UNKNOWN);
+ init_optab (vec_unpacku_lo_optab, UNKNOWN);
+ init_optab (vec_unpacks_float_hi_optab, UNKNOWN);
+ init_optab (vec_unpacks_float_lo_optab, UNKNOWN);
+ init_optab (vec_unpacku_float_hi_optab, UNKNOWN);
+ init_optab (vec_unpacku_float_lo_optab, UNKNOWN);
+ init_optab (vec_pack_trunc_optab, UNKNOWN);
+ init_optab (vec_pack_usat_optab, UNKNOWN);
+ init_optab (vec_pack_ssat_optab, UNKNOWN);
+ init_optab (vec_pack_ufix_trunc_optab, UNKNOWN);
+ init_optab (vec_pack_sfix_trunc_optab, UNKNOWN);
+
+ init_optab (powi_optab, UNKNOWN);
/* Conversions. */
- sext_optab = init_convert_optab (SIGN_EXTEND);
- zext_optab = init_convert_optab (ZERO_EXTEND);
- trunc_optab = init_convert_optab (TRUNCATE);
- sfix_optab = init_convert_optab (FIX);
- ufix_optab = init_convert_optab (UNSIGNED_FIX);
- sfixtrunc_optab = init_convert_optab (UNKNOWN);
- ufixtrunc_optab = init_convert_optab (UNKNOWN);
- sfloat_optab = init_convert_optab (FLOAT);
- ufloat_optab = init_convert_optab (UNSIGNED_FLOAT);
- lrint_optab = init_convert_optab (UNKNOWN);
- lround_optab = init_convert_optab (UNKNOWN);
- lfloor_optab = init_convert_optab (UNKNOWN);
- lceil_optab = init_convert_optab (UNKNOWN);
-
- for (i = 0; i < NUM_MACHINE_MODES; i++)
- {
- movmem_optab[i] = CODE_FOR_nothing;
- cmpstr_optab[i] = CODE_FOR_nothing;
- cmpstrn_optab[i] = CODE_FOR_nothing;
- cmpmem_optab[i] = CODE_FOR_nothing;
- setmem_optab[i] = CODE_FOR_nothing;
-
- sync_add_optab[i] = CODE_FOR_nothing;
- sync_sub_optab[i] = CODE_FOR_nothing;
- sync_ior_optab[i] = CODE_FOR_nothing;
- sync_and_optab[i] = CODE_FOR_nothing;
- sync_xor_optab[i] = CODE_FOR_nothing;
- sync_nand_optab[i] = CODE_FOR_nothing;
- sync_old_add_optab[i] = CODE_FOR_nothing;
- sync_old_sub_optab[i] = CODE_FOR_nothing;
- sync_old_ior_optab[i] = CODE_FOR_nothing;
- sync_old_and_optab[i] = CODE_FOR_nothing;
- sync_old_xor_optab[i] = CODE_FOR_nothing;
- sync_old_nand_optab[i] = CODE_FOR_nothing;
- sync_new_add_optab[i] = CODE_FOR_nothing;
- sync_new_sub_optab[i] = CODE_FOR_nothing;
- sync_new_ior_optab[i] = CODE_FOR_nothing;
- sync_new_and_optab[i] = CODE_FOR_nothing;
- sync_new_xor_optab[i] = CODE_FOR_nothing;
- sync_new_nand_optab[i] = CODE_FOR_nothing;
- sync_compare_and_swap[i] = CODE_FOR_nothing;
- sync_compare_and_swap_cc[i] = CODE_FOR_nothing;
- sync_lock_test_and_set[i] = CODE_FOR_nothing;
- sync_lock_release[i] = CODE_FOR_nothing;
-
- reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
- }
+ init_convert_optab (sext_optab, SIGN_EXTEND);
+ init_convert_optab (zext_optab, ZERO_EXTEND);
+ init_convert_optab (trunc_optab, TRUNCATE);
+ init_convert_optab (sfix_optab, FIX);
+ init_convert_optab (ufix_optab, UNSIGNED_FIX);
+ init_convert_optab (sfixtrunc_optab, UNKNOWN);
+ init_convert_optab (ufixtrunc_optab, UNKNOWN);
+ init_convert_optab (sfloat_optab, FLOAT);
+ init_convert_optab (ufloat_optab, UNSIGNED_FLOAT);
+ init_convert_optab (lrint_optab, UNKNOWN);
+ init_convert_optab (lround_optab, UNKNOWN);
+ init_convert_optab (lfloor_optab, UNKNOWN);
+ init_convert_optab (lceil_optab, UNKNOWN);
+
+ init_convert_optab (fract_optab, FRACT_CONVERT);
+ init_convert_optab (fractuns_optab, UNSIGNED_FRACT_CONVERT);
+ init_convert_optab (satfract_optab, SAT_FRACT);
+ init_convert_optab (satfractuns_optab, UNSIGNED_SAT_FRACT);
/* Fill in the optabs with the insns we support. */
init_all_optabs ();
- /* The ffs function operates on `int'. Fall back on it if we do not
- have a libgcc2 function for that width. */
- int_mode = mode_for_size (INT_TYPE_SIZE, MODE_INT, 0);
- ffs_optab->handlers[(int) int_mode].libfunc = init_one_libfunc ("ffs");
-
/* Initialize the optabs with the names of the library functions. */
- init_integral_libfuncs (add_optab, "add", '3');
- init_floating_libfuncs (add_optab, "add", '3');
- init_integral_libfuncs (addv_optab, "addv", '3');
- init_floating_libfuncs (addv_optab, "add", '3');
- init_integral_libfuncs (sub_optab, "sub", '3');
- init_floating_libfuncs (sub_optab, "sub", '3');
- init_integral_libfuncs (subv_optab, "subv", '3');
- init_floating_libfuncs (subv_optab, "sub", '3');
- init_integral_libfuncs (smul_optab, "mul", '3');
- init_floating_libfuncs (smul_optab, "mul", '3');
- init_integral_libfuncs (smulv_optab, "mulv", '3');
- init_floating_libfuncs (smulv_optab, "mul", '3');
- init_integral_libfuncs (sdiv_optab, "div", '3');
- init_floating_libfuncs (sdiv_optab, "div", '3');
- init_integral_libfuncs (sdivv_optab, "divv", '3');
- init_integral_libfuncs (udiv_optab, "udiv", '3');
- init_integral_libfuncs (sdivmod_optab, "divmod", '4');
- init_integral_libfuncs (udivmod_optab, "udivmod", '4');
- init_integral_libfuncs (smod_optab, "mod", '3');
- init_integral_libfuncs (umod_optab, "umod", '3');
- init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
- init_integral_libfuncs (and_optab, "and", '3');
- init_integral_libfuncs (ior_optab, "ior", '3');
- init_integral_libfuncs (xor_optab, "xor", '3');
- init_integral_libfuncs (ashl_optab, "ashl", '3');
- init_integral_libfuncs (ashr_optab, "ashr", '3');
- init_integral_libfuncs (lshr_optab, "lshr", '3');
- init_integral_libfuncs (smin_optab, "min", '3');
- init_floating_libfuncs (smin_optab, "min", '3');
- init_integral_libfuncs (smax_optab, "max", '3');
- init_floating_libfuncs (smax_optab, "max", '3');
- init_integral_libfuncs (umin_optab, "umin", '3');
- init_integral_libfuncs (umax_optab, "umax", '3');
- init_integral_libfuncs (neg_optab, "neg", '2');
- init_floating_libfuncs (neg_optab, "neg", '2');
- init_integral_libfuncs (negv_optab, "negv", '2');
- init_floating_libfuncs (negv_optab, "neg", '2');
- init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
- init_integral_libfuncs (ffs_optab, "ffs", '2');
- init_integral_libfuncs (clz_optab, "clz", '2');
- init_integral_libfuncs (ctz_optab, "ctz", '2');
- init_integral_libfuncs (popcount_optab, "popcount", '2');
- init_integral_libfuncs (parity_optab, "parity", '2');
+ add_optab->libcall_basename = "add";
+ add_optab->libcall_suffix = '3';
+ add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
+ addv_optab->libcall_basename = "add";
+ addv_optab->libcall_suffix = '3';
+ addv_optab->libcall_gen = gen_intv_fp_libfunc;
+ ssadd_optab->libcall_basename = "ssadd";
+ ssadd_optab->libcall_suffix = '3';
+ ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
+ usadd_optab->libcall_basename = "usadd";
+ usadd_optab->libcall_suffix = '3';
+ usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
+ sub_optab->libcall_basename = "sub";
+ sub_optab->libcall_suffix = '3';
+ sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
+ subv_optab->libcall_basename = "sub";
+ subv_optab->libcall_suffix = '3';
+ subv_optab->libcall_gen = gen_intv_fp_libfunc;
+ sssub_optab->libcall_basename = "sssub";
+ sssub_optab->libcall_suffix = '3';
+ sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
+ ussub_optab->libcall_basename = "ussub";
+ ussub_optab->libcall_suffix = '3';
+ ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
+ smul_optab->libcall_basename = "mul";
+ smul_optab->libcall_suffix = '3';
+ smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
+ smulv_optab->libcall_basename = "mul";
+ smulv_optab->libcall_suffix = '3';
+ smulv_optab->libcall_gen = gen_intv_fp_libfunc;
+ ssmul_optab->libcall_basename = "ssmul";
+ ssmul_optab->libcall_suffix = '3';
+ ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
+ usmul_optab->libcall_basename = "usmul";
+ usmul_optab->libcall_suffix = '3';
+ usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
+ sdiv_optab->libcall_basename = "div";
+ sdiv_optab->libcall_suffix = '3';
+ sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
+ sdivv_optab->libcall_basename = "divv";
+ sdivv_optab->libcall_suffix = '3';
+ sdivv_optab->libcall_gen = gen_int_libfunc;
+ ssdiv_optab->libcall_basename = "ssdiv";
+ ssdiv_optab->libcall_suffix = '3';
+ ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
+ udiv_optab->libcall_basename = "udiv";
+ udiv_optab->libcall_suffix = '3';
+ udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
+ usdiv_optab->libcall_basename = "usdiv";
+ usdiv_optab->libcall_suffix = '3';
+ usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
+ sdivmod_optab->libcall_basename = "divmod";
+ sdivmod_optab->libcall_suffix = '4';
+ sdivmod_optab->libcall_gen = gen_int_libfunc;
+ udivmod_optab->libcall_basename = "udivmod";
+ udivmod_optab->libcall_suffix = '4';
+ udivmod_optab->libcall_gen = gen_int_libfunc;
+ smod_optab->libcall_basename = "mod";
+ smod_optab->libcall_suffix = '3';
+ smod_optab->libcall_gen = gen_int_libfunc;
+ umod_optab->libcall_basename = "umod";
+ umod_optab->libcall_suffix = '3';
+ umod_optab->libcall_gen = gen_int_libfunc;
+ ftrunc_optab->libcall_basename = "ftrunc";
+ ftrunc_optab->libcall_suffix = '2';
+ ftrunc_optab->libcall_gen = gen_fp_libfunc;
+ and_optab->libcall_basename = "and";
+ and_optab->libcall_suffix = '3';
+ and_optab->libcall_gen = gen_int_libfunc;
+ ior_optab->libcall_basename = "ior";
+ ior_optab->libcall_suffix = '3';
+ ior_optab->libcall_gen = gen_int_libfunc;
+ xor_optab->libcall_basename = "xor";
+ xor_optab->libcall_suffix = '3';
+ xor_optab->libcall_gen = gen_int_libfunc;
+ ashl_optab->libcall_basename = "ashl";
+ ashl_optab->libcall_suffix = '3';
+ ashl_optab->libcall_gen = gen_int_fixed_libfunc;
+ ssashl_optab->libcall_basename = "ssashl";
+ ssashl_optab->libcall_suffix = '3';
+ ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
+ usashl_optab->libcall_basename = "usashl";
+ usashl_optab->libcall_suffix = '3';
+ usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
+ ashr_optab->libcall_basename = "ashr";
+ ashr_optab->libcall_suffix = '3';
+ ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
+ lshr_optab->libcall_basename = "lshr";
+ lshr_optab->libcall_suffix = '3';
+ lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
+ smin_optab->libcall_basename = "min";
+ smin_optab->libcall_suffix = '3';
+ smin_optab->libcall_gen = gen_int_fp_libfunc;
+ smax_optab->libcall_basename = "max";
+ smax_optab->libcall_suffix = '3';
+ smax_optab->libcall_gen = gen_int_fp_libfunc;
+ umin_optab->libcall_basename = "umin";
+ umin_optab->libcall_suffix = '3';
+ umin_optab->libcall_gen = gen_int_libfunc;
+ umax_optab->libcall_basename = "umax";
+ umax_optab->libcall_suffix = '3';
+ umax_optab->libcall_gen = gen_int_libfunc;
+ neg_optab->libcall_basename = "neg";
+ neg_optab->libcall_suffix = '2';
+ neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
+ ssneg_optab->libcall_basename = "ssneg";
+ ssneg_optab->libcall_suffix = '2';
+ ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
+ usneg_optab->libcall_basename = "usneg";
+ usneg_optab->libcall_suffix = '2';
+ usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
+ negv_optab->libcall_basename = "neg";
+ negv_optab->libcall_suffix = '2';
+ negv_optab->libcall_gen = gen_intv_fp_libfunc;
+ one_cmpl_optab->libcall_basename = "one_cmpl";
+ one_cmpl_optab->libcall_suffix = '2';
+ one_cmpl_optab->libcall_gen = gen_int_libfunc;
+ ffs_optab->libcall_basename = "ffs";
+ ffs_optab->libcall_suffix = '2';
+ ffs_optab->libcall_gen = gen_int_libfunc;
+ clz_optab->libcall_basename = "clz";
+ clz_optab->libcall_suffix = '2';
+ clz_optab->libcall_gen = gen_int_libfunc;
+ ctz_optab->libcall_basename = "ctz";
+ ctz_optab->libcall_suffix = '2';
+ ctz_optab->libcall_gen = gen_int_libfunc;
+ clrsb_optab->libcall_basename = "clrsb";
+ clrsb_optab->libcall_suffix = '2';
+ clrsb_optab->libcall_gen = gen_int_libfunc;
+ popcount_optab->libcall_basename = "popcount";
+ popcount_optab->libcall_suffix = '2';
+ popcount_optab->libcall_gen = gen_int_libfunc;
+ parity_optab->libcall_basename = "parity";
+ parity_optab->libcall_suffix = '2';
+ parity_optab->libcall_gen = gen_int_libfunc;
/* Comparison libcalls for integers MUST come in pairs,
signed/unsigned. */
- init_integral_libfuncs (cmp_optab, "cmp", '2');
- init_integral_libfuncs (ucmp_optab, "ucmp", '2');
- init_floating_libfuncs (cmp_optab, "cmp", '2');
+ cmp_optab->libcall_basename = "cmp";
+ cmp_optab->libcall_suffix = '2';
+ cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
+ ucmp_optab->libcall_basename = "ucmp";
+ ucmp_optab->libcall_suffix = '2';
+ ucmp_optab->libcall_gen = gen_int_libfunc;
/* EQ etc are floating point only. */
- init_floating_libfuncs (eq_optab, "eq", '2');
- init_floating_libfuncs (ne_optab, "ne", '2');
- init_floating_libfuncs (gt_optab, "gt", '2');
- init_floating_libfuncs (ge_optab, "ge", '2');
- init_floating_libfuncs (lt_optab, "lt", '2');
- init_floating_libfuncs (le_optab, "le", '2');
- init_floating_libfuncs (unord_optab, "unord", '2');
-
- init_floating_libfuncs (powi_optab, "powi", '2');
+ eq_optab->libcall_basename = "eq";
+ eq_optab->libcall_suffix = '2';
+ eq_optab->libcall_gen = gen_fp_libfunc;
+ ne_optab->libcall_basename = "ne";
+ ne_optab->libcall_suffix = '2';
+ ne_optab->libcall_gen = gen_fp_libfunc;
+ gt_optab->libcall_basename = "gt";
+ gt_optab->libcall_suffix = '2';
+ gt_optab->libcall_gen = gen_fp_libfunc;
+ ge_optab->libcall_basename = "ge";
+ ge_optab->libcall_suffix = '2';
+ ge_optab->libcall_gen = gen_fp_libfunc;
+ lt_optab->libcall_basename = "lt";
+ lt_optab->libcall_suffix = '2';
+ lt_optab->libcall_gen = gen_fp_libfunc;
+ le_optab->libcall_basename = "le";
+ le_optab->libcall_suffix = '2';
+ le_optab->libcall_gen = gen_fp_libfunc;
+ unord_optab->libcall_basename = "unord";
+ unord_optab->libcall_suffix = '2';
+ unord_optab->libcall_gen = gen_fp_libfunc;
+
+ powi_optab->libcall_basename = "powi";
+ powi_optab->libcall_suffix = '2';
+ powi_optab->libcall_gen = gen_fp_libfunc;
/* Conversions. */
- init_interclass_conv_libfuncs (sfloat_optab, "float",
- MODE_INT, MODE_FLOAT);
- init_interclass_conv_libfuncs (sfloat_optab, "float",
- MODE_INT, MODE_DECIMAL_FLOAT);
- init_interclass_conv_libfuncs (ufloat_optab, "floatun",
- MODE_INT, MODE_FLOAT);
- init_interclass_conv_libfuncs (ufloat_optab, "floatun",
- MODE_INT, MODE_DECIMAL_FLOAT);
- init_interclass_conv_libfuncs (sfix_optab, "fix",
- MODE_FLOAT, MODE_INT);
- init_interclass_conv_libfuncs (sfix_optab, "fix",
- MODE_DECIMAL_FLOAT, MODE_INT);
- init_interclass_conv_libfuncs (ufix_optab, "fixuns",
- MODE_FLOAT, MODE_INT);
- init_interclass_conv_libfuncs (ufix_optab, "fixuns",
- MODE_DECIMAL_FLOAT, MODE_INT);
- init_interclass_conv_libfuncs (ufloat_optab, "floatuns",
- MODE_INT, MODE_DECIMAL_FLOAT);
- init_interclass_conv_libfuncs (lrint_optab, "lrint",
- MODE_INT, MODE_FLOAT);
- init_interclass_conv_libfuncs (lround_optab, "lround",
- MODE_INT, MODE_FLOAT);
- init_interclass_conv_libfuncs (lfloor_optab, "lfloor",
- MODE_INT, MODE_FLOAT);
- init_interclass_conv_libfuncs (lceil_optab, "lceil",
- MODE_INT, MODE_FLOAT);
-
- /* sext_optab is also used for FLOAT_EXTEND. */
- init_intraclass_conv_libfuncs (sext_optab, "extend", MODE_FLOAT, true);
- init_intraclass_conv_libfuncs (sext_optab, "extend", MODE_DECIMAL_FLOAT, true);
- init_interclass_conv_libfuncs (sext_optab, "extend", MODE_FLOAT, MODE_DECIMAL_FLOAT);
- init_interclass_conv_libfuncs (sext_optab, "extend", MODE_DECIMAL_FLOAT, MODE_FLOAT);
- init_intraclass_conv_libfuncs (trunc_optab, "trunc", MODE_FLOAT, false);
- init_intraclass_conv_libfuncs (trunc_optab, "trunc", MODE_DECIMAL_FLOAT, false);
- init_interclass_conv_libfuncs (trunc_optab, "trunc", MODE_FLOAT, MODE_DECIMAL_FLOAT);
- init_interclass_conv_libfuncs (trunc_optab, "trunc", MODE_DECIMAL_FLOAT, MODE_FLOAT);
+ sfloat_optab->libcall_basename = "float";
+ sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
+ ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
+ sfix_optab->libcall_basename = "fix";
+ sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
+ ufix_optab->libcall_basename = "fixuns";
+ ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
+ lrint_optab->libcall_basename = "lrint";
+ lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
+ lround_optab->libcall_basename = "lround";
+ lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
+ lfloor_optab->libcall_basename = "lfloor";
+ lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
+ lceil_optab->libcall_basename = "lceil";
+ lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
+
+ /* trunc_optab is also used for FLOAT_EXTEND. */
+ sext_optab->libcall_basename = "extend";
+ sext_optab->libcall_gen = gen_extend_conv_libfunc;
+ trunc_optab->libcall_basename = "trunc";
+ trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
+
+ /* Conversions for fixed-point modes and other modes. */
+ fract_optab->libcall_basename = "fract";
+ fract_optab->libcall_gen = gen_fract_conv_libfunc;
+ satfract_optab->libcall_basename = "satfract";
+ satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
+ fractuns_optab->libcall_basename = "fractuns";
+ fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
+ satfractuns_optab->libcall_basename = "satfractuns";
+ satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
+
+ /* The ffs function operates on `int'. Fall back on it if we do not
+ have a libgcc2 function for that width. */
+ if (INT_TYPE_SIZE < BITS_PER_WORD)
+ set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
+ "ffs");
/* Explicitly initialize the bswap libfuncs since we need them to be
valid for things other than word_mode. */
- set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
- set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
+ if (targetm.libfunc_gnu_prefix)
+ {
+ set_optab_libfunc (bswap_optab, SImode, "__gnu_bswapsi2");
+ set_optab_libfunc (bswap_optab, DImode, "__gnu_bswapdi2");
+ }
+ else
+ {
+ set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
+ set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
+ }
/* Use cabs for double complex abs, since systems generally have cabs.
Don't define any libcall for float complex, so that cabs will be used. */
if (complex_double_type_node)
- abs_optab->handlers[TYPE_MODE (complex_double_type_node)].libfunc
- = init_one_libfunc ("cabs");
+ set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
abort_libfunc = init_one_libfunc ("abort");
memcpy_libfunc = init_one_libfunc ("memcpy");
gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
- if (HAVE_conditional_trap)
- trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
-
/* Allow the target to add more libcalls or rename some, etc. */
targetm.init_libfuncs ();
}
-#ifdef DEBUG
+/* A helper function for init_sync_libfuncs. Using the basename BASE,
+ install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
+
+static void
+init_sync_libfuncs_1 (optab tab, const char *base, int max)
+{
+ enum machine_mode mode;
+ char buf[64];
+ size_t len = strlen (base);
+ int i;
+
+ gcc_assert (max <= 8);
+ gcc_assert (len + 3 < sizeof (buf));
+
+ memcpy (buf, base, len);
+ buf[len] = '_';
+ buf[len + 1] = '0';
+ buf[len + 2] = '\0';
+
+ mode = QImode;
+ for (i = 1; i <= max; i *= 2)
+ {
+ buf[len + 1] = '0' + i;
+ set_optab_libfunc (tab, mode, buf);
+ mode = GET_MODE_2XWIDER_MODE (mode);
+ }
+}
+
+void
+init_sync_libfuncs (int max)
+{
+ init_sync_libfuncs_1 (sync_compare_and_swap_optab,
+ "__sync_val_compare_and_swap", max);
+ init_sync_libfuncs_1 (sync_lock_test_and_set_optab,
+ "__sync_lock_test_and_set", max);
+
+ init_sync_libfuncs_1 (sync_old_add_optab, "__sync_fetch_and_add", max);
+ init_sync_libfuncs_1 (sync_old_sub_optab, "__sync_fetch_and_sub", max);
+ init_sync_libfuncs_1 (sync_old_ior_optab, "__sync_fetch_and_or", max);
+ init_sync_libfuncs_1 (sync_old_and_optab, "__sync_fetch_and_and", max);
+ init_sync_libfuncs_1 (sync_old_xor_optab, "__sync_fetch_and_xor", max);
+ init_sync_libfuncs_1 (sync_old_nand_optab, "__sync_fetch_and_nand", max);
+
+ init_sync_libfuncs_1 (sync_new_add_optab, "__sync_add_and_fetch", max);
+ init_sync_libfuncs_1 (sync_new_sub_optab, "__sync_sub_and_fetch", max);
+ init_sync_libfuncs_1 (sync_new_ior_optab, "__sync_or_and_fetch", max);
+ init_sync_libfuncs_1 (sync_new_and_optab, "__sync_and_and_fetch", max);
+ init_sync_libfuncs_1 (sync_new_xor_optab, "__sync_xor_and_fetch", max);
+ init_sync_libfuncs_1 (sync_new_nand_optab, "__sync_nand_and_fetch", max);
+}
/* Print information about the current contents of the optabs on
STDERR. */
-static void
+DEBUG_FUNCTION void
debug_optab_libfuncs (void)
{
int i;
for (j = 0; j < NUM_MACHINE_MODES; ++j)
{
optab o;
- struct optab_handlers *h;
+ rtx l;
- o = optab_table[i];
- h = &o->handlers[j];
- if (h->libfunc)
+ o = &optab_table[i];
+ l = optab_libfunc (o, (enum machine_mode) j);
+ if (l)
{
- gcc_assert (GET_CODE (h->libfunc) == SYMBOL_REF);
+ gcc_assert (GET_CODE (l) == SYMBOL_REF);
fprintf (stderr, "%s\t%s:\t%s\n",
GET_RTX_NAME (o->code),
GET_MODE_NAME (j),
- XSTR (h->libfunc, 0));
+ XSTR (l, 0));
}
}
for (k = 0; k < NUM_MACHINE_MODES; ++k)
{
convert_optab o;
- struct optab_handlers *h;
+ rtx l;
o = &convert_optab_table[i];
- h = &o->handlers[j][k];
- if (h->libfunc)
+ l = convert_optab_libfunc (o, (enum machine_mode) j,
+ (enum machine_mode) k);
+ if (l)
{
- gcc_assert (GET_CODE (h->libfunc) == SYMBOL_REF);
+ gcc_assert (GET_CODE (l) == SYMBOL_REF);
fprintf (stderr, "%s\t%s\t%s:\t%s\n",
GET_RTX_NAME (o->code),
GET_MODE_NAME (j),
GET_MODE_NAME (k),
- XSTR (h->libfunc, 0));
+ XSTR (l, 0));
}
}
}
-#endif /* DEBUG */
-
\f
/* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
CODE. Return 0 on failure. */
rtx
-gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
- rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED)
+gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
{
enum machine_mode mode = GET_MODE (op1);
enum insn_code icode;
rtx insn;
-
- if (!HAVE_conditional_trap)
- return 0;
+ rtx trap_rtx;
if (mode == VOIDmode)
return 0;
- icode = cmp_optab->handlers[(int) mode].insn_code;
+ icode = optab_handler (ctrap_optab, mode);
if (icode == CODE_FOR_nothing)
return 0;
+ /* Some targets only accept a zero trap code. */
+ if (!insn_operand_matches (icode, 3, tcode))
+ return 0;
+
+ do_pending_stack_adjust ();
start_sequence ();
- op1 = prepare_operand (icode, op1, 0, mode, mode, 0);
- op2 = prepare_operand (icode, op2, 1, mode, mode, 0);
- if (!op1 || !op2)
+ prepare_cmp_insn (op1, op2, code, NULL_RTX, false, OPTAB_DIRECT,
+ &trap_rtx, &mode);
+ if (!trap_rtx)
+ insn = NULL_RTX;
+ else
+ insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1),
+ tcode);
+
+ /* If that failed, then give up. */
+ if (insn == 0)
{
end_sequence ();
return 0;
}
- emit_insn (GEN_FCN (icode) (op1, op2));
- PUT_CODE (trap_rtx, code);
- gcc_assert (HAVE_conditional_trap);
- insn = gen_conditional_trap (trap_rtx, tcode);
- if (insn)
- {
- emit_insn (insn);
- insn = get_insns ();
- }
+ emit_insn (insn);
+ insn = get_insns ();
end_sequence ();
-
return insn;
}
static rtx
vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
{
+ struct expand_operand ops[2];
enum rtx_code rcode;
tree t_op0, t_op1;
rtx rtx_op0, rtx_op1;
rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
EXPAND_STACK_PARM);
- if (!insn_data[icode].operand[4].predicate (rtx_op0, GET_MODE (rtx_op0))
- && GET_MODE (rtx_op0) != VOIDmode)
- rtx_op0 = force_reg (GET_MODE (rtx_op0), rtx_op0);
-
- if (!insn_data[icode].operand[5].predicate (rtx_op1, GET_MODE (rtx_op1))
- && GET_MODE (rtx_op1) != VOIDmode)
- rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
-
- return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1);
+ create_input_operand (&ops[0], rtx_op0, GET_MODE (rtx_op0));
+ create_input_operand (&ops[1], rtx_op1, GET_MODE (rtx_op1));
+ if (!maybe_legitimize_operands (icode, 4, 2, ops))
+ gcc_unreachable ();
+ return gen_rtx_fmt_ee (rcode, VOIDmode, ops[0].value, ops[1].value);
}
-/* Return insn code for VEC_COND_EXPR EXPR. */
+/* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
+ of the CPU. SEL may be NULL, which stands for an unknown constant. */
-static inline enum insn_code
-get_vcond_icode (tree expr, enum machine_mode mode)
+bool
+can_vec_perm_p (enum machine_mode mode, bool variable,
+ const unsigned char *sel)
{
- enum insn_code icode = CODE_FOR_nothing;
+ enum machine_mode qimode;
- if (TYPE_UNSIGNED (TREE_TYPE (expr)))
- icode = vcondu_gen_code[mode];
- else
- icode = vcond_gen_code[mode];
- return icode;
-}
+ /* If the target doesn't implement a vector mode for the vector type,
+ then no operations are supported. */
+ if (!VECTOR_MODE_P (mode))
+ return false;
-/* Return TRUE iff, appropriate vector insns are available
- for vector cond expr expr in VMODE mode. */
+ if (!variable)
+ {
+ if (direct_optab_handler (vec_perm_const_optab, mode) != CODE_FOR_nothing
+ && (sel == NULL
+ || targetm.vectorize.vec_perm_const_ok == NULL
+ || targetm.vectorize.vec_perm_const_ok (mode, sel)))
+ return true;
+ }
-bool
-expand_vec_cond_expr_p (tree expr, enum machine_mode vmode)
-{
- if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing)
+ if (direct_optab_handler (vec_perm_optab, mode) != CODE_FOR_nothing)
+ return true;
+
+ /* We allow fallback to a QI vector mode, and adjust the mask. */
+ if (GET_MODE_INNER (mode) == QImode)
return false;
+ qimode = mode_for_vector (QImode, GET_MODE_SIZE (mode));
+ if (!VECTOR_MODE_P (qimode))
+ return false;
+
+ /* ??? For completeness, we ought to check the QImode version of
+ vec_perm_const_optab. But all users of this implicit lowering
+ feature implement the variable vec_perm_optab. */
+ if (direct_optab_handler (vec_perm_optab, qimode) == CODE_FOR_nothing)
+ return false;
+
+ /* In order to support the lowering of variable permutations,
+ we need to support shifts and adds. */
+ if (variable)
+ {
+ if (GET_MODE_UNIT_SIZE (mode) > 2
+ && optab_handler (ashl_optab, mode) == CODE_FOR_nothing
+ && optab_handler (vashl_optab, mode) == CODE_FOR_nothing)
+ return false;
+ if (optab_handler (add_optab, qimode) == CODE_FOR_nothing)
+ return false;
+ }
+
return true;
}
-/* Generate insns for VEC_COND_EXPR. */
+/* Return true if we can implement VEC_INTERLEAVE_{HIGH,LOW}_EXPR or
+ VEC_EXTRACT_{EVEN,ODD}_EXPR with VEC_PERM_EXPR for this target.
+ If PSEL is non-null, return the selector for the permutation. */
-rtx
-expand_vec_cond_expr (tree vec_cond_expr, rtx target)
+bool
+can_vec_perm_for_code_p (enum tree_code code, enum machine_mode mode,
+ rtx *psel)
{
+ bool need_sel_test = false;
enum insn_code icode;
- rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1;
- enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr));
- bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr));
- icode = get_vcond_icode (vec_cond_expr, mode);
+ /* If the target doesn't implement a vector mode for the vector type,
+ then no operations are supported. */
+ if (!VECTOR_MODE_P (mode))
+ return false;
+
+ /* Do as many tests as possible without reqiring the selector. */
+ icode = direct_optab_handler (vec_perm_optab, mode);
+ if (icode == CODE_FOR_nothing && GET_MODE_INNER (mode) != QImode)
+ {
+ enum machine_mode qimode
+ = mode_for_vector (QImode, GET_MODE_SIZE (mode));
+ if (VECTOR_MODE_P (qimode))
+ icode = direct_optab_handler (vec_perm_optab, qimode);
+ }
if (icode == CODE_FOR_nothing)
- return 0;
+ {
+ icode = direct_optab_handler (vec_perm_const_optab, mode);
+ if (icode != CODE_FOR_nothing
+ && targetm.vectorize.vec_perm_const_ok != NULL)
+ need_sel_test = true;
+ }
+ if (icode == CODE_FOR_nothing)
+ return false;
- if (!target || !insn_data[icode].operand[0].predicate (target, mode))
- target = gen_reg_rtx (mode);
+ /* If the selector is required, or if we need to test it, build it. */
+ if (psel || need_sel_test)
+ {
+ int i, nelt = GET_MODE_NUNITS (mode), alt = 0;
+ unsigned char *data = XALLOCAVEC (unsigned char, nelt);
- /* Get comparison rtx. First expand both cond expr operands. */
- comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0),
- unsignedp, icode);
- cc_op0 = XEXP (comparison, 0);
- cc_op1 = XEXP (comparison, 1);
- /* Expand both operands and force them in reg, if required. */
- rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1));
- if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
- && mode != VOIDmode)
- rtx_op1 = force_reg (mode, rtx_op1);
-
- rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2));
- if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
- && mode != VOIDmode)
- rtx_op2 = force_reg (mode, rtx_op2);
-
- /* Emit instruction! */
- emit_insn (GEN_FCN (icode) (target, rtx_op1, rtx_op2,
- comparison, cc_op0, cc_op1));
+ switch (code)
+ {
+ case VEC_EXTRACT_ODD_EXPR:
+ alt = 1;
+ /* FALLTHRU */
+ case VEC_EXTRACT_EVEN_EXPR:
+ for (i = 0; i < nelt; ++i)
+ data[i] = i * 2 + alt;
+ break;
- return target;
-}
+ case VEC_INTERLEAVE_HIGH_EXPR:
+ case VEC_INTERLEAVE_LOW_EXPR:
+ if ((BYTES_BIG_ENDIAN != 0) ^ (code == VEC_INTERLEAVE_HIGH_EXPR))
+ alt = nelt / 2;
+ for (i = 0; i < nelt / 2; ++i)
+ {
+ data[i * 2] = i + alt;
+ data[i * 2 + 1] = i + nelt + alt;
+ }
+ break;
-\f
-/* This is an internal subroutine of the other compare_and_swap expanders.
- MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
- operation. TARGET is an optional place to store the value result of
- the operation. ICODE is the particular instruction to expand. Return
- the result of the operation. */
+ default:
+ gcc_unreachable ();
+ }
-static rtx
-expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
- rtx target, enum insn_code icode)
-{
- enum machine_mode mode = GET_MODE (mem);
- rtx insn;
+ if (need_sel_test
+ && !targetm.vectorize.vec_perm_const_ok (mode, data))
+ return false;
- if (!target || !insn_data[icode].operand[0].predicate (target, mode))
- target = gen_reg_rtx (mode);
+ if (psel)
+ {
+ rtvec vec = rtvec_alloc (nelt);
+ enum machine_mode imode = mode;
- if (GET_MODE (old_val) != VOIDmode && GET_MODE (old_val) != mode)
- old_val = convert_modes (mode, GET_MODE (old_val), old_val, 1);
- if (!insn_data[icode].operand[2].predicate (old_val, mode))
- old_val = force_reg (mode, old_val);
+ for (i = 0; i < nelt; ++i)
+ RTVEC_ELT (vec, i) = GEN_INT (data[i]);
- if (GET_MODE (new_val) != VOIDmode && GET_MODE (new_val) != mode)
- new_val = convert_modes (mode, GET_MODE (new_val), new_val, 1);
- if (!insn_data[icode].operand[3].predicate (new_val, mode))
- new_val = force_reg (mode, new_val);
+ if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT)
+ {
+ imode = int_mode_for_mode (GET_MODE_INNER (mode));
+ imode = mode_for_vector (imode, nelt);
+ gcc_assert (GET_MODE_CLASS (imode) == MODE_VECTOR_INT);
+ }
- insn = GEN_FCN (icode) (target, mem, old_val, new_val);
- if (insn == NULL_RTX)
- return NULL_RTX;
- emit_insn (insn);
+ *psel = gen_rtx_CONST_VECTOR (imode, vec);
+ }
+ }
- return target;
+ return true;
}
-/* Expand a compare-and-swap operation and return its value. */
+/* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
-rtx
-expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
+static rtx
+expand_vec_perm_1 (enum insn_code icode, rtx target,
+ rtx v0, rtx v1, rtx sel)
{
- enum machine_mode mode = GET_MODE (mem);
- enum insn_code icode = sync_compare_and_swap[mode];
+ enum machine_mode tmode = GET_MODE (target);
+ enum machine_mode smode = GET_MODE (sel);
+ struct expand_operand ops[4];
- if (icode == CODE_FOR_nothing)
- return NULL_RTX;
+ create_output_operand (&ops[0], target, tmode);
+ create_input_operand (&ops[3], sel, smode);
+
+ /* Make an effort to preserve v0 == v1. The target expander is able to
+ rely on this to determine if we're permuting a single input operand. */
+ if (rtx_equal_p (v0, v1))
+ {
+ if (!insn_operand_matches (icode, 1, v0))
+ v0 = force_reg (tmode, v0);
+ gcc_checking_assert (insn_operand_matches (icode, 1, v0));
+ gcc_checking_assert (insn_operand_matches (icode, 2, v0));
+
+ create_fixed_operand (&ops[1], v0);
+ create_fixed_operand (&ops[2], v0);
+ }
+ else
+ {
+ create_input_operand (&ops[1], v0, tmode);
+ create_input_operand (&ops[2], v1, tmode);
+ }
- return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
+ if (maybe_expand_insn (icode, 4, ops))
+ return ops[0].value;
+ return NULL_RTX;
}
-/* Expand a compare-and-swap operation and store true into the result if
- the operation was successful and false otherwise. Return the result.
- Unlike other routines, TARGET is not optional. */
+/* Generate instructions for vec_perm optab given its mode
+ and three operands. */
rtx
-expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
+expand_vec_perm (enum machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
{
- enum machine_mode mode = GET_MODE (mem);
enum insn_code icode;
- rtx subtarget, label0, label1;
+ enum machine_mode qimode;
+ unsigned int i, w, e, u;
+ rtx tmp, sel_qi = NULL;
+ rtvec vec;
- /* If the target supports a compare-and-swap pattern that simultaneously
- sets some flag for success, then use it. Otherwise use the regular
- compare-and-swap and follow that immediately with a compare insn. */
- icode = sync_compare_and_swap_cc[mode];
- switch (icode)
- {
- default:
- subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
- NULL_RTX, icode);
- if (subtarget != NULL_RTX)
- break;
-
- /* FALLTHRU */
- case CODE_FOR_nothing:
- icode = sync_compare_and_swap[mode];
- if (icode == CODE_FOR_nothing)
- return NULL_RTX;
-
- /* Ensure that if old_val == mem, that we're not comparing
- against an old value. */
- if (MEM_P (old_val))
- old_val = force_reg (mode, old_val);
+ if (!target || GET_MODE (target) != mode)
+ target = gen_reg_rtx (mode);
- subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
- NULL_RTX, icode);
- if (subtarget == NULL_RTX)
- return NULL_RTX;
+ w = GET_MODE_SIZE (mode);
+ e = GET_MODE_NUNITS (mode);
+ u = GET_MODE_UNIT_SIZE (mode);
- emit_cmp_insn (subtarget, old_val, EQ, const0_rtx, mode, true);
+ /* Set QIMODE to a different vector mode with byte elements.
+ If no such mode, or if MODE already has byte elements, use VOIDmode. */
+ qimode = VOIDmode;
+ if (GET_MODE_INNER (mode) != QImode)
+ {
+ qimode = mode_for_vector (QImode, w);
+ if (!VECTOR_MODE_P (qimode))
+ qimode = VOIDmode;
}
- /* If the target has a sane STORE_FLAG_VALUE, then go ahead and use a
- setcc instruction from the beginning. We don't work too hard here,
- but it's nice to not be stupid about initial code gen either. */
- if (STORE_FLAG_VALUE == 1)
+ /* If the input is a constant, expand it specially. */
+ gcc_assert (GET_MODE_CLASS (GET_MODE (sel)) == MODE_VECTOR_INT);
+ if (GET_CODE (sel) == CONST_VECTOR)
{
- icode = setcc_gen_code[EQ];
+ icode = direct_optab_handler (vec_perm_const_optab, mode);
if (icode != CODE_FOR_nothing)
{
- enum machine_mode cmode = insn_data[icode].operand[0].mode;
- rtx insn;
+ tmp = expand_vec_perm_1 (icode, target, v0, v1, sel);
+ if (tmp)
+ return tmp;
+ }
+
+ /* Fall back to a constant byte-based permutation. */
+ if (qimode != VOIDmode)
+ {
+ vec = rtvec_alloc (w);
+ for (i = 0; i < e; ++i)
+ {
+ unsigned int j, this_e;
+
+ this_e = INTVAL (CONST_VECTOR_ELT (sel, i));
+ this_e &= 2 * e - 1;
+ this_e *= u;
- subtarget = target;
- if (!insn_data[icode].operand[0].predicate (target, cmode))
- subtarget = gen_reg_rtx (cmode);
+ for (j = 0; j < u; ++j)
+ RTVEC_ELT (vec, i * u + j) = GEN_INT (this_e + j);
+ }
+ sel_qi = gen_rtx_CONST_VECTOR (qimode, vec);
- insn = GEN_FCN (icode) (subtarget);
- if (insn)
+ icode = direct_optab_handler (vec_perm_const_optab, qimode);
+ if (icode != CODE_FOR_nothing)
{
- emit_insn (insn);
- if (GET_MODE (target) != GET_MODE (subtarget))
- {
- convert_move (target, subtarget, 1);
- subtarget = target;
- }
- return subtarget;
+ tmp = expand_vec_perm_1 (icode, gen_lowpart (qimode, target),
+ gen_lowpart (qimode, v0),
+ gen_lowpart (qimode, v1), sel_qi);
+ if (tmp)
+ return gen_lowpart (mode, tmp);
}
}
}
- /* Without an appropriate setcc instruction, use a set of branches to
- get 1 and 0 stored into target. Presumably if the target has a
- STORE_FLAG_VALUE that isn't 1, then this will get cleaned up by ifcvt. */
-
- label0 = gen_label_rtx ();
- label1 = gen_label_rtx ();
+ /* Otherwise expand as a fully variable permuation. */
+ icode = direct_optab_handler (vec_perm_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ {
+ tmp = expand_vec_perm_1 (icode, target, v0, v1, sel);
+ if (tmp)
+ return tmp;
+ }
- emit_jump_insn (bcc_gen_fctn[EQ] (label0));
- emit_move_insn (target, const0_rtx);
- emit_jump_insn (gen_jump (label1));
- emit_barrier ();
- emit_label (label0);
- emit_move_insn (target, const1_rtx);
- emit_label (label1);
+ /* As a special case to aid several targets, lower the element-based
+ permutation to a byte-based permutation and try again. */
+ if (qimode == VOIDmode)
+ return NULL_RTX;
+ icode = direct_optab_handler (vec_perm_optab, qimode);
+ if (icode == CODE_FOR_nothing)
+ return NULL_RTX;
- return target;
+ if (sel_qi == NULL)
+ {
+ /* Multiply each element by its byte size. */
+ enum machine_mode selmode = GET_MODE (sel);
+ if (u == 2)
+ sel = expand_simple_binop (selmode, PLUS, sel, sel,
+ sel, 0, OPTAB_DIRECT);
+ else
+ sel = expand_simple_binop (selmode, ASHIFT, sel,
+ GEN_INT (exact_log2 (u)),
+ sel, 0, OPTAB_DIRECT);
+ gcc_assert (sel != NULL);
+
+ /* Broadcast the low byte each element into each of its bytes. */
+ vec = rtvec_alloc (w);
+ for (i = 0; i < w; ++i)
+ {
+ int this_e = i / u * u;
+ if (BYTES_BIG_ENDIAN)
+ this_e += u - 1;
+ RTVEC_ELT (vec, i) = GEN_INT (this_e);
+ }
+ tmp = gen_rtx_CONST_VECTOR (qimode, vec);
+ sel = gen_lowpart (qimode, sel);
+ sel = expand_vec_perm (qimode, sel, sel, tmp, NULL);
+ gcc_assert (sel != NULL);
+
+ /* Add the byte offset to each byte element. */
+ /* Note that the definition of the indicies here is memory ordering,
+ so there should be no difference between big and little endian. */
+ vec = rtvec_alloc (w);
+ for (i = 0; i < w; ++i)
+ RTVEC_ELT (vec, i) = GEN_INT (i % u);
+ tmp = gen_rtx_CONST_VECTOR (qimode, vec);
+ sel_qi = expand_simple_binop (qimode, PLUS, sel, tmp,
+ sel, 0, OPTAB_DIRECT);
+ gcc_assert (sel_qi != NULL);
+ }
+
+ tmp = expand_vec_perm_1 (icode, gen_lowpart (qimode, target),
+ gen_lowpart (qimode, v0),
+ gen_lowpart (qimode, v1), sel_qi);
+ if (tmp)
+ tmp = gen_lowpart (mode, tmp);
+ return tmp;
}
-/* This is a helper function for the other atomic operations. This function
- emits a loop that contains SEQ that iterates until a compare-and-swap
- operation at the end succeeds. MEM is the memory to be modified. SEQ is
- a set of instructions that takes a value from OLD_REG as an input and
- produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
- set to the current contents of MEM. After SEQ, a compare-and-swap will
- attempt to update MEM with NEW_REG. The function returns true when the
- loop was generated successfully. */
+/* Return insn code for a conditional operator with a comparison in
+ mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
-static bool
-expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
+static inline enum insn_code
+get_vcond_icode (enum machine_mode vmode, enum machine_mode cmode, bool uns)
{
- enum machine_mode mode = GET_MODE (mem);
- enum insn_code icode;
- rtx label, cmp_reg, subtarget;
+ enum insn_code icode = CODE_FOR_nothing;
+ if (uns)
+ icode = convert_optab_handler (vcondu_optab, vmode, cmode);
+ else
+ icode = convert_optab_handler (vcond_optab, vmode, cmode);
+ return icode;
+}
+
+/* Return TRUE iff, appropriate vector insns are available
+ for vector cond expr with vector type VALUE_TYPE and a comparison
+ with operand vector types in CMP_OP_TYPE. */
+
+bool
+expand_vec_cond_expr_p (tree value_type, tree cmp_op_type)
+{
+ enum machine_mode value_mode = TYPE_MODE (value_type);
+ enum machine_mode cmp_op_mode = TYPE_MODE (cmp_op_type);
+ if (GET_MODE_SIZE (value_mode) != GET_MODE_SIZE (cmp_op_mode)
+ || GET_MODE_NUNITS (value_mode) != GET_MODE_NUNITS (cmp_op_mode)
+ || get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type),
+ TYPE_UNSIGNED (cmp_op_type)) == CODE_FOR_nothing)
+ return false;
+ return true;
+}
+
+/* Generate insns for a VEC_COND_EXPR, given its TYPE and its
+ three operands. */
+
+rtx
+expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
+ rtx target)
+{
+ struct expand_operand ops[6];
+ enum insn_code icode;
+ rtx comparison, rtx_op1, rtx_op2;
+ enum machine_mode mode = TYPE_MODE (vec_cond_type);
+ enum machine_mode cmp_op_mode;
+ bool unsignedp;
+
+ gcc_assert (COMPARISON_CLASS_P (op0));
+
+ unsignedp = TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0)));
+ cmp_op_mode = TYPE_MODE (TREE_TYPE (TREE_OPERAND (op0, 0)));
+
+ gcc_assert (GET_MODE_SIZE (mode) == GET_MODE_SIZE (cmp_op_mode)
+ && GET_MODE_NUNITS (mode) == GET_MODE_NUNITS (cmp_op_mode));
+
+ icode = get_vcond_icode (mode, cmp_op_mode, unsignedp);
+ if (icode == CODE_FOR_nothing)
+ return 0;
+
+ comparison = vector_compare_rtx (op0, unsignedp, icode);
+ rtx_op1 = expand_normal (op1);
+ rtx_op2 = expand_normal (op2);
+
+ create_output_operand (&ops[0], target, mode);
+ create_input_operand (&ops[1], rtx_op1, mode);
+ create_input_operand (&ops[2], rtx_op2, mode);
+ create_fixed_operand (&ops[3], comparison);
+ create_fixed_operand (&ops[4], XEXP (comparison, 0));
+ create_fixed_operand (&ops[5], XEXP (comparison, 1));
+ expand_insn (icode, 6, ops);
+ return ops[0].value;
+}
+
+\f
+/* Return true if there is a compare_and_swap pattern. */
+
+bool
+can_compare_and_swap_p (enum machine_mode mode, bool allow_libcall)
+{
+ enum insn_code icode;
+
+ /* Check for __atomic_compare_and_swap. */
+ icode = direct_optab_handler (atomic_compare_and_swap_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ return true;
+
+ /* Check for __sync_compare_and_swap. */
+ icode = optab_handler (sync_compare_and_swap_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ return true;
+ if (allow_libcall && optab_libfunc (sync_compare_and_swap_optab, mode))
+ return true;
+
+ /* No inline compare and swap. */
+ return false;
+}
+
+/* Return true if an atomic exchange can be performed. */
+
+bool
+can_atomic_exchange_p (enum machine_mode mode, bool allow_libcall)
+{
+ enum insn_code icode;
+
+ /* Check for __atomic_exchange. */
+ icode = direct_optab_handler (atomic_exchange_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ return true;
+
+ /* Don't check __sync_test_and_set, as on some platforms that
+ has reduced functionality. Targets that really do support
+ a proper exchange should simply be updated to the __atomics. */
+
+ return can_compare_and_swap_p (mode, allow_libcall);
+}
+
+
+/* Helper function to find the MODE_CC set in a sync_compare_and_swap
+ pattern. */
+
+static void
+find_cc_set (rtx x, const_rtx pat, void *data)
+{
+ if (REG_P (x) && GET_MODE_CLASS (GET_MODE (x)) == MODE_CC
+ && GET_CODE (pat) == SET)
+ {
+ rtx *p_cc_reg = (rtx *) data;
+ gcc_assert (!*p_cc_reg);
+ *p_cc_reg = x;
+ }
+}
+
+/* This is a helper function for the other atomic operations. This function
+ emits a loop that contains SEQ that iterates until a compare-and-swap
+ operation at the end succeeds. MEM is the memory to be modified. SEQ is
+ a set of instructions that takes a value from OLD_REG as an input and
+ produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
+ set to the current contents of MEM. After SEQ, a compare-and-swap will
+ attempt to update MEM with NEW_REG. The function returns true when the
+ loop was generated successfully. */
+
+static bool
+expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ rtx label, cmp_reg, success, oldval;
/* The loop we want to generate looks like
label:
old_reg = cmp_reg;
seq;
- cmp_reg = compare-and-swap(mem, old_reg, new_reg)
- if (cmp_reg != old_reg)
+ (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
+ if (success)
goto label;
Note that we only do the plain load from memory once. Subsequent
if (seq)
emit_insn (seq);
- /* If the target supports a compare-and-swap pattern that simultaneously
- sets some flag for success, then use it. Otherwise use the regular
- compare-and-swap and follow that immediately with a compare insn. */
- icode = sync_compare_and_swap_cc[mode];
- switch (icode)
+ success = NULL_RTX;
+ oldval = cmp_reg;
+ if (!expand_atomic_compare_and_swap (&success, &oldval, mem, old_reg,
+ new_reg, false, MEMMODEL_SEQ_CST,
+ MEMMODEL_RELAXED))
+ return false;
+
+ if (oldval != cmp_reg)
+ emit_move_insn (cmp_reg, oldval);
+
+ /* ??? Mark this jump predicted not taken? */
+ emit_cmp_and_jump_insns (success, const0_rtx, EQ, const0_rtx,
+ GET_MODE (success), 1, label);
+ return true;
+}
+
+
+/* This function tries to emit an atomic_exchange intruction. VAL is written
+ to *MEM using memory model MODEL. The previous contents of *MEM are returned,
+ using TARGET if possible. */
+
+static rtx
+maybe_emit_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ enum insn_code icode;
+
+ /* If the target supports the exchange directly, great. */
+ icode = direct_optab_handler (atomic_exchange_optab, mode);
+ if (icode != CODE_FOR_nothing)
{
- default:
- subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
- cmp_reg, icode);
- if (subtarget != NULL_RTX)
+ struct expand_operand ops[4];
+
+ create_output_operand (&ops[0], target, mode);
+ create_fixed_operand (&ops[1], mem);
+ /* VAL may have been promoted to a wider mode. Shrink it if so. */
+ create_convert_operand_to (&ops[2], val, mode, true);
+ create_integer_operand (&ops[3], model);
+ if (maybe_expand_insn (icode, 4, ops))
+ return ops[0].value;
+ }
+
+ return NULL_RTX;
+}
+
+/* This function tries to implement an atomic exchange operation using
+ __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
+ The previous contents of *MEM are returned, using TARGET if possible.
+ Since this instructionn is an acquire barrier only, stronger memory
+ models may require additional barriers to be emitted. */
+
+static rtx
+maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
+ enum memmodel model)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ enum insn_code icode;
+ rtx last_insn = get_last_insn ();
+
+ icode = optab_handler (sync_lock_test_and_set_optab, mode);
+
+ /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
+ exists, and the memory model is stronger than acquire, add a release
+ barrier before the instruction. */
+
+ if (model == MEMMODEL_SEQ_CST
+ || model == MEMMODEL_RELEASE
+ || model == MEMMODEL_ACQ_REL)
+ expand_mem_thread_fence (model);
+
+ if (icode != CODE_FOR_nothing)
+ {
+ struct expand_operand ops[3];
+ create_output_operand (&ops[0], target, mode);
+ create_fixed_operand (&ops[1], mem);
+ /* VAL may have been promoted to a wider mode. Shrink it if so. */
+ create_convert_operand_to (&ops[2], val, mode, true);
+ if (maybe_expand_insn (icode, 3, ops))
+ return ops[0].value;
+ }
+
+ /* If an external test-and-set libcall is provided, use that instead of
+ any external compare-and-swap that we might get from the compare-and-
+ swap-loop expansion later. */
+ if (!can_compare_and_swap_p (mode, false))
+ {
+ rtx libfunc = optab_libfunc (sync_lock_test_and_set_optab, mode);
+ if (libfunc != NULL)
{
- gcc_assert (subtarget == cmp_reg);
- break;
+ rtx addr;
+
+ addr = convert_memory_address (ptr_mode, XEXP (mem, 0));
+ return emit_library_call_value (libfunc, NULL_RTX, LCT_NORMAL,
+ mode, 2, addr, ptr_mode,
+ val, mode);
}
+ }
- /* FALLTHRU */
- case CODE_FOR_nothing:
- icode = sync_compare_and_swap[mode];
- if (icode == CODE_FOR_nothing)
- return false;
+ /* If the test_and_set can't be emitted, eliminate any barrier that might
+ have been emitted. */
+ delete_insns_since (last_insn);
+ return NULL_RTX;
+}
- subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
- cmp_reg, icode);
- if (subtarget == NULL_RTX)
- return false;
- if (subtarget != cmp_reg)
- emit_move_insn (cmp_reg, subtarget);
+/* This function tries to implement an atomic exchange operation using a
+ compare_and_swap loop. VAL is written to *MEM. The previous contents of
+ *MEM are returned, using TARGET if possible. No memory model is required
+ since a compare_and_swap loop is seq-cst. */
+
+static rtx
+maybe_emit_compare_and_swap_exchange_loop (rtx target, rtx mem, rtx val)
+{
+ enum machine_mode mode = GET_MODE (mem);
- emit_cmp_insn (cmp_reg, old_reg, EQ, const0_rtx, mode, true);
+ if (can_compare_and_swap_p (mode, true))
+ {
+ if (!target || !register_operand (target, mode))
+ target = gen_reg_rtx (mode);
+ if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
+ val = convert_modes (mode, GET_MODE (val), val, 1);
+ if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
+ return target;
}
- /* ??? Mark this jump predicted not taken? */
- emit_jump_insn (bcc_gen_fctn[NE] (label));
+ return NULL_RTX;
+}
- return true;
+#ifndef HAVE_atomic_test_and_set
+#define HAVE_atomic_test_and_set 0
+#define gen_atomic_test_and_set(x,y,z) (gcc_unreachable (), NULL_RTX)
+#endif
+
+/* This function expands the legacy _sync_lock test_and_set operation which is
+ generally an atomic exchange. Some limited targets only allow the
+ constant 1 to be stored. This is an ACQUIRE operation.
+
+ TARGET is an optional place to stick the return value.
+ MEM is where VAL is stored. */
+
+rtx
+expand_sync_lock_test_and_set (rtx target, rtx mem, rtx val)
+{
+ rtx ret;
+
+ /* Try an atomic_exchange first. */
+ ret = maybe_emit_atomic_exchange (target, mem, val, MEMMODEL_ACQUIRE);
+
+ if (!ret)
+ ret = maybe_emit_sync_lock_test_and_set (target, mem, val,
+ MEMMODEL_ACQUIRE);
+ if (!ret)
+ ret = maybe_emit_compare_and_swap_exchange_loop (target, mem, val);
+
+ /* If there are no other options, try atomic_test_and_set if the value
+ being stored is 1. */
+ if (!ret && val == const1_rtx && HAVE_atomic_test_and_set)
+ {
+ ret = gen_atomic_test_and_set (target, mem, GEN_INT (MEMMODEL_ACQUIRE));
+ emit_insn (ret);
+ }
+
+ return ret;
}
-/* This function generates the atomic operation MEM CODE= VAL. In this
- case, we do not care about any resulting value. Returns NULL if we
- cannot generate the operation. */
+/* This function expands the atomic test_and_set operation:
+ atomically store a boolean TRUE into MEM and return the previous value.
+
+ MEMMODEL is the memory model variant to use.
+ TARGET is an optional place to stick the return value. */
rtx
-expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
+expand_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
{
enum machine_mode mode = GET_MODE (mem);
- enum insn_code icode;
- rtx insn;
+ rtx ret = NULL_RTX;
- /* Look to see if the target supports the operation directly. */
- switch (code)
+ if (target == NULL_RTX)
+ target = gen_reg_rtx (mode);
+
+ if (HAVE_atomic_test_and_set)
{
- case PLUS:
- icode = sync_add_optab[mode];
- break;
- case IOR:
- icode = sync_ior_optab[mode];
- break;
- case XOR:
- icode = sync_xor_optab[mode];
- break;
- case AND:
- icode = sync_and_optab[mode];
- break;
- case NOT:
- icode = sync_nand_optab[mode];
- break;
+ ret = gen_atomic_test_and_set (target, mem, GEN_INT (MEMMODEL_ACQUIRE));
+ emit_insn (ret);
+ return ret;
+ }
- case MINUS:
- icode = sync_sub_optab[mode];
- if (icode == CODE_FOR_nothing)
- {
- icode = sync_add_optab[mode];
- if (icode != CODE_FOR_nothing)
- {
- val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
- code = PLUS;
- }
- }
- break;
+ /* If there is no test and set, try exchange, then a compare_and_swap loop,
+ then __sync_test_and_set. */
+ ret = maybe_emit_atomic_exchange (target, mem, const1_rtx, model);
- default:
- gcc_unreachable ();
- }
+ if (!ret)
+ ret = maybe_emit_compare_and_swap_exchange_loop (target, mem, const1_rtx);
+
+ if (!ret)
+ ret = maybe_emit_sync_lock_test_and_set (target, mem, const1_rtx, model);
+
+ if (ret)
+ return ret;
+
+ /* Failing all else, assume a single threaded environment and simply perform
+ the operation. */
+ emit_move_insn (target, mem);
+ emit_move_insn (mem, const1_rtx);
+ return target;
+}
+
+/* This function expands the atomic exchange operation:
+ atomically store VAL in MEM and return the previous value in MEM.
+
+ MEMMODEL is the memory model variant to use.
+ TARGET is an optional place to stick the return value. */
+
+rtx
+expand_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
+{
+ rtx ret;
+
+ ret = maybe_emit_atomic_exchange (target, mem, val, model);
+
+ /* Next try a compare-and-swap loop for the exchange. */
+ if (!ret)
+ ret = maybe_emit_compare_and_swap_exchange_loop (target, mem, val);
+
+ return ret;
+}
+
+/* This function expands the atomic compare exchange operation:
+
+ *PTARGET_BOOL is an optional place to store the boolean success/failure.
+ *PTARGET_OVAL is an optional place to store the old value from memory.
+ Both target parameters may be NULL to indicate that we do not care about
+ that return value. Both target parameters are updated on success to
+ the actual location of the corresponding result.
+
+ MEMMODEL is the memory model variant to use.
+
+ The return value of the function is true for success. */
- /* Generate the direct operation, if present. */
+bool
+expand_atomic_compare_and_swap (rtx *ptarget_bool, rtx *ptarget_oval,
+ rtx mem, rtx expected, rtx desired,
+ bool is_weak, enum memmodel succ_model,
+ enum memmodel fail_model)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ struct expand_operand ops[8];
+ enum insn_code icode;
+ rtx target_oval, target_bool = NULL_RTX;
+ rtx libfunc;
+
+ /* Load expected into a register for the compare and swap. */
+ if (MEM_P (expected))
+ expected = copy_to_reg (expected);
+
+ /* Make sure we always have some place to put the return oldval.
+ Further, make sure that place is distinct from the input expected,
+ just in case we need that path down below. */
+ if (ptarget_oval == NULL
+ || (target_oval = *ptarget_oval) == NULL
+ || reg_overlap_mentioned_p (expected, target_oval))
+ target_oval = gen_reg_rtx (mode);
+
+ icode = direct_optab_handler (atomic_compare_and_swap_optab, mode);
if (icode != CODE_FOR_nothing)
{
- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
- val = convert_modes (mode, GET_MODE (val), val, 1);
- if (!insn_data[icode].operand[1].predicate (val, mode))
- val = force_reg (mode, val);
+ enum machine_mode bool_mode = insn_data[icode].operand[0].mode;
+
+ /* Make sure we always have a place for the bool operand. */
+ if (ptarget_bool == NULL
+ || (target_bool = *ptarget_bool) == NULL
+ || GET_MODE (target_bool) != bool_mode)
+ target_bool = gen_reg_rtx (bool_mode);
+
+ /* Emit the compare_and_swap. */
+ create_output_operand (&ops[0], target_bool, bool_mode);
+ create_output_operand (&ops[1], target_oval, mode);
+ create_fixed_operand (&ops[2], mem);
+ create_convert_operand_to (&ops[3], expected, mode, true);
+ create_convert_operand_to (&ops[4], desired, mode, true);
+ create_integer_operand (&ops[5], is_weak);
+ create_integer_operand (&ops[6], succ_model);
+ create_integer_operand (&ops[7], fail_model);
+ expand_insn (icode, 8, ops);
+
+ /* Return success/failure. */
+ target_bool = ops[0].value;
+ target_oval = ops[1].value;
+ goto success;
+ }
+
+ /* Otherwise fall back to the original __sync_val_compare_and_swap
+ which is always seq-cst. */
+ icode = optab_handler (sync_compare_and_swap_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ {
+ rtx cc_reg;
- insn = GEN_FCN (icode) (mem, val);
- if (insn)
+ create_output_operand (&ops[0], target_oval, mode);
+ create_fixed_operand (&ops[1], mem);
+ create_convert_operand_to (&ops[2], expected, mode, true);
+ create_convert_operand_to (&ops[3], desired, mode, true);
+ if (!maybe_expand_insn (icode, 4, ops))
+ return false;
+
+ target_oval = ops[0].value;
+
+ /* If the caller isn't interested in the boolean return value,
+ skip the computation of it. */
+ if (ptarget_bool == NULL)
+ goto success;
+
+ /* Otherwise, work out if the compare-and-swap succeeded. */
+ cc_reg = NULL_RTX;
+ if (have_insn_for (COMPARE, CCmode))
+ note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
+ if (cc_reg)
{
- emit_insn (insn);
- return const0_rtx;
+ target_bool = emit_store_flag_force (target_bool, EQ, cc_reg,
+ const0_rtx, VOIDmode, 0, 1);
+ goto success;
}
+ goto success_bool_from_val;
}
- /* Failing that, generate a compare-and-swap loop in which we perform the
- operation with normal arithmetic instructions. */
- if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
+ /* Also check for library support for __sync_val_compare_and_swap. */
+ libfunc = optab_libfunc (sync_compare_and_swap_optab, mode);
+ if (libfunc != NULL)
{
- rtx t0 = gen_reg_rtx (mode), t1;
+ rtx addr = convert_memory_address (ptr_mode, XEXP (mem, 0));
+ target_oval = emit_library_call_value (libfunc, NULL_RTX, LCT_NORMAL,
+ mode, 3, addr, ptr_mode,
+ expected, mode, desired, mode);
- start_sequence ();
+ /* Compute the boolean return value only if requested. */
+ if (ptarget_bool)
+ goto success_bool_from_val;
+ else
+ goto success;
+ }
- t1 = t0;
- if (code == NOT)
- {
- t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
- code = AND;
- }
- t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
- true, OPTAB_LIB_WIDEN);
+ /* Failure. */
+ return false;
- insn = get_insns ();
- end_sequence ();
+ success_bool_from_val:
+ target_bool = emit_store_flag_force (target_bool, EQ, target_oval,
+ expected, VOIDmode, 1, 1);
+ success:
+ /* Make sure that the oval output winds up where the caller asked. */
+ if (ptarget_oval)
+ *ptarget_oval = target_oval;
+ if (ptarget_bool)
+ *ptarget_bool = target_bool;
+ return true;
+}
- if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
- return const0_rtx;
+/* Generate asm volatile("" : : : "memory") as the memory barrier. */
+
+static void
+expand_asm_memory_barrier (void)
+{
+ rtx asm_op, clob;
+
+ asm_op = gen_rtx_ASM_OPERANDS (VOIDmode, empty_string, empty_string, 0,
+ rtvec_alloc (0), rtvec_alloc (0),
+ rtvec_alloc (0), UNKNOWN_LOCATION);
+ MEM_VOLATILE_P (asm_op) = 1;
+
+ clob = gen_rtx_SCRATCH (VOIDmode);
+ clob = gen_rtx_MEM (BLKmode, clob);
+ clob = gen_rtx_CLOBBER (VOIDmode, clob);
+
+ emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, asm_op, clob)));
+}
+
+/* This routine will either emit the mem_thread_fence pattern or issue a
+ sync_synchronize to generate a fence for memory model MEMMODEL. */
+
+#ifndef HAVE_mem_thread_fence
+# define HAVE_mem_thread_fence 0
+# define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
+#endif
+#ifndef HAVE_memory_barrier
+# define HAVE_memory_barrier 0
+# define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
+#endif
+
+void
+expand_mem_thread_fence (enum memmodel model)
+{
+ if (HAVE_mem_thread_fence)
+ emit_insn (gen_mem_thread_fence (GEN_INT (model)));
+ else if (model != MEMMODEL_RELAXED)
+ {
+ if (HAVE_memory_barrier)
+ emit_insn (gen_memory_barrier ());
+ else if (synchronize_libfunc != NULL_RTX)
+ emit_library_call (synchronize_libfunc, LCT_NORMAL, VOIDmode, 0);
+ else
+ expand_asm_memory_barrier ();
}
+}
- return NULL_RTX;
+/* This routine will either emit the mem_signal_fence pattern or issue a
+ sync_synchronize to generate a fence for memory model MEMMODEL. */
+
+#ifndef HAVE_mem_signal_fence
+# define HAVE_mem_signal_fence 0
+# define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
+#endif
+
+void
+expand_mem_signal_fence (enum memmodel model)
+{
+ if (HAVE_mem_signal_fence)
+ emit_insn (gen_mem_signal_fence (GEN_INT (model)));
+ else if (model != MEMMODEL_RELAXED)
+ {
+ /* By default targets are coherent between a thread and the signal
+ handler running on the same thread. Thus this really becomes a
+ compiler barrier, in that stores must not be sunk past
+ (or raised above) a given point. */
+ expand_asm_memory_barrier ();
+ }
}
-/* This function generates the atomic operation MEM CODE= VAL. In this
- case, we do care about the resulting value: if AFTER is true then
- return the value MEM holds after the operation, if AFTER is false
- then return the value MEM holds before the operation. TARGET is an
- optional place for the result value to be stored. */
+/* This function expands the atomic load operation:
+ return the atomically loaded value in MEM.
+
+ MEMMODEL is the memory model variant to use.
+ TARGET is an option place to stick the return value. */
rtx
-expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
- bool after, rtx target)
+expand_atomic_load (rtx target, rtx mem, enum memmodel model)
{
enum machine_mode mode = GET_MODE (mem);
- enum insn_code old_code, new_code, icode;
- bool compensate;
- rtx insn;
+ enum insn_code icode;
- /* Look to see if the target supports the operation directly. */
+ /* If the target supports the load directly, great. */
+ icode = direct_optab_handler (atomic_load_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ {
+ struct expand_operand ops[3];
+
+ create_output_operand (&ops[0], target, mode);
+ create_fixed_operand (&ops[1], mem);
+ create_integer_operand (&ops[2], model);
+ if (maybe_expand_insn (icode, 3, ops))
+ return ops[0].value;
+ }
+
+ /* If the size of the object is greater than word size on this target,
+ then we assume that a load will not be atomic. */
+ if (GET_MODE_PRECISION (mode) > BITS_PER_WORD)
+ {
+ /* Issue val = compare_and_swap (mem, 0, 0).
+ This may cause the occasional harmless store of 0 when the value is
+ already 0, but it seems to be OK according to the standards guys. */
+ expand_atomic_compare_and_swap (NULL, &target, mem, const0_rtx,
+ const0_rtx, false, model, model);
+ return target;
+ }
+
+ /* Otherwise assume loads are atomic, and emit the proper barriers. */
+ if (!target || target == const0_rtx)
+ target = gen_reg_rtx (mode);
+
+ /* Emit the appropriate barrier before the load. */
+ expand_mem_thread_fence (model);
+
+ emit_move_insn (target, mem);
+
+ /* For SEQ_CST, also emit a barrier after the load. */
+ if (model == MEMMODEL_SEQ_CST)
+ expand_mem_thread_fence (model);
+
+ return target;
+}
+
+/* This function expands the atomic store operation:
+ Atomically store VAL in MEM.
+ MEMMODEL is the memory model variant to use.
+ USE_RELEASE is true if __sync_lock_release can be used as a fall back.
+ function returns const0_rtx if a pattern was emitted. */
+
+rtx
+expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ enum insn_code icode;
+ struct expand_operand ops[3];
+
+ /* If the target supports the store directly, great. */
+ icode = direct_optab_handler (atomic_store_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ {
+ create_fixed_operand (&ops[0], mem);
+ create_input_operand (&ops[1], val, mode);
+ create_integer_operand (&ops[2], model);
+ if (maybe_expand_insn (icode, 3, ops))
+ return const0_rtx;
+ }
+
+ /* If using __sync_lock_release is a viable alternative, try it. */
+ if (use_release)
+ {
+ icode = direct_optab_handler (sync_lock_release_optab, mode);
+ if (icode != CODE_FOR_nothing)
+ {
+ create_fixed_operand (&ops[0], mem);
+ create_input_operand (&ops[1], const0_rtx, mode);
+ if (maybe_expand_insn (icode, 2, ops))
+ {
+ /* lock_release is only a release barrier. */
+ if (model == MEMMODEL_SEQ_CST)
+ expand_mem_thread_fence (model);
+ return const0_rtx;
+ }
+ }
+ }
+
+ /* If the size of the object is greater than word size on this target,
+ a default store will not be atomic, Try a mem_exchange and throw away
+ the result. If that doesn't work, don't do anything. */
+ if (GET_MODE_PRECISION(mode) > BITS_PER_WORD)
+ {
+ rtx target = maybe_emit_atomic_exchange (NULL_RTX, mem, val, model);
+ if (!target)
+ target = maybe_emit_compare_and_swap_exchange_loop (NULL_RTX, mem, val);
+ if (target)
+ return const0_rtx;
+ else
+ return NULL_RTX;
+ }
+
+ /* If there is no mem_store, default to a move with barriers */
+ if (model == MEMMODEL_SEQ_CST || model == MEMMODEL_RELEASE)
+ expand_mem_thread_fence (model);
+
+ emit_move_insn (mem, val);
+
+ /* For SEQ_CST, also emit a barrier after the load. */
+ if (model == MEMMODEL_SEQ_CST)
+ expand_mem_thread_fence (model);
+
+ return const0_rtx;
+}
+
+
+/* Structure containing the pointers and values required to process the
+ various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
+
+struct atomic_op_functions
+{
+ direct_optab mem_fetch_before;
+ direct_optab mem_fetch_after;
+ direct_optab mem_no_result;
+ optab fetch_before;
+ optab fetch_after;
+ direct_optab no_result;
+ enum rtx_code reverse_code;
+};
+
+
+/* Fill in structure pointed to by OP with the various optab entries for an
+ operation of type CODE. */
+
+static void
+get_atomic_op_for_code (struct atomic_op_functions *op, enum rtx_code code)
+{
+ gcc_assert (op!= NULL);
+
+ /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
+ in the source code during compilation, and the optab entries are not
+ computable until runtime. Fill in the values at runtime. */
switch (code)
{
case PLUS:
- old_code = sync_old_add_optab[mode];
- new_code = sync_new_add_optab[mode];
+ op->mem_fetch_before = atomic_fetch_add_optab;
+ op->mem_fetch_after = atomic_add_fetch_optab;
+ op->mem_no_result = atomic_add_optab;
+ op->fetch_before = sync_old_add_optab;
+ op->fetch_after = sync_new_add_optab;
+ op->no_result = sync_add_optab;
+ op->reverse_code = MINUS;
break;
- case IOR:
- old_code = sync_old_ior_optab[mode];
- new_code = sync_new_ior_optab[mode];
+ case MINUS:
+ op->mem_fetch_before = atomic_fetch_sub_optab;
+ op->mem_fetch_after = atomic_sub_fetch_optab;
+ op->mem_no_result = atomic_sub_optab;
+ op->fetch_before = sync_old_sub_optab;
+ op->fetch_after = sync_new_sub_optab;
+ op->no_result = sync_sub_optab;
+ op->reverse_code = PLUS;
break;
case XOR:
- old_code = sync_old_xor_optab[mode];
- new_code = sync_new_xor_optab[mode];
+ op->mem_fetch_before = atomic_fetch_xor_optab;
+ op->mem_fetch_after = atomic_xor_fetch_optab;
+ op->mem_no_result = atomic_xor_optab;
+ op->fetch_before = sync_old_xor_optab;
+ op->fetch_after = sync_new_xor_optab;
+ op->no_result = sync_xor_optab;
+ op->reverse_code = XOR;
break;
case AND:
- old_code = sync_old_and_optab[mode];
- new_code = sync_new_and_optab[mode];
+ op->mem_fetch_before = atomic_fetch_and_optab;
+ op->mem_fetch_after = atomic_and_fetch_optab;
+ op->mem_no_result = atomic_and_optab;
+ op->fetch_before = sync_old_and_optab;
+ op->fetch_after = sync_new_and_optab;
+ op->no_result = sync_and_optab;
+ op->reverse_code = UNKNOWN;
+ break;
+ case IOR:
+ op->mem_fetch_before = atomic_fetch_or_optab;
+ op->mem_fetch_after = atomic_or_fetch_optab;
+ op->mem_no_result = atomic_or_optab;
+ op->fetch_before = sync_old_ior_optab;
+ op->fetch_after = sync_new_ior_optab;
+ op->no_result = sync_ior_optab;
+ op->reverse_code = UNKNOWN;
break;
case NOT:
- old_code = sync_old_nand_optab[mode];
- new_code = sync_new_nand_optab[mode];
+ op->mem_fetch_before = atomic_fetch_nand_optab;
+ op->mem_fetch_after = atomic_nand_fetch_optab;
+ op->mem_no_result = atomic_nand_optab;
+ op->fetch_before = sync_old_nand_optab;
+ op->fetch_after = sync_new_nand_optab;
+ op->no_result = sync_nand_optab;
+ op->reverse_code = UNKNOWN;
break;
+ default:
+ gcc_unreachable ();
+ }
+}
- case MINUS:
- old_code = sync_old_sub_optab[mode];
- new_code = sync_new_sub_optab[mode];
- if (old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
- {
- old_code = sync_old_add_optab[mode];
- new_code = sync_new_add_optab[mode];
- if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
- {
- val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
- code = PLUS;
- }
+/* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
+ using memory order MODEL. If AFTER is true the operation needs to return
+ the value of *MEM after the operation, otherwise the previous value.
+ TARGET is an optional place to place the result. The result is unused if
+ it is const0_rtx.
+ Return the result if there is a better sequence, otherwise NULL_RTX. */
+
+static rtx
+maybe_optimize_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
+ enum memmodel model, bool after)
+{
+ /* If the value is prefetched, or not used, it may be possible to replace
+ the sequence with a native exchange operation. */
+ if (!after || target == const0_rtx)
+ {
+ /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
+ if (code == AND && val == const0_rtx)
+ {
+ if (target == const0_rtx)
+ target = gen_reg_rtx (GET_MODE (mem));
+ return maybe_emit_atomic_exchange (target, mem, val, model);
}
- break;
- default:
- gcc_unreachable ();
+ /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
+ if (code == IOR && val == constm1_rtx)
+ {
+ if (target == const0_rtx)
+ target = gen_reg_rtx (GET_MODE (mem));
+ return maybe_emit_atomic_exchange (target, mem, val, model);
+ }
}
- /* If the target does supports the proper new/old operation, great. But
- if we only support the opposite old/new operation, check to see if we
- can compensate. In the case in which the old value is supported, then
- we can always perform the operation again with normal arithmetic. In
- the case in which the new value is supported, then we can only handle
- this in the case the operation is reversible. */
- compensate = false;
- if (after)
+ return NULL_RTX;
+}
+
+/* Try to emit an instruction for a specific operation varaition.
+ OPTAB contains the OP functions.
+ TARGET is an optional place to return the result. const0_rtx means unused.
+ MEM is the memory location to operate on.
+ VAL is the value to use in the operation.
+ USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
+ MODEL is the memory model, if used.
+ AFTER is true if the returned result is the value after the operation. */
+
+static rtx
+maybe_emit_op (const struct atomic_op_functions *optab, rtx target, rtx mem,
+ rtx val, bool use_memmodel, enum memmodel model, bool after)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ struct expand_operand ops[4];
+ enum insn_code icode;
+ int op_counter = 0;
+ int num_ops;
+
+ /* Check to see if there is a result returned. */
+ if (target == const0_rtx)
{
- icode = new_code;
- if (icode == CODE_FOR_nothing)
- {
- icode = old_code;
- if (icode != CODE_FOR_nothing)
- compensate = true;
+ if (use_memmodel)
+ {
+ icode = direct_optab_handler (optab->mem_no_result, mode);
+ create_integer_operand (&ops[2], model);
+ num_ops = 3;
+ }
+ else
+ {
+ icode = direct_optab_handler (optab->no_result, mode);
+ num_ops = 2;
}
}
+ /* Otherwise, we need to generate a result. */
else
{
- icode = old_code;
- if (icode == CODE_FOR_nothing
- && (code == PLUS || code == MINUS || code == XOR))
+ if (use_memmodel)
+ {
+ icode = direct_optab_handler (after ? optab->mem_fetch_after
+ : optab->mem_fetch_before, mode);
+ create_integer_operand (&ops[3], model);
+ num_ops = 4;
+ }
+ else
{
- icode = new_code;
- if (icode != CODE_FOR_nothing)
- compensate = true;
+ icode = optab_handler (after ? optab->fetch_after
+ : optab->fetch_before, mode);
+ num_ops = 3;
}
+ create_output_operand (&ops[op_counter++], target, mode);
}
+ if (icode == CODE_FOR_nothing)
+ return NULL_RTX;
- /* If we found something supported, great. */
- if (icode != CODE_FOR_nothing)
+ create_fixed_operand (&ops[op_counter++], mem);
+ /* VAL may have been promoted to a wider mode. Shrink it if so. */
+ create_convert_operand_to (&ops[op_counter++], val, mode, true);
+
+ if (maybe_expand_insn (icode, num_ops, ops))
+ return (target == const0_rtx ? const0_rtx : ops[0].value);
+
+ return NULL_RTX;
+}
+
+
+/* This function expands an atomic fetch_OP or OP_fetch operation:
+ TARGET is an option place to stick the return value. const0_rtx indicates
+ the result is unused.
+ atomically fetch MEM, perform the operation with VAL and return it to MEM.
+ CODE is the operation being performed (OP)
+ MEMMODEL is the memory model variant to use.
+ AFTER is true to return the result of the operation (OP_fetch).
+ AFTER is false to return the value before the operation (fetch_OP). */
+rtx
+expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
+ enum memmodel model, bool after)
+{
+ enum machine_mode mode = GET_MODE (mem);
+ struct atomic_op_functions optab;
+ rtx result;
+ bool unused_result = (target == const0_rtx);
+
+ get_atomic_op_for_code (&optab, code);
+
+ /* Check to see if there are any better instructions. */
+ result = maybe_optimize_fetch_op (target, mem, val, code, model, after);
+ if (result)
+ return result;
+
+ /* Check for the case where the result isn't used and try those patterns. */
+ if (unused_result)
{
- if (!target || !insn_data[icode].operand[0].predicate (target, mode))
- target = gen_reg_rtx (mode);
+ /* Try the memory model variant first. */
+ result = maybe_emit_op (&optab, target, mem, val, true, model, true);
+ if (result)
+ return result;
- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
- val = convert_modes (mode, GET_MODE (val), val, 1);
- if (!insn_data[icode].operand[2].predicate (val, mode))
- val = force_reg (mode, val);
+ /* Next try the old style withuot a memory model. */
+ result = maybe_emit_op (&optab, target, mem, val, false, model, true);
+ if (result)
+ return result;
- insn = GEN_FCN (icode) (target, mem, val);
- if (insn)
- {
- emit_insn (insn);
+ /* There is no no-result pattern, so try patterns with a result. */
+ target = NULL_RTX;
+ }
- /* If we need to compensate for using an operation with the
- wrong return value, do so now. */
- if (compensate)
- {
- if (!after)
- {
- if (code == PLUS)
- code = MINUS;
- else if (code == MINUS)
- code = PLUS;
- }
+ /* Try the __atomic version. */
+ result = maybe_emit_op (&optab, target, mem, val, true, model, after);
+ if (result)
+ return result;
- if (code == NOT)
- target = expand_simple_unop (mode, NOT, target, NULL_RTX, true);
- target = expand_simple_binop (mode, code, target, val, NULL_RTX,
+ /* Try the older __sync version. */
+ result = maybe_emit_op (&optab, target, mem, val, false, model, after);
+ if (result)
+ return result;
+
+ /* If the fetch value can be calculated from the other variation of fetch,
+ try that operation. */
+ if (after || unused_result || optab.reverse_code != UNKNOWN)
+ {
+ /* Try the __atomic version, then the older __sync version. */
+ result = maybe_emit_op (&optab, target, mem, val, true, model, !after);
+ if (!result)
+ result = maybe_emit_op (&optab, target, mem, val, false, model, !after);
+
+ if (result)
+ {
+ /* If the result isn't used, no need to do compensation code. */
+ if (unused_result)
+ return result;
+
+ /* Issue compensation code. Fetch_after == fetch_before OP val.
+ Fetch_before == after REVERSE_OP val. */
+ if (!after)
+ code = optab.reverse_code;
+ if (code == NOT)
+ {
+ result = expand_simple_binop (mode, AND, result, val, NULL_RTX,
true, OPTAB_LIB_WIDEN);
+ result = expand_simple_unop (mode, NOT, result, target, true);
}
+ else
+ result = expand_simple_binop (mode, code, result, val, target,
+ true, OPTAB_LIB_WIDEN);
+ return result;
+ }
+ }
- return target;
+ /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
+ if (!can_compare_and_swap_p (mode, false))
+ {
+ rtx libfunc;
+ bool fixup = false;
+
+ libfunc = optab_libfunc (after ? optab.fetch_after
+ : optab.fetch_before, mode);
+ if (libfunc == NULL
+ && (after || unused_result || optab.reverse_code != UNKNOWN))
+ {
+ fixup = true;
+ if (!after)
+ code = optab.reverse_code;
+ libfunc = optab_libfunc (after ? optab.fetch_before
+ : optab.fetch_after, mode);
+ }
+ if (libfunc != NULL)
+ {
+ rtx addr = convert_memory_address (ptr_mode, XEXP (mem, 0));
+ result = emit_library_call_value (libfunc, NULL, LCT_NORMAL, mode,
+ 2, addr, ptr_mode, val, mode);
+
+ if (!unused_result && fixup)
+ result = expand_simple_binop (mode, code, result, val, target,
+ true, OPTAB_LIB_WIDEN);
+ return result;
}
}
- /* Failing that, generate a compare-and-swap loop in which we perform the
- operation with normal arithmetic instructions. */
- if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
+ /* If nothing else has succeeded, default to a compare and swap loop. */
+ if (can_compare_and_swap_p (mode, true))
{
+ rtx insn;
rtx t0 = gen_reg_rtx (mode), t1;
- if (!target || !register_operand (target, mode))
- target = gen_reg_rtx (mode);
-
start_sequence ();
- if (!after)
- emit_move_insn (target, t0);
+ /* If the result is used, get a register for it. */
+ if (!unused_result)
+ {
+ if (!target || !register_operand (target, mode))
+ target = gen_reg_rtx (mode);
+ /* If fetch_before, copy the value now. */
+ if (!after)
+ emit_move_insn (target, t0);
+ }
+ else
+ target = const0_rtx;
+
t1 = t0;
if (code == NOT)
- {
- t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
- code = AND;
+ {
+ t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
+ true, OPTAB_LIB_WIDEN);
+ t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
}
- t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
- true, OPTAB_LIB_WIDEN);
- if (after)
- emit_move_insn (target, t1);
+ else
+ t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX, true,
+ OPTAB_LIB_WIDEN);
+ /* For after, copy the value now. */
+ if (!unused_result && after)
+ emit_move_insn (target, t1);
insn = get_insns ();
end_sequence ();
if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
- return target;
+ return target;
}
return NULL_RTX;
}
+\f
+/* Return true if OPERAND is suitable for operand number OPNO of
+ instruction ICODE. */
-/* This function expands a test-and-set operation. Ideally we atomically
- store VAL in MEM and return the previous value in MEM. Some targets
- may not support this operation and only support VAL with the constant 1;
- in this case while the return value will be 0/1, but the exact value
- stored in MEM is target defined. TARGET is an option place to stick
- the return value. */
+bool
+insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
+{
+ return (!insn_data[(int) icode].operand[opno].predicate
+ || (insn_data[(int) icode].operand[opno].predicate
+ (operand, insn_data[(int) icode].operand[opno].mode)));
+}
+\f
+/* TARGET is a target of a multiword operation that we are going to
+ implement as a series of word-mode operations. Return true if
+ TARGET is suitable for this purpose. */
-rtx
-expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
+bool
+valid_multiword_target_p (rtx target)
{
- enum machine_mode mode = GET_MODE (mem);
- enum insn_code icode;
- rtx insn;
+ enum machine_mode mode;
+ int i;
- /* If the target supports the test-and-set directly, great. */
- icode = sync_lock_test_and_set[mode];
- if (icode != CODE_FOR_nothing)
+ mode = GET_MODE (target);
+ for (i = 0; i < GET_MODE_SIZE (mode); i += UNITS_PER_WORD)
+ if (!validate_subreg (word_mode, mode, target, i))
+ return false;
+ return true;
+}
+
+/* Like maybe_legitimize_operand, but do not change the code of the
+ current rtx value. */
+
+static bool
+maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno,
+ struct expand_operand *op)
+{
+ /* See if the operand matches in its current form. */
+ if (insn_operand_matches (icode, opno, op->value))
+ return true;
+
+ /* If the operand is a memory whose address has no side effects,
+ try forcing the address into a non-virtual pseudo register.
+ The check for side effects is important because copy_to_mode_reg
+ cannot handle things like auto-modified addresses. */
+ if (insn_data[(int) icode].operand[opno].allows_mem && MEM_P (op->value))
{
- if (!target || !insn_data[icode].operand[0].predicate (target, mode))
- target = gen_reg_rtx (mode);
+ rtx addr, mem;
- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
- val = convert_modes (mode, GET_MODE (val), val, 1);
- if (!insn_data[icode].operand[2].predicate (val, mode))
- val = force_reg (mode, val);
+ mem = op->value;
+ addr = XEXP (mem, 0);
+ if (!(REG_P (addr) && REGNO (addr) > LAST_VIRTUAL_REGISTER)
+ && !side_effects_p (addr))
+ {
+ rtx last;
+ enum machine_mode mode;
+
+ last = get_last_insn ();
+ mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (mem));
+ mem = replace_equiv_address (mem, copy_to_mode_reg (mode, addr));
+ if (insn_operand_matches (icode, opno, mem))
+ {
+ op->value = mem;
+ return true;
+ }
+ delete_insns_since (last);
+ }
+ }
+
+ return false;
+}
- insn = GEN_FCN (icode) (target, mem, val);
- if (insn)
+/* Try to make OP match operand OPNO of instruction ICODE. Return true
+ on success, storing the new operand value back in OP. */
+
+static bool
+maybe_legitimize_operand (enum insn_code icode, unsigned int opno,
+ struct expand_operand *op)
+{
+ enum machine_mode mode, imode;
+ bool old_volatile_ok, result;
+
+ mode = op->mode;
+ switch (op->type)
+ {
+ case EXPAND_FIXED:
+ old_volatile_ok = volatile_ok;
+ volatile_ok = true;
+ result = maybe_legitimize_operand_same_code (icode, opno, op);
+ volatile_ok = old_volatile_ok;
+ return result;
+
+ case EXPAND_OUTPUT:
+ gcc_assert (mode != VOIDmode);
+ if (op->value
+ && op->value != const0_rtx
+ && GET_MODE (op->value) == mode
+ && maybe_legitimize_operand_same_code (icode, opno, op))
+ return true;
+
+ op->value = gen_reg_rtx (mode);
+ break;
+
+ case EXPAND_INPUT:
+ input:
+ gcc_assert (mode != VOIDmode);
+ gcc_assert (GET_MODE (op->value) == VOIDmode
+ || GET_MODE (op->value) == mode);
+ if (maybe_legitimize_operand_same_code (icode, opno, op))
+ return true;
+
+ op->value = copy_to_mode_reg (mode, op->value);
+ break;
+
+ case EXPAND_CONVERT_TO:
+ gcc_assert (mode != VOIDmode);
+ op->value = convert_to_mode (mode, op->value, op->unsigned_p);
+ goto input;
+
+ case EXPAND_CONVERT_FROM:
+ if (GET_MODE (op->value) != VOIDmode)
+ mode = GET_MODE (op->value);
+ else
+ /* The caller must tell us what mode this value has. */
+ gcc_assert (mode != VOIDmode);
+
+ imode = insn_data[(int) icode].operand[opno].mode;
+ if (imode != VOIDmode && imode != mode)
{
- emit_insn (insn);
- return target;
+ op->value = convert_modes (imode, mode, op->value, op->unsigned_p);
+ mode = imode;
}
+ goto input;
+
+ case EXPAND_ADDRESS:
+ gcc_assert (mode != VOIDmode);
+ op->value = convert_memory_address (mode, op->value);
+ goto input;
+
+ case EXPAND_INTEGER:
+ mode = insn_data[(int) icode].operand[opno].mode;
+ if (mode != VOIDmode && const_int_operand (op->value, mode))
+ goto input;
+ break;
}
+ return insn_operand_matches (icode, opno, op->value);
+}
+
+/* Make OP describe an input operand that should have the same value
+ as VALUE, after any mode conversion that the target might request.
+ TYPE is the type of VALUE. */
+
+void
+create_convert_operand_from_type (struct expand_operand *op,
+ rtx value, tree type)
+{
+ create_convert_operand_from (op, value, TYPE_MODE (type),
+ TYPE_UNSIGNED (type));
+}
+
+/* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
+ of instruction ICODE. Return true on success, leaving the new operand
+ values in the OPS themselves. Emit no code on failure. */
+
+bool
+maybe_legitimize_operands (enum insn_code icode, unsigned int opno,
+ unsigned int nops, struct expand_operand *ops)
+{
+ rtx last;
+ unsigned int i;
+
+ last = get_last_insn ();
+ for (i = 0; i < nops; i++)
+ if (!maybe_legitimize_operand (icode, opno + i, &ops[i]))
+ {
+ delete_insns_since (last);
+ return false;
+ }
+ return true;
+}
+
+/* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
+ as its operands. Return the instruction pattern on success,
+ and emit any necessary set-up code. Return null and emit no
+ code on failure. */
+
+rtx
+maybe_gen_insn (enum insn_code icode, unsigned int nops,
+ struct expand_operand *ops)
+{
+ gcc_assert (nops == (unsigned int) insn_data[(int) icode].n_generator_args);
+ if (!maybe_legitimize_operands (icode, 0, nops, ops))
+ return NULL_RTX;
+
+ switch (nops)
+ {
+ case 1:
+ return GEN_FCN (icode) (ops[0].value);
+ case 2:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value);
+ case 3:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value);
+ case 4:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
+ ops[3].value);
+ case 5:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
+ ops[3].value, ops[4].value);
+ case 6:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
+ ops[3].value, ops[4].value, ops[5].value);
+ case 7:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
+ ops[3].value, ops[4].value, ops[5].value,
+ ops[6].value);
+ case 8:
+ return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
+ ops[3].value, ops[4].value, ops[5].value,
+ ops[6].value, ops[7].value);
+ }
+ gcc_unreachable ();
+}
+
+/* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
+ as its operands. Return true on success and emit no code on failure. */
+
+bool
+maybe_expand_insn (enum insn_code icode, unsigned int nops,
+ struct expand_operand *ops)
+{
+ rtx pat = maybe_gen_insn (icode, nops, ops);
+ if (pat)
+ {
+ emit_insn (pat);
+ return true;
+ }
+ return false;
+}
+
+/* Like maybe_expand_insn, but for jumps. */
- /* Otherwise, use a compare-and-swap loop for the exchange. */
- if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
+bool
+maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
+ struct expand_operand *ops)
+{
+ rtx pat = maybe_gen_insn (icode, nops, ops);
+ if (pat)
{
- if (!target || !register_operand (target, mode))
- target = gen_reg_rtx (mode);
- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
- val = convert_modes (mode, GET_MODE (val), val, 1);
- if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
- return target;
+ emit_jump_insn (pat);
+ return true;
}
+ return false;
+}
- return NULL_RTX;
+/* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
+ as its operands. */
+
+void
+expand_insn (enum insn_code icode, unsigned int nops,
+ struct expand_operand *ops)
+{
+ if (!maybe_expand_insn (icode, nops, ops))
+ gcc_unreachable ();
+}
+
+/* Like expand_insn, but for jumps. */
+
+void
+expand_jump_insn (enum insn_code icode, unsigned int nops,
+ struct expand_operand *ops)
+{
+ if (!maybe_expand_jump_insn (icode, nops, ops))
+ gcc_unreachable ();
}
#include "gt-optabs.h"
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