* config/i386/i386.md (*cmpfp_<mode>): Enable for optimize_size.

[pf3gnuchains/gcc-fork.git] / gcc / loop-iv.c

diff --git a/gcc/loop-iv.c b/gcc/loop-iv.c
index 81e9a56..b7b1cd3 100644 (file)
--- a/gcc/loop-iv.c
+++ b/gcc/loop-iv.c
@@ -22,9 +22,10 @@ along with GCC; see the file COPYING3.  If not see
    doloop optimization and branch prediction.  The iv information is computed
    on demand.
 
-   Induction variable is analyzed by walking the use-def chains.  When a biv
-   is found, it is cached in the bivs hash table.  When register is proved
-   to be a giv, its description is stored to DF_REF_DATA of the def reference.
+   Induction variables are analyzed by walking the use-def chains.  When
+   a basic induction variable (biv) is found, it is cached in the bivs
+   hash table.  When register is proved to be a biv, its description
+   is stored to DF_REF_DATA of the def reference.
 
    The analysis works always with one loop -- you must call
    iv_analysis_loop_init (loop) for it.  All the other functions then work with
@@ -301,7 +302,8 @@ latch_dominating_def (rtx reg, struct df_ref **def)
 
   for (adef = DF_REG_DEF_CHAIN (regno); adef; adef = adef->next_reg)
     {
-      if (!bitmap_bit_p (bb_info->out, DF_REF_ID (adef)))
+      if (!bitmap_bit_p (df->blocks_to_analyze, DF_REF_BB (adef)->index)
+         || !bitmap_bit_p (bb_info->out, DF_REF_ID (adef)))
        continue;
 
       /* More than one reaching definition.  */