* de.po, zh_CN.po: Update.

[pf3gnuchains/gcc-fork.git] / gcc / longlong.h

diff --git a/gcc/longlong.h b/gcc/longlong.h
index ebf3591..05a7065 100644 (file)
--- a/gcc/longlong.h
+++ b/gcc/longlong.h
@@ -1,5 +1,5 @@
 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
-   Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+   Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2004
    Free Software Foundation, Inc.
 
    This definition file is free software; you can redistribute it
@@ -186,7 +186,7 @@ do {                                                                        \
 UDItype __umulsidi3 (USItype, USItype);
 #endif
 
-#if defined (__arm__) && W_TYPE_SIZE == 32
+#if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
   __asm__ ("adds       %1, %4, %5\n\tadc       %0, %2, %3"             \
           : "=r" ((USItype) (sh)),                                     \
@@ -376,17 +376,17 @@ UDItype __umulsidi3 (USItype, USItype);
 #if defined (__M32R__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
   /* The cmp clears the condition bit.  */ \
-  __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                   \
+  __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3"                     \
           : "=r" ((USItype) (sh)),                                     \
             "=&r" ((USItype) (sl))                                     \
-          : "%0" ((USItype) (ah)),                                     \
+          : "0" ((USItype) (ah)),                                      \
             "r" ((USItype) (bh)),                                      \
-            "%1" ((USItype) (al)),                                     \
+            "1" ((USItype) (al)),                                      \
             "r" ((USItype) (bl))                                       \
           : "cbit")
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
   /* The cmp clears the condition bit.  */ \
-  __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                     \
+  __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3"                     \
           : "=r" ((USItype) (sh)),                                     \
             "=&r" ((USItype) (sl))                                     \
           : "0" ((USItype) (ah)),                                      \
@@ -414,11 +414,8 @@ UDItype __umulsidi3 (USItype, USItype);
             "1" ((USItype) (al)),                                      \
             "g" ((USItype) (bl)))
 
-/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
-#if defined (__mc68020__) || defined(mc68020) \
-       || defined(__mc68030__) || defined(mc68030) \
-       || defined(__mc68040__) || defined(mc68040) \
-       || defined(__mcpu32__) || defined(mcpu32)
+/* The '020, '030, '040, '060 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
+#if (defined (__mc68020__) && !defined (__mc68060__))
 #define umul_ppmm(w1, w0, u, v) \
   __asm__ ("mulu%.l %3,%1:%0"                                          \
           : "=d" ((USItype) (w0)),                                     \
@@ -442,8 +439,43 @@ UDItype __umulsidi3 (USItype, USItype);
             "1" ((USItype) (n1)),                                      \
             "dmi" ((USItype) (d)))
 
-#else /* not mc68020 */
-#if !defined(__mcf5200__)
+#elif defined (__mcoldfire__) /* not mc68020 */
+
+#define umul_ppmm(xh, xl, a, b) \
+  __asm__ ("| Inlined umul_ppmm\n"                                     \
+          "    move%.l %2,%/d0\n"                                      \
+          "    move%.l %3,%/d1\n"                                      \
+          "    move%.l %/d0,%/d2\n"                                    \
+          "    swap    %/d0\n"                                         \
+          "    move%.l %/d1,%/d3\n"                                    \
+          "    swap    %/d1\n"                                         \
+          "    move%.w %/d2,%/d4\n"                                    \
+          "    mulu    %/d3,%/d4\n"                                    \
+          "    mulu    %/d1,%/d2\n"                                    \
+          "    mulu    %/d0,%/d3\n"                                    \
+          "    mulu    %/d0,%/d1\n"                                    \
+          "    move%.l %/d4,%/d0\n"                                    \
+          "    clr%.w  %/d0\n"                                         \
+          "    swap    %/d0\n"                                         \
+          "    add%.l  %/d0,%/d2\n"                                    \
+          "    add%.l  %/d3,%/d2\n"                                    \
+          "    jcc     1f\n"                                           \
+          "    add%.l  %#65536,%/d1\n"                                 \
+          "1:  swap    %/d2\n"                                         \
+          "    moveq   %#0,%/d0\n"                                     \
+          "    move%.w %/d2,%/d0\n"                                    \
+          "    move%.w %/d4,%/d2\n"                                    \
+          "    move%.l %/d2,%1\n"                                      \
+          "    add%.l  %/d1,%/d0\n"                                    \
+          "    move%.l %/d0,%0"                                        \
+          : "=g" ((USItype) (xh)),                                     \
+            "=g" ((USItype) (xl))                                      \
+          : "g" ((USItype) (a)),                                       \
+            "g" ((USItype) (b))                                        \
+          : "d0", "d1", "d2", "d3", "d4")
+#define UMUL_TIME 100
+#define UDIV_TIME 400
+#else /* not ColdFire */
 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 #define umul_ppmm(xh, xl, a, b) \
   __asm__ ("| Inlined umul_ppmm\n"                                     \
@@ -479,16 +511,12 @@ UDItype __umulsidi3 (USItype, USItype);
           : "d0", "d1", "d2", "d3", "d4")
 #define UMUL_TIME 100
 #define UDIV_TIME 400
-#endif /* not mcf5200 */
+
 #endif /* not mc68020 */
 
 /* The '020, '030, '040 and '060 have bitfield insns.
    cpu32 disguises as a 68020, but lacks them.  */
-#if ( defined (__mc68020__) || defined(mc68020) \
-               || defined(__mc68030__) || defined(mc68030) \
-               || defined(__mc68040__) || defined(mc68040) \
-               || defined(__mc68060__) || defined(mc68060) ) \
-       && !defined(__mcpu32__)
+#if defined (__mc68020__) && !defined (__mcpu32__)
 #define count_leading_zeros(count, x) \
   __asm__ ("bfffo %1{%b2:%b2},%0"                                      \
           : "=d" ((USItype) (count))                                   \