/* Allocate registers within a basic block, for GNU compiler.
Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 2, or (at your option) any later
+Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to the Free
-Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
-02110-1301, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
/* Allocation of hard register numbers to pseudo registers is done in
two passes. In this pass we consider only regs that are born and
#include "ggc.h"
#include "timevar.h"
#include "tree-pass.h"
+#include "df.h"
+#include "dbgcnt.h"
+
\f
/* Next quantity number available for allocation. */
int n_calls_crossed;
+ /* Number of times a reg tied to given qty lives across a CALL_INSN. */
+
+ int freq_calls_crossed;
+
/* Number of times a reg tied to given qty lives across a CALL_INSN
that might throw. */
static int recorded_label_ref;
static void alloc_qty (int, enum machine_mode, int, int);
-static void validate_equiv_mem_from_store (rtx, rtx, void *);
+static void validate_equiv_mem_from_store (rtx, const_rtx, void *);
static int validate_equiv_mem (rtx, rtx, rtx);
static int equiv_init_varies_p (rtx);
static int equiv_init_movable_p (rtx, int);
static int memref_referenced_p (rtx, rtx);
static int memref_used_between_p (rtx, rtx, rtx);
static void update_equiv_regs (void);
-static void no_equiv (rtx, rtx, void *);
+static void no_equiv (rtx, const_rtx, void *);
static void block_alloc (int);
static int qty_sugg_compare (int, int);
static int qty_sugg_compare_1 (const void *, const void *);
static int combine_regs (rtx, rtx, int, int, rtx, int);
static int reg_meets_class_p (int, enum reg_class);
static void update_qty_class (int, int);
-static void reg_is_set (rtx, rtx, void *);
+static void reg_is_set (rtx, const_rtx, void *);
static void reg_is_born (rtx, int);
static void wipe_dead_reg (rtx, int);
static int find_free_reg (enum reg_class, enum machine_mode, int, int, int,
qty[qtyno].mode = mode;
qty[qtyno].birth = birth;
qty[qtyno].n_calls_crossed = REG_N_CALLS_CROSSED (regno);
+ qty[qtyno].freq_calls_crossed = REG_FREQ_CALLS_CROSSED (regno);
qty[qtyno].n_throwing_calls_crossed = REG_N_THROWING_CALLS_CROSSED (regno);
qty[qtyno].min_class = reg_preferred_class (regno);
qty[qtyno].alternate_class = reg_alternate_class (regno);
\f
/* Main entry point of this file. */
-int
+static int
local_alloc (void)
{
int i;
See the declarations of these variables, above,
for what they mean. */
- qty = xmalloc (max_qty * sizeof (struct qty));
- qty_phys_copy_sugg = xmalloc (max_qty * sizeof (HARD_REG_SET));
- qty_phys_num_copy_sugg = xmalloc (max_qty * sizeof (short));
- qty_phys_sugg = xmalloc (max_qty * sizeof (HARD_REG_SET));
- qty_phys_num_sugg = xmalloc (max_qty * sizeof (short));
+ qty = XNEWVEC (struct qty, max_qty);
+ qty_phys_copy_sugg = XNEWVEC (HARD_REG_SET, max_qty);
+ qty_phys_num_copy_sugg = XNEWVEC (short, max_qty);
+ qty_phys_sugg = XNEWVEC (HARD_REG_SET, max_qty);
+ qty_phys_num_sugg = XNEWVEC (short, max_qty);
- reg_qty = xmalloc (max_regno * sizeof (int));
- reg_offset = xmalloc (max_regno * sizeof (char));
- reg_next_in_qty = xmalloc (max_regno * sizeof (int));
+ reg_qty = XNEWVEC (int, max_regno);
+ reg_offset = XNEWVEC (char, max_regno);
+ reg_next_in_qty = XNEWVEC (int, max_regno);
/* Determine which pseudo-registers can be allocated by local-alloc.
In general, these are the registers used only in a single block and
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
{
- if (REG_BASIC_BLOCK (i) >= 0 && REG_N_DEATHS (i) == 1)
+ if (REG_BASIC_BLOCK (i) >= NUM_FIXED_BLOCKS && REG_N_DEATHS (i) == 1)
reg_qty[i] = -2;
else
reg_qty[i] = -1;
Called via note_stores. */
static void
-validate_equiv_mem_from_store (rtx dest, rtx set ATTRIBUTE_UNUSED,
+validate_equiv_mem_from_store (rtx dest, const_rtx set ATTRIBUTE_UNUSED,
void *data ATTRIBUTE_UNUSED)
{
if ((REG_P (dest)
case CONST:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_FIXED:
case CONST_VECTOR:
case SYMBOL_REF:
case LABEL_REF:
case REG:
return (reg_equiv[REGNO (x)].loop_depth >= reg_equiv[regno].loop_depth
&& reg_equiv[REGNO (x)].replace)
- || (REG_BASIC_BLOCK (REGNO (x)) < 0 && ! rtx_varies_p (x, 0));
+ || (REG_BASIC_BLOCK (REGNO (x)) < NUM_FIXED_BLOCKS && ! rtx_varies_p (x, 0));
case UNSPEC_VOLATILE:
return 0;
case LABEL_REF:
case SYMBOL_REF:
case CONST_DOUBLE:
+ case CONST_FIXED:
case CONST_VECTOR:
case PC:
case CC0:
case LABEL_REF:
case SYMBOL_REF:
case CONST_DOUBLE:
+ case CONST_FIXED:
case CONST_VECTOR:
case PC:
case CC0:
rtx insn;
basic_block bb;
int loop_depth;
- regset_head cleared_regs;
- int clear_regnos = 0;
-
- reg_equiv = xcalloc (max_regno, sizeof *reg_equiv);
- INIT_REG_SET (&cleared_regs);
+ bitmap cleared_regs;
+
+ reg_equiv = XCNEWVEC (struct equivalence, max_regno);
reg_equiv_init = ggc_alloc_cleared (max_regno * sizeof (rtx));
reg_equiv_init_size = max_regno;
REG_EQUAL note on the insn. Since this note would be redundant,
there's no point creating it earlier than here. */
if (! note && ! rtx_varies_p (src, 0))
- note = set_unique_reg_note (insn, REG_EQUAL, src);
+ note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
/* Don't bother considering a REG_EQUAL note containing an EXPR_LIST
since it represents a function call */
if (note && GET_CODE (XEXP (note, 0)) == EXPR_LIST)
note = NULL_RTX;
- if (REG_N_SETS (regno) != 1
+ if (DF_REG_DEF_COUNT (regno) != 1
&& (! note
|| rtx_varies_p (XEXP (note, 0), 0)
|| (reg_equiv[regno].replacement
/* If this register is known to be equal to a constant, record that
it is always equivalent to the constant. */
- if (note && ! rtx_varies_p (XEXP (note, 0), 0))
- PUT_MODE (note, (enum machine_mode) REG_EQUIV);
+ if (DF_REG_DEF_COUNT (regno) == 1
+ && note && ! rtx_varies_p (XEXP (note, 0), 0))
+ {
+ rtx note_value = XEXP (note, 0);
+ remove_note (insn, note);
+ set_unique_reg_note (insn, REG_EQUIV, note_value);
+ }
/* If this insn introduces a "constant" register, decrease the priority
of that register. Record this insn if the register is only used once
note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
- if (note == 0 && REG_BASIC_BLOCK (regno) >= 0
+ if (note == 0 && REG_BASIC_BLOCK (regno) >= NUM_FIXED_BLOCKS
&& MEM_P (SET_SRC (set))
&& validate_equiv_mem (insn, dest, SET_SRC (set)))
- REG_NOTES (insn) = note = gen_rtx_EXPR_LIST (REG_EQUIV, SET_SRC (set),
- REG_NOTES (insn));
+ note = set_unique_reg_note (insn, REG_EQUIV, copy_rtx (SET_SRC (set)));
if (note)
{
/* If we haven't done so, record for reload that this is an
equivalencing insn. */
- if (!reg_equiv[regno].is_arg_equivalence
- && (!MEM_P (x) || rtx_equal_p (src, x)))
+ if (!reg_equiv[regno].is_arg_equivalence)
reg_equiv_init[regno]
= gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv_init[regno]);
if (MEM_P (dest) && REG_P (src)
&& (regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER
- && REG_BASIC_BLOCK (regno) >= 0
- && REG_N_SETS (regno) == 1
+ && REG_BASIC_BLOCK (regno) >= NUM_FIXED_BLOCKS
+ && DF_REG_DEF_COUNT (regno) == 1
&& reg_equiv[regno].init_insns != 0
&& reg_equiv[regno].init_insns != const0_rtx
&& ! find_reg_note (XEXP (reg_equiv[regno].init_insns, 0),
{
rtx init_insn = XEXP (reg_equiv[regno].init_insns, 0);
if (validate_equiv_mem (init_insn, src, dest)
- && ! memref_used_between_p (dest, init_insn, insn))
+ && ! memref_used_between_p (dest, init_insn, insn)
+ /* Attaching a REG_EQUIV note will fail if INIT_INSN has
+ multiple sets. */
+ && set_unique_reg_note (init_insn, REG_EQUIV, copy_rtx (dest)))
{
- REG_NOTES (init_insn)
- = gen_rtx_EXPR_LIST (REG_EQUIV, dest,
- REG_NOTES (init_insn));
/* This insn makes the equivalence, not the one initializing
the register. */
reg_equiv_init[regno]
= gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
+ df_notes_rescan (init_insn);
}
}
}
+ cleared_regs = BITMAP_ALLOC (NULL);
/* Now scan all regs killed in an insn to see if any of them are
registers only used that once. If so, see if we can replace the
reference with the equivalent form. If we can, delete the
}
remove_death (regno, insn);
- REG_N_REFS (regno) = 0;
+ SET_REG_N_REFS (regno, 0);
REG_FREQ (regno) = 0;
delete_insn (equiv_insn);
reg_equiv[regno].init_insns
= XEXP (reg_equiv[regno].init_insns, 1);
- /* Remember to clear REGNO from all basic block's live
- info. */
- SET_REGNO_REG_SET (&cleared_regs, regno);
- clear_regnos++;
reg_equiv_init[regno] = NULL_RTX;
+ bitmap_set_bit (cleared_regs, regno);
}
/* Move the initialization of the register to just before
INSN. Update the flow information. */
REG_BASIC_BLOCK (regno) = bb->index;
REG_N_CALLS_CROSSED (regno) = 0;
+ REG_FREQ_CALLS_CROSSED (regno) = 0;
REG_N_THROWING_CALLS_CROSSED (regno) = 0;
REG_LIVE_LENGTH (regno) = 2;
if (insn == BB_HEAD (bb))
BB_HEAD (bb) = PREV_INSN (insn);
- /* Remember to clear REGNO from all basic block's live
- info. */
- SET_REGNO_REG_SET (&cleared_regs, regno);
- clear_regnos++;
reg_equiv_init[regno]
= gen_rtx_INSN_LIST (VOIDmode, new_insn, NULL_RTX);
+ bitmap_set_bit (cleared_regs, regno);
}
}
}
}
}
- /* Clear all dead REGNOs from all basic block's live info. */
- if (clear_regnos)
- {
- unsigned j;
-
- if (clear_regnos > 8)
- {
- FOR_EACH_BB (bb)
- {
- AND_COMPL_REG_SET (bb->il.rtl->global_live_at_start,
- &cleared_regs);
- AND_COMPL_REG_SET (bb->il.rtl->global_live_at_end,
- &cleared_regs);
- }
- }
- else
- {
- reg_set_iterator rsi;
- EXECUTE_IF_SET_IN_REG_SET (&cleared_regs, 0, j, rsi)
- {
- FOR_EACH_BB (bb)
- {
- CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_start, j);
- CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_end, j);
- }
- }
- }
- }
+ if (!bitmap_empty_p (cleared_regs))
+ FOR_EACH_BB (bb)
+ {
+ bitmap_and_compl_into (DF_LIVE_IN (bb), cleared_regs);
+ bitmap_and_compl_into (DF_LIVE_OUT (bb), cleared_regs);
+ bitmap_and_compl_into (DF_LR_IN (bb), cleared_regs);
+ bitmap_and_compl_into (DF_LR_OUT (bb), cleared_regs);
+ }
+
+ BITMAP_FREE (cleared_regs);
out:
/* Clean up. */
+
end_alias_analysis ();
- CLEAR_REG_SET (&cleared_regs);
free (reg_equiv);
}
assignment - a SET, CLOBBER or REG_INC note. It is currently not used,
but needs to be there because this function is called from note_stores. */
static void
-no_equiv (rtx reg, rtx store ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED)
+no_equiv (rtx reg, const_rtx store ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED)
{
int regno;
rtx list;
int max_uid = get_max_uid ();
int *qty_order;
int no_conflict_combined_regno = -1;
+ struct df_ref ** def_rec;
/* Count the instructions in the basic block. */
/* +2 to leave room for a post_mark_life at the last insn and for
the birth of a CLOBBER in the first insn. */
- regs_live_at = xcalloc ((2 * insn_count + 2), sizeof (HARD_REG_SET));
+ regs_live_at = XCNEWVEC (HARD_REG_SET, 2 * insn_count + 2);
/* Initialize table of hardware registers currently live. */
- REG_SET_TO_HARD_REG_SET (regs_live,
- BASIC_BLOCK (b)->il.rtl->global_live_at_start);
+ REG_SET_TO_HARD_REG_SET (regs_live, DF_LR_IN (BASIC_BLOCK (b)));
+
+ /* This is conservative, as this would include registers that are
+ artificial-def'ed-but-not-used. However, artificial-defs are
+ rare, and such uninitialized use is rarer still, and the chance
+ of this having any performance impact is even less, while the
+ benefit is not having to compute and keep the TOP set around. */
+ for (def_rec = df_get_artificial_defs (b); *def_rec; def_rec++)
+ {
+ int regno = DF_REF_REGNO (*def_rec);
+ if (regno < FIRST_PSEUDO_REGISTER)
+ SET_HARD_REG_BIT (regs_live, regno);
+ }
/* This loop scans the instructions of the basic block
and assigns quantities to registers.
/* Avoid making a call-saved register unnecessarily
clobbered. */
- hard_reg = get_hard_reg_initial_reg (cfun, r1);
+ hard_reg = get_hard_reg_initial_reg (r1);
if (hard_reg != NULL_RTX)
{
if (REG_P (hard_reg)
number of suggested registers they need so we allocate those with
the most restrictive needs first. */
- qty_order = xmalloc (next_qty * sizeof (int));
+ qty_order = XNEWVEC (int, next_qty);
for (i = 0; i < next_qty; i++)
qty_order[i] = i;
This optimization is only appropriate when we will run
a scheduling pass after reload and we are not optimizing
for code size. */
- if (flag_schedule_insns_after_reload
+ if (flag_schedule_insns_after_reload && dbg_cnt (local_alloc_for_sched)
&& !optimize_size
&& !SMALL_REGISTER_CLASSES)
{
#ifdef INSN_SCHEDULING
/* Similarly, avoid false dependencies. */
- if (flag_schedule_insns_after_reload
+ if (flag_schedule_insns_after_reload && dbg_cnt (local_alloc_for_sched)
&& !optimize_size
&& !SMALL_REGISTER_CLASSES
&& qty[q].alternate_class != NO_REGS)
if (reg_qty[sreg] >= -1
/* If we are not going to let any regs live across calls,
don't tie a call-crossing reg to a non-call-crossing reg. */
- || (current_function_has_nonlocal_label
+ || (cfun->has_nonlocal_label
&& ((REG_N_CALLS_CROSSED (ureg) > 0)
!= (REG_N_CALLS_CROSSED (sreg) > 0))))
return 0;
/* Update info about quantity SQTY. */
qty[sqty].n_calls_crossed += REG_N_CALLS_CROSSED (sreg);
+ qty[sqty].freq_calls_crossed += REG_FREQ_CALLS_CROSSED (sreg);
qty[sqty].n_throwing_calls_crossed
+= REG_N_THROWING_CALLS_CROSSED (sreg);
qty[sqty].n_refs += REG_N_REFS (sreg);
carry info from `block_alloc'. */
static void
-reg_is_set (rtx reg, rtx setter, void *data ATTRIBUTE_UNUSED)
+reg_is_set (rtx reg, const_rtx setter, void *data ATTRIBUTE_UNUSED)
{
/* Note that note_stores will only pass us a SUBREG if it is a SUBREG of
a hard register. These may actually not exist any more. */
/* Don't let a pseudo live in a reg across a function call
if we might get a nonlocal goto. */
- if (current_function_has_nonlocal_label
+ if (cfun->has_nonlocal_label
&& qty[qtyno].n_calls_crossed > 0)
return -1;
IOR_COMPL_HARD_REG_SET (first_used, qty_phys_sugg[qtyno]);
}
- /* If all registers are excluded, we can't do anything. */
- GO_IF_HARD_REG_SUBSET (reg_class_contents[(int) ALL_REGS], first_used, fail);
-
/* If at least one would be suitable, test each hard reg. */
-
- for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
- {
+ if (!hard_reg_set_subset_p (reg_class_contents[(int) ALL_REGS], first_used))
+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ {
#ifdef REG_ALLOC_ORDER
- int regno = reg_alloc_order[i];
+ int regno = reg_alloc_order[i];
#else
- int regno = i;
+ int regno = i;
#endif
- if (! TEST_HARD_REG_BIT (first_used, regno)
- && HARD_REGNO_MODE_OK (regno, mode)
- && (qty[qtyno].n_calls_crossed == 0
- || accept_call_clobbered
- || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
- {
- int j;
- int size1 = hard_regno_nregs[regno][mode];
- for (j = 1; j < size1 && ! TEST_HARD_REG_BIT (used, regno + j); j++);
- if (j == size1)
- {
- /* Mark that this register is in use between its birth and death
- insns. */
- post_mark_life (regno, mode, 1, born_index, dead_index);
- return regno;
- }
+ if (!TEST_HARD_REG_BIT (first_used, regno)
+ && HARD_REGNO_MODE_OK (regno, mode)
+ && (qty[qtyno].n_calls_crossed == 0
+ || accept_call_clobbered
+ || !HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
+ {
+ int j;
+ int size1 = hard_regno_nregs[regno][mode];
+ j = 1;
+ while (j < size1 && !TEST_HARD_REG_BIT (used, regno + j))
+ j++;
+ if (j == size1)
+ {
+ /* Mark that this register is in use between its birth
+ and death insns. */
+ post_mark_life (regno, mode, 1, born_index, dead_index);
+ return regno;
+ }
#ifndef REG_ALLOC_ORDER
- /* Skip starting points we know will lose. */
- i += j;
+ /* Skip starting points we know will lose. */
+ i += j;
#endif
- }
- }
+ }
+ }
- fail:
/* If we are just trying suggested register, we have just tried copy-
suggested registers, and there are arithmetic-suggested registers,
try them. */
&& ! just_try_suggested
&& qty[qtyno].n_calls_crossed != 0
&& qty[qtyno].n_throwing_calls_crossed == 0
- && CALLER_SAVE_PROFITABLE (qty[qtyno].n_refs,
- qty[qtyno].n_calls_crossed))
+ && CALLER_SAVE_PROFITABLE (optimize_size ? qty[qtyno].n_refs : qty[qtyno].freq,
+ optimize_size ? qty[qtyno].n_calls_crossed
+ : qty[qtyno].freq_calls_crossed))
{
i = find_free_reg (class, mode, qtyno, 1, 0, born_index, dead_index);
if (i >= 0)
static void
mark_life (int regno, enum machine_mode mode, int life)
{
- int j = hard_regno_nregs[regno][mode];
if (life)
- while (--j >= 0)
- SET_HARD_REG_BIT (regs_live, regno + j);
+ add_to_hard_reg_set (®s_live, mode, regno);
else
- while (--j >= 0)
- CLEAR_HARD_REG_BIT (regs_live, regno + j);
+ remove_from_hard_reg_set (®s_live, mode, regno);
}
/* Mark register number REGNO (with machine-mode MODE) as live (if LIFE
post_mark_life (int regno, enum machine_mode mode, int life, int birth,
int death)
{
- int j = hard_regno_nregs[regno][mode];
HARD_REG_SET this_reg;
CLEAR_HARD_REG_SET (this_reg);
- while (--j >= 0)
- SET_HARD_REG_BIT (this_reg, regno + j);
+ add_to_hard_reg_set (&this_reg, mode, regno);
if (life)
while (birth < death)
fprintf (file, ";; Register %d in %d.\n", i, reg_renumber[i]);
}
+#ifdef STACK_REGS
+static void
+find_stack_regs (void)
+{
+ bitmap stack_regs = BITMAP_ALLOC (NULL);
+ int i;
+ HARD_REG_SET stack_hard_regs, used;
+ basic_block bb;
+
+ /* Any register that MAY be allocated to a register stack (like the
+ 387) is treated poorly. Each such register is marked as being
+ live everywhere. This keeps the register allocator and the
+ subsequent passes from doing anything useful with these values.
+
+ FIXME: This seems like an incredibly poor idea. */
+
+ CLEAR_HARD_REG_SET (stack_hard_regs);
+ for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
+ SET_HARD_REG_BIT (stack_hard_regs, i);
+
+ for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
+ {
+ COPY_HARD_REG_SET (used, reg_class_contents[reg_preferred_class (i)]);
+ IOR_HARD_REG_SET (used, reg_class_contents[reg_alternate_class (i)]);
+ AND_HARD_REG_SET (used, stack_hard_regs);
+ if (!hard_reg_set_empty_p (used))
+ bitmap_set_bit (stack_regs, i);
+ }
+
+ if (dump_file)
+ bitmap_print (dump_file, stack_regs, "stack regs:", "\n");
+
+ FOR_EACH_BB (bb)
+ {
+ bitmap_ior_into (DF_LIVE_IN (bb), stack_regs);
+ bitmap_and_into (DF_LIVE_IN (bb), DF_LR_IN (bb));
+ bitmap_ior_into (DF_LIVE_OUT (bb), stack_regs);
+ bitmap_and_into (DF_LIVE_OUT (bb), DF_LR_OUT (bb));
+ }
+ BITMAP_FREE (stack_regs);
+}
+#endif
+
/* Run old register allocator. Return TRUE if we must exit
rest_of_compilation upon return. */
-static void
+static unsigned int
rest_of_handle_local_alloc (void)
{
int rebuild_notes;
+ int max_regno = max_reg_num ();
+
+ df_note_add_problem ();
+
+ if (optimize == 1)
+ {
+ df_live_add_problem ();
+ df_live_set_all_dirty ();
+ }
+#ifdef ENABLE_CHECKING
+ df->changeable_flags |= DF_VERIFY_SCHEDULED;
+#endif
+ df_analyze ();
+#ifdef STACK_REGS
+ if (optimize)
+ find_stack_regs ();
+#endif
+ regstat_init_n_sets_and_refs ();
+ regstat_compute_ri ();
+
+ /* If we are not optimizing, then this is the only place before
+ register allocation where dataflow is done. And that is needed
+ to generate these warnings. */
+ if (warn_clobbered)
+ generate_setjmp_warnings ();
/* Determine if the current function is a leaf before running reload
since this can impact optimizations done by the prologue and
epilogue thus changing register elimination offsets. */
current_function_is_leaf = leaf_function_p ();
- /* Allocate the reg_renumber array. */
- allocate_reg_info (max_regno, FALSE, TRUE);
-
/* And the reg_equiv_memory_loc array. */
- VARRAY_GROW (reg_equiv_memory_loc_varray, max_regno);
- reg_equiv_memory_loc = &VARRAY_RTX (reg_equiv_memory_loc_varray, 0);
+ VEC_safe_grow (rtx, gc, reg_equiv_memory_loc_vec, max_regno);
+ memset (VEC_address (rtx, reg_equiv_memory_loc_vec), 0,
+ sizeof (rtx) * max_regno);
+ reg_equiv_memory_loc = VEC_address (rtx, reg_equiv_memory_loc_vec);
allocate_initial_values (reg_equiv_memory_loc);
- regclass (get_insns (), max_reg_num (), dump_file);
+ regclass (get_insns (), max_regno);
rebuild_notes = local_alloc ();
/* Local allocation may have turned an indirect jump into a direct
rebuild_jump_labels (get_insns ());
purge_all_dead_edges ();
- delete_unreachable_blocks ();
-
timevar_pop (TV_JUMP);
}
- if (dump_enabled_p (pass_local_alloc.static_pass_number))
+ if (dump_file && (dump_flags & TDF_DETAILS))
{
timevar_push (TV_DUMP);
- dump_flow_info (dump_file);
+ dump_flow_info (dump_file, dump_flags);
dump_local_alloc (dump_file);
timevar_pop (TV_DUMP);
}
+ return 0;
}
-struct tree_opt_pass pass_local_alloc =
+struct rtl_opt_pass pass_local_alloc =
{
+ {
+ RTL_PASS,
"lreg", /* name */
NULL, /* gate */
rest_of_handle_local_alloc, /* execute */
0, /* properties_destroyed */
0, /* todo_flags_start */
TODO_dump_func |
- TODO_ggc_collect, /* todo_flags_finish */
- 'l' /* letter */
+ TODO_ggc_collect /* todo_flags_finish */
+ }
};
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