process. It is done in each region on top-down traverse of the
region tree (file ira-color.c). There are following subpasses:
- * Optional aggressive coalescing of allocnos in the region.
-
* Putting allocnos onto the coloring stack. IRA uses Briggs
optimistic coloring which is a major improvement over
Chaitin's coloring. Therefore IRA does not spill allocnos at
CLEAR_HARD_REG_SET (processed_hard_reg_set);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
- ira_non_ordered_class_hard_regs[cl][0] = -1;
- ira_class_hard_reg_index[cl][0] = -1;
+ ira_non_ordered_class_hard_regs[cl][i] = -1;
+ ira_class_hard_reg_index[cl][i] = -1;
}
for (n = 0, i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
else
df_set_regs_ever_live (eliminables[i].from, true);
}
-#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
+#if !HARD_FRAME_POINTER_IS_FRAME_POINTER
if (!TEST_HARD_REG_BIT (crtl->asm_clobbers, HARD_FRAME_POINTER_REGNUM))
{
SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM);
if (find_reg_note (insn, REG_DEAD, reg))
return 1;
- if (CALL_P (insn) && ! MEM_READONLY_P (memref)
- && ! RTL_CONST_OR_PURE_CALL_P (insn))
+ /* This used to ignore readonly memory and const/pure calls. The problem
+ is the equivalent form may reference a pseudo which gets assigned a
+ call clobbered hard reg. When we later replace REG with its
+ equivalent form, the value in the call-clobbered reg has been
+ changed and all hell breaks loose. */
+ if (CALL_P (insn))
return 0;
note_stores (PATTERN (insn), validate_equiv_mem_from_store, NULL);
if (!REG_P (dest)
|| (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER
|| reg_equiv[regno].init_insns == const0_rtx
- || (CLASS_LIKELY_SPILLED_P (reg_preferred_class (regno))
+ || (targetm.class_likely_spilled_p (reg_preferred_class (regno))
&& MEM_P (src) && ! reg_equiv[regno].is_arg_equivalence))
{
/* This might be setting a SUBREG of a pseudo, a pseudo that is
rtx equiv_insn;
if (! reg_equiv[regno].replace
- || reg_equiv[regno].loop_depth < loop_depth)
+ || reg_equiv[regno].loop_depth < loop_depth
+ /* There is no sense to move insns if we did
+ register pressure-sensitive scheduling was
+ done because it will not improve allocation
+ but worsen insn schedule with a big
+ probability. */
+ || (flag_sched_pressure && flag_schedule_insns))
continue;
/* reg_equiv[REGNO].replace gets set only when
{
/* Consider spilled pseudos too for IRA because they still have a
chance to get hard-registers in the reload when IRA is used. */
- return (reg_renumber[regno] >= 0
- || (ira_conflicts_p && flag_ira_share_spill_slots));
+ return (reg_renumber[regno] >= 0 || ira_conflicts_p);
}
/* Init LIVE_SUBREGS[ALLOCNUM] and LIVE_SUBREGS_USED[ALLOCNUM] using
{
timevar_push (TV_JUMP);
rebuild_jump_labels (get_insns ());
- purge_all_dead_edges ();
+ if (purge_all_dead_edges ())
+ delete_unreachable_blocks ();
timevar_pop (TV_JUMP);
}
}
ira_assert (ira_conflicts_p || !loops_p);
saved_flag_ira_share_spill_slots = flag_ira_share_spill_slots;
- if (too_high_register_pressure_p ())
+ if (too_high_register_pressure_p () || cfun->calls_setjmp)
/* It is just wasting compiler's time to pack spilled pseudos into
- stack slots in this case -- prohibit it. */
+ stack slots in this case -- prohibit it. We also do this if
+ there is setjmp call because a variable not modified between
+ setjmp and longjmp the compiler is required to preserve its
+ value and sharing slots does not guarantee it. */
flag_ira_share_spill_slots = FALSE;
ira_color ();
reload_completed = !reload (get_insns (), ira_conflicts_p);
- finish_subregs_of_mode ();
-
timevar_pop (TV_RELOAD);
timevar_push (TV_IRA);