+ minmax_set_iterator used to iterate over the set. */
+#define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
+ for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
+ minmax_set_iter_cond (&(ITER), &(N)); \
+ minmax_set_iter_next (&(ITER)))
+\f
+struct target_ira_int {
+ /* Initialized once. It is a maximal possible size of the allocated
+ struct costs. */
+ int x_max_struct_costs_size;
+
+ /* Allocated and initialized once, and used to initialize cost values
+ for each insn. */
+ struct costs *x_init_cost;
+
+ /* Allocated once, and used for temporary purposes. */
+ struct costs *x_temp_costs;
+
+ /* Allocated once, and used for the cost calculation. */
+ struct costs *x_op_costs[MAX_RECOG_OPERANDS];
+ struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
+
+ /* Hard registers that can not be used for the register allocator for
+ all functions of the current compilation unit. */
+ HARD_REG_SET x_no_unit_alloc_regs;
+
+ /* Map: hard regs X modes -> set of hard registers for storing value
+ of given mode starting with given hard register. */
+ HARD_REG_SET (x_ira_reg_mode_hard_regset
+ [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
+
+ /* Array based on TARGET_REGISTER_MOVE_COST. Don't use
+ ira_register_move_cost directly. Use function of
+ ira_get_may_move_cost instead. */
+ move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
+
+ /* Array analogs of the macros MEMORY_MOVE_COST and
+ REGISTER_MOVE_COST but they contain maximal cost not minimal as
+ the previous two ones do. */
+ short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
+ move_table *x_ira_max_register_move_cost[MAX_MACHINE_MODE];
+
+ /* Similar to may_move_in_cost but it is calculated in IRA instead of
+ regclass. Another difference we take only available hard registers
+ into account to figure out that one register class is a subset of
+ the another one. Don't use it directly. Use function of
+ ira_get_may_move_cost instead. */
+ move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
+
+ /* Similar to may_move_out_cost but it is calculated in IRA instead of
+ regclass. Another difference we take only available hard registers
+ into account to figure out that one register class is a subset of
+ the another one. Don't use it directly. Use function of
+ ira_get_may_move_cost instead. */
+ move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
+
+/* Similar to ira_may_move_in_cost and ira_may_move_out_cost but they
+ return maximal cost. */
+ move_table *x_ira_max_may_move_in_cost[MAX_MACHINE_MODE];
+ move_table *x_ira_max_may_move_out_cost[MAX_MACHINE_MODE];
+
+ /* Map class->true if class is a possible allocno class, false
+ otherwise. */
+ bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
+
+ /* Map class->true if class is a pressure class, false otherwise. */
+ bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
+
+ /* Register class subset relation: TRUE if the first class is a subset
+ of the second one considering only hard registers available for the
+ allocation. */
+ int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* Array of the number of hard registers of given class which are
+ available for allocation. The order is defined by the hard
+ register numbers. */
+ short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+
+ /* Index (in ira_class_hard_regs; for given register class and hard
+ register (in general case a hard register can belong to several
+ register classes;. The index is negative for hard registers
+ unavailable for the allocation. */
+ short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+
+ /* Array whose values are hard regset of hard registers available for
+ the allocation of given register class whose HARD_REGNO_MODE_OK
+ values for given mode are zero. */
+ HARD_REG_SET x_ira_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
+
+ /* The value is number of elements in the subsequent array. */
+ int x_ira_important_classes_num;
+
+ /* The array containing all non-empty classes. Such classes is
+ important for calculation of the hard register usage costs. */
+ enum reg_class x_ira_important_classes[N_REG_CLASSES];
+
+ /* The array containing indexes of important classes in the previous
+ array. The array elements are defined only for important
+ classes. */
+ int x_ira_important_class_nums[N_REG_CLASSES];
+
+ /* The biggest important class inside of intersection of the two
+ classes (that is calculated taking only hard registers available
+ for allocation into account;. If the both classes contain no hard
+ registers available for allocation, the value is calculated with
+ taking all hard-registers including fixed ones into account. */
+ enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* True if the two classes (that is calculated taking only hard
+ registers available for allocation into account; are
+ intersected. */
+ bool x_ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* Classes with end marker LIM_REG_CLASSES which are intersected with
+ given class (the first index;. That includes given class itself.
+ This is calculated taking only hard registers available for
+ allocation into account. */
+ enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* The biggest (smallest) important class inside of (covering) union
+ of the two classes (that is calculated taking only hard registers
+ available for allocation into account). If the both classes
+ contain no hard registers available for allocation, the value is
+ calculated with taking all hard-registers including fixed ones
+ into account. In other words, the value is the corresponding
+ reg_class_subunion (reg_class_superunion) value. */
+ enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
+ enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* For each reg class, table listing all the classes contained in it
+ (excluding the class itself. Non-allocatable registers are
+ excluded from the consideration;. */
+ enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* Array whose values are hard regset of hard registers for which
+ move of the hard register in given mode into itself is
+ prohibited. */
+ HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
+
+ /* Flag of that the above array has been initialized. */
+ bool x_ira_prohibited_mode_move_regs_initialized_p;
+};