/* Generate code from machine description to emit insns as rtl.
Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001,
- 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
This file is part of GCC.
(unless we aren't going to use them at all). */
if (XVEC (expand, 1) != 0)
{
- for (i = 0; i < operands; i++)
- printf (" operand%d = operands[%d];\n", i, i);
- for (; i <= max_dup_opno; i++)
- printf (" operand%d = operands[%d];\n", i, i);
- for (; i <= max_scratch_opno; i++)
- printf (" operand%d = operands[%d];\n", i, i);
+ for (i = 0;
+ i < MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1);
+ i++)
+ {
+ printf (" operand%d = operands[%d];\n", i, i);
+ printf (" (void) operand%d;\n", i);
+ }
}
printf (" }\n");
}
/* Output code to copy the arguments back out of `operands' */
for (i = 0; i < operands; i++)
- printf (" operand%d = operands[%d];\n", i, i);
+ {
+ printf (" operand%d = operands[%d];\n", i, i);
+ printf (" (void) operand%d;\n", i);
+ }
/* Output code to construct the rtl for the instruction bodies.
Use emit_insn to add them to the sequence being accumulated.
{
int i;
int insn_nr = 0;
-
- printf (" HARD_REG_SET _regs_allocated;\n");
- printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
+ bool first = true;
for (i = 0; i < XVECLEN (split, 0); i++)
{
else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
cur_insn_nr++;
+ if (first)
+ {
+ printf (" HARD_REG_SET _regs_allocated;\n");
+ printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
+ first = false;
+ }
+
printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
return NULL;\n",
XINT (elt, 0),
printf ("#include \"function.h\"\n");
printf ("#include \"expr.h\"\n");
printf ("#include \"optabs.h\"\n");
- printf ("#include \"real.h\"\n");
printf ("#include \"dfp.h\"\n");
printf ("#include \"flags.h\"\n");
printf ("#include \"output.h\"\n");