/* Pipeline hazard description translator.
- Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
+ Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
Written by Vladimir Makarov <vmakarov@redhat.com>
/* References:
- 1. Detecting pipeline structural hazards quickly. T. Proebsting,
+ 1. The finite state automaton based pipeline hazard recognizer and
+ instruction scheduler in GCC. V. Makarov. Proceedings of GCC
+ summit, 2003.
+
+ 2. Detecting pipeline structural hazards quickly. T. Proebsting,
C. Fraser. Proceedings of ACM SIGPLAN-SIGACT Symposium on
Principles of Programming Languages, pages 280--286, 1994.
This article is a good start point to understand usage of finite
state automata for pipeline hazard recognizers. But I'd
- recommend the 2nd article for more deep understanding.
+ recommend the 1st and 3rd article for more deep understanding.
- 2. Efficient Instruction Scheduling Using Finite State Automata:
+ 3. Efficient Instruction Scheduling Using Finite State Automata:
V. Bala and N. Rubin, Proceedings of MICRO-28. This is the best
article about usage of finite state automata for pipeline hazard
recognizers.
- The current implementation is different from the 2nd article in the
- following:
+ The current implementation is described in the 1st article and it
+ is different from the 3rd article in the following:
1. New operator `|' (alternative) is permitted in functional unit
reservation which can be treated deterministically and
#include <math.h>
#include "hashtab.h"
#include "vec.h"
+#include "fnmatch.h"
#ifndef CHAR_BIT
#define CHAR_BIT 8
/* Declare vector types for various data structures: */
DEF_VEC_P(alt_state_t);
-DEF_VEC_ALLOC_P(alt_state_t,heap);
+DEF_VEC_ALLOC_P(alt_state_t, heap);
DEF_VEC_P(ainsn_t);
-DEF_VEC_ALLOC_P(ainsn_t,heap);
+DEF_VEC_ALLOC_P(ainsn_t, heap);
DEF_VEC_P(state_t);
-DEF_VEC_ALLOC_P(state_t,heap);
+DEF_VEC_ALLOC_P(state_t, heap);
DEF_VEC_P(decl_t);
-DEF_VEC_ALLOC_P(decl_t,heap);
+DEF_VEC_ALLOC_P(decl_t, heap);
DEF_VEC_P(reserv_sets_t);
-DEF_VEC_ALLOC_P(reserv_sets_t,heap);
+DEF_VEC_ALLOC_P(reserv_sets_t, heap);
DEF_VEC_I(vect_el_t);
DEF_VEC_ALLOC_I(vect_el_t, heap);
-typedef VEC(vect_el_t,heap) *vla_hwint_t;
+typedef VEC(vect_el_t, heap) *vla_hwint_t;
\f
/* Forward declarations of functions used before their definitions, only. */
static regexp_t gen_regexp_sequence (const char *);
#define V_OPTION "-v"
#define W_OPTION "-w"
#define NDFA_OPTION "-ndfa"
+#define COLLAPSE_OPTION "-collapse-ndfa"
+#define NO_COMB_OPTION "-no-comb-vect"
#define PROGRESS_OPTION "-progress"
/* The following flags are set up by function `initiate_automaton_gen'. */
/* Make automata with nondeterministic reservation by insns (`-ndfa'). */
static int ndfa_flag;
+/* When making an NDFA, produce additional transitions that collapse
+ NDFA state into a deterministic one suitable for querying CPU units.
+ Provide avance-state transitions only for deterministic states. */
+static int collapse_flag;
+
/* Do not make minimization of DFA (`-no-minimization'). */
static int no_minimization_flag;
+/* Do not try to generate a comb vector (`-no-comb-vect'). */
+static int no_comb_flag;
+
/* Value of this variable is number of automata being generated. The
actual number of automata may be less this value if there is not
sufficient number of units. This value is defined by argument of
struct bypass_decl
{
int latency;
- const char *out_insn_name;
- const char *in_insn_name;
+ const char *out_pattern;
+ const char *in_pattern;
const char *bypass_guard_name;
/* The following fields are defined by checker. */
insn. */
int insn_num;
/* The following field value is list of bypasses in which given insn
- is output insn. */
+ is output insn. Bypasses with the same input insn stay one after
+ another in the list in the same order as their occurrences in the
+ description but the bypass without a guard stays always the last
+ in a row of bypasses with the same input insn. */
struct bypass_decl *bypass_list;
/* The following fields are defined by automaton generator. */
NDFA. */
struct description
{
- int decls_num;
+ int decls_num, normal_decls_num;
/* The following fields are defined by checker. */
automaton_t first_automaton;
/* The following field is created by pipeline hazard parser and
- contains all declarations. We allocate additional entry for
- special insn "cycle advancing" which is added by the automaton
- generator. */
+ contains all declarations. We allocate additional entries for
+ two special insns which are added by the automaton generator. */
decl_t decls [1];
};
/* The following field value is the list of insn declarations for
given automaton. */
ainsn_t ainsn_list;
+ /* Pointers to the ainsns corresponding to the special reservations. */
+ ainsn_t advance_ainsn, collapse_ainsn;
+
/* The following field value is the corresponding automaton
declaration. This field is not NULL only if the automatic
partition on automata is not used. */
/* Pointers to all declarations during IR generation are stored in the
following. */
-static VEC(decl_t,heap) *decls;
+static VEC(decl_t, heap) *decls;
/* Given a pointer to a (char *) and a separator, return an alloc'ed
string containing the next separated element, taking parentheses
DECL_UNIT (decl)->query_p = 0;
DECL_UNIT (decl)->min_occ_cycle_num = -1;
DECL_UNIT (decl)->in_set_p = 0;
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
}
DECL_UNIT (decl)->name = check_name (str_cpu_units [i], decl->pos);
DECL_UNIT (decl)->automaton_name = XSTR (def, 1);
DECL_UNIT (decl)->query_p = 1;
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
}
gen_bypass (rtx def)
{
decl_t decl;
- char **out_insns;
+ char **out_patterns;
int out_length;
- char **in_insns;
+ char **in_patterns;
int in_length;
int i, j;
- out_insns = get_str_vect (XSTR (def, 1), &out_length, ',', FALSE);
- if (out_insns == NULL)
+ out_patterns = get_str_vect (XSTR (def, 1), &out_length, ',', FALSE);
+ if (out_patterns == NULL)
fatal ("invalid string `%s' in define_bypass", XSTR (def, 1));
- in_insns = get_str_vect (XSTR (def, 2), &in_length, ',', FALSE);
- if (in_insns == NULL)
+ in_patterns = get_str_vect (XSTR (def, 2), &in_length, ',', FALSE);
+ if (in_patterns == NULL)
fatal ("invalid string `%s' in define_bypass", XSTR (def, 2));
for (i = 0; i < out_length; i++)
for (j = 0; j < in_length; j++)
decl->mode = dm_bypass;
decl->pos = 0;
DECL_BYPASS (decl)->latency = XINT (def, 0);
- DECL_BYPASS (decl)->out_insn_name = out_insns [i];
- DECL_BYPASS (decl)->in_insn_name = in_insns [j];
+ DECL_BYPASS (decl)->out_pattern = out_patterns[i];
+ DECL_BYPASS (decl)->in_pattern = in_patterns[j];
DECL_BYPASS (decl)->bypass_guard_name = XSTR (def, 3);
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
}
else
DECL_EXCL (decl)->names [i]
= second_str_cpu_units [i - first_vect_length];
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
/* Process a PRESENCE_SET, a FINAL_PRESENCE_SET, an ABSENCE_SET,
DECL_ABSENCE (decl)->patterns_num = patterns_length;
DECL_ABSENCE (decl)->final_p = final_p;
}
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
/* Process a PRESENCE_SET.
decl->mode = dm_automaton;
decl->pos = 0;
DECL_AUTOMATON (decl)->name = check_name (str_automata [i], decl->pos);
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
}
w_flag = 1;
else if (strcmp (XSTR (def, 0), NDFA_OPTION + 1) == 0)
ndfa_flag = 1;
+ else if (strcmp (XSTR (def, 0), COLLAPSE_OPTION + 1) == 0)
+ collapse_flag = 1;
+ else if (strcmp (XSTR (def, 0), NO_COMB_OPTION + 1) == 0)
+ no_comb_flag = 1;
else if (strcmp (XSTR (def, 0), PROGRESS_OPTION + 1) == 0)
progress_flag = 1;
else
return regexp;
}
else
- return gen_regexp_el (str);
+ return gen_regexp_el (repeat_vect[0]);
}
/* Parse reservation STR which possibly contains separator '+'. */
return allof;
}
else
- return gen_regexp_repeat (str);
+ return gen_regexp_repeat (allof_vect[0]);
}
/* Parse reservation STR which possibly contains separator '|'. */
return oneof;
}
else
- return gen_regexp_allof (str);
+ return gen_regexp_allof (oneof_vect[0]);
}
/* Parse reservation STR which possibly contains separator ','. */
return sequence;
}
else
- return gen_regexp_oneof (str);
+ return gen_regexp_oneof (sequence_vect[0]);
}
/* Parse construction reservation STR. */
gen_regexp (const char *str)
{
reserv_str = str;
- return gen_regexp_sequence (str);;
+ return gen_regexp_sequence (str);
}
/* Process a DEFINE_RESERVATION.
decl->pos = 0;
DECL_RESERV (decl)->name = check_name (XSTR (def, 0), decl->pos);
DECL_RESERV (decl)->regexp = gen_regexp (XSTR (def, 1));
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
/* Process a DEFINE_INSN_RESERVATION.
DECL_INSN_RESERV (decl)->default_latency = XINT (def, 1);
DECL_INSN_RESERV (decl)->condexp = XEXP (def, 2);
DECL_INSN_RESERV (decl)->regexp = gen_regexp (XSTR (def, 3));
- VEC_safe_push (decl_t,heap, decls, decl);
+ VEC_safe_push (decl_t, heap, decls, decl);
}
\f
{
void **entry_ptr;
- entry_ptr = htab_find_slot (automaton_decl_table, automaton_decl, 1);
+ entry_ptr = htab_find_slot (automaton_decl_table, automaton_decl, INSERT);
if (*entry_ptr == NULL)
*entry_ptr = (void *) automaton_decl;
return (decl_t) *entry_ptr;
{
void **entry_ptr;
- entry_ptr = htab_find_slot (insn_decl_table, insn_decl, 1);
+ entry_ptr = htab_find_slot (insn_decl_table, insn_decl, INSERT);
if (*entry_ptr == NULL)
*entry_ptr = (void *) insn_decl;
return (decl_t) *entry_ptr;
{
void **entry_ptr;
- entry_ptr = htab_find_slot (decl_table, decl, 1);
+ entry_ptr = htab_find_slot (decl_table, decl, INSERT);
if (*entry_ptr == NULL)
*entry_ptr = (void *) decl;
return (decl_t) *entry_ptr;
no_error_flag = 0;
}
else
- warning
- (0, "unit `%s' excludes and requires presence of `%s'",
+ warning ("unit `%s' excludes and requires presence of `%s'",
dst->unit_decl->name, unit->name);
}
}
{
if (!w_flag)
{
- error
- ("unit `%s' requires absence and presence of `%s'",
- dst->unit_decl->name, unit->name);
+ error ("unit `%s' requires absence and presence of `%s'",
+ dst->unit_decl->name, unit->name);
no_error_flag = 0;
}
else
- warning
- (0, "unit `%s' requires absence and presence of `%s'",
- dst->unit_decl->name, unit->name);
+ warning ("unit `%s' requires absence and presence of `%s'",
+ dst->unit_decl->name, unit->name);
}
if (no_error_flag)
{
}
-/* The function searches for bypass with given IN_INSN_RESERV in given
- BYPASS_LIST. */
-static struct bypass_decl *
-find_bypass (struct bypass_decl *bypass_list,
- struct insn_reserv_decl *in_insn_reserv)
+/* The function inserts BYPASS in the list of bypasses of the
+ corresponding output insn. The order of bypasses in the list is
+ decribed in a comment for member `bypass_list' (see above). If
+ there is already the same bypass in the list the function reports
+ this and does nothing. */
+static void
+insert_bypass (struct bypass_decl *bypass)
+{
+ struct bypass_decl *curr, *last;
+ struct insn_reserv_decl *out_insn_reserv = bypass->out_insn_reserv;
+ struct insn_reserv_decl *in_insn_reserv = bypass->in_insn_reserv;
+
+ for (curr = out_insn_reserv->bypass_list, last = NULL;
+ curr != NULL;
+ last = curr, curr = curr->next)
+ if (curr->in_insn_reserv == in_insn_reserv)
+ {
+ if ((bypass->bypass_guard_name != NULL
+ && curr->bypass_guard_name != NULL
+ && ! strcmp (bypass->bypass_guard_name, curr->bypass_guard_name))
+ || bypass->bypass_guard_name == curr->bypass_guard_name)
+ {
+ if (bypass->bypass_guard_name == NULL)
+ {
+ if (!w_flag)
+ error ("the same bypass `%s - %s' is already defined",
+ bypass->out_pattern, bypass->in_pattern);
+ else
+ warning ("the same bypass `%s - %s' is already defined",
+ bypass->out_pattern, bypass->in_pattern);
+ }
+ else if (!w_flag)
+ error ("the same bypass `%s - %s' (guard %s) is already defined",
+ bypass->out_pattern, bypass->in_pattern,
+ bypass->bypass_guard_name);
+ else
+ warning
+ ("the same bypass `%s - %s' (guard %s) is already defined",
+ bypass->out_pattern, bypass->in_pattern,
+ bypass->bypass_guard_name);
+ return;
+ }
+ if (curr->bypass_guard_name == NULL)
+ break;
+ if (curr->next == NULL || curr->next->in_insn_reserv != in_insn_reserv)
+ {
+ last = curr;
+ break;
+ }
+
+ }
+ if (last == NULL)
+ {
+ bypass->next = out_insn_reserv->bypass_list;
+ out_insn_reserv->bypass_list = bypass;
+ }
+ else
+ {
+ bypass->next = last->next;
+ last->next = bypass;
+ }
+}
+
+/* BYPASS is a define_bypass decl that includes glob pattern PATTERN.
+ Call FN (BYPASS, INSN, DATA) for each matching instruction INSN. */
+
+static void
+for_each_matching_insn (decl_t bypass, const char *pattern,
+ void (*fn) (decl_t, decl_t, void *), void *data)
+{
+ decl_t insn_reserv;
+ bool matched_p;
+ int i;
+
+ matched_p = false;
+ if (strpbrk (pattern, "*?["))
+ for (i = 0; i < description->decls_num; i++)
+ {
+ insn_reserv = description->decls[i];
+ if (insn_reserv->mode == dm_insn_reserv
+ && fnmatch (pattern, DECL_INSN_RESERV (insn_reserv)->name, 0) == 0)
+ {
+ fn (bypass, insn_reserv, data);
+ matched_p = true;
+ }
+ }
+ else
+ {
+ insn_reserv = find_insn_decl (pattern);
+ if (insn_reserv)
+ {
+ fn (bypass, insn_reserv, data);
+ matched_p = true;
+ }
+ }
+ if (!matched_p)
+ error ("there is no insn reservation that matches `%s'", pattern);
+}
+
+/* A subroutine of process_bypass that is called for each pair
+ of matching instructions. OUT_INSN_RESERV is the output
+ instruction and DATA is the input instruction. */
+
+static void
+process_bypass_2 (decl_t model, decl_t out_insn_reserv, void *data)
{
struct bypass_decl *bypass;
+ decl_t in_insn_reserv;
- for (bypass = bypass_list; bypass != NULL; bypass = bypass->next)
- if (bypass->in_insn_reserv == in_insn_reserv)
- break;
- return bypass;
+ in_insn_reserv = (decl_t) data;
+ if (strcmp (DECL_INSN_RESERV (in_insn_reserv)->name,
+ DECL_BYPASS (model)->in_pattern) == 0
+ && strcmp (DECL_INSN_RESERV (out_insn_reserv)->name,
+ DECL_BYPASS (model)->out_pattern) == 0)
+ bypass = DECL_BYPASS (model);
+ else
+ {
+ bypass = XCNEW (struct bypass_decl);
+ bypass->latency = DECL_BYPASS (model)->latency;
+ bypass->out_pattern = DECL_INSN_RESERV (out_insn_reserv)->name;
+ bypass->in_pattern = DECL_INSN_RESERV (in_insn_reserv)->name;
+ bypass->bypass_guard_name = DECL_BYPASS (model)->bypass_guard_name;
+ }
+ bypass->out_insn_reserv = DECL_INSN_RESERV (out_insn_reserv);
+ bypass->in_insn_reserv = DECL_INSN_RESERV (in_insn_reserv);
+ insert_bypass (bypass);
+}
+
+/* A subroutine of process_bypass that is called for each input
+ instruction IN_INSN_RESERV. */
+
+static void
+process_bypass_1 (decl_t bypass, decl_t in_insn_reserv,
+ void *data ATTRIBUTE_UNUSED)
+{
+ for_each_matching_insn (bypass, DECL_BYPASS (bypass)->out_pattern,
+ process_bypass_2, in_insn_reserv);
+}
+
+/* Process define_bypass decl BYPASS, inserting a bypass for each specific
+ pair of insn reservations. */
+
+static void
+process_bypass (decl_t bypass)
+{
+ for_each_matching_insn (bypass, DECL_BYPASS (bypass)->in_pattern,
+ process_bypass_1, NULL);
}
/* The function processes pipeline description declarations, checks
decl_t decl;
decl_t automaton_decl;
decl_t decl_in_table;
- decl_t out_insn_reserv;
- decl_t in_insn_reserv;
- struct bypass_decl *bypass;
int automaton_presence;
int i;
error ("repeated declaration of automaton `%s'",
DECL_AUTOMATON (decl)->name);
else
- warning (0, "repeated declaration of automaton `%s'",
+ warning ("repeated declaration of automaton `%s'",
DECL_AUTOMATON (decl)->name);
}
}
{
if (DECL_BYPASS (decl)->latency < 0)
error ("define_bypass `%s - %s' has negative latency time",
- DECL_BYPASS (decl)->out_insn_name,
- DECL_BYPASS (decl)->in_insn_name);
+ DECL_BYPASS (decl)->out_pattern,
+ DECL_BYPASS (decl)->in_pattern);
}
else if (decl->mode == dm_unit || decl->mode == dm_reserv)
{
{
decl = description->decls [i];
if (decl->mode == dm_bypass)
- {
- out_insn_reserv = find_insn_decl (DECL_BYPASS (decl)->out_insn_name);
- in_insn_reserv = find_insn_decl (DECL_BYPASS (decl)->in_insn_name);
- if (out_insn_reserv == NULL)
- error ("there is no insn reservation `%s'",
- DECL_BYPASS (decl)->out_insn_name);
- else if (in_insn_reserv == NULL)
- error ("there is no insn reservation `%s'",
- DECL_BYPASS (decl)->in_insn_name);
- else
- {
- DECL_BYPASS (decl)->out_insn_reserv
- = DECL_INSN_RESERV (out_insn_reserv);
- DECL_BYPASS (decl)->in_insn_reserv
- = DECL_INSN_RESERV (in_insn_reserv);
- bypass
- = find_bypass (DECL_INSN_RESERV (out_insn_reserv)->bypass_list,
- DECL_BYPASS (decl)->in_insn_reserv);
- if (bypass != NULL)
- {
- if (DECL_BYPASS (decl)->latency == bypass->latency)
- {
- if (!w_flag)
- error
- ("the same bypass `%s - %s' is already defined",
- DECL_BYPASS (decl)->out_insn_name,
- DECL_BYPASS (decl)->in_insn_name);
- else
- warning
- (0, "the same bypass `%s - %s' is already defined",
- DECL_BYPASS (decl)->out_insn_name,
- DECL_BYPASS (decl)->in_insn_name);
- }
- else
- error ("bypass `%s - %s' is already defined",
- DECL_BYPASS (decl)->out_insn_name,
- DECL_BYPASS (decl)->in_insn_name);
- }
- else
- {
- DECL_BYPASS (decl)->next
- = DECL_INSN_RESERV (out_insn_reserv)->bypass_list;
- DECL_INSN_RESERV (out_insn_reserv)->bypass_list
- = DECL_BYPASS (decl);
- }
- }
- }
+ process_bypass (decl);
}
/* Check exclusion set declarations and form exclusion sets. */
if (!w_flag)
error ("automaton `%s' is not used", DECL_AUTOMATON (decl)->name);
else
- warning (0, "automaton `%s' is not used",
+ warning ("automaton `%s' is not used",
DECL_AUTOMATON (decl)->name);
}
}
if (!w_flag)
error ("unit `%s' is not used", DECL_UNIT (decl)->name);
else
- warning (0, "unit `%s' is not used", DECL_UNIT (decl)->name);
+ warning ("unit `%s' is not used", DECL_UNIT (decl)->name);
}
else if (decl->mode == dm_reserv && !DECL_RESERV (decl)->reserv_is_used)
{
if (!w_flag)
error ("reservation `%s' is not used", DECL_RESERV (decl)->name);
else
- warning (0, "reservation `%s' is not used", DECL_RESERV (decl)->name);
+ warning ("reservation `%s' is not used", DECL_RESERV (decl)->name);
}
}
}
{
int max_cycle = 0;
int min_cycle = 0;
-
+
for (i = 0; i < REGEXP_ALLOF (regexp)->regexps_num; i++)
{
process_regexp_cycles (REGEXP_ALLOF (regexp)->regexps [i],
{
int max_cycle = 0;
int min_cycle = 0;
-
+
for (i = 0; i < REGEXP_ONEOF (regexp)->regexps_num; i++)
{
process_regexp_cycles (REGEXP_ONEOF (regexp)->regexps [i],
/* Pseudo insn decl which denotes advancing cycle. */
static decl_t advance_cycle_insn_decl;
+/* Pseudo insn decl which denotes collapsing the NDFA state. */
+static decl_t collapse_ndfa_insn_decl;
+
+/* Create and record a decl for the special advance-cycle transition. */
static void
add_advance_cycle_insn_decl (void)
{
description->insns_num++;
}
+/* Create and record a decl for the special collapse-NDFA transition. */
+static void
+add_collapse_ndfa_insn_decl (void)
+{
+ collapse_ndfa_insn_decl = XCREATENODE (struct decl);
+ collapse_ndfa_insn_decl->mode = dm_insn_reserv;
+ collapse_ndfa_insn_decl->pos = no_pos;
+ DECL_INSN_RESERV (collapse_ndfa_insn_decl)->regexp = NULL;
+ DECL_INSN_RESERV (collapse_ndfa_insn_decl)->name = "$collapse_ndfa";
+ DECL_INSN_RESERV (collapse_ndfa_insn_decl)->insn_num
+ = description->insns_num;
+ description->decls [description->decls_num] = collapse_ndfa_insn_decl;
+ description->decls_num++;
+ description->insns_num++;
+}
+
+/* True if DECL is either of the two special decls we created. */
+static bool
+special_decl_p (struct insn_reserv_decl *decl)
+{
+ return (decl == DECL_INSN_RESERV (advance_cycle_insn_decl)
+ || (collapse_flag
+ && decl == DECL_INSN_RESERV (collapse_ndfa_insn_decl)));
+}
+
\f
/* Abstract data `alternative states' which represents
nondeterministic nature of the description (see comments for
uniq_sort_alt_states (alt_state_t alt_states_list)
{
alt_state_t curr_alt_state;
- VEC(alt_state_t,heap) *alt_states;
+ VEC(alt_state_t, heap) *alt_states;
size_t i;
size_t prev_unique_state_ind;
alt_state_t result;
if (alt_states_list->next_alt_state == 0)
return alt_states_list;
- alt_states = VEC_alloc (alt_state_t,heap, 150);
+ alt_states = VEC_alloc (alt_state_t, heap, 150);
for (curr_alt_state = alt_states_list;
curr_alt_state != NULL;
curr_alt_state = curr_alt_state->next_alt_state)
- VEC_safe_push (alt_state_t,heap, alt_states, curr_alt_state);
+ VEC_safe_push (alt_state_t, heap, alt_states, curr_alt_state);
- qsort (VEC_address (alt_state_t, alt_states),
- VEC_length (alt_state_t, alt_states),
- sizeof (alt_state_t), alt_state_cmp);
+ VEC_qsort (alt_state_t, alt_states, alt_state_cmp);
prev_unique_state_ind = 0;
for (i = 1; i < VEC_length (alt_state_t, alt_states); i++)
result = VEC_index (alt_state_t, alt_states, 0);
- VEC_free (alt_state_t,heap, alt_states);
+ VEC_free (alt_state_t, heap, alt_states);
return result;
}
/* Set bit number bitno in the bit string. The macro is not side
effect proof. */
#define SET_BIT(bitstring, bitno) \
- (((char *) (bitstring)) [(bitno) / CHAR_BIT] |= 1 << (bitno) % CHAR_BIT)
+ ((bitstring)[(bitno) / (sizeof (*(bitstring)) * CHAR_BIT)] |= \
+ (HOST_WIDE_INT)1 << (bitno) % (sizeof (*(bitstring)) * CHAR_BIT))
#define CLEAR_BIT(bitstring, bitno) \
- (((char *) (bitstring)) [(bitno) / CHAR_BIT] &= ~(1 << (bitno) % CHAR_BIT))
+ ((bitstring)[(bitno) / (sizeof (*(bitstring)) * CHAR_BIT)] &= \
+ ~((HOST_WIDE_INT)1 << (bitno) % (sizeof (*(bitstring)) * CHAR_BIT)))
/* Test if bit number bitno in the bitstring is set. The macro is not
side effect proof. */
-#define TEST_BIT(bitstring, bitno) \
- (((char *) (bitstring)) [(bitno) / CHAR_BIT] >> (bitno) % CHAR_BIT & 1)
+#define TEST_BIT(bitstring, bitno) \
+ ((bitstring)[(bitno) / (sizeof (*(bitstring)) * CHAR_BIT)] >> \
+ (bitno) % (sizeof (*(bitstring)) * CHAR_BIT) & 1)
\f
{
void **entry_ptr;
- entry_ptr = htab_find_slot (state_table, (void *) state, 1);
+ entry_ptr = htab_find_slot (state_table, (void *) state, INSERT);
if (*entry_ptr == NULL)
*entry_ptr = (void *) state;
return (state_t) *entry_ptr;
arc_t arc;
for (arc = first_out_arc (from_state); arc != NULL; arc = next_out_arc (arc))
- if (arc->to_state == to_state && arc->insn == insn)
+ if (arc->insn == insn
+ && (arc->to_state == to_state
+ || (collapse_flag
+ /* Any arc is good enough for a collapse-ndfa transition. */
+ && (insn->insn_reserv_decl
+ == DECL_INSN_RESERV (collapse_ndfa_insn_decl)))))
return arc;
return NULL;
}
-/* The function adds arc from FROM_STATE to TO_STATE marked by AINSN.
- The function returns added arc (or already existing arc). */
-static arc_t
+/* The function adds arc from FROM_STATE to TO_STATE marked by AINSN,
+ unless such an arc already exists. */
+static void
add_arc (state_t from_state, state_t to_state, ainsn_t ainsn)
{
arc_t new_arc;
new_arc = find_arc (from_state, to_state, ainsn);
if (new_arc != NULL)
- return new_arc;
+ return;
if (first_free_arc == NULL)
{
#ifndef NDEBUG
from_state->first_out_arc = new_arc;
from_state->num_out_arcs++;
new_arc->next_arc_marked_by_insn = NULL;
- return new_arc;
}
/* The function returns the first arc starting from STATE. */
if (current_automata_list == NULL)
return NULL;
entry_ptr = htab_find_slot (automata_list_table,
- (void *) current_automata_list, 1);
+ (void *) current_automata_list, INSERT);
if (*entry_ptr == NULL)
*entry_ptr = (void *) current_automata_list;
else
static reserv_sets_t
get_excl_set (reserv_sets_t in_set)
{
- int excl_char_num;
- int chars_num;
- int i;
+ int el;
+ unsigned int i;
int start_unit_num;
int unit_num;
- chars_num = els_in_cycle_reserv * sizeof (set_el_t);
- memset (excl_set, 0, chars_num);
- for (excl_char_num = 0; excl_char_num < chars_num; excl_char_num++)
- if (((unsigned char *) in_set) [excl_char_num])
- for (i = CHAR_BIT - 1; i >= 0; i--)
- if ((((unsigned char *) in_set) [excl_char_num] >> i) & 1)
+ memset (excl_set, 0, els_in_cycle_reserv * sizeof (set_el_t));
+ for (el = 0; el < els_in_cycle_reserv; el++)
+ if (in_set[el])
+ for (i = 0; i < CHAR_BIT * sizeof (set_el_t); i++)
+ if ((in_set[el] >> i) & 1)
{
- start_unit_num = excl_char_num * CHAR_BIT + i;
+ start_unit_num = el * CHAR_BIT * sizeof (set_el_t) + i;
if (start_unit_num >= description->units_num)
return excl_set;
for (unit_num = 0; unit_num < els_in_cycle_reserv; unit_num++)
reserv_sets_t original_set,
int final_p)
{
- int char_num;
- int chars_num;
- int i;
+ int el;
+ unsigned int i;
int start_unit_num;
int unit_num;
int presence_p;
pattern_reserv_t pat_reserv;
- chars_num = els_in_cycle_reserv * sizeof (set_el_t);
- for (char_num = 0; char_num < chars_num; char_num++)
- if (((unsigned char *) original_set) [char_num])
- for (i = CHAR_BIT - 1; i >= 0; i--)
- if ((((unsigned char *) original_set) [char_num] >> i) & 1)
+ for (el = 0; el < els_in_cycle_reserv; el++)
+ if (original_set[el])
+ for (i = 0; i < CHAR_BIT * sizeof (set_el_t); i++)
+ if ((original_set[el] >> i) & 1)
{
- start_unit_num = char_num * CHAR_BIT + i;
+ start_unit_num = el * CHAR_BIT * sizeof (set_el_t) + i;
if (start_unit_num >= description->units_num)
break;
if ((final_p
reserv_sets_t original_set,
int final_p)
{
- int char_num;
- int chars_num;
- int i;
+ int el;
+ unsigned int i;
int start_unit_num;
int unit_num;
pattern_reserv_t pat_reserv;
- chars_num = els_in_cycle_reserv * sizeof (set_el_t);
- for (char_num = 0; char_num < chars_num; char_num++)
- if (((unsigned char *) original_set) [char_num])
- for (i = CHAR_BIT - 1; i >= 0; i--)
- if ((((unsigned char *) original_set) [char_num] >> i) & 1)
+ for (el = 0; el < els_in_cycle_reserv; el++)
+ if (original_set[el])
+ for (i = 0; i < CHAR_BIT * sizeof (set_el_t); i++)
+ if ((original_set[el] >> i) & 1)
{
- start_unit_num = char_num * CHAR_BIT + i;
+ start_unit_num = el * CHAR_BIT * sizeof (set_el_t) + i;
if (start_unit_num >= description->units_num)
break;
for (pat_reserv = (final_p
default:
break;
}
-
+
if (allof_length == 1)
REGEXP_SEQUENCE (result)->regexps [i] = allof_op;
else
transform_time = create_ticker ();
add_advance_cycle_insn_decl ();
+ if (collapse_flag)
+ add_collapse_ndfa_insn_decl ();
if (progress_flag)
fprintf (stderr, "Reservation transformation...");
- for (i = 0; i < description->decls_num; i++)
+ for (i = 0; i < description->normal_decls_num; i++)
{
decl = description->decls [i];
- if (decl->mode == dm_insn_reserv && decl != advance_cycle_insn_decl)
+ if (decl->mode == dm_insn_reserv)
DECL_INSN_RESERV (decl)->transformed_regexp
= transform_regexp (copy_insn_regexp
(DECL_INSN_RESERV (decl)->regexp));
about units to automata distribution has been output. */
static int annotation_message_reported_p;
+/* The vector contains all decls which are automata. */
+static VEC(decl_t, heap) *automaton_decls;
+
/* The following structure describes usage of a unit in a reservation. */
struct unit_usage
{
unit_decl_t unit_decl;
/* The following forms a list of units used on the same cycle in the
- same alternative. */
+ same alternative. The list is ordered by the correspdoning unit
+ declarations and there is no unit declaration duplication in the
+ list. */
struct unit_usage *next;
};
typedef struct unit_usage *unit_usage_t;
DEF_VEC_P(unit_usage_t);
-DEF_VEC_ALLOC_P(unit_usage_t,heap);
+DEF_VEC_ALLOC_P(unit_usage_t, heap);
/* Obstack for unit_usage structures. */
static struct obstack unit_usages;
structures. There is an element for each combination of
(alternative number, cycle). Unit usages on given cycle in
alternative with given number are referred through element with
- index equals to the cycle * number of all alternatives in the regexp
- + the alternative number. */
-static VEC(unit_usage_t,heap) *cycle_alt_unit_usages;
+ index equals to the cycle * number of all alternatives in the
+ regexp + the alternative number. */
+static VEC(unit_usage_t, heap) *cycle_alt_unit_usages;
/* The following function creates the structure unit_usage for UNIT on
CYCLE in REGEXP alternative with ALT_NUM. The structure is made
{
size_t length;
unit_decl_t unit_decl;
- unit_usage_t unit_usage_ptr;
+ unit_usage_t unit_usage_ptr, curr, prev;
int index;
gcc_assert (regexp && regexp->mode == rm_oneof
length = (cycle + 1) * REGEXP_ONEOF (regexp)->regexps_num;
while (VEC_length (unit_usage_t, cycle_alt_unit_usages) < length)
- VEC_safe_push (unit_usage_t,heap, cycle_alt_unit_usages, 0);
-
+ VEC_safe_push (unit_usage_t, heap, cycle_alt_unit_usages, 0);
+
+ index = cycle * REGEXP_ONEOF (regexp)->regexps_num + alt_num;
+ prev = NULL;
+ for (curr = VEC_index (unit_usage_t, cycle_alt_unit_usages, index);
+ curr != NULL;
+ prev = curr, curr = curr->next)
+ if (curr->unit_decl >= unit_decl)
+ break;
+ if (curr != NULL && curr->unit_decl == unit_decl)
+ return;
obstack_blank (&unit_usages, sizeof (struct unit_usage));
unit_usage_ptr = (struct unit_usage *) obstack_base (&unit_usages);
obstack_finish (&unit_usages);
unit_usage_ptr->unit_decl = unit_decl;
- index = cycle * REGEXP_ONEOF (regexp)->regexps_num + alt_num;
- unit_usage_ptr->next = VEC_index (unit_usage_t, cycle_alt_unit_usages, index);
- VEC_replace (unit_usage_t, cycle_alt_unit_usages, index, unit_usage_ptr);
unit_decl->last_distribution_check_cycle = -1; /* undefined */
+ unit_usage_ptr->next = curr;
+ if (prev == NULL)
+ VEC_replace (unit_usage_t, cycle_alt_unit_usages, index, unit_usage_ptr);
+ else
+ prev->next = unit_usage_ptr;
}
+/* Return true if unit UNIT_DECL is present on the LIST. */
+static bool
+unit_present_on_list_p (unit_usage_t list, unit_decl_t unit_decl)
+{
+ while (list != NULL)
+ {
+ if (list->unit_decl == unit_decl)
+ return true;
+ list = list->next;
+ }
+ return false;
+}
+
+/* The function returns true if reservations of alternatives ALT1 and
+ ALT2 are equal after excluding reservations of units of
+ EXCLUDED_AUTOMATON_DECL. */
+static bool
+equal_alternatives_p (int alt1, int alt2, int n_alts,
+ struct automaton_decl *excluded_automaton_decl)
+{
+ int i;
+ unit_usage_t list1, list2;
+
+ for (i = 0;
+ i < (int) VEC_length (unit_usage_t, cycle_alt_unit_usages);
+ i += n_alts)
+ {
+ for (list1 = VEC_index (unit_usage_t, cycle_alt_unit_usages, i + alt1),
+ list2 = VEC_index (unit_usage_t, cycle_alt_unit_usages, i + alt2);;
+ list1 = list1->next, list2 = list2->next)
+ {
+ while (list1 != NULL
+ && list1->unit_decl->automaton_decl == excluded_automaton_decl)
+ list1 = list1->next;
+ while (list2 != NULL
+ && list2->unit_decl->automaton_decl == excluded_automaton_decl)
+ list2 = list2->next;
+ if (list1 == NULL || list2 == NULL)
+ {
+ if (list1 != list2)
+ return false;
+ else
+ break;
+ }
+ if (list1->unit_decl != list2->unit_decl)
+ return false;
+ }
+ }
+ return true;
+}
+
+DEF_VEC_I(int);
+DEF_VEC_ALLOC_I(int, heap);
+
/* The function processes given REGEXP to find units with the wrong
distribution. */
static void
check_regexp_units_distribution (const char *insn_reserv_name,
regexp_t regexp)
{
- int i, j, k, cycle;
+ int i, j, k, cycle, start, n_alts, alt, alt2;
+ bool annotation_reservation_message_reported_p;
regexp_t seq, allof, unit;
- struct unit_usage *unit_usage_ptr, *other_unit_usage_ptr;
+ struct unit_usage *unit_usage_ptr;
+ VEC(int, heap) *marked;
if (regexp == NULL || regexp->mode != rm_oneof)
return;
/* Store all unit usages in the regexp: */
obstack_init (&unit_usages);
- cycle_alt_unit_usages = 0;
+ cycle_alt_unit_usages = VEC_alloc (unit_usage_t, heap, 10);
for (i = REGEXP_ONEOF (regexp)->regexps_num - 1; i >= 0; i--)
{
gcc_assert (unit->mode == rm_nothing);
}
break;
-
+
case rm_unit:
store_alt_unit_usage (regexp, allof, j, i);
break;
-
+
case rm_nothing:
break;
-
+
default:
gcc_unreachable ();
}
case rm_unit:
store_alt_unit_usage (regexp, unit, 0, i);
break;
-
+
case rm_nothing:
break;
-
+
default:
gcc_unreachable ();
}
}
/* Check distribution: */
for (i = 0; i < (int) VEC_length (unit_usage_t, cycle_alt_unit_usages); i++)
+ for (unit_usage_ptr = VEC_index (unit_usage_t, cycle_alt_unit_usages, i);
+ unit_usage_ptr != NULL;
+ unit_usage_ptr = unit_usage_ptr->next)
+ unit_usage_ptr->unit_decl->last_distribution_check_cycle = -1;
+ n_alts = REGEXP_ONEOF (regexp)->regexps_num;
+ marked = VEC_alloc (int, heap, n_alts);
+ for (i = 0; i < n_alts; i++)
+ VEC_safe_push (int, heap, marked, 0);
+ annotation_reservation_message_reported_p = false;
+ for (i = 0; i < (int) VEC_length (unit_usage_t, cycle_alt_unit_usages); i++)
{
- cycle = i / REGEXP_ONEOF (regexp)->regexps_num;
+ cycle = i / n_alts;
+ start = cycle * n_alts;
for (unit_usage_ptr = VEC_index (unit_usage_t, cycle_alt_unit_usages, i);
unit_usage_ptr != NULL;
unit_usage_ptr = unit_usage_ptr->next)
- if (cycle != unit_usage_ptr->unit_decl->last_distribution_check_cycle)
- {
- unit_usage_ptr->unit_decl->last_distribution_check_cycle = cycle;
- for (k = cycle * REGEXP_ONEOF (regexp)->regexps_num;
- k < (int) VEC_length (unit_usage_t, cycle_alt_unit_usages)
- && k == cycle * REGEXP_ONEOF (regexp)->regexps_num;
- k++)
- {
- for (other_unit_usage_ptr
- = VEC_index (unit_usage_t, cycle_alt_unit_usages, k);
- other_unit_usage_ptr != NULL;
- other_unit_usage_ptr = other_unit_usage_ptr->next)
- if (unit_usage_ptr->unit_decl->automaton_decl
- == other_unit_usage_ptr->unit_decl->automaton_decl)
- break;
- if (other_unit_usage_ptr == NULL
- && (VEC_index (unit_usage_t, cycle_alt_unit_usages, k)
- != NULL))
- break;
- }
- if (k < (int) VEC_length (unit_usage_t, cycle_alt_unit_usages)
- && k == cycle * REGEXP_ONEOF (regexp)->regexps_num)
- {
- if (!annotation_message_reported_p)
- {
- fprintf (stderr, "\n");
- error ("The following units do not satisfy units-automata distribution rule");
- error (" (A unit of given unit automaton should be on each reserv. altern.)");
- annotation_message_reported_p = TRUE;
- }
- error ("Unit %s, reserv. %s, cycle %d",
- unit_usage_ptr->unit_decl->name, insn_reserv_name,
- cycle);
- }
- }
+ {
+ if (unit_usage_ptr->unit_decl->last_distribution_check_cycle == cycle)
+ continue;
+ unit_usage_ptr->unit_decl->last_distribution_check_cycle = cycle;
+ for (alt = 0; alt < n_alts; alt++)
+ if (! unit_present_on_list_p (VEC_index (unit_usage_t,
+ cycle_alt_unit_usages,
+ start + alt),
+ unit_usage_ptr->unit_decl))
+ break;
+ if (alt >= n_alts)
+ continue;
+ memset (VEC_address (int, marked), 0, n_alts * sizeof (int));
+ for (alt = 0; alt < n_alts; alt++)
+ {
+ if (! unit_present_on_list_p (VEC_index (unit_usage_t,
+ cycle_alt_unit_usages,
+ start + alt),
+ unit_usage_ptr->unit_decl))
+ continue;
+ for (j = 0;
+ j < (int) VEC_length (unit_usage_t, cycle_alt_unit_usages);
+ j++)
+ {
+ alt2 = j % n_alts;
+ if (! unit_present_on_list_p
+ (VEC_index (unit_usage_t, cycle_alt_unit_usages,
+ start + alt2),
+ unit_usage_ptr->unit_decl)
+ && equal_alternatives_p (alt, alt2, n_alts,
+ unit_usage_ptr
+ ->unit_decl->automaton_decl))
+ {
+ VEC_replace (int, marked, alt, 1);
+ VEC_replace (int, marked, alt2, 1);
+ }
+ }
+ }
+ for (alt = 0; alt < n_alts && VEC_index (int, marked, alt); alt++)
+ ;
+ if (alt < n_alts && 0)
+ {
+ if (! annotation_message_reported_p)
+ {
+ fprintf (stderr, "\n");
+ error ("The following units do not satisfy units-automata distribution rule");
+ error ("(Unit presence on one alt and its absence on other alt\n");
+ error (" result in different other automata reservations)");
+ annotation_message_reported_p = TRUE;
+ }
+ if (! annotation_reservation_message_reported_p)
+ {
+ error ("Reserv %s:", insn_reserv_name);
+ annotation_reservation_message_reported_p = true;
+ }
+ error (" Unit %s, cycle %d, alt %d, another alt %d",
+ unit_usage_ptr->unit_decl->name, cycle, i % n_alts, alt);
+ }
+ }
}
- VEC_free (unit_usage_t,heap, cycle_alt_unit_usages);
+ VEC_free (int, heap, marked);
+ VEC_free (unit_usage_t, heap, cycle_alt_unit_usages);
obstack_free (&unit_usages, NULL);
}
if (progress_flag)
fprintf (stderr, "Check unit distributions to automata...");
- annotation_message_reported_p = FALSE;
+ automaton_decls = NULL;
for (i = 0; i < description->decls_num; i++)
{
decl = description->decls [i];
- if (decl->mode == dm_insn_reserv)
- check_regexp_units_distribution
- (DECL_INSN_RESERV (decl)->name,
- DECL_INSN_RESERV (decl)->transformed_regexp);
+ if (decl->mode == dm_automaton)
+ VEC_safe_push (decl_t, heap, automaton_decls, decl);
}
+ if (VEC_length (decl_t, automaton_decls) > 1)
+ {
+ annotation_message_reported_p = FALSE;
+ for (i = 0; i < description->decls_num; i++)
+ {
+ decl = description->decls [i];
+ if (decl->mode == dm_insn_reserv)
+ check_regexp_units_distribution
+ (DECL_INSN_RESERV (decl)->name,
+ DECL_INSN_RESERV (decl)->transformed_regexp);
+ }
+ }
+ VEC_free (decl_t, heap, automaton_decls);
if (progress_flag)
fprintf (stderr, "done\n");
}
set_state_reserv (state_being_formed, curr_cycle,
REGEXP_UNIT (regexp)->unit_decl->unit_num);
return curr_cycle;
-
+
case rm_sequence:
for (i = 0; i < REGEXP_SEQUENCE (regexp)->regexps_num; i++)
curr_cycle
{
int finish_cycle = 0;
int cycle;
-
+
for (i = 0; i < REGEXP_ALLOF (regexp)->regexps_num; i++)
{
cycle = process_seq_for_forming_states (REGEXP_ALLOF (regexp)
curr_ainsn = curr_ainsn->next_ainsn)
{
reserv_decl = curr_ainsn->insn_reserv_decl;
- if (reserv_decl != DECL_INSN_RESERV (advance_cycle_insn_decl))
+ if (!special_decl_p (reserv_decl))
{
curr_ainsn->alt_states = NULL;
process_alts_for_forming_states (reserv_decl->transformed_regexp,
{
ainsn_t curr_ainsn;
size_t i;
- VEC(ainsn_t,heap) *last_insns = VEC_alloc (ainsn_t,heap, 150);
+ VEC(ainsn_t, heap) *last_insns = VEC_alloc (ainsn_t, heap, 150);
for (curr_ainsn = automaton->ainsn_list;
curr_ainsn != NULL;
curr_ainsn = curr_ainsn->next_ainsn)
- if (curr_ainsn->insn_reserv_decl
- == DECL_INSN_RESERV (advance_cycle_insn_decl))
+ if (special_decl_p (curr_ainsn->insn_reserv_decl))
{
curr_ainsn->next_same_reservs_insn = NULL;
curr_ainsn->first_insn_with_same_reservs = 1;
curr_ainsn->first_insn_with_same_reservs = 1;
}
}
- VEC_free (ainsn_t,heap, last_insns);
+ VEC_free (ainsn_t, heap, last_insns);
}
/* Forming unit reservations which can affect creating the automaton
state_t state;
state_t start_state;
state_t state2;
- ainsn_t advance_cycle_ainsn;
- arc_t added_arc;
- VEC(state_t,heap) *state_stack = VEC_alloc(state_t,heap, 150);
+ VEC(state_t, heap) *state_stack = VEC_alloc(state_t, heap, 150);
int states_n;
reserv_sets_t reservs_matter = form_reservs_matter (automaton);
start_state = insert_state (get_free_state (1, automaton));
automaton->start_state = start_state;
start_state->it_was_placed_in_stack_for_NDFA_forming = 1;
- VEC_safe_push (state_t,heap, state_stack, start_state);
+ VEC_safe_push (state_t, heap, state_stack, start_state);
states_n = 1;
while (VEC_length (state_t, state_stack) != 0)
{
state = VEC_pop (state_t, state_stack);
- advance_cycle_ainsn = NULL;
for (ainsn = automaton->ainsn_list;
ainsn != NULL;
ainsn = ainsn->next_ainsn)
if (ainsn->first_insn_with_same_reservs)
{
insn_reserv_decl = ainsn->insn_reserv_decl;
- if (insn_reserv_decl != DECL_INSN_RESERV (advance_cycle_insn_decl))
+ if (!special_decl_p (insn_reserv_decl))
{
/* We process alt_states in the same order as they are
present in the description. */
- added_arc = NULL;
for (alt_state = ainsn->alt_states;
alt_state != NULL;
alt_state = alt_state->next_alt_state)
{
state2->it_was_placed_in_stack_for_NDFA_forming
= 1;
- VEC_safe_push (state_t,heap, state_stack, state2);
+ VEC_safe_push (state_t, heap, state_stack, state2);
states_n++;
if (progress_flag && states_n % 100 == 0)
fprintf (stderr, ".");
}
- added_arc = add_arc (state, state2, ainsn);
+ add_arc (state, state2, ainsn);
if (!ndfa_flag)
break;
}
}
- if (!ndfa_flag && added_arc != NULL)
- {
- for (alt_state = ainsn->alt_states;
- alt_state != NULL;
- alt_state = alt_state->next_alt_state)
- state2 = alt_state->state;
- }
}
- else
- advance_cycle_ainsn = ainsn;
}
/* Add transition to advance cycle. */
state2 = state_shift (state, reservs_matter);
if (!state2->it_was_placed_in_stack_for_NDFA_forming)
{
state2->it_was_placed_in_stack_for_NDFA_forming = 1;
- VEC_safe_push (state_t,heap, state_stack, state2);
+ VEC_safe_push (state_t, heap, state_stack, state2);
states_n++;
if (progress_flag && states_n % 100 == 0)
fprintf (stderr, ".");
}
- gcc_assert (advance_cycle_ainsn);
- add_arc (state, state2, advance_cycle_ainsn);
+ add_arc (state, state2, automaton->advance_ainsn);
}
- VEC_free (state_t,heap, state_stack);
+ VEC_free (state_t, heap, state_stack);
}
/* Form lists of all arcs of STATE marked by the same ainsn. */
static int
create_composed_state (state_t original_state, arc_t arcs_marked_by_insn,
- VEC(state_t,heap) **state_stack)
+ VEC(state_t, heap) **state_stack)
{
state_t state;
alt_state_t alt_state, curr_alt_state;
for (curr_arc = first_out_arc (curr_alt_state->state);
curr_arc != NULL;
curr_arc = next_out_arc (curr_arc))
- add_arc (state, curr_arc->to_state, curr_arc->insn);
+ if (!collapse_flag
+ /* When producing collapse-NDFA transitions, we
+ only add advance-cycle transitions to the
+ collapsed states. */
+ || (curr_arc->insn->insn_reserv_decl
+ != DECL_INSN_RESERV (advance_cycle_insn_decl)))
+ add_arc (state, curr_arc->to_state, curr_arc->insn);
}
arcs_marked_by_insn->to_state = state;
for (alts_number = 0,
if (!state->it_was_placed_in_stack_for_DFA_forming)
{
state->it_was_placed_in_stack_for_DFA_forming = 1;
- VEC_safe_push (state_t,heap, *state_stack, state);
+ VEC_safe_push (state_t, heap, *state_stack, state);
}
return new_state_p;
}
state_t start_state;
state_t state;
decl_t decl;
- VEC(state_t,heap) *state_stack;
+ VEC(state_t, heap) *state_stack;
int i;
int states_n;
- state_stack = VEC_alloc (state_t,heap, 0);
+ state_stack = VEC_alloc (state_t, heap, 0);
/* Create the start state (empty state). */
start_state = automaton->start_state;
start_state->it_was_placed_in_stack_for_DFA_forming = 1;
- VEC_safe_push (state_t,heap, state_stack, start_state);
+ VEC_safe_push (state_t, heap, state_stack, start_state);
states_n = 1;
while (VEC_length (state_t, state_stack) != 0)
{
{
decl = description->decls [i];
if (decl->mode == dm_insn_reserv
+ && decl != collapse_ndfa_insn_decl
&& create_composed_state
(state, DECL_INSN_RESERV (decl)->arcs_marked_by_insn,
&state_stack))
fprintf (stderr, ".");
}
}
+ /* Add a transition to collapse the NDFA. */
+ if (collapse_flag)
+ {
+ if (state->component_states != NULL)
+ {
+ state_t state2 = state->component_states->state;
+ if (!state2->it_was_placed_in_stack_for_DFA_forming)
+ {
+ state2->it_was_placed_in_stack_for_DFA_forming = 1;
+ VEC_safe_push (state_t, heap, state_stack, state2);
+ }
+ add_arc (state, state2, automaton->collapse_ainsn);
+ }
+ else
+ add_arc (state, state, automaton->collapse_ainsn);
+ }
}
- VEC_free (state_t,heap, state_stack);
+ VEC_free (state_t, heap, state_stack);
}
/* The following variable value is current number (1, 2, ...) of passing
/* The following vla is used for storing pointers to all achieved
states. */
-static VEC(state_t,heap) *all_achieved_states;
+static VEC(state_t, heap) *all_achieved_states;
/* This function is called by function pass_states to add an achieved
STATE. */
static void
add_achieved_state (state_t state)
{
- VEC_safe_push (state_t,heap, all_achieved_states, state);
+ VEC_safe_push (state_t, heap, all_achieved_states, state);
}
/* The function sets up equivalence numbers of insns which mark all
out arcs of STATE by equiv_class_num_1 (if ODD_ITERATION_FLAG has
- nonzero value) or by equiv_class_num_2 of the destination state.
- The function returns number of out arcs of STATE. */
+ nonzero value) or by equiv_class_num_2 of the destination state. */
static void
set_out_arc_insns_equiv_num (state_t state, int odd_iteration_flag)
{
unsigned int sz;
sz = (description->query_units_num + sizeof (int) * CHAR_BIT - 1)
/ (sizeof (int) * CHAR_BIT);
-
+
state->presence_signature = XCREATENODEVEC (unsigned int, sz);
for (i = 0; i < description->units_num; i++)
if (units_array [i]->query_p)
classes and saves it into *CLASSES. This function requires the input
to be sorted via compare_states_for_equiv(). */
static int
-init_equiv_class (VEC(state_t,heap) *states, VEC (state_t,heap) **classes)
+init_equiv_class (VEC(state_t, heap) *states, VEC (state_t, heap) **classes)
{
size_t i;
state_t prev = 0;
int class_num = 1;
- *classes = VEC_alloc (state_t,heap, 150);
+ *classes = VEC_alloc (state_t, heap, 150);
for (i = 0; i < VEC_length (state_t, states); i++)
{
state_t state = VEC_index (state_t, states, i);
{
if (compare_states_for_equiv (&prev, &state) != 0)
{
- VEC_safe_push (state_t,heap, *classes, prev);
+ VEC_safe_push (state_t, heap, *classes, prev);
class_num++;
prev = NULL;
}
prev = state;
}
if (prev)
- VEC_safe_push (state_t,heap, *classes, prev);
+ VEC_safe_push (state_t, heap, *classes, prev);
return class_num;
}
/* The function copies pointers to equivalent states from vla FROM
into vla TO. */
static void
-copy_equiv_class (VEC(state_t,heap) **to, VEC(state_t,heap) *from)
+copy_equiv_class (VEC(state_t, heap) **to, VEC(state_t, heap) *from)
{
- VEC_free (state_t,heap, *to);
- *to = VEC_copy (state_t,heap, from);
+ VEC_free (state_t, heap, *to);
+ *to = VEC_copy (state_t, heap, from);
}
/* The function processes equivalence class given by its first state,
partitioned, the function returns nonzero value. */
static int
partition_equiv_class (state_t first_state, int odd_iteration_flag,
- VEC(state_t,heap) **next_iteration_classes,
+ VEC(state_t, heap) **next_iteration_classes,
int *new_equiv_class_num_ptr)
{
state_t new_equiv_class;
curr_state = next_state)
{
next_state = curr_state->next_equiv_class_state;
- if (state_is_differed (curr_state, first_state,
+ if (state_is_differed (curr_state, first_state,
odd_iteration_flag))
{
/* Remove curr state from the class equivalence. */
clear_arc_insns_equiv_num (first_state);
}
if (new_equiv_class != NULL)
- VEC_safe_push (state_t,heap, *next_iteration_classes, new_equiv_class);
+ VEC_safe_push (state_t, heap, *next_iteration_classes, new_equiv_class);
first_state = new_equiv_class;
}
return partition_p;
/* The function finds equivalent states of AUTOMATON. */
static void
evaluate_equiv_classes (automaton_t automaton,
- VEC(state_t,heap) **equiv_classes)
+ VEC(state_t, heap) **equiv_classes)
{
int new_equiv_class_num;
int odd_iteration_flag;
int finish_flag;
- VEC (state_t,heap) *next_iteration_classes;
+ VEC (state_t, heap) *next_iteration_classes;
size_t i;
- all_achieved_states = VEC_alloc (state_t,heap, 1500);
+ all_achieved_states = VEC_alloc (state_t, heap, 1500);
pass_states (automaton, add_achieved_state);
pass_states (automaton, cache_presence);
- qsort (VEC_address (state_t, all_achieved_states),
- VEC_length (state_t, all_achieved_states),
- sizeof (state_t), compare_states_for_equiv);
+ VEC_qsort (state_t, all_achieved_states, compare_states_for_equiv);
odd_iteration_flag = 0;
new_equiv_class_num = init_equiv_class (all_achieved_states,
finish_flag = 0;
}
while (!finish_flag);
- VEC_free (state_t,heap, next_iteration_classes);
- VEC_free (state_t,heap, all_achieved_states);
+ VEC_free (state_t, heap, next_iteration_classes);
+ VEC_free (state_t, heap, all_achieved_states);
}
/* The function merges equivalent states of AUTOMATON. */
static void
-merge_states (automaton_t automaton, VEC(state_t,heap) *equiv_classes)
+merge_states (automaton_t automaton, VEC(state_t, heap) *equiv_classes)
{
state_t curr_state;
state_t new_state;
static void
minimize_DFA (automaton_t automaton)
{
- VEC(state_t,heap) *equiv_classes = 0;
+ VEC(state_t, heap) *equiv_classes = 0;
evaluate_equiv_classes (automaton, &equiv_classes);
merge_states (automaton, equiv_classes);
pass_states (automaton, set_new_cycle_flags);
- VEC_free (state_t,heap, equiv_classes);
+ VEC_free (state_t, heap, equiv_classes);
}
/* Values of two variables are counted number of states and arcs in an
/* The functions creates automaton insns for each automata. Automaton
insn is simply insn for given automaton which makes reservation
only of units of the automaton. */
-static ainsn_t
-create_ainsns (void)
+static void
+create_ainsns (automaton_t automaton)
{
decl_t decl;
ainsn_t first_ainsn;
first_ainsn = curr_ainsn;
else
prev_ainsn->next_ainsn = curr_ainsn;
+ if (decl == advance_cycle_insn_decl)
+ automaton->advance_ainsn = curr_ainsn;
+ else if (decl == collapse_ndfa_insn_decl)
+ automaton->collapse_ainsn = curr_ainsn;
prev_ainsn = curr_ainsn;
}
}
- return first_ainsn;
+ automaton->ainsn_list = first_ainsn;
}
/* The function assigns automata to units according to constructions
curr_automaton_num++, prev_automaton = curr_automaton)
{
curr_automaton = XCREATENODE (struct automaton);
- curr_automaton->ainsn_list = create_ainsns ();
+ create_ainsns (curr_automaton);
curr_automaton->corresponding_automaton_decl = NULL;
curr_automaton->next_automaton = NULL;
curr_automaton->automaton_order_num = curr_automaton_num;
&& DECL_AUTOMATON (decl)->automaton_is_used)
{
curr_automaton = XCREATENODE (struct automaton);
- curr_automaton->ainsn_list = create_ainsns ();
+ create_ainsns (curr_automaton);
curr_automaton->corresponding_automaton_decl
= DECL_AUTOMATON (decl);
curr_automaton->next_automaton = NULL;
if (curr_automaton_num == 0)
{
curr_automaton = XCREATENODE (struct automaton);
- curr_automaton->ainsn_list = create_ainsns ();
+ create_ainsns (curr_automaton);
curr_automaton->corresponding_automaton_decl = NULL;
curr_automaton->next_automaton = NULL;
description->first_automaton = curr_automaton;
const char *name = (regexp->mode == rm_unit
? REGEXP_UNIT (regexp)->name
: REGEXP_RESERV (regexp)->name);
-
+
obstack_grow (&irp, name, strlen (name));
break;
}
-
+
case rm_sequence:
for (i = 0; i < REGEXP_SEQUENCE (regexp)->regexps_num; i++)
{
}
obstack_1grow (&irp, ')');
break;
-
+
case rm_oneof:
for (i = 0; i < REGEXP_ONEOF (regexp)->regexps_num; i++)
{
obstack_1grow (&irp, ')');
}
break;
-
+
case rm_repeat:
{
char digits [30];
-
+
if (REGEXP_REPEAT (regexp)->regexp->mode == rm_sequence
|| REGEXP_REPEAT (regexp)->regexp->mode == rm_allof
|| REGEXP_REPEAT (regexp)->regexp->mode == rm_oneof)
output_chip_member_name (f, automaton);
}
-/* This is name of macro value which is code of pseudo_insn
- representing advancing cpu cycle. Its value is used as internal
- code unknown insn. */
+/* This is name of macro value which is code of pseudo_insns
+ representing advancing cpu cycle and collapsing the NDFA.
+ Its value is used as internal code unknown insn. */
#define ADVANCE_CYCLE_VALUE_NAME "DFA__ADVANCE_CYCLE"
+#define COLLAPSE_NDFA_VALUE_NAME "NDFA__COLLAPSE"
/* Output name of translate vector for given automaton. */
static void
int insn_value;
vla_hwint_t translate_vect;
- translate_vect = VEC_alloc (vect_el_t,heap, description->insns_num);
+ translate_vect = VEC_alloc (vect_el_t, heap, description->insns_num);
for (insn_value = 0; insn_value < description->insns_num; insn_value++)
/* Undefined value */
fprintf (output_file, "[] ATTRIBUTE_UNUSED = {\n");
output_vect (translate_vect);
fprintf (output_file, "};\n\n");
- VEC_free (vect_el_t,heap, translate_vect);
+ VEC_free (vect_el_t, heap, translate_vect);
}
/* The value in a table state x ainsn -> something which represents
static int
comb_vect_p (state_ainsn_table_t tab)
{
+ if (no_comb_flag)
+ return false;
return (2 * VEC_length (vect_el_t, tab->full_vect)
> 5 * VEC_length (vect_el_t, tab->comb_vect));
}
tab = XCREATENODE (struct state_ainsn_table);
tab->automaton = automaton;
- tab->comb_vect = VEC_alloc (vect_el_t,heap, 10000);
- tab->check_vect = VEC_alloc (vect_el_t,heap, 10000);
+ tab->comb_vect = VEC_alloc (vect_el_t, heap, 10000);
+ tab->check_vect = VEC_alloc (vect_el_t, heap, 10000);
tab->base_vect = 0;
- VEC_safe_grow (vect_el_t,heap, tab->base_vect,
+ VEC_safe_grow (vect_el_t, heap, tab->base_vect,
automaton->achieved_states_num);
full_vect_length = (automaton->insn_equiv_classes_num
* automaton->achieved_states_num);
- tab->full_vect = VEC_alloc (vect_el_t,heap, full_vect_length);
+ tab->full_vect = VEC_alloc (vect_el_t, heap, full_vect_length);
for (i = 0; i < full_vect_length; i++)
VEC_quick_push (vect_el_t, tab->full_vect, undefined_vect_el_value);
{
size_t full_base = tab->automaton->insn_equiv_classes_num * vect_num;
if (VEC_length (vect_el_t, tab->full_vect) < full_base + vect_length)
- VEC_safe_grow (vect_el_t,heap, tab->full_vect,
+ VEC_safe_grow (vect_el_t, heap, tab->full_vect,
full_base + vect_length);
for (i = 0; i < vect_length; i++)
VEC_replace (vect_el_t, tab->full_vect, full_base + i,
VEC_index (vect_el_t, vect, i));
}
+
+ /* The comb_vect min/max values are also used for the full vector, so
+ compute them now. */
+ for (vect_index = 0; vect_index < vect_length; vect_index++)
+ if (VEC_index (vect_el_t, vect, vect_index) != undefined_vect_el_value)
+ {
+ vect_el_t x = VEC_index (vect_el_t, vect, vect_index);
+ gcc_assert (x >= 0);
+ if (tab->max_comb_vect_el_value < x)
+ tab->max_comb_vect_el_value = x;
+ if (tab->min_comb_vect_el_value > x)
+ tab->min_comb_vect_el_value = x;
+ }
+ if (no_comb_flag)
+ return;
+
/* Form comb vector in the table: */
gcc_assert (VEC_length (vect_el_t, tab->comb_vect)
== VEC_length (vect_el_t, tab->check_vect));
no_state_value = tab->automaton->achieved_states_num;
while (additional_els_num > 0)
{
- VEC_safe_push (vect_el_t,heap, tab->comb_vect, vect_el);
- VEC_safe_push (vect_el_t,heap, tab->check_vect, no_state_value);
+ VEC_safe_push (vect_el_t, heap, tab->comb_vect, vect_el);
+ VEC_safe_push (vect_el_t, heap, tab->check_vect, no_state_value);
additional_els_num--;
}
gcc_assert (VEC_length (vect_el_t, tab->comb_vect)
comb_vect_index + vect_index)
== undefined_vect_el_value);
gcc_assert (x >= 0);
- if (tab->max_comb_vect_el_value < x)
- tab->max_comb_vect_el_value = x;
- if (tab->min_comb_vect_el_value > x)
- tab->min_comb_vect_el_value = x;
VEC_replace (vect_el_t, tab->comb_vect,
comb_vect_index + vect_index, x);
VEC_replace (vect_el_t, tab->check_vect,
for (vect_index = VEC_length (vect_el_t, *vect);
vect_index <= equiv_class_num;
vect_index++)
- VEC_safe_push (vect_el_t,heap, *vect, undefined_vect_el_value);
+ VEC_safe_push (vect_el_t, heap, *vect, undefined_vect_el_value);
VEC_replace (vect_el_t, *vect, equiv_class_num, el_value);
}
/* This is for forming vector of states of an automaton. */
-static VEC(state_t,heap) *output_states_vect;
+static VEC(state_t, heap) *output_states_vect;
/* The function is called by function pass_states. The function adds
STATE to `output_states_vect'. */
static void
add_states_vect_el (state_t state)
{
- VEC_safe_push (state_t,heap, output_states_vect, state);
+ VEC_safe_push (state_t, heap, output_states_vect, state);
}
/* Form and output vectors (comb, check, base or full vector)
from the state (state with the maximum num is the first). */
output_states_vect = 0;
pass_states (automaton, add_states_vect_el);
- qsort (VEC_address (state_t, output_states_vect),
- VEC_length (state_t, output_states_vect),
- sizeof (state_t), compare_transition_els_num);
+ VEC_qsort (state_t, output_states_vect, compare_transition_els_num);
for (i = 0; i < VEC_length (state_t, output_states_vect); i++)
{
output_trans_full_vect_name, output_trans_comb_vect_name,
output_trans_check_vect_name, output_trans_base_vect_name);
- VEC_free (state_t,heap, output_states_vect);
- VEC_free (vect_el_t,heap, transition_vect);
-}
-
-/* The current number of passing states to find minimal issue delay
- value for an ainsn and state. */
-static int curr_state_pass_num;
-
-/* This recursive function passes states to find minimal issue delay
- value for AINSN. The state being visited is STATE. The function
- returns minimal issue delay value for AINSN in STATE or -1 if we
- enter into a loop. */
-static int
-min_issue_delay_pass_states (state_t state, ainsn_t ainsn)
-{
- arc_t arc;
- int min_insn_issue_delay, insn_issue_delay;
-
- if (state->state_pass_num == curr_state_pass_num
- || state->min_insn_issue_delay != -1)
- /* We've entered into a loop or already have the correct value for
- given state and ainsn. */
- return state->min_insn_issue_delay;
- state->state_pass_num = curr_state_pass_num;
- min_insn_issue_delay = -1;
- for (arc = first_out_arc (state); arc != NULL; arc = next_out_arc (arc))
- if (arc->insn == ainsn)
- {
- min_insn_issue_delay = 0;
- break;
- }
- else
- {
- insn_issue_delay = min_issue_delay_pass_states (arc->to_state, ainsn);
- if (insn_issue_delay != -1)
- {
- if (arc->insn->insn_reserv_decl
- == DECL_INSN_RESERV (advance_cycle_insn_decl))
- insn_issue_delay++;
- if (min_insn_issue_delay == -1
- || min_insn_issue_delay > insn_issue_delay)
- {
- min_insn_issue_delay = insn_issue_delay;
- if (insn_issue_delay == 0)
- break;
- }
- }
- }
- return min_insn_issue_delay;
-}
-
-/* The function searches minimal issue delay value for AINSN in STATE.
- The function can return negative value if we can not issue AINSN. We
- will report about it later. */
-static int
-min_issue_delay (state_t state, ainsn_t ainsn)
-{
- curr_state_pass_num++;
- state->min_insn_issue_delay = min_issue_delay_pass_states (state, ainsn);
- return state->min_insn_issue_delay;
-}
-
-/* The function initiates code for finding minimal issue delay values.
- It should be called only once. */
-static void
-initiate_min_issue_delay_pass_states (void)
-{
- curr_state_pass_num = 0;
+ VEC_free (state_t, heap, output_states_vect);
+ VEC_free (vect_el_t, heap, transition_vect);
}
/* Form and output vectors representing minimal issue delay table of
{
vla_hwint_t min_issue_delay_vect;
vla_hwint_t compressed_min_issue_delay_vect;
- vect_el_t min_delay;
ainsn_t ainsn;
- size_t i, min_issue_delay_len;
- size_t compressed_min_issue_delay_len;
+ size_t i;
+ size_t min_issue_delay_len, compressed_min_issue_delay_len;
size_t cfactor;
+ int changed;
/* Create vect of pointers to states ordered by num of transitions
from the state (state with the maximum num is the first). */
min_issue_delay_len = (VEC_length (state_t, output_states_vect)
* automaton->insn_equiv_classes_num);
- min_issue_delay_vect = VEC_alloc (vect_el_t,heap, min_issue_delay_len);
+ min_issue_delay_vect = VEC_alloc (vect_el_t, heap, min_issue_delay_len);
for (i = 0; i < min_issue_delay_len; i++)
- VEC_quick_push (vect_el_t, min_issue_delay_vect, 0);
+ VEC_quick_push (vect_el_t, min_issue_delay_vect, -1);
automaton->max_min_delay = 0;
- for (ainsn = automaton->ainsn_list; ainsn != NULL; ainsn = ainsn->next_ainsn)
+
+ do
+ {
+ size_t state_no;
+
+ changed = 0;
+
+ for (state_no = 0; state_no < VEC_length (state_t, output_states_vect);
+ state_no++)
+ {
+ state_t s = VEC_index (state_t, output_states_vect, state_no);
+ arc_t arc;
+
+ for (arc = first_out_arc (s); arc; arc = next_out_arc (arc))
+ {
+ int k;
+
+ size_t asn = s->order_state_num
+ * automaton->insn_equiv_classes_num
+ + arc->insn->insn_equiv_class_num;
+
+ if (VEC_index (vect_el_t, min_issue_delay_vect, asn))
+ {
+ VEC_replace (vect_el_t, min_issue_delay_vect, asn, 0);
+ changed = 1;
+ }
+
+ for (k = 0; k < automaton->insn_equiv_classes_num; k++)
+ {
+ size_t n0, n1;
+ vect_el_t delay0, delay1;
+
+ n0 = s->order_state_num
+ * automaton->insn_equiv_classes_num
+ + k;
+ n1 = arc->to_state->order_state_num
+ * automaton->insn_equiv_classes_num
+ + k;
+ delay0 = VEC_index (vect_el_t, min_issue_delay_vect, n0);
+ delay1 = VEC_index (vect_el_t, min_issue_delay_vect, n1);
+ if (delay1 != -1)
+ {
+ if (arc->insn->insn_reserv_decl
+ == DECL_INSN_RESERV (advance_cycle_insn_decl))
+ delay1++;
+ if (delay1 < delay0 || delay0 == -1)
+ {
+ VEC_replace (vect_el_t, min_issue_delay_vect, n0, delay1);
+ changed = 1;
+ }
+ }
+ }
+ }
+ }
+ }
+ while (changed);
+
+ automaton->max_min_delay = 0;
+
+ for (ainsn = automaton->ainsn_list; ainsn; ainsn = ainsn->next_ainsn)
if (ainsn->first_ainsn_with_given_equivalence_num)
{
for (i = 0; i < VEC_length (state_t, output_states_vect); i++)
- VEC_index (state_t, output_states_vect, i)->min_insn_issue_delay = -1;
- for (i = 0; i < VEC_length (state_t, output_states_vect); i++)
{
state_t s = VEC_index (state_t, output_states_vect, i);
- min_delay = min_issue_delay (s, ainsn);
- if (automaton->max_min_delay < min_delay)
- automaton->max_min_delay = min_delay;
- VEC_replace (vect_el_t, min_issue_delay_vect,
- s->order_state_num
- * automaton->insn_equiv_classes_num
- + ainsn->insn_equiv_class_num,
- min_delay);
+ size_t np = s->order_state_num
+ * automaton->insn_equiv_classes_num
+ + ainsn->insn_equiv_class_num;
+ vect_el_t x = VEC_index (vect_el_t, min_issue_delay_vect, np);
+
+ if (automaton->max_min_delay < x)
+ automaton->max_min_delay = x;
+ if (x == -1)
+ VEC_replace (vect_el_t, min_issue_delay_vect, np, 0);
}
}
+
fprintf (output_file, "/* Vector of min issue delay of insns. */\n");
fprintf (output_file, "static const ");
output_range_type (output_file, 0, automaton->max_min_delay);
compressed_min_issue_delay_len = (min_issue_delay_len+cfactor-1) / cfactor;
compressed_min_issue_delay_vect
- = VEC_alloc (vect_el_t,heap, compressed_min_issue_delay_len);
+ = VEC_alloc (vect_el_t, heap, compressed_min_issue_delay_len);
for (i = 0; i < compressed_min_issue_delay_len; i++)
VEC_quick_push (vect_el_t, compressed_min_issue_delay_vect, 0);
}
output_vect (compressed_min_issue_delay_vect);
fprintf (output_file, "};\n\n");
- VEC_free (state_t,heap, output_states_vect);
- VEC_free (vect_el_t,heap, min_issue_delay_vect);
- VEC_free (vect_el_t,heap, compressed_min_issue_delay_vect);
+ VEC_free (state_t, heap, output_states_vect);
+ VEC_free (vect_el_t, heap, min_issue_delay_vect);
+ VEC_free (vect_el_t, heap, compressed_min_issue_delay_vect);
}
/* Form and output vector representing the locked states of
output_states_vect = 0;
pass_states (automaton, add_states_vect_el);
- VEC_safe_grow (vect_el_t,heap, dead_lock_vect,
+ VEC_safe_grow (vect_el_t, heap, dead_lock_vect,
VEC_length (state_t, output_states_vect));
for (i = 0; i < VEC_length (state_t, output_states_vect); i++)
{
fprintf (output_file, "[] = {\n");
output_vect (dead_lock_vect);
fprintf (output_file, "};\n\n");
- VEC_free (state_t,heap, output_states_vect);
- VEC_free (vect_el_t,heap, dead_lock_vect);
+ VEC_free (state_t, heap, output_states_vect);
+ VEC_free (vect_el_t, heap, dead_lock_vect);
}
/* Form and output vector representing reserved units of the states of
reserved_units_size = (VEC_length (state_t, output_states_vect)
* state_byte_size);
- reserved_units_table = VEC_alloc (vect_el_t,heap, reserved_units_size);
-
+ reserved_units_table = VEC_alloc (vect_el_t, heap, reserved_units_size);
+
for (i = 0; i < reserved_units_size; i++)
VEC_quick_push (vect_el_t, reserved_units_table, 0);
for (n = 0; n < VEC_length (state_t, output_states_vect); n++)
fprintf (output_file, "};\n#endif /* #if %s */\n\n",
CPU_UNITS_QUERY_MACRO_NAME);
- VEC_free (state_t,heap, output_states_vect);
- VEC_free (vect_el_t,heap, reserved_units_table);
+ VEC_free (state_t, heap, output_states_vect);
+ VEC_free (vect_el_t, heap, reserved_units_table);
}
/* The function outputs all tables representing DFA(s) used for fast
{
automaton_t automaton;
- initiate_min_issue_delay_pass_states ();
for (automaton = description->first_automaton;
automaton != NULL;
automaton = automaton->next_automaton)
}
fprintf (output_file, "\n#define %s %d\n\n", ADVANCE_CYCLE_VALUE_NAME,
DECL_INSN_RESERV (advance_cycle_insn_decl)->insn_num);
+ if (collapse_flag)
+ fprintf (output_file, "\n#define %s %d\n\n", COLLAPSE_NDFA_VALUE_NAME,
+ DECL_INSN_RESERV (collapse_ndfa_insn_decl)->insn_num);
}
/* The function outputs definition and value of PHR interface variable
{
fprintf (output_file, ") / %d];\n",
automaton->min_issue_delay_table_compression_factor);
- fprintf (output_file, " %s = (%s >> (8 - (",
+ fprintf (output_file, " %s = (%s >> (8 - ((",
TEMPORARY_VARIABLE_NAME, TEMPORARY_VARIABLE_NAME);
output_translate_vect_name (output_file, automaton);
+ fprintf (output_file, " [%s] + ", INTERNAL_INSN_CODE_NAME);
+ fprintf (output_file, "%s->", CHIP_PARAMETER_NAME);
+ output_chip_member_name (output_file, automaton);
+ fprintf (output_file, " * %d)", automaton->insn_equiv_classes_num);
fprintf
- (output_file, " [%s] %% %d + 1) * %d)) & %d;\n",
- INTERNAL_INSN_CODE_NAME,
+ (output_file, " %% %d + 1) * %d)) & %d;\n",
automaton->min_issue_delay_table_compression_factor,
8 / automaton->min_issue_delay_table_compression_factor,
(1 << (8 / automaton->min_issue_delay_table_compression_factor))
const char *insn_code_name,
int code)
{
- fprintf (output_file, "\n if (%s != 0)\n {\n", insn_name);
+ fprintf (output_file, "\n if (%s == 0)\n", insn_name);
+ fprintf (output_file, " %s = %s;\n\n",
+ insn_code_name, ADVANCE_CYCLE_VALUE_NAME);
+ if (collapse_flag)
+ {
+ fprintf (output_file, "\n else if (%s == const0_rtx)\n", insn_name);
+ fprintf (output_file, " %s = %s;\n\n",
+ insn_code_name, COLLAPSE_NDFA_VALUE_NAME);
+ }
+ fprintf (output_file, "\n else\n {\n");
fprintf (output_file, " %s = %s (%s);\n", insn_code_name,
DFA_INSN_CODE_FUNC_NAME, insn_name);
- fprintf (output_file, " if (%s > %s)\n return %d;\n",
+ fprintf (output_file, " if (%s > %s)\n return %d;\n }\n",
insn_code_name, ADVANCE_CYCLE_VALUE_NAME, code);
- fprintf (output_file, " }\n else\n %s = %s;\n\n",
- insn_code_name, ADVANCE_CYCLE_VALUE_NAME);
}
fprintf (output_file, "}\n\n");
}
-/* Output the array holding default latency values. These are used in
+/* Output the array holding default latency values. These are used in
insn_latency and maximal_insn_latency function implementations. */
static void
output_default_latencies (void)
fprintf (output_file, " static const %s default_latencies[] =\n {",
tabletype);
- for (i = 0, j = 0, col = 7; i < description->decls_num; i++)
- if (description->decls[i]->mode == dm_insn_reserv
- && description->decls[i] != advance_cycle_insn_decl)
+ for (i = 0, j = 0, col = 7; i < description->normal_decls_num; i++)
+ if (description->decls[i]->mode == dm_insn_reserv)
{
if ((col = (col+1) % 8) == 0)
fputs ("\n ", output_file);
fprintf (output_file, "% 4d,",
DECL_INSN_RESERV (decl)->default_latency);
}
- gcc_assert (j == DECL_INSN_RESERV (advance_cycle_insn_decl)->insn_num);
+ gcc_assert (j == description->insns_num - (collapse_flag ? 2 : 1));
fputs ("\n };\n", output_file);
}
(advance_cycle_insn_decl)->insn_num));
fprintf (output_file, " case %d:\n",
bypass->in_insn_reserv->insn_num);
- if (bypass->bypass_guard_name == NULL)
- fprintf (output_file, " return %d;\n",
- bypass->latency);
- else
+ for (;;)
{
- fprintf (output_file,
- " if (%s (%s, %s))\n",
- bypass->bypass_guard_name, INSN_PARAMETER_NAME,
- INSN2_PARAMETER_NAME);
- fprintf (output_file,
- " return %d;\n break;\n",
- bypass->latency);
+ if (bypass->bypass_guard_name == NULL)
+ {
+ gcc_assert (bypass->next == NULL
+ || (bypass->in_insn_reserv
+ != bypass->next->in_insn_reserv));
+ fprintf (output_file, " return %d;\n",
+ bypass->latency);
+ }
+ else
+ {
+ fprintf (output_file,
+ " if (%s (%s, %s))\n",
+ bypass->bypass_guard_name, INSN_PARAMETER_NAME,
+ INSN2_PARAMETER_NAME);
+ fprintf (output_file, " return %d;\n",
+ bypass->latency);
+ }
+ if (bypass->next == NULL
+ || bypass->in_insn_reserv != bypass->next->in_insn_reserv)
+ break;
+ bypass = bypass->next;
}
+ if (bypass->bypass_guard_name != NULL)
+ fprintf (output_file, " break;\n");
}
fputs (" }\n break;\n", output_file);
}
fputs (" static const char *const reservation_names[] =\n {",
output_file);
- for (i = 0, j = 0; i < description->decls_num; i++)
+ for (i = 0, j = 0; i < description->normal_decls_num; i++)
{
decl = description->decls [i];
- if (decl->mode == dm_insn_reserv && decl != advance_cycle_insn_decl)
+ if (decl->mode == dm_insn_reserv)
{
gcc_assert (j == DECL_INSN_RESERV (decl)->insn_num);
j++;
-
+
fprintf (output_file, "\n \"%s\",",
regexp_representation (DECL_INSN_RESERV (decl)->regexp));
finish_regexp_representation ();
}
}
- gcc_assert (j == DECL_INSN_RESERV (advance_cycle_insn_decl)->insn_num);
+ gcc_assert (j == description->insns_num - (collapse_flag ? 2 : 1));
fprintf (output_file, "\n \"%s\"\n };\n int %s;\n\n",
NOTHING_NAME, INTERNAL_INSN_CODE_NAME);
}
}
fprintf (output_description_file, "\n");
- for (i = 0; i < description->decls_num; i++)
+ for (i = 0; i < description->normal_decls_num; i++)
{
decl = description->decls [i];
if (decl->mode == dm_reserv)
output_regexp (DECL_RESERV (decl)->regexp);
fprintf (output_description_file, "\n");
}
- else if (decl->mode == dm_insn_reserv && decl != advance_cycle_insn_decl)
+ else if (decl->mode == dm_insn_reserv)
{
fprintf (output_description_file, "insn reservation %s ",
DECL_INSN_RESERV (decl)->name);
else if (decl->mode == dm_bypass)
fprintf (output_description_file, "bypass %d %s %s\n",
DECL_BYPASS (decl)->latency,
- DECL_BYPASS (decl)->out_insn_name,
- DECL_BYPASS (decl)->in_insn_name);
+ DECL_BYPASS (decl)->out_pattern,
+ DECL_BYPASS (decl)->in_pattern);
}
fprintf (output_description_file, "\n\f\n");
}
/* The following variable is used for forming array of all possible cpu unit
reservations described by the current DFA state. */
-static VEC(reserv_sets_t,heap) *state_reservs;
+static VEC(reserv_sets_t, heap) *state_reservs;
/* The function forms `state_reservs' for STATE. */
static void
curr_alt_state = curr_alt_state->next_sorted_alt_state)
add_state_reservs (curr_alt_state->state);
else
- VEC_safe_push (reserv_sets_t,heap, state_reservs, state->reservs);
+ VEC_safe_push (reserv_sets_t, heap, state_reservs, state->reservs);
}
/* The function outputs readable representation of all out arcs of
fprintf (output_description_file,
state->new_cycle_p ? " (new cycle)\n" : "\n");
add_state_reservs (state);
- qsort (VEC_address (reserv_sets_t, state_reservs),
- VEC_length (reserv_sets_t, state_reservs),
- sizeof (reserv_sets_t), state_reservs_cmp);
+ VEC_qsort (reserv_sets_t, state_reservs, state_reservs_cmp);
remove_state_duplicate_reservs ();
- for (i = 1; i < VEC_length (reserv_sets_t, state_reservs); i++)
+ for (i = 0; i < VEC_length (reserv_sets_t, state_reservs); i++)
{
fprintf (output_description_file, " ");
output_reserv_sets (output_description_file,
}
fprintf (output_description_file, "\n");
output_state_arcs (state);
- VEC_free (reserv_sets_t,heap, state_reservs);
+ VEC_free (reserv_sets_t, heap, state_reservs);
}
/* The following function output readable representation of
w_flag = 1;
else if (strcmp (argv [i], NDFA_OPTION) == 0)
ndfa_flag = 1;
+ else if (strcmp (argv [i], COLLAPSE_OPTION) == 0)
+ collapse_flag = 1;
else if (strcmp (argv [i], PROGRESS_OPTION) == 0)
progress_flag = 1;
else if (strcmp (argv [i], "-split") == 0)
for (ainsn = automaton->ainsn_list;
ainsn != NULL;
ainsn = ainsn->next_ainsn)
- if (ainsn->first_insn_with_same_reservs && !ainsn->arc_exists_p)
+ if (ainsn->first_insn_with_same_reservs && !ainsn->arc_exists_p
+ && ainsn != automaton->collapse_ainsn)
{
for (reserv_ainsn = ainsn;
reserv_ainsn != NULL;
automaton->corresponding_automaton_decl->name,
reserv_ainsn->insn_reserv_decl->name);
else
- warning
- (0, "Automaton `%s': Insn `%s' will never be issued",
- automaton->corresponding_automaton_decl->name,
- reserv_ainsn->insn_reserv_decl->name);
+ warning ("Automaton `%s': Insn `%s' will never be issued",
+ automaton->corresponding_automaton_decl->name,
+ reserv_ainsn->insn_reserv_decl->name);
}
else
{
error ("Insn `%s' will never be issued",
reserv_ainsn->insn_reserv_decl->name);
else
- warning (0, "Insn `%s' will never be issued",
+ warning ("Insn `%s' will never be issued",
reserv_ainsn->insn_reserv_decl->name);
}
}
/* The following vla is used for storing pointers to all achieved
states. */
-static VEC(state_t,heap) *automaton_states;
+static VEC(state_t, heap) *automaton_states;
/* This function is called by function pass_states to add an achieved
STATE. */
static void
add_automaton_state (state_t state)
{
- VEC_safe_push (state_t,heap, automaton_states, state);
+ VEC_safe_push (state_t, heap, automaton_states, state);
}
/* The following function forms list of important automata (whose
}
}
}
- VEC_free (state_t,heap, automaton_states);
+ VEC_free (state_t, heap, automaton_states);
/* Create automata sets for the insns. */
for (i = 0; i < description->decls_num; i++)
description = XCREATENODEVAR (struct description,
sizeof (struct description)
- /* One entry for cycle advancing insn. */
- + sizeof (decl_t) * VEC_length (decl_t, decls));
+ /* Two entries for special insns. */
+ + sizeof (decl_t) * (VEC_length (decl_t, decls) + 1));
description->decls_num = VEC_length (decl_t, decls);
+ description->normal_decls_num = description->decls_num;
description->query_units_num = 0;
for (i = 0; i < description->decls_num; i++)
{
progname = "genautomata";
- if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
+ if (!init_rtx_reader_args (argc, argv))
return (FATAL_EXIT_CODE);
initiate_automaton_gen (argc, argv);
if (have_error)
return FATAL_EXIT_CODE;
- puts ("/* Generated automatically by the program `genautomata'\n"
- " from the machine description file `md'. */\n\n"
- "#include \"config.h\"\n"
- "#include \"system.h\"\n"
- "#include \"coretypes.h\"\n"
- "#include \"tm.h\"\n"
- "#include \"rtl.h\"\n"
- "#include \"tm_p.h\"\n"
- "#include \"insn-config.h\"\n"
- "#include \"recog.h\"\n"
- "#include \"regs.h\"\n"
- "#include \"real.h\"\n"
- "#include \"output.h\"\n"
- "#include \"insn-attr.h\"\n"
- "#include \"toplev.h\"\n"
- "#include \"flags.h\"\n"
- "#include \"function.h\"\n");
-
if (VEC_length (decl_t, decls) > 0)
{
expand_automata ();
- write_automata ();
+ if (!have_error)
+ {
+ puts ("/* Generated automatically by the program `genautomata'\n"
+ " from the machine description file `md'. */\n\n"
+ "#include \"config.h\"\n"
+ "#include \"system.h\"\n"
+ "#include \"coretypes.h\"\n"
+ "#include \"tm.h\"\n"
+ "#include \"rtl.h\"\n"
+ "#include \"tm_p.h\"\n"
+ "#include \"insn-config.h\"\n"
+ "#include \"recog.h\"\n"
+ "#include \"regs.h\"\n"
+ "#include \"output.h\"\n"
+ "#include \"insn-attr.h\"\n"
+ "#include \"diagnostic-core.h\"\n"
+ "#include \"flags.h\"\n"
+ "#include \"function.h\"\n"
+ "#include \"emit-rtl.h\"\n");
+ /* FIXME: emit-rtl.h can go away once crtl is in rtl.h. */
+
+ write_automata ();
+ }
+ }
+ else
+ {
+ puts ("/* Generated automatically by the program `genautomata'\n"
+ " from the machine description file `md'. */\n\n"
+ "/* There is no automaton, but ISO C forbids empty\n"
+ " translation units, so include a header file with some\n"
+ " declarations, and its pre-requisite header file. */\n"
+ "#include \"config.h\"\n"
+ "#include \"system.h\"\n");
}
fflush (stdout);
- return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
+ return (ferror (stdout) != 0 || have_error
+ ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
}
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