#include "basic-block.h"
#include "output.h"
#include "function.h"
-#include "expr.h"
+#include "expr.h"
+#include "except.h"
#include "ggc.h"
#include "params.h"
+#include "cselib.h"
#include "obstack.h"
+
+/* We don't want to use xmalloc. */
+#undef obstack_chunk_alloc
#define obstack_chunk_alloc gmalloc
-#define obstack_chunk_free free
/* Propagate flow information through back edges and thus enable PRE's
moving loop invariant calculations out of loops.
#define REG_SET_TABLE_SLOP 100
/* This is a list of expressions which are MEMs and will be used by load
- or store motion.
+ or store motion.
Load motion tracks MEMs which aren't killed by
anything except itself. (ie, loads and stores to a single location).
- We can then allow movement of these MEM refs with a little special
+ We can then allow movement of these MEM refs with a little special
allowance. (all stores copy the same value to the reaching reg used
for the loads). This means all values used to store into memory must have
- no side effects so we can re-issue the setter value.
+ no side effects so we can re-issue the setter value.
Store Motion uses this structure as an expression table to track stores
which look interesting, and might be moveable towards the exit block. */
struct null_pointer_info
{
/* The basic block being processed. */
- int current_block;
+ basic_block current_block;
/* The first register to be handled in this pass. */
unsigned int min_reg;
/* One greater than the last register to be handled in this pass. */
static void find_used_regs PARAMS ((rtx *, void *));
static int try_replace_reg PARAMS ((rtx, rtx, rtx));
static struct expr *find_avail_set PARAMS ((int, rtx));
-static int cprop_jump PARAMS ((basic_block, rtx, rtx, rtx));
-#ifdef HAVE_cc0
-static int cprop_cc0_jump PARAMS ((basic_block, rtx, struct reg_use *, rtx));
-#endif
+static int cprop_jump PARAMS ((basic_block, rtx, rtx, rtx, rtx));
static void mems_conflict_for_gcse_p PARAMS ((rtx, rtx, void *));
static int load_killed_in_block_p PARAMS ((basic_block, int, rtx, int));
static void canon_list_insert PARAMS ((rtx, rtx, void *));
-static int cprop_insn PARAMS ((basic_block, rtx, int));
+static int cprop_insn PARAMS ((rtx, int));
static int cprop PARAMS ((int));
static int one_cprop_pass PARAMS ((int, int));
+static bool constprop_register PARAMS ((rtx, rtx, rtx, int));
+static struct expr *find_bypass_set PARAMS ((int, int));
+static int bypass_block PARAMS ((basic_block, rtx, rtx));
+static int bypass_conditional_jumps PARAMS ((void));
static void alloc_pre_mem PARAMS ((int, int));
static void free_pre_mem PARAMS ((void));
static void compute_pre_data PARAMS ((void));
-static int pre_expr_reaches_here_p PARAMS ((basic_block, struct expr *,
+static int pre_expr_reaches_here_p PARAMS ((basic_block, struct expr *,
basic_block));
static void insert_insn_end_bb PARAMS ((struct expr *, basic_block, int));
static void pre_insert_copy_insn PARAMS ((struct expr *, rtx));
static void free_code_hoist_mem PARAMS ((void));
static void compute_code_hoist_vbeinout PARAMS ((void));
static void compute_code_hoist_data PARAMS ((void));
-static int hoist_expr_reaches_here_p PARAMS ((basic_block, int, basic_block,
+static int hoist_expr_reaches_here_p PARAMS ((basic_block, int, basic_block,
char *));
static void hoist_code PARAMS ((void));
static int one_code_hoisting_pass PARAMS ((void));
static int classic_gcse PARAMS ((void));
static int one_classic_gcse_pass PARAMS ((int));
static void invalidate_nonnull_info PARAMS ((rtx, rtx, void *));
-static void delete_null_pointer_checks_1 PARAMS ((unsigned int *,
+static int delete_null_pointer_checks_1 PARAMS ((unsigned int *,
sbitmap *, sbitmap *,
struct null_pointer_info *));
static rtx process_insert_insn PARAMS ((struct expr *));
static inline struct ls_expr * next_ls_expr PARAMS ((struct ls_expr *));
static int simple_mem PARAMS ((rtx));
static void invalidate_any_buried_refs PARAMS ((rtx));
-static void compute_ld_motion_mems PARAMS ((void));
+static void compute_ld_motion_mems PARAMS ((void));
static void trim_ld_motion_mems PARAMS ((void));
static void update_ld_motion_stores PARAMS ((struct expr *));
static void reg_set_info PARAMS ((rtx, rtx, void *));
static void insert_insn_start_bb PARAMS ((rtx, basic_block));
static int insert_store PARAMS ((struct ls_expr *, edge));
static void replace_store_insn PARAMS ((rtx, rtx, basic_block));
-static void delete_store PARAMS ((struct ls_expr *,
+static void delete_store PARAMS ((struct ls_expr *,
basic_block));
static void free_store_memory PARAMS ((void));
static void store_motion PARAMS ((void));
+static void free_insn_expr_list_list PARAMS ((rtx *));
static void clear_modify_mem_tables PARAMS ((void));
static void free_modify_mem_tables PARAMS ((void));
+static rtx gcse_emit_move_after PARAMS ((rtx, rtx, rtx));
+static bool do_local_cprop PARAMS ((rtx, rtx, int));
+static void local_cprop_pass PARAMS ((int));
\f
/* Entry point for global common subexpression elimination.
F is the first instruction in the function. */
setjmp, so just punt to be safe. */
if (current_function_calls_setjmp)
return 0;
-
+
/* Assume that we do not need to run jump optimizations after gcse. */
run_jump_opt_after_gcse = 0;
/* If allocating memory for the cprop bitmap would take up too much
storage it's better just to disable the optimization. */
- if ((n_basic_blocks
+ if ((n_basic_blocks
* SBITMAP_SET_SIZE (max_gcse_regno)
* sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
{
if (optimize_size)
changed |= one_classic_gcse_pass (pass + 1);
else
- {
+ {
changed |= one_pre_gcse_pass (pass + 1);
/* We may have just created new basic blocks. Release and
recompute various things which are sized on the number of
{
free_modify_mem_tables ();
modify_mem_list
- = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx));
+ = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
canon_modify_mem_list
- = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx));
- memset ((char *) modify_mem_list, 0, n_basic_blocks * sizeof (rtx));
- memset ((char *) canon_modify_mem_list, 0, n_basic_blocks * sizeof (rtx));
+ = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
+ memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
+ memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
orig_bb_count = n_basic_blocks;
}
free_reg_set_mem ();
for space, we use a classic gcse algorithm instead of partial
redundancy algorithms). */
if (optimize_size)
- {
+ {
max_gcse_regno = max_reg_num ();
alloc_gcse_mem (f);
changed |= one_code_hoisting_pass ();
if (max_pass_bytes < bytes_used)
max_pass_bytes = bytes_used;
- }
+ }
if (file)
{
end_alias_analysis ();
allocate_reg_info (max_reg_num (), FALSE, FALSE);
- if (!optimize_size && flag_gcse_sm)
+ /* Store motion disabled until it is fixed. */
+ if (0 && !optimize_size && flag_gcse_sm)
store_motion ();
/* Record where pseudo-registers are set. */
return run_jump_opt_after_gcse;
reg_set_bitmap = BITMAP_XMALLOC ();
/* Allocate vars to track sets of regs, memory per block. */
- reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks,
+ reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
max_gcse_regno);
/* Allocate array to keep a list of insns which modify memory in each
basic block. */
- modify_mem_list = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx));
- canon_modify_mem_list = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx));
- memset ((char *) modify_mem_list, 0, n_basic_blocks * sizeof (rtx));
- memset ((char *) canon_modify_mem_list, 0, n_basic_blocks * sizeof (rtx));
+ modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
+ canon_modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
+ memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
+ memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
modify_mem_list_set = BITMAP_XMALLOC ();
canon_modify_mem_list_set = BITMAP_XMALLOC ();
}
the expr hash table; if nonzero this routine looks at the set hash table.
Additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
ABSALTERED. */
-
+
static void
compute_local_properties (transp, comp, antloc, setp)
sbitmap *transp;
{
unsigned int i, hash_table_size;
struct expr **hash_table;
-
+
/* Initialize any bitmaps that were passed in. */
if (transp)
{
if (setp)
- sbitmap_vector_zero (transp, n_basic_blocks);
+ sbitmap_vector_zero (transp, last_basic_block);
else
- sbitmap_vector_ones (transp, n_basic_blocks);
+ sbitmap_vector_ones (transp, last_basic_block);
}
if (comp)
- sbitmap_vector_zero (comp, n_basic_blocks);
+ sbitmap_vector_zero (comp, last_basic_block);
if (antloc)
- sbitmap_vector_zero (antloc, n_basic_blocks);
+ sbitmap_vector_zero (antloc, last_basic_block);
/* We use the same code for cprop, pre and hoisting. For cprop
we care about the set hash table, for pre and hoisting we
struct reg_avail_info
{
- int last_bb;
+ basic_block last_bb;
int first_set;
int last_set;
};
static struct reg_avail_info *reg_avail_info;
-static int current_bb;
+static basic_block current_bb;
/* See whether X, the source of a set, is something we want to consider for
GCSE. */
+static GTY(()) rtx test_insn;
static int
want_to_gcse_p (x)
rtx x;
{
- static rtx test_insn = 0;
int num_clobbers = 0;
int icode;
FIRST_PSEUDO_REGISTER * 2),
const0_rtx));
NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
- ggc_add_rtx_root (&test_insn, 1);
}
/* Now make an insn like the one we would make when GCSE'ing and see if
if (info->last_bb != current_bb)
return 1;
- if (avail_p)
+ if (avail_p)
return info->last_set < INSN_CUID (insn);
else
return info->first_set >= INSN_CUID (insn);
}
case MEM:
- if (load_killed_in_block_p (BASIC_BLOCK (current_bb), INSN_CUID (insn),
+ if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
x, avail_p))
return 0;
else
return;
/* If we are setting a MEM in our list of specially recognized MEMs,
- don't mark as killed this time. */
-
+ don't mark as killed this time. */
+
if (dest == gcse_mem_operand && pre_ldst_mems != NULL)
{
if (!find_rtx_in_ldst (dest))
return 1;
/* SETTER must be an INSN of some kind that sets memory. Call
- note_stores to examine each hunk of memory that is modified.
+ note_stores to examine each hunk of memory that is modified.
The note_stores interface is pretty limited, so we have to
communicate via global variables. Yuk. */
{
unsigned hash = 0;
const unsigned char *p = (const unsigned char *) ps;
-
+
if (p)
while (*p)
hash += *p++;
}
hash += (unsigned int) MEM;
- hash += MEM_ALIAS_SET (x);
+ /* We used alias set for hashing, but this is not good, since the alias
+ set may differ in -fprofile-arcs and -fbranch-probabilities compilation
+ causing the profiles to fail to match. */
x = XEXP (x, 0);
goto repeat;
/* Add EXPR to end of this hash chain. */
last_expr->next_same_hash = cur_expr;
- /* Set the fields of the expr element. */
+ /* Set the fields of the expr element. */
cur_expr->expr = x;
cur_expr->bitmap_index = n_exprs++;
cur_expr->next_same_hash = NULL;
unsigned int *hash_val;
struct expr *expr;
- flat_table
+ flat_table
= (struct expr **) xcalloc (total_size, sizeof (struct expr *));
hash_val = (unsigned int *) xmalloc (total_size * sizeof (unsigned int));
{
info->last_bb = current_bb;
info->first_set = cuid;
- SET_BIT (reg_set_in_block[current_bb], regno);
+ SET_BIT (reg_set_in_block[current_bb->index], regno);
}
}
Note we store a pair of elements in the list, so they have to be
taken off pairwise. */
-static void
+static void
canon_list_insert (dest, unused1, v_insn)
rtx dest ATTRIBUTE_UNUSED;
rtx unused1 ATTRIBUTE_UNUSED;
void * v_insn;
{
rtx dest_addr, insn;
+ int bb;
while (GET_CODE (dest) == SUBREG
|| GET_CODE (dest) == ZERO_EXTRACT
dest_addr = get_addr (XEXP (dest, 0));
dest_addr = canon_rtx (dest_addr);
- insn = (rtx) v_insn;
+ insn = (rtx) v_insn;
+ bb = BLOCK_NUM (insn);
- canon_modify_mem_list[BLOCK_NUM (insn)] =
- alloc_INSN_LIST (dest_addr, canon_modify_mem_list[BLOCK_NUM (insn)]);
- canon_modify_mem_list[BLOCK_NUM (insn)] =
- alloc_INSN_LIST (dest, canon_modify_mem_list[BLOCK_NUM (insn)]);
- bitmap_set_bit (canon_modify_mem_list_set, BLOCK_NUM (insn));
+ canon_modify_mem_list[bb] =
+ alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
+ canon_modify_mem_list[bb] =
+ alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
+ bitmap_set_bit (canon_modify_mem_list_set, bb);
}
/* Record memory modification information for INSN. We do not actually care
record_last_mem_set_info (insn)
rtx insn;
{
+ int bb = BLOCK_NUM (insn);
+
/* load_killed_in_block_p will handle the case of calls clobbering
everything. */
- modify_mem_list[BLOCK_NUM (insn)] =
- alloc_INSN_LIST (insn, modify_mem_list[BLOCK_NUM (insn)]);
- bitmap_set_bit (modify_mem_list_set, BLOCK_NUM (insn));
+ modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
+ bitmap_set_bit (modify_mem_list_set, bb);
if (GET_CODE (insn) == CALL_INSN)
{
/* Note that traversals of this loop (other than for free-ing)
will break after encountering a CALL_INSN. So, there's no
need to insert a pair of items, as canon_list_insert does. */
- canon_modify_mem_list[BLOCK_NUM (insn)] =
- alloc_INSN_LIST (insn, canon_modify_mem_list[BLOCK_NUM (insn)]);
- bitmap_set_bit (canon_modify_mem_list_set, BLOCK_NUM (insn));
+ canon_modify_mem_list[bb] =
+ alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
+ bitmap_set_bit (canon_modify_mem_list_set, bb);
}
else
- note_stores (PATTERN (insn), canon_list_insert, (void*) insn );
+ note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
}
/* Called from compute_hash_table via note_stores to handle one
registers are set in which blocks.
??? This isn't needed during const/copy propagation, but it's cheap to
compute. Later. */
- sbitmap_vector_zero (reg_set_in_block, n_basic_blocks);
+ sbitmap_vector_zero (reg_set_in_block, last_basic_block);
/* re-Cache any INSN_LIST nodes we have allocated. */
clear_modify_mem_tables ();
gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
for (i = 0; i < max_gcse_regno; ++i)
- reg_avail_info[i].last_bb = NEVER_SET;
+ reg_avail_info[i].last_bb = NULL;
- for (current_bb = 0; current_bb < n_basic_blocks; current_bb++)
+ FOR_EACH_BB (current_bb)
{
rtx insn;
unsigned int regno;
??? hard-reg reg_set_in_block computation
could be moved to compute_sets since they currently don't change. */
- for (insn = BLOCK_HEAD (current_bb);
- insn && insn != NEXT_INSN (BLOCK_END (current_bb));
+ for (insn = current_bb->head;
+ insn && insn != NEXT_INSN (current_bb->end);
insn = NEXT_INSN (insn))
{
if (! INSN_P (insn))
if (GET_CODE (insn) == CALL_INSN)
{
bool clobbers_all = false;
-#ifdef NON_SAVING_SETJMP
+#ifdef NON_SAVING_SETJMP
if (NON_SAVING_SETJMP
&& find_reg_note (insn, REG_SETJMP, NULL_RTX))
clobbers_all = true;
/* The next pass builds the hash table. */
- for (insn = BLOCK_HEAD (current_bb), in_libcall_block = 0;
- insn && insn != NEXT_INSN (BLOCK_END (current_bb));
+ for (insn = current_bb->head, in_libcall_block = 0;
+ insn && insn != NEXT_INSN (current_bb->end);
insn = NEXT_INSN (insn))
if (INSN_P (insn))
{
if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
- in_libcall_block = 1;
- else if (set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
- in_libcall_block = 0;
- hash_scan_insn (insn, set_p, in_libcall_block);
- if (!set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
- in_libcall_block = 0;
+ in_libcall_block = 1;
+ else if (set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
+ in_libcall_block = 0;
+ hash_scan_insn (insn, set_p, in_libcall_block);
+ if (!set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
+ in_libcall_block = 0;
}
}
return expr;
}
+/* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
+ types may be mixed. */
+
+static void
+free_insn_expr_list_list (listp)
+ rtx *listp;
+{
+ rtx list, next;
+
+ for (list = *listp; list ; list = next)
+ {
+ next = XEXP (list, 1);
+ if (GET_CODE (list) == EXPR_LIST)
+ free_EXPR_LIST_node (list);
+ else
+ free_INSN_LIST_node (list);
+ }
+
+ *listp = NULL;
+}
+
/* Clear canon_modify_mem_list and modify_mem_list tables. */
static void
clear_modify_mem_tables ()
int i;
EXECUTE_IF_SET_IN_BITMAP
- (canon_modify_mem_list_set, 0, i,
- free_INSN_LIST_list (modify_mem_list + i));
- bitmap_clear (canon_modify_mem_list_set);
+ (modify_mem_list_set, 0, i, free_INSN_LIST_list (modify_mem_list + i));
+ bitmap_clear (modify_mem_list_set);
EXECUTE_IF_SET_IN_BITMAP
(canon_modify_mem_list_set, 0, i,
- free_INSN_LIST_list (canon_modify_mem_list + i));
- bitmap_clear (modify_mem_list_set);
+ free_insn_expr_list_list (canon_modify_mem_list + i));
+ bitmap_clear (canon_modify_mem_list_set);
}
/* Release memory used by modify_mem_list_set and canon_modify_mem_list_set. */
return 1;
case MEM:
- if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
+ if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
INSN_CUID (insn), x, 0))
return 0;
else
int n_blocks, n_insns;
{
rd_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
- sbitmap_vector_zero (rd_kill, n_basic_blocks);
+ sbitmap_vector_zero (rd_kill, n_blocks);
rd_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
- sbitmap_vector_zero (rd_gen, n_basic_blocks);
+ sbitmap_vector_zero (rd_gen, n_blocks);
reaching_defs = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
- sbitmap_vector_zero (reaching_defs, n_basic_blocks);
+ sbitmap_vector_zero (reaching_defs, n_blocks);
rd_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
- sbitmap_vector_zero (rd_out, n_basic_blocks);
+ sbitmap_vector_zero (rd_out, n_blocks);
}
/* Free reaching def variables. */
static void
compute_kill_rd ()
{
- int bb, cuid;
+ int cuid;
unsigned int regno;
int i;
+ basic_block bb;
/* For each block
For each set bit in `gen' of the block (i.e each insn which
For each setting of regx in the linked list, which is not in
this block
Set the bit in `kill' corresponding to that insn. */
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
for (cuid = 0; cuid < max_cuid; cuid++)
- if (TEST_BIT (rd_gen[bb], cuid))
+ if (TEST_BIT (rd_gen[bb->index], cuid))
{
rtx insn = CUID_INSN (cuid);
rtx pat = PATTERN (insn);
{
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
- handle_rd_kill_set (insn, regno, BASIC_BLOCK (bb));
+ handle_rd_kill_set (insn, regno, bb);
}
if (GET_CODE (pat) == PARALLEL)
&& GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == REG)
handle_rd_kill_set (insn,
REGNO (XEXP (XVECEXP (pat, 0, i), 0)),
- BASIC_BLOCK (bb));
+ bb);
}
}
else if (GET_CODE (pat) == SET && GET_CODE (SET_DEST (pat)) == REG)
/* Each setting of this register outside of this block
must be marked in the set of kills in this block. */
- handle_rd_kill_set (insn, REGNO (SET_DEST (pat)), BASIC_BLOCK (bb));
+ handle_rd_kill_set (insn, REGNO (SET_DEST (pat)), bb);
}
}
-/* Compute the reaching definitions as in
+/* Compute the reaching definitions as in
Compilers Principles, Techniques, and Tools. Aho, Sethi, Ullman,
Chapter 10. It is the same algorithm as used for computing available
expressions but applied to the gens and kills of reaching definitions. */
static void
compute_rd ()
{
- int bb, changed, passes;
+ int changed, passes;
+ basic_block bb;
- for (bb = 0; bb < n_basic_blocks; bb++)
- sbitmap_copy (rd_out[bb] /*dst*/, rd_gen[bb] /*src*/);
+ FOR_EACH_BB (bb)
+ sbitmap_copy (rd_out[bb->index] /*dst*/, rd_gen[bb->index] /*src*/);
passes = 0;
changed = 1;
while (changed)
{
changed = 0;
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
{
- sbitmap_union_of_preds (reaching_defs[bb], rd_out, bb);
- changed |= sbitmap_union_of_diff (rd_out[bb], rd_gen[bb],
- reaching_defs[bb], rd_kill[bb]);
+ sbitmap_union_of_preds (reaching_defs[bb->index], rd_out, bb->index);
+ changed |= sbitmap_union_of_diff_cg (rd_out[bb->index], rd_gen[bb->index],
+ reaching_defs[bb->index], rd_kill[bb->index]);
}
passes++;
}
int n_blocks, n_exprs;
{
ae_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
- sbitmap_vector_zero (ae_kill, n_basic_blocks);
+ sbitmap_vector_zero (ae_kill, n_blocks);
ae_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
- sbitmap_vector_zero (ae_gen, n_basic_blocks);
+ sbitmap_vector_zero (ae_gen, n_blocks);
ae_in = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
- sbitmap_vector_zero (ae_in, n_basic_blocks);
+ sbitmap_vector_zero (ae_in, n_blocks);
ae_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
- sbitmap_vector_zero (ae_out, n_basic_blocks);
+ sbitmap_vector_zero (ae_out, n_blocks);
}
static void
compute_ae_kill (ae_gen, ae_kill)
sbitmap *ae_gen, *ae_kill;
{
- int bb;
+ basic_block bb;
unsigned int i;
struct expr *expr;
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
for (i = 0; i < expr_hash_table_size; i++)
for (expr = expr_hash_table[i]; expr; expr = expr->next_same_hash)
{
/* Skip EXPR if generated in this block. */
- if (TEST_BIT (ae_gen[bb], expr->bitmap_index))
+ if (TEST_BIT (ae_gen[bb->index], expr->bitmap_index))
continue;
- if (expr_killed_p (expr->expr, BASIC_BLOCK (bb)))
- SET_BIT (ae_kill[bb], expr->bitmap_index);
+ if (expr_killed_p (expr->expr, bb))
+ SET_BIT (ae_kill[bb->index], expr->bitmap_index);
}
}
\f
else
{
visited[pred_bb->index] = 1;
- if (expr_reaches_here_p_work (occr, expr, pred_bb, check_self_loop,
+ if (expr_reaches_here_p_work (occr, expr, pred_bb, check_self_loop,
visited))
return 1;
int check_self_loop;
{
int rval;
- char *visited = (char *) xcalloc (n_basic_blocks, 1);
+ char *visited = (char *) xcalloc (last_basic_block, 1);
rval = expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited);
-
+
free (visited);
return rval;
}
basic_block bb = BLOCK_FOR_INSN (insn);
if (expr->avail_occr->next == NULL)
- {
+ {
if (BLOCK_FOR_INSN (expr->avail_occr->insn) == bb)
/* The available expression is actually itself
(i.e. a loop in the flow graph) so do nothing. */
else
{
/* Pattern is computed more than once.
- Search backwards from this insn to see how many of these
+ Search backwards from this insn to see how many of these
computations actually reach this insn. */
struct occr *occr;
rtx insn_computes_expr = NULL;
return 0;
}
- *addr_this_reg = this_reg;
+ *addr_this_reg = this_reg;
}
return number_of_reaching_defs;
REGNO (SET_DEST (PATTERN (NEXT_INSN
(insn_computes_expr)))));
fprintf (gcse_file, "set in insn %d\n",
- INSN_UID (insn_computes_expr));
+ INSN_UID (insn_computes_expr));
}
}
}
static int
classic_gcse ()
{
- int bb, changed;
+ int changed;
rtx insn;
+ basic_block bb;
/* Note we start at block 1. */
+ if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
+ return 0;
+
changed = 0;
- for (bb = 1; bb < n_basic_blocks; bb++)
+ FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
{
/* Reset tables used to keep track of what's still valid [since the
start of the block]. */
reset_opr_set_tables ();
- for (insn = BLOCK_HEAD (bb);
- insn != NULL && insn != NEXT_INSN (BLOCK_END (bb));
+ for (insn = bb->head;
+ insn != NULL && insn != NEXT_INSN (bb->end);
insn = NEXT_INSN (insn))
{
/* Is insn of form (set (pseudo-reg) ...)? */
&& ((expr = lookup_expr (src)) != NULL)
/* Is the expression available [at the start of the
block]? */
- && TEST_BIT (ae_in[bb], expr->bitmap_index)
+ && TEST_BIT (ae_in[bb->index], expr->bitmap_index)
/* Are the operands unchanged since the start of the
block? */
&& oprs_not_set_p (src, insn))
gcse_create_count = 0;
alloc_expr_hash_table (max_cuid);
- alloc_rd_mem (n_basic_blocks, max_cuid);
+ alloc_rd_mem (last_basic_block, max_cuid);
compute_expr_hash_table ();
if (gcse_file)
dump_hash_table (gcse_file, "Expression", expr_hash_table,
{
compute_kill_rd ();
compute_rd ();
- alloc_avail_expr_mem (n_basic_blocks, n_exprs);
+ alloc_avail_expr_mem (last_basic_block, n_exprs);
compute_ae_gen ();
compute_ae_kill (ae_gen, ae_kill);
compute_available (ae_gen, ae_kill, ae_out, ae_in);
sbitmap *bmap;
int set_p;
{
- int bb, i, j;
+ int i, j;
+ basic_block bb;
enum rtx_code code;
reg_set *r;
const char *fmt;
{
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
{
- for (bb = 0; bb < n_basic_blocks; bb++)
- if (TEST_BIT (reg_set_in_block[bb], REGNO (x)))
- SET_BIT (bmap[bb], indx);
+ FOR_EACH_BB (bb)
+ if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
+ SET_BIT (bmap[bb->index], indx);
}
else
{
{
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
{
- for (bb = 0; bb < n_basic_blocks; bb++)
- if (TEST_BIT (reg_set_in_block[bb], REGNO (x)))
- RESET_BIT (bmap[bb], indx);
+ FOR_EACH_BB (bb)
+ if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
+ RESET_BIT (bmap[bb->index], indx);
}
else
{
return;
case MEM:
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
{
- rtx list_entry = canon_modify_mem_list[bb];
+ rtx list_entry = canon_modify_mem_list[bb->index];
while (list_entry)
{
if (GET_CODE (XEXP (list_entry, 0)) == CALL_INSN)
{
if (set_p)
- SET_BIT (bmap[bb], indx);
+ SET_BIT (bmap[bb->index], indx);
else
- RESET_BIT (bmap[bb], indx);
+ RESET_BIT (bmap[bb->index], indx);
break;
}
/* LIST_ENTRY must be an INSN of some kind that sets memory.
dest = XEXP (list_entry, 0);
list_entry = XEXP (list_entry, 1);
dest_addr = XEXP (list_entry, 0);
-
+
if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
x, rtx_addr_varies_p))
{
if (set_p)
- SET_BIT (bmap[bb], indx);
+ SET_BIT (bmap[bb->index], indx);
else
- RESET_BIT (bmap[bb], indx);
+ RESET_BIT (bmap[bb->index], indx);
break;
}
list_entry = XEXP (list_entry, 1);
int success = 0;
rtx set = single_set (insn);
- success = validate_replace_src (from, to, insn);
+ validate_replace_src_group (from, to, insn);
+ if (num_changes_pending () && apply_change_group ())
+ success = 1;
- /* If above failed and this is a single set, try to simplify the source of
- the set given our substitution. We could perhaps try this for multiple
- SETs, but it probably won't buy us anything. */
- if (!success && set != 0)
+ if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
{
+ /* If above failed and this is a single set, try to simplify the source of
+ the set given our substitution. We could perhaps try this for multiple
+ SETs, but it probably won't buy us anything. */
src = simplify_replace_rtx (SET_SRC (set), from, to);
if (!rtx_equal_p (src, SET_SRC (set))
&& validate_change (insn, &SET_SRC (set), src, 0))
success = 1;
- }
- /* If we've failed to do replacement, have a single SET, and don't already
- have a note, add a REG_EQUAL note to not lose information. */
- if (!success && note == 0 && set != 0)
- note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
+ /* If we've failed to do replacement, have a single SET, and don't already
+ have a note, add a REG_EQUAL note to not lose information. */
+ if (!success && note == 0 && set != 0)
+ note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
+ }
/* If there is already a NOTE, update the expression in it with our
replacement. */
/* SET1 contains the last set found that can be returned to the caller for
use in a substitution. */
struct expr *set1 = 0;
-
+
/* Loops are not possible here. To get a loop we would need two sets
available at the start of the block containing INSN. ie we would
need two sets like this available at the start of the block:
/* If no available set was found we've reached the end of the
(possibly empty) copy chain. */
if (set == 0)
- break;
+ break;
if (GET_CODE (set->expr) != SET)
abort ();
/* We know the set is available.
Now check that SRC is ANTLOC (i.e. none of the source operands
- have changed since the start of the block).
+ have changed since the start of the block).
If the source operand changed, we may still use it for the next
iteration of this loop, but we may not use it for substitutions. */
}
/* Subroutine of cprop_insn that tries to propagate constants into
- JUMP_INSNS. INSN must be a conditional jump. FROM is what we will try to
- replace, SRC is the constant we will try to substitute for it. Returns
- nonzero if a change was made. We know INSN has just a SET. */
+ JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
+ it is the instruction that immediately preceeds JUMP, and must be a
+ single SET of a register. FROM is what we will try to replace,
+ SRC is the constant we will try to substitute for it. Returns nonzero
+ if a change was made. */
static int
-cprop_jump (bb, insn, from, src)
- rtx insn;
+cprop_jump (bb, setcc, jump, from, src)
+ basic_block bb;
+ rtx setcc;
+ rtx jump;
rtx from;
rtx src;
- basic_block bb;
{
- rtx set = PATTERN (insn);
- rtx new = simplify_replace_rtx (SET_SRC (set), from, src);
+ rtx new, new_set;
+ rtx set = pc_set (jump);
+
+ /* First substitute in the INSN condition as the SET_SRC of the JUMP,
+ then substitute that given values in this expanded JUMP. */
+ if (setcc != NULL)
+ {
+ rtx setcc_set = single_set (setcc);
+ new_set = simplify_replace_rtx (SET_SRC (set),
+ SET_DEST (setcc_set),
+ SET_SRC (setcc_set));
+ }
+ else
+ new_set = set;
+
+ new = simplify_replace_rtx (new_set, from, src);
/* If no simplification can be made, then try the next
register. */
- if (rtx_equal_p (new, SET_SRC (set)))
+ if (rtx_equal_p (new, new_set))
return 0;
-
+
/* If this is now a no-op delete it, otherwise this must be a valid insn. */
if (new == pc_rtx)
- delete_insn (insn);
+ delete_insn (jump);
else
{
- if (! validate_change (insn, &SET_SRC (set), new, 0))
+ if (! validate_change (jump, &SET_SRC (set), new, 0))
return 0;
/* If this has turned into an unconditional jump,
then put a barrier after it so that the unreachable
code will be deleted. */
if (GET_CODE (SET_SRC (set)) == LABEL_REF)
- emit_barrier_after (insn);
+ emit_barrier_after (jump);
}
+#ifdef HAVE_cc0
+ /* Delete the cc0 setter. */
+ if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
+ delete_insn (setcc);
+#endif
+
run_jump_opt_after_gcse = 1;
const_prop_count++;
if (gcse_file != NULL)
{
fprintf (gcse_file,
- "CONST-PROP: Replacing reg %d in insn %d with constant ",
- REGNO (from), INSN_UID (insn));
+ "CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
+ REGNO (from), INSN_UID (jump));
print_rtl (gcse_file, src);
fprintf (gcse_file, "\n");
}
return 1;
}
-#ifdef HAVE_cc0
-
-/* Subroutine of cprop_insn that tries to propagate constants into JUMP_INSNS
- for machines that have CC0. INSN is a single set that stores into CC0;
- the insn following it is a conditional jump. REG_USED is the use we will
- try to replace, SRC is the constant we will try to substitute for it.
- Returns nonzero if a change was made. */
-
-static int
-cprop_cc0_jump (bb, insn, reg_used, src)
- basic_block bb;
+static bool
+constprop_register (insn, from, to, alter_jumps)
rtx insn;
- struct reg_use *reg_used;
- rtx src;
+ rtx from;
+ rtx to;
+ int alter_jumps;
{
- /* First substitute in the SET_SRC of INSN, then substitute that for
- CC0 in JUMP. */
- rtx jump = NEXT_INSN (insn);
- rtx new_src = simplify_replace_rtx (SET_SRC (PATTERN (insn)),
- reg_used->reg_rtx, src);
+ rtx sset;
- if (! cprop_jump (bb, jump, cc0_rtx, new_src))
- return 0;
+ /* Check for reg or cc0 setting instructions followed by
+ conditional branch instructions first. */
+ if (alter_jumps
+ && (sset = single_set (insn)) != NULL
+ && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
+ {
+ rtx dest = SET_DEST (sset);
+ if ((REG_P (dest) || CC0_P (dest))
+ && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
+ return 1;
+ }
- /* If we succeeded, delete the cc0 setter. */
- delete_insn (insn);
+ /* Handle normal insns next. */
+ if (GET_CODE (insn) == INSN
+ && try_replace_reg (from, to, insn))
+ return 1;
- return 1;
+ /* Try to propagate a CONST_INT into a conditional jump.
+ We're pretty specific about what we will handle in this
+ code, we can extend this as necessary over time.
+
+ Right now the insn in question must look like
+ (set (pc) (if_then_else ...)) */
+ else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
+ return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
+ return 0;
}
-#endif
-
+
/* Perform constant and copy propagation on INSN.
The result is non-zero if a change was made. */
static int
-cprop_insn (bb, insn, alter_jumps)
- basic_block bb;
+cprop_insn (insn, alter_jumps)
rtx insn;
int alter_jumps;
{
reg_use_count = 0;
note_uses (&PATTERN (insn), find_used_regs, NULL);
-
+
note = find_reg_equal_equiv_note (insn);
/* We may win even when propagating constants into notes. */
set = find_avail_set (regno, insn);
if (! set)
continue;
-
+
pat = set->expr;
/* ??? We might be able to handle PARALLELs. Later. */
if (GET_CODE (pat) != SET)
/* Constant propagation. */
if (CONSTANT_P (src))
{
- /* Handle normal insns first. */
- if (GET_CODE (insn) == INSN
- && try_replace_reg (reg_used->reg_rtx, src, insn))
+ if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
{
changed = 1;
const_prop_count++;
if (gcse_file != NULL)
{
- fprintf (gcse_file, "CONST-PROP: Replacing reg %d in ",
- regno);
- fprintf (gcse_file, "insn %d with constant ",
- INSN_UID (insn));
+ fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
+ fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn));
print_rtl (gcse_file, src);
fprintf (gcse_file, "\n");
}
-
- /* The original insn setting reg_used may or may not now be
- deletable. We leave the deletion to flow. */
}
-
- /* Try to propagate a CONST_INT into a conditional jump.
- We're pretty specific about what we will handle in this
- code, we can extend this as necessary over time.
-
- Right now the insn in question must look like
- (set (pc) (if_then_else ...)) */
- else if (alter_jumps
- && GET_CODE (insn) == JUMP_INSN
- && condjump_p (insn)
- && ! simplejump_p (insn))
- changed |= cprop_jump (bb, insn, reg_used->reg_rtx, src);
-
-#ifdef HAVE_cc0
- /* Similar code for machines that use a pair of CC0 setter and
- conditional jump insn. */
- else if (alter_jumps
- && GET_CODE (PATTERN (insn)) == SET
- && SET_DEST (PATTERN (insn)) == cc0_rtx
- && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
- && condjump_p (NEXT_INSN (insn))
- && ! simplejump_p (NEXT_INSN (insn))
- && cprop_cc0_jump (bb, insn, reg_used, src))
- {
- changed = 1;
- break;
- }
-#endif
}
else if (GET_CODE (src) == REG
&& REGNO (src) >= FIRST_PSEUDO_REGISTER
copy_prop_count++;
if (gcse_file != NULL)
{
- fprintf (gcse_file, "COPY-PROP: Replacing reg %d in insn %d",
+ fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
regno, INSN_UID (insn));
fprintf (gcse_file, " with reg %d\n", REGNO (src));
}
return changed;
}
+static bool
+do_local_cprop (x, insn, alter_jumps)
+ rtx x;
+ rtx insn;
+ int alter_jumps;
+{
+ rtx newreg = NULL, newcnst = NULL;
+
+ /* Rule out USE instructions and ASM statements as we don't want to change the hard
+ registers mentioned. */
+ if (GET_CODE (x) == REG
+ && (REGNO (x) >= FIRST_PSEUDO_REGISTER
+ || (GET_CODE (PATTERN (insn)) != USE && asm_noperands (PATTERN (insn)) < 0)))
+ {
+ cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
+ struct elt_loc_list *l;
+
+ if (!val)
+ return false;
+ for (l = val->locs; l; l = l->next)
+ {
+ rtx this_rtx = l->loc;
+ rtx note;
+
+ if (CONSTANT_P (this_rtx))
+ newcnst = this_rtx;
+ if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
+ /* Don't copy propagate if it has attached REG_EQUIV note.
+ At this point this only function parameters should have
+ REG_EQUIV notes and if the argument slot is used somewhere
+ explicitly, it means address of parameter has been taken,
+ so we should not extend the lifetime of the pseudo. */
+ && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
+ || GET_CODE (XEXP (note, 0)) != MEM))
+ newreg = this_rtx;
+ }
+ if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
+ {
+ if (gcse_file != NULL)
+ {
+ fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ",
+ REGNO (x));
+ fprintf (gcse_file, "insn %d with constant ",
+ INSN_UID (insn));
+ print_rtl (gcse_file, newcnst);
+ fprintf (gcse_file, "\n");
+ }
+ const_prop_count++;
+ return true;
+ }
+ else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
+ {
+ if (gcse_file != NULL)
+ {
+ fprintf (gcse_file,
+ "LOCAL COPY-PROP: Replacing reg %d in insn %d",
+ REGNO (x), INSN_UID (insn));
+ fprintf (gcse_file, " with reg %d\n", REGNO (newreg));
+ }
+ copy_prop_count++;
+ return true;
+ }
+ }
+ return false;
+}
+
+static void
+local_cprop_pass (alter_jumps)
+ int alter_jumps;
+{
+ rtx insn;
+ struct reg_use *reg_used;
+
+ cselib_init ();
+ for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+ {
+ if (INSN_P (insn))
+ {
+ rtx note = find_reg_equal_equiv_note (insn);
+
+ do
+ {
+ reg_use_count = 0;
+ note_uses (&PATTERN (insn), find_used_regs, NULL);
+ if (note)
+ find_used_regs (&XEXP (note, 0), NULL);
+
+ for (reg_used = ®_use_table[0]; reg_use_count > 0;
+ reg_used++, reg_use_count--)
+ if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps))
+ break;
+ }
+ while (reg_use_count);
+ }
+ cselib_process_insn (insn);
+ }
+ cselib_finish ();
+}
+
/* Forward propagate copies. This includes copies and constants. Return
non-zero if a change was made. */
cprop (alter_jumps)
int alter_jumps;
{
- int bb, changed;
+ int changed;
+ basic_block bb;
rtx insn;
/* Note we start at block 1. */
+ if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
+ {
+ if (gcse_file != NULL)
+ fprintf (gcse_file, "\n");
+ return 0;
+ }
changed = 0;
- for (bb = 1; bb < n_basic_blocks; bb++)
+ FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
{
/* Reset tables used to keep track of what's still valid [since the
start of the block]. */
reset_opr_set_tables ();
- for (insn = BLOCK_HEAD (bb);
- insn != NULL && insn != NEXT_INSN (BLOCK_END (bb));
+ for (insn = bb->head;
+ insn != NULL && insn != NEXT_INSN (bb->end);
insn = NEXT_INSN (insn))
if (INSN_P (insn))
{
- changed |= cprop_insn (BASIC_BLOCK (bb), insn, alter_jumps);
+ changed |= cprop_insn (insn, alter_jumps);
/* Keep track of everything modified by this insn. */
/* ??? Need to be careful w.r.t. mods done to INSN. Don't
const_prop_count = 0;
copy_prop_count = 0;
+ local_cprop_pass (alter_jumps);
+
alloc_set_hash_table (max_cuid);
compute_set_hash_table ();
if (gcse_file)
n_sets);
if (n_sets > 0)
{
- alloc_cprop_mem (n_basic_blocks, n_sets);
+ alloc_cprop_mem (last_basic_block, n_sets);
compute_cprop_data ();
changed = cprop (alter_jumps);
+ if (alter_jumps)
+ changed |= bypass_conditional_jumps ();
free_cprop_mem ();
}
return changed;
}
\f
+/* Bypass conditional jumps. */
+
+/* Find a set of REGNO to a constant that is available at the end of basic
+ block BB. Returns NULL if no such set is found. Based heavily upon
+ find_avail_set. */
+
+static struct expr *
+find_bypass_set (regno, bb)
+ int regno;
+ int bb;
+{
+ struct expr *result = 0;
+
+ for (;;)
+ {
+ rtx src;
+ struct expr *set = lookup_set (regno, NULL_RTX);
+
+ while (set)
+ {
+ if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
+ break;
+ set = next_set (regno, set);
+ }
+
+ if (set == 0)
+ break;
+
+ if (GET_CODE (set->expr) != SET)
+ abort ();
+
+ src = SET_SRC (set->expr);
+ if (CONSTANT_P (src))
+ result = set;
+
+ if (GET_CODE (src) != REG)
+ break;
+
+ regno = REGNO (src);
+ }
+ return result;
+}
+
+
+/* Subroutine of bypass_conditional_jumps that attempts to bypass the given
+ basic block BB which has more than one predecessor. If not NULL, SETCC
+ is the first instruction of BB, which is immediately followed by JUMP_INSN
+ JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
+ Returns nonzero if a change was made. */
+
+static int
+bypass_block (bb, setcc, jump)
+ basic_block bb;
+ rtx setcc, jump;
+{
+ rtx insn, note;
+ edge e, enext;
+ int i, change;
+
+ insn = (setcc != NULL) ? setcc : jump;
+
+ /* Determine set of register uses in INSN. */
+ reg_use_count = 0;
+ note_uses (&PATTERN (insn), find_used_regs, NULL);
+ note = find_reg_equal_equiv_note (insn);
+ if (note)
+ find_used_regs (&XEXP (note, 0), NULL);
+
+ change = 0;
+ for (e = bb->pred; e; e = enext)
+ {
+ enext = e->pred_next;
+ for (i = 0; i < reg_use_count; i++)
+ {
+ struct reg_use *reg_used = ®_use_table[i];
+ unsigned int regno = REGNO (reg_used->reg_rtx);
+ basic_block dest, old_dest;
+ struct expr *set;
+ rtx src, new;
+
+ if (regno >= max_gcse_regno)
+ continue;
+
+ set = find_bypass_set (regno, e->src->index);
+
+ if (! set)
+ continue;
+
+ src = SET_SRC (pc_set (jump));
+
+ if (setcc != NULL)
+ src = simplify_replace_rtx (src,
+ SET_DEST (PATTERN (setcc)),
+ SET_SRC (PATTERN (setcc)));
+
+ new = simplify_replace_rtx (src, reg_used->reg_rtx,
+ SET_SRC (set->expr));
+
+ if (new == pc_rtx)
+ dest = FALLTHRU_EDGE (bb)->dest;
+ else if (GET_CODE (new) == LABEL_REF)
+ dest = BRANCH_EDGE (bb)->dest;
+ else
+ dest = NULL;
+
+ /* Once basic block indices are stable, we should be able
+ to use redirect_edge_and_branch_force instead. */
+ old_dest = e->dest;
+ if (dest != NULL && dest != old_dest
+ && redirect_edge_and_branch (e, dest))
+ {
+ /* Copy the register setter to the redirected edge.
+ Don't copy CC0 setters, as CC0 is dead after jump. */
+ if (setcc)
+ {
+ rtx pat = PATTERN (setcc);
+ if (!CC0_P (SET_DEST (pat)))
+ insert_insn_on_edge (copy_insn (pat), e);
+ }
+
+ if (gcse_file != NULL)
+ {
+ fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d in jump_insn %d equals constant ",
+ regno, INSN_UID (jump));
+ print_rtl (gcse_file, SET_SRC (set->expr));
+ fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n",
+ e->src->index, old_dest->index, dest->index);
+ }
+ change = 1;
+ break;
+ }
+ }
+ }
+ return change;
+}
+
+/* Find basic blocks with more than one predecessor that only contain a
+ single conditional jump. If the result of the comparison is known at
+ compile-time from any incoming edge, redirect that edge to the
+ appropriate target. Returns nonzero if a change was made. */
+
+static int
+bypass_conditional_jumps ()
+{
+ basic_block bb;
+ int changed;
+ rtx setcc;
+ rtx insn;
+ rtx dest;
+
+ /* Note we start at block 1. */
+ if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
+ return 0;
+
+ changed = 0;
+ FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
+ EXIT_BLOCK_PTR, next_bb)
+ {
+ /* Check for more than one predecessor. */
+ if (bb->pred && bb->pred->pred_next)
+ {
+ setcc = NULL_RTX;
+ for (insn = bb->head;
+ insn != NULL && insn != NEXT_INSN (bb->end);
+ insn = NEXT_INSN (insn))
+ if (GET_CODE (insn) == INSN)
+ {
+ if (setcc)
+ break;
+ if (GET_CODE (PATTERN (insn)) != SET)
+ break;
+
+ dest = SET_DEST (PATTERN (insn));
+ if (REG_P (dest) || CC0_P (dest))
+ setcc = insn;
+ else
+ break;
+ }
+ else if (GET_CODE (insn) == JUMP_INSN)
+ {
+ if (any_condjump_p (insn) && onlyjump_p (insn))
+ changed |= bypass_block (bb, setcc, insn);
+ break;
+ }
+ else if (INSN_P (insn))
+ break;
+ }
+ }
+
+ /* If we bypassed any register setting insns, we inserted a
+ copy on the redirected edge. These need to be commited. */
+ if (changed)
+ commit_edge_insertions();
+
+ return changed;
+}
+\f
/* Compute PRE+LCM working variables. */
/* Local properties of expressions. */
compute_pre_data ()
{
sbitmap trapping_expr;
- int i;
+ basic_block bb;
unsigned int ui;
compute_local_properties (transp, comp, antloc, 0);
- sbitmap_vector_zero (ae_kill, n_basic_blocks);
+ sbitmap_vector_zero (ae_kill, last_basic_block);
/* Collect expressions which might trap. */
trapping_expr = sbitmap_alloc (n_exprs);
This is significantly faster than compute_ae_kill. */
- for (i = 0; i < n_basic_blocks; i++)
+ FOR_EACH_BB (bb)
{
edge e;
kill all trapping expressions because we won't be able to properly
place the instruction on the edge. So make them neither
anticipatable nor transparent. This is fairly conservative. */
- for (e = BASIC_BLOCK (i)->pred; e ; e = e->pred_next)
+ for (e = bb->pred; e ; e = e->pred_next)
if (e->flags & EDGE_ABNORMAL)
{
- sbitmap_difference (antloc[i], antloc[i], trapping_expr);
- sbitmap_difference (transp[i], transp[i], trapping_expr);
+ sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
+ sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
break;
}
- sbitmap_a_or_b (ae_kill[i], transp[i], comp[i]);
- sbitmap_not (ae_kill[i], ae_kill[i]);
+ sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
+ sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
}
edge_list = pre_edge_lcm (gcse_file, n_exprs, transp, comp, antloc,
sbitmap_vector_free (antloc);
antloc = NULL;
sbitmap_vector_free (ae_kill);
- ae_kill = NULL;
+ ae_kill = NULL;
sbitmap_free (trapping_expr);
}
\f
basic_block bb;
{
int rval;
- char *visited = (char *) xcalloc (n_basic_blocks, 1);
+ char *visited = (char *) xcalloc (last_basic_block, 1);
rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
\f
/* Given an expr, generate RTL which we can insert at the end of a BB,
- or on an edge. Set the block number of any insns generated to
+ or on an edge. Set the block number of any insns generated to
the value of BB. */
static rtx
expression to make sure we don't have any sharing issues. */
else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
abort ();
-
- pat = gen_sequence ();
+
+ pat = get_insns ();
end_sequence ();
return pat;
}
-
+
/* Add EXPR to the end of basic block BB.
This is used by both the PRE and code hoisting.
rtx new_insn;
rtx reg = expr->reaching_reg;
int regno = REGNO (reg);
- rtx pat;
- int i;
+ rtx pat, pat_end;
pat = process_insert_insn (expr);
+ if (pat == NULL_RTX || ! INSN_P (pat))
+ abort ();
+
+ pat_end = pat;
+ while (NEXT_INSN (pat_end) != NULL_RTX)
+ pat_end = NEXT_INSN (pat_end);
/* If the last insn is a jump, insert EXPR in front [taking care to
handle cc0, etc. properly]. Similary we need to care trapping
/* It should always be the case that we can put these instructions
anywhere in the basic block with performing PRE optimizations.
Check this. */
- if (GET_CODE (insn) == insn && pre
+ if (GET_CODE (insn) == INSN && pre
&& !TEST_BIT (antloc[bb->index], expr->bitmap_index)
- && !TEST_BIT (transp[bb->index], expr->bitmap_index))
+ && !TEST_BIT (transp[bb->index], expr->bitmap_index))
abort ();
/* If this is a jump table, then we can't insert stuff here. Since
/* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
we search backward and place the instructions before the first
parameter is loaded. Do this for everyone for consistency and a
- presumtion that we'll get better code elsewhere as well.
+ presumtion that we'll get better code elsewhere as well.
It should always be the case that we can put these instructions
anywhere in the basic block with performing PRE optimizations.
if (pre
&& !TEST_BIT (antloc[bb->index], expr->bitmap_index)
- && !TEST_BIT (transp[bb->index], expr->bitmap_index))
+ && !TEST_BIT (transp[bb->index], expr->bitmap_index))
abort ();
/* Since different machines initialize their parameter registers
else
new_insn = emit_insn_after (pat, insn);
- /* Keep block number table up to date.
- Note, PAT could be a multiple insn sequence, we have to make
- sure that each insn in the sequence is handled. */
- if (GET_CODE (pat) == SEQUENCE)
+ while (1)
{
- for (i = 0; i < XVECLEN (pat, 0); i++)
+ if (INSN_P (pat))
{
- rtx insn = XVECEXP (pat, 0, i);
- if (INSN_P (insn))
- add_label_notes (PATTERN (insn), new_insn);
-
- note_stores (PATTERN (insn), record_set_info, insn);
+ add_label_notes (PATTERN (pat), new_insn);
+ note_stores (PATTERN (pat), record_set_info, pat);
}
- }
- else
- {
- add_label_notes (pat, new_insn);
-
- /* Keep register set table up to date. */
- record_one_set (regno, new_insn);
+ if (pat == pat_end)
+ break;
+ pat = NEXT_INSN (pat);
}
gcse_create_count++;
continue;
/* Or if the expression doesn't reach the deleted one. */
- if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
+ if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
expr,
BLOCK_FOR_INSN (occr->insn)))
continue;
}
}
+/* Emit move from SRC to DEST noting the equivalence with expression computed
+ in INSN. */
+static rtx
+gcse_emit_move_after (src, dest, insn)
+ rtx src, dest, insn;
+{
+ rtx new;
+ rtx set = single_set (insn), set2;
+ rtx note;
+ rtx eqv;
+
+ /* This should never fail since we're creating a reg->reg copy
+ we've verified to be valid. */
+
+ new = emit_insn_after (gen_move_insn (dest, src), insn);
+
+ /* Note the equivalence for local CSE pass. */
+ set2 = single_set (new);
+ if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
+ return new;
+ if ((note = find_reg_equal_equiv_note (insn)))
+ eqv = XEXP (note, 0);
+ else
+ eqv = SET_SRC (set);
+
+ set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (src));
+
+ return new;
+}
+
/* Delete redundant computations.
Deletion is done by changing the insn to copy the `reaching_reg' of
the expression into the result of the SET. It is left to later passes
expr->reaching_reg
= gen_reg_rtx (GET_MODE (SET_DEST (set)));
- /* In theory this should never fail since we're creating
- a reg->reg copy.
-
- However, on the x86 some of the movXX patterns actually
- contain clobbers of scratch regs. This may cause the
- insn created by validate_change to not match any pattern
- and thus cause validate_change to fail. */
- if (validate_change (insn, &SET_SRC (set),
- expr->reaching_reg, 0))
- {
- occr->deleted_p = 1;
- SET_BIT (pre_redundant_insns, INSN_CUID (insn));
- changed = 1;
- gcse_subst_count++;
- }
+ gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
+ delete_insn (insn);
+ occr->deleted_p = 1;
+ SET_BIT (pre_redundant_insns, INSN_CUID (insn));
+ changed = 1;
+ gcse_subst_count++;
if (gcse_file)
{
if (n_exprs > 0)
{
- alloc_pre_mem (n_basic_blocks, n_exprs);
+ alloc_pre_mem (last_basic_block, n_exprs);
compute_pre_data ();
changed |= pre_gcse ();
free_edge_list (edge_list);
REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
REG_NOTES (insn));
if (LABEL_P (XEXP (x, 0)))
- LABEL_NUSES (XEXP (x, 0))++;
+ LABEL_NUSES (XEXP (x, 0))++;
return;
}
static void
compute_transpout ()
{
- int bb;
+ basic_block bb;
unsigned int i;
struct expr *expr;
- sbitmap_vector_ones (transpout, n_basic_blocks);
+ sbitmap_vector_ones (transpout, last_basic_block);
- for (bb = 0; bb < n_basic_blocks; ++bb)
+ FOR_EACH_BB (bb)
{
/* Note that flow inserted a nop a the end of basic blocks that
end in call instructions for reasons other than abnormal
control flow. */
- if (GET_CODE (BLOCK_END (bb)) != CALL_INSN)
+ if (GET_CODE (bb->end) != CALL_INSN)
continue;
for (i = 0; i < expr_hash_table_size; i++)
if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
&& CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
continue;
-
+
/* ??? Optimally, we would use interprocedural alias
analysis to determine if this mem is actually killed
by this call. */
- RESET_BIT (transpout[bb], expr->bitmap_index);
+ RESET_BIT (transpout[bb->index], expr->bitmap_index);
}
}
}
regno = REGNO (x) - npi->min_reg;
- RESET_BIT (npi->nonnull_local[npi->current_block], regno);
- SET_BIT (npi->nonnull_killed[npi->current_block], regno);
+ RESET_BIT (npi->nonnull_local[npi->current_block->index], regno);
+ SET_BIT (npi->nonnull_killed[npi->current_block->index], regno);
}
/* Do null-pointer check elimination for the registers indicated in
NPI. NONNULL_AVIN and NONNULL_AVOUT are pre-allocated sbitmaps;
they are not our responsibility to free. */
-static void
+static int
delete_null_pointer_checks_1 (block_reg, nonnull_avin,
nonnull_avout, npi)
unsigned int *block_reg;
sbitmap *nonnull_avout;
struct null_pointer_info *npi;
{
- int bb;
- int current_block;
+ basic_block bb, current_block;
sbitmap *nonnull_local = npi->nonnull_local;
sbitmap *nonnull_killed = npi->nonnull_killed;
-
+ int something_changed = 0;
+
/* Compute local properties, nonnull and killed. A register will have
the nonnull property if at the end of the current block its value is
known to be nonnull. The killed property indicates that somewhere in
Note that a register can have both properties in a single block. That
indicates that it's killed, then later in the block a new value is
computed. */
- sbitmap_vector_zero (nonnull_local, n_basic_blocks);
- sbitmap_vector_zero (nonnull_killed, n_basic_blocks);
+ sbitmap_vector_zero (nonnull_local, last_basic_block);
+ sbitmap_vector_zero (nonnull_killed, last_basic_block);
- for (current_block = 0; current_block < n_basic_blocks; current_block++)
+ FOR_EACH_BB (current_block)
{
rtx insn, stop_insn;
/* Scan each insn in the basic block looking for memory references and
register sets. */
- stop_insn = NEXT_INSN (BLOCK_END (current_block));
- for (insn = BLOCK_HEAD (current_block);
+ stop_insn = NEXT_INSN (current_block->end);
+ for (insn = current_block->head;
insn != stop_insn;
insn = NEXT_INSN (insn))
{
&& GET_CODE ((reg = XEXP (SET_SRC (set), 0))) == REG
&& REGNO (reg) >= npi->min_reg
&& REGNO (reg) < npi->max_reg)
- SET_BIT (nonnull_local[current_block],
+ SET_BIT (nonnull_local[current_block->index],
REGNO (reg) - npi->min_reg);
/* Now invalidate stuff clobbered by this insn. */
&& GET_CODE ((reg = XEXP (SET_DEST (set), 0))) == REG
&& REGNO (reg) >= npi->min_reg
&& REGNO (reg) < npi->max_reg)
- SET_BIT (nonnull_local[current_block],
+ SET_BIT (nonnull_local[current_block->index],
REGNO (reg) - npi->min_reg);
}
}
/* Now look at each bb and see if it ends with a compare of a value
against zero. */
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
{
- rtx last_insn = BLOCK_END (bb);
+ rtx last_insn = bb->end;
rtx condition, earliest;
int compare_and_branch;
/* Since MIN_REG is always at least FIRST_PSEUDO_REGISTER, and
since BLOCK_REG[BB] is zero if this block did not end with a
comparison against zero, this condition works. */
- if (block_reg[bb] < npi->min_reg
- || block_reg[bb] >= npi->max_reg)
+ if (block_reg[bb->index] < npi->min_reg
+ || block_reg[bb->index] >= npi->max_reg)
continue;
/* LAST_INSN is a conditional jump. Get its condition. */
continue;
/* Is the register known to have a nonzero value? */
- if (!TEST_BIT (nonnull_avout[bb], block_reg[bb] - npi->min_reg))
+ if (!TEST_BIT (nonnull_avout[bb->index], block_reg[bb->index] - npi->min_reg))
continue;
/* Try to compute whether the compare/branch at the loop end is one or
emit_barrier_after (new_jump);
}
+ something_changed = 1;
delete_insn (last_insn);
if (compare_and_branch == 2)
- delete_insn (earliest);
- purge_dead_edges (BASIC_BLOCK (bb));
+ delete_insn (earliest);
+ purge_dead_edges (bb);
/* Don't check this block again. (Note that BLOCK_END is
- invalid here; we deleted the last instruction in the
+ invalid here; we deleted the last instruction in the
block.) */
- block_reg[bb] = 0;
+ block_reg[bb->index] = 0;
}
+
+ return something_changed;
}
/* Find EQ/NE comparisons against zero which can be (indirectly) evaluated
So, if every path leading to a conditional branch has an available memory
reference of that form, then we know the register can not have the value
- zero at the conditional branch.
+ zero at the conditional branch.
So we merely need to compute the local properies and propagate that data
around the cfg, then optimize where possible.
This could probably be integrated with global cprop with a little work. */
-void
+int
delete_null_pointer_checks (f)
rtx f ATTRIBUTE_UNUSED;
{
sbitmap *nonnull_avin, *nonnull_avout;
unsigned int *block_reg;
- int bb;
+ basic_block bb;
int reg;
int regs_per_pass;
int max_reg;
struct null_pointer_info npi;
+ int something_changed = 0;
/* If we have only a single block, then there's nothing to do. */
if (n_basic_blocks <= 1)
- return;
+ return 0;
/* Trying to perform global optimizations on flow graphs which have
a high connectivity will take a long time and is unlikely to be
a couple switch statements. So we require a relatively large number
of basic blocks and the ratio of edges to blocks to be high. */
if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
- return;
+ return 0;
/* We need four bitmaps, each with a bit for each register in each
basic block. */
max_reg = max_reg_num ();
- regs_per_pass = get_bitmap_width (4, n_basic_blocks, max_reg);
+ regs_per_pass = get_bitmap_width (4, last_basic_block, max_reg);
/* Allocate bitmaps to hold local and global properties. */
- npi.nonnull_local = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
- npi.nonnull_killed = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
- nonnull_avin = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
- nonnull_avout = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
+ npi.nonnull_local = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
+ npi.nonnull_killed = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
+ nonnull_avin = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
+ nonnull_avout = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
/* Go through the basic blocks, seeing whether or not each block
ends with a conditional branch whose condition is a comparison
against zero. Record the register compared in BLOCK_REG. */
- block_reg = (unsigned int *) xcalloc (n_basic_blocks, sizeof (int));
- for (bb = 0; bb < n_basic_blocks; bb++)
+ block_reg = (unsigned int *) xcalloc (last_basic_block, sizeof (int));
+ FOR_EACH_BB (bb)
{
- rtx last_insn = BLOCK_END (bb);
+ rtx last_insn = bb->end;
rtx condition, earliest, reg;
/* We only want conditional branches. */
if (!condition
|| (GET_CODE (condition) != NE && GET_CODE (condition) != EQ)
|| GET_CODE (XEXP (condition, 1)) != CONST_INT
- || (XEXP (condition, 1)
+ || (XEXP (condition, 1)
!= CONST0_RTX (GET_MODE (XEXP (condition, 0)))))
continue;
if (GET_CODE (reg) != REG)
continue;
- block_reg[bb] = REGNO (reg);
+ block_reg[bb->index] = REGNO (reg);
}
/* Go through the algorithm for each block of registers. */
{
npi.min_reg = reg;
npi.max_reg = MIN (reg + regs_per_pass, max_reg);
- delete_null_pointer_checks_1 (block_reg, nonnull_avin,
- nonnull_avout, &npi);
+ something_changed |= delete_null_pointer_checks_1 (block_reg,
+ nonnull_avin,
+ nonnull_avout,
+ &npi);
}
/* Free the table of registers compared at the end of every block. */
sbitmap_vector_free (npi.nonnull_killed);
sbitmap_vector_free (nonnull_avin);
sbitmap_vector_free (nonnull_avout);
+
+ return something_changed;
}
/* Code Hoisting variables and subroutines. */
static sbitmap *hoist_exprs;
/* Dominator bitmaps. */
-static sbitmap *dominators;
+dominance_info dominators;
/* ??? We could compute post dominators and run this algorithm in
reverse to to perform tail merging, doing so would probably be
hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
-
- dominators = sbitmap_vector_alloc (n_blocks, n_blocks);
}
/* Free vars used for code hoisting analysis. */
sbitmap_vector_free (hoist_exprs);
sbitmap_vector_free (transpout);
- sbitmap_vector_free (dominators);
+ free_dominance_info (dominators);
}
/* Compute the very busy expressions at entry/exit from each block.
static void
compute_code_hoist_vbeinout ()
{
- int bb, changed, passes;
+ int changed, passes;
+ basic_block bb;
- sbitmap_vector_zero (hoist_vbeout, n_basic_blocks);
- sbitmap_vector_zero (hoist_vbein, n_basic_blocks);
+ sbitmap_vector_zero (hoist_vbeout, last_basic_block);
+ sbitmap_vector_zero (hoist_vbein, last_basic_block);
passes = 0;
changed = 1;
/* We scan the blocks in the reverse order to speed up
the convergence. */
- for (bb = n_basic_blocks - 1; bb >= 0; bb--)
+ FOR_EACH_BB_REVERSE (bb)
{
- changed |= sbitmap_a_or_b_and_c (hoist_vbein[bb], antloc[bb],
- hoist_vbeout[bb], transp[bb]);
- if (bb != n_basic_blocks - 1)
- sbitmap_intersection_of_succs (hoist_vbeout[bb], hoist_vbein, bb);
+ changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
+ hoist_vbeout[bb->index], transp[bb->index]);
+ if (bb->next_bb != EXIT_BLOCK_PTR)
+ sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
}
passes++;
compute_local_properties (transp, comp, antloc, 0);
compute_transpout ();
compute_code_hoist_vbeinout ();
- calculate_dominance_info (NULL, dominators, CDI_DOMINATORS);
+ dominators = calculate_dominance_info (CDI_DOMINATORS);
if (gcse_file)
fprintf (gcse_file, "\n");
}
{
edge pred;
int visited_allocated_locally = 0;
-
+
if (visited == NULL)
{
visited_allocated_locally = 1;
- visited = xcalloc (n_basic_blocks, 1);
+ visited = xcalloc (last_basic_block, 1);
}
for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
if (pred->src == ENTRY_BLOCK_PTR)
break;
+ else if (pred_bb == expr_bb)
+ continue;
else if (visited[pred_bb->index])
continue;
break;
}
}
- if (visited_allocated_locally)
+ if (visited_allocated_locally)
free (visited);
return (pred == NULL);
static void
hoist_code ()
{
- int bb, dominated;
- unsigned int i;
+ basic_block bb, dominated;
+ basic_block *domby;
+ unsigned int domby_len;
+ unsigned int i,j;
struct expr **index_map;
struct expr *expr;
- sbitmap_vector_zero (hoist_exprs, n_basic_blocks);
+ sbitmap_vector_zero (hoist_exprs, last_basic_block);
/* Compute a mapping from expression number (`bitmap_index') to
hash table entry. */
/* Walk over each basic block looking for potentially hoistable
expressions, nothing gets hoisted from the entry block. */
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
{
int found = 0;
int insn_inserted_p;
+ domby_len = get_dominated_by (dominators, bb, &domby);
/* Examine each expression that is very busy at the exit of this
block. These are the potentially hoistable expressions. */
- for (i = 0; i < hoist_vbeout[bb]->n_bits; i++)
+ for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
{
int hoistable = 0;
- if (TEST_BIT (hoist_vbeout[bb], i) && TEST_BIT (transpout[bb], i))
+ if (TEST_BIT (hoist_vbeout[bb->index], i)
+ && TEST_BIT (transpout[bb->index], i))
{
/* We've found a potentially hoistable expression, now
we look at every block BB dominates to see if it
computes the expression. */
- for (dominated = 0; dominated < n_basic_blocks; dominated++)
+ for (j = 0; j < domby_len; j++)
{
+ dominated = domby[j];
/* Ignore self dominance. */
- if (bb == dominated
- || ! TEST_BIT (dominators[dominated], bb))
+ if (bb == dominated)
continue;
-
/* We've found a dominated block, now see if it computes
the busy expression and whether or not moving that
expression to the "beginning" of that block is safe. */
- if (!TEST_BIT (antloc[dominated], i))
+ if (!TEST_BIT (antloc[dominated->index], i))
continue;
/* Note if the expression would reach the dominated block
- unimpared if it was placed at the end of BB.
+ unimpared if it was placed at the end of BB.
Keep track of how many times this expression is hoistable
from a dominated block into BB. */
- if (hoist_expr_reaches_here_p (BASIC_BLOCK (bb), i,
- BASIC_BLOCK (dominated), NULL))
+ if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
hoistable++;
}
to nullify any benefit we get from code hoisting. */
if (hoistable > 1)
{
- SET_BIT (hoist_exprs[bb], i);
+ SET_BIT (hoist_exprs[bb->index], i);
found = 1;
}
}
}
-
/* If we found nothing to hoist, then quit now. */
if (! found)
+ {
+ free (domby);
continue;
+ }
/* Loop over all the hoistable expressions. */
- for (i = 0; i < hoist_exprs[bb]->n_bits; i++)
+ for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
{
/* We want to insert the expression into BB only once, so
note when we've inserted it. */
insn_inserted_p = 0;
/* These tests should be the same as the tests above. */
- if (TEST_BIT (hoist_vbeout[bb], i))
+ if (TEST_BIT (hoist_vbeout[bb->index], i))
{
/* We've found a potentially hoistable expression, now
we look at every block BB dominates to see if it
computes the expression. */
- for (dominated = 0; dominated < n_basic_blocks; dominated++)
+ for (j = 0; j < domby_len; j++)
{
+ dominated = domby[j];
/* Ignore self dominance. */
- if (bb == dominated
- || ! TEST_BIT (dominators[dominated], bb))
+ if (bb == dominated)
continue;
/* We've found a dominated block, now see if it computes
the busy expression and whether or not moving that
expression to the "beginning" of that block is safe. */
- if (!TEST_BIT (antloc[dominated], i))
+ if (!TEST_BIT (antloc[dominated->index], i))
continue;
/* The expression is computed in the dominated block and
dominated block. Now we have to determine if the
expression would reach the dominated block if it was
placed at the end of BB. */
- if (hoist_expr_reaches_here_p (BASIC_BLOCK (bb), i,
- BASIC_BLOCK (dominated), NULL))
+ if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
{
struct expr *expr = index_map[i];
struct occr *occr = expr->antic_occr;
rtx set;
/* Find the right occurrence of this expression. */
- while (BLOCK_NUM (occr->insn) != dominated && occr)
+ while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
occr = occr->next;
/* Should never happen. */
abort ();
insn = occr->insn;
-
+
set = single_set (insn);
if (! set)
abort ();
expr->reaching_reg
= gen_reg_rtx (GET_MODE (SET_DEST (set)));
- /* In theory this should never fail since we're creating
- a reg->reg copy.
-
- However, on the x86 some of the movXX patterns
- actually contain clobbers of scratch regs. This may
- cause the insn created by validate_change to not
- match any pattern and thus cause validate_change to
- fail. */
- if (validate_change (insn, &SET_SRC (set),
- expr->reaching_reg, 0))
+ gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
+ delete_insn (insn);
+ occr->deleted_p = 1;
+ if (!insn_inserted_p)
{
- occr->deleted_p = 1;
- if (!insn_inserted_p)
- {
- insert_insn_end_bb (index_map[i],
- BASIC_BLOCK (bb), 0);
- insn_inserted_p = 1;
- }
+ insert_insn_end_bb (index_map[i], bb, 0);
+ insn_inserted_p = 1;
}
}
}
}
}
+ free (domby);
}
free (index_map);
if (n_exprs > 0)
{
- alloc_code_hoist_mem (n_basic_blocks, n_exprs);
+ alloc_code_hoist_mem (last_basic_block, n_exprs);
compute_code_hoist_data ();
hoist_code ();
free_code_hoist_mem ();
}
'i' is both loaded and stored to in the loop. Normally, gcse cannot move
- the load out since its live around the loop, and stored at the bottom
- of the loop.
+ the load out since its live around the loop, and stored at the bottom
+ of the loop.
- The 'Load Motion' referred to and implemented in this file is
+ The 'Load Motion' referred to and implemented in this file is
an enhancement to gcse which when using edge based lcm, recognizes
this situation and allows gcse to move the load out of the loop.
ptr->hash_index = 0;
pre_ldst_mems = ptr;
}
-
+
return ptr;
}
/* Free up an individual ldst entry. */
-static void
+static void
free_ldst_entry (ptr)
struct ls_expr * ptr;
{
static void
free_ldst_mems ()
{
- while (pre_ldst_mems)
+ while (pre_ldst_mems)
{
struct ls_expr * tmp = pre_ldst_mems;
rtx x;
{
struct ls_expr * ptr;
-
+
for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid)
return ptr;
side effects. These are the types of loads we consider for the
ld_motion list, otherwise we let the usual aliasing take care of it. */
-static int
+static int
simple_mem (x)
rtx x;
{
if (GET_CODE (x) != MEM)
return 0;
-
+
if (MEM_VOLATILE_P (x))
return 0;
-
+
if (GET_MODE (x) == BLKmode)
return 0;
if (!rtx_varies_p (XEXP (x, 0), 0))
return 1;
-
+
return 0;
}
-/* Make sure there isn't a buried reference in this pattern anywhere.
- If there is, invalidate the entry for it since we're not capable
- of fixing it up just yet.. We have to be sure we know about ALL
+/* Make sure there isn't a buried reference in this pattern anywhere.
+ If there is, invalidate the entry for it since we're not capable
+ of fixing it up just yet.. We have to be sure we know about ALL
loads since the aliasing code will allow all entries in the
ld_motion list to not-alias itself. If we miss a load, we will get
- the wrong value since gcse might common it and we won't know to
+ the wrong value since gcse might common it and we won't know to
fix it up. */
static void
/* Recursively process the insn. */
fmt = GET_RTX_FORMAT (GET_CODE (x));
-
+
for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
/* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
being defined as MEM loads and stores to symbols, with no
- side effects and no registers in the expression. If there are any
+ side effects and no registers in the expression. If there are any
uses/defs which don't match this criteria, it is invalidated and
trimmed out later. */
-static void
+static void
compute_ld_motion_mems ()
{
struct ls_expr * ptr;
- int bb;
+ basic_block bb;
rtx insn;
-
+
pre_ldst_mems = NULL;
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
{
- for (insn = BLOCK_HEAD (bb);
- insn && insn != NEXT_INSN (BLOCK_END (bb));
+ for (insn = bb->head;
+ insn && insn != NEXT_INSN (bb->end);
insn = NEXT_INSN (insn))
{
if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
/* Make sure there isn't a buried load somewhere. */
invalidate_any_buried_refs (src);
}
-
+
/* Check for stores. Don't worry about aliased ones, they
will block any movement we might do later. We only care
about this exact pattern since those are the only
if (GET_CODE (dest) == MEM && simple_mem (dest))
{
ptr = ldst_entry (dest);
-
+
if (GET_CODE (src) != MEM
&& GET_CODE (src) != ASM_OPERANDS)
ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
}
}
-/* Remove any references that have been either invalidated or are not in the
+/* Remove any references that have been either invalidated or are not in the
expression list for pre gcse. */
static void
{
int del = ptr->invalid;
struct expr * expr = NULL;
-
+
/* Delete if entry has been made invalid. */
- if (!del)
+ if (!del)
{
unsigned int i;
-
+
del = 1;
/* Delete if we cannot find this mem in the expression list. */
for (i = 0; i < expr_hash_table_size && del; i++)
{
- for (expr = expr_hash_table[i];
- expr != NULL;
+ for (expr = expr_hash_table[i];
+ expr != NULL;
expr = expr->next_same_hash)
if (expr_equiv_p (expr->expr, ptr->pattern))
{
}
}
}
-
+
if (del)
{
if (last != NULL)
if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
{
- /* We can try to find just the REACHED stores, but is shouldn't
- matter to set the reaching reg everywhere... some might be
+ /* We can try to find just the REACHED stores, but is shouldn't
+ matter to set the reaching reg everywhere... some might be
dead and should be eliminated later. */
/* We replace SET mem = expr with
SET reg = expr
- SET mem = reg , where reg is the
+ SET mem = reg , where reg is the
reaching reg used in the load. */
rtx list = mem_ptr->stores;
-
+
for ( ; list != NULL_RTX; list = XEXP (list, 1))
{
rtx insn = XEXP (list, 0);
/* If we've already copied it, continue. */
if (expr->reaching_reg == src)
continue;
-
+
if (gcse_file)
{
fprintf (gcse_file, "PRE: store updated with reaching reg ");
print_inline_rtx (gcse_file, insn, 8);
fprintf (gcse_file, "\n");
}
-
+
copy = gen_move_insn ( reg, SET_SRC (pat));
new = emit_insn_before (copy, insn);
record_one_set (REGNO (reg), new);
\f
/* Store motion code. */
-/* This is used to communicate the target bitvector we want to use in the
+/* This is used to communicate the target bitvector we want to use in the
reg_set_info routine when called via the note_stores mechanism. */
static sbitmap * regvec;
SET_BIT (*regvec, REGNO (dest));
}
-/* Return non-zero if the register operands of expression X are killed
+/* Return non-zero if the register operands of expression X are killed
anywhere in basic block BB. */
static int
i = GET_RTX_LENGTH (code) - 1;
fmt = GET_RTX_FORMAT (code);
-
+
for (; i >= 0; i--)
{
if (fmt[i] == 'e')
x = tem;
goto repeat;
}
-
+
if (! store_ops_ok (tem, bb))
return 0;
}
else if (fmt[i] == 'E')
{
int j;
-
+
for (j = 0; j < XVECLEN (x, i); j++)
{
if (! store_ops_ok (XVECEXP (x, i, j), bb))
return;
dest = SET_DEST (dest);
-
+
if (GET_CODE (dest) != MEM || MEM_VOLATILE_P (dest)
|| GET_MODE (dest) == BLKmode)
return;
static int
compute_store_table ()
{
- int bb, ret;
+ int ret;
+ basic_block bb;
unsigned regno;
rtx insn, pat;
max_gcse_regno = max_reg_num ();
- reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks,
+ reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
max_gcse_regno);
- sbitmap_vector_zero (reg_set_in_block, n_basic_blocks);
+ sbitmap_vector_zero (reg_set_in_block, last_basic_block);
pre_ldst_mems = 0;
/* Find all the stores we care about. */
- for (bb = 0; bb < n_basic_blocks; bb++)
+ FOR_EACH_BB (bb)
{
- regvec = & (reg_set_in_block[bb]);
- for (insn = BLOCK_END (bb);
- insn && insn != PREV_INSN (BLOCK_HEAD (bb));
+ regvec = & (reg_set_in_block[bb->index]);
+ for (insn = bb->end;
+ insn && insn != PREV_INSN (bb->end);
insn = PREV_INSN (insn))
{
/* Ignore anything that is not a normal insn. */
if (GET_CODE (insn) == CALL_INSN)
{
bool clobbers_all = false;
-#ifdef NON_SAVING_SETJMP
+#ifdef NON_SAVING_SETJMP
if (NON_SAVING_SETJMP
&& find_reg_note (insn, REG_SETJMP, NULL_RTX))
clobbers_all = true;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (clobbers_all
|| TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
- SET_BIT (reg_set_in_block[bb], regno);
+ SET_BIT (reg_set_in_block[bb->index], regno);
}
-
+
pat = PATTERN (insn);
note_stores (pat, reg_set_info, NULL);
-
+
/* Now that we've marked regs, look for stores. */
if (GET_CODE (pat) == SET)
find_moveable_store (insn);
}
ret = enumerate_ldsts ();
-
+
if (gcse_file)
{
fprintf (gcse_file, "Store Motion Expressions.\n");
print_ldst_list (gcse_file);
}
-
+
return ret;
}
return 0;
}
-/* Go through the entire insn X, looking for any loads which might alias
+/* Go through the entire insn X, looking for any loads which might alias
STORE_PATTERN. Return 1 if found. */
static int
if (!x)
return 0;
- if (GET_CODE (x) == SET)
+ if (GET_CODE (x) == SET)
x = SET_SRC (x);
if (GET_CODE (x) == MEM)
/* Recursively process the insn. */
fmt = GET_RTX_FORMAT (GET_CODE (x));
-
+
for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
{
if (fmt[i] == 'e')
return ret;
}
-/* Check if INSN kills the store pattern X (is aliased with it).
+/* Check if INSN kills the store pattern X (is aliased with it).
Return 1 if it it does. */
-static int
+static int
store_killed_in_insn (x, insn)
rtx x, insn;
{
if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
return 0;
-
+
if (GET_CODE (insn) == CALL_INSN)
{
/* A normal or pure call might read from pattern,
but a const call will not. */
- if (CONST_OR_PURE_CALL_P (insn))
- {
- rtx link;
-
- for (link = CALL_INSN_FUNCTION_USAGE (insn);
- link;
- link = XEXP (link, 1))
- if (GET_CODE (XEXP (link, 0)) == USE
- && GET_CODE (XEXP (XEXP (link, 0), 0)) == MEM
- && GET_CODE (XEXP (XEXP (XEXP (link, 0), 0), 0)) == SCRATCH)
- return 1;
- return 0;
- }
- else
- return 1;
+ return ! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn);
}
-
+
if (GET_CODE (PATTERN (insn)) == SET)
{
rtx pat = PATTERN (insn);
/* Returns 1 if the expression X is loaded or clobbered on or after INSN
within basic block BB. */
-static int
+static int
store_killed_after (x, insn, bb)
rtx x, insn;
basic_block bb;
{
rtx last = bb->end;
-
+
if (insn == last)
return 0;
/* Check if the register operands of the store are OK in this block.
- Note that if registers are changed ANYWHERE in the block, we'll
- decide we can't move it, regardless of whether it changed above
+ Note that if registers are changed ANYWHERE in the block, we'll
+ decide we can't move it, regardless of whether it changed above
or below the store. This could be improved by checking the register
operands while lookinng for aliasing in each insn. */
if (!store_ops_ok (XEXP (x, 0), bb))
for ( ; insn && insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
if (store_killed_in_insn (x, insn))
return 1;
-
+
return 0;
}
/* Returns 1 if the expression X is loaded or clobbered on or before INSN
within basic block BB. */
-static int
+static int
store_killed_before (x, insn, bb)
rtx x, insn;
basic_block bb;
if (insn == first)
return store_killed_in_insn (x, insn);
-
+
/* Check if the register operands of the store are OK in this block.
- Note that if registers are changed ANYWHERE in the block, we'll
- decide we can't move it, regardless of whether it changed above
+ Note that if registers are changed ANYWHERE in the block, we'll
+ decide we can't move it, regardless of whether it changed above
or below the store. This could be improved by checking the register
operands while lookinng for aliasing in each insn. */
if (!store_ops_ok (XEXP (x, 0), bb))
for ( ; insn && insn != PREV_INSN (first); insn = PREV_INSN (insn))
if (store_killed_in_insn (x, insn))
return 1;
-
+
return 0;
}
determine which ones are not killed by aliasing, and generate
the appropriate vectors for gen and killed. */
static void
-build_store_vectors ()
+build_store_vectors ()
{
- basic_block bb;
- int b;
+ basic_block bb, b;
rtx insn, st;
struct ls_expr * ptr;
/* Build the gen_vector. This is any store in the table which is not killed
by aliasing later in its block. */
- ae_gen = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
- sbitmap_vector_zero (ae_gen, n_basic_blocks);
+ ae_gen = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
+ sbitmap_vector_zero (ae_gen, last_basic_block);
- st_antloc = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
- sbitmap_vector_zero (st_antloc, n_basic_blocks);
+ st_antloc = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
+ sbitmap_vector_zero (st_antloc, last_basic_block);
for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
- {
+ {
/* Put all the stores into either the antic list, or the avail list,
or both. */
rtx store_list = ptr->stores;
{
insn = XEXP (st, 0);
bb = BLOCK_FOR_INSN (insn);
-
+
if (!store_killed_after (ptr->pattern, insn, bb))
{
/* If we've already seen an availale expression in this block,
AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
AVAIL_STORE_LIST (ptr));
}
-
+
if (!store_killed_before (ptr->pattern, insn, bb))
{
SET_BIT (st_antloc[BLOCK_NUM (insn)], ptr->index);
ANTIC_STORE_LIST (ptr));
}
}
-
+
/* Free the original list of store insns. */
free_INSN_LIST_list (&store_list);
}
-
- ae_kill = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
- sbitmap_vector_zero (ae_kill, n_basic_blocks);
- transp = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
- sbitmap_vector_zero (transp, n_basic_blocks);
+ ae_kill = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
+ sbitmap_vector_zero (ae_kill, last_basic_block);
+
+ transp = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
+ sbitmap_vector_zero (transp, last_basic_block);
for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
- for (b = 0; b < n_basic_blocks; b++)
+ FOR_EACH_BB (b)
{
- if (store_killed_after (ptr->pattern, BLOCK_HEAD (b), BASIC_BLOCK (b)))
+ if (store_killed_after (ptr->pattern, b->head, b))
{
/* The anticipatable expression is not killed if it's gen'd. */
/*
- We leave this check out for now. If we have a code sequence
+ We leave this check out for now. If we have a code sequence
in a block which looks like:
ST MEMa = x
L y = MEMa
We should flag this as having an ANTIC expression, NOT
transparent, NOT killed, and AVAIL.
Unfortunately, since we haven't re-written all loads to
- use the reaching reg, we'll end up doing an incorrect
+ use the reaching reg, we'll end up doing an incorrect
Load in the middle here if we push the store down. It happens in
gcc.c-torture/execute/960311-1.c with -O3
If we always kill it in this case, we'll sometimes do
uneccessary work, but it shouldn't actually hurt anything.
if (!TEST_BIT (ae_gen[b], ptr->index)). */
- SET_BIT (ae_kill[b], ptr->index);
+ SET_BIT (ae_kill[b->index], ptr->index);
}
else
- SET_BIT (transp[b], ptr->index);
+ SET_BIT (transp[b->index], ptr->index);
}
/* Any block with no exits calls some non-returning function, so
we better mark the store killed here, or we might not store to
it at all. If we knew it was abort, we wouldn't have to store,
but we don't know that for sure. */
- if (gcse_file)
+ if (gcse_file)
{
fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n");
print_ldst_list (gcse_file);
- dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, n_basic_blocks);
- dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, n_basic_blocks);
- dump_sbitmap_vector (gcse_file, "Transpt", "", transp, n_basic_blocks);
- dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, n_basic_blocks);
+ dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block);
+ dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block);
+ dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block);
+ dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block);
}
}
-/* Insert an instruction at the begining of a basic block, and update
+/* Insert an instruction at the begining of a basic block, and update
the BLOCK_HEAD if needed. */
-static void
+static void
insert_insn_start_bb (insn, bb)
rtx insn;
basic_block bb;
reg = expr->reaching_reg;
insn = gen_move_insn (expr->pattern, reg);
-
+
/* If we are inserting this expression on ALL predecessor edges of a BB,
insert it at the start of the BB, and reset the insert bits on the other
edges so we don't try to insert it on the other edges. */
insert_insn_start_bb (insn, bb);
return 0;
}
-
+
/* We can't insert on this edge, so we'll insert at the head of the
successors block. See Morgan, sec 10.5. */
if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
}
insert_insn_on_edge (insn, e);
-
+
if (gcse_file)
{
fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
print_inline_rtx (gcse_file, insn, 6);
fprintf (gcse_file, "\n");
}
-
+
return 1;
}
basic_block bb;
{
rtx insn;
-
+
insn = gen_move_insn (reg, SET_SRC (PATTERN (del)));
insn = emit_insn_after (insn, del);
-
+
if (gcse_file)
{
- fprintf (gcse_file,
+ fprintf (gcse_file,
"STORE_MOTION delete insn in BB %d:\n ", bb->index);
print_inline_rtx (gcse_file, del, 6);
fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n ");
print_inline_rtx (gcse_file, insn, 6);
fprintf (gcse_file, "\n");
}
-
+
delete_insn (del);
}
if (expr->reaching_reg == NULL_RTX)
expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
-
- /* If there is more than 1 store, the earlier ones will be dead,
- but it doesn't hurt to replace them here. */
+
+ /* If there is more than 1 store, the earlier ones will be dead,
+ but it doesn't hurt to replace them here. */
reg = expr->reaching_reg;
-
+
for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
{
del = XEXP (i, 0);
if (BLOCK_FOR_INSN (del) == bb)
{
- /* We know there is only one since we deleted redundant
+ /* We know there is only one since we deleted redundant
ones during the available computation. */
replace_store_insn (reg, del, bb);
break;
/* Free memory used by store motion. */
-static void
+static void
free_store_memory ()
{
free_ldst_mems ();
-
+
if (ae_gen)
sbitmap_vector_free (ae_gen);
if (ae_kill)
sbitmap_vector_free (pre_delete_map);
if (reg_set_in_block)
sbitmap_vector_free (reg_set_in_block);
-
+
ae_gen = ae_kill = transp = st_antloc = NULL;
pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
}
static void
store_motion ()
{
+ basic_block bb;
int x;
struct ls_expr * ptr;
int update_flow = 0;
add_noreturn_fake_exit_edges ();
build_store_vectors ();
- edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
- st_antloc, ae_kill, &pre_insert_map,
+ edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
+ st_antloc, ae_kill, &pre_insert_map,
&pre_delete_map);
/* Now we want to insert the new stores which are going to be needed. */
for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
{
- for (x = 0; x < n_basic_blocks; x++)
- if (TEST_BIT (pre_delete_map[x], ptr->index))
- delete_store (ptr, BASIC_BLOCK (x));
+ FOR_EACH_BB (bb)
+ if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
+ delete_store (ptr, bb);
for (x = 0; x < NUM_EDGES (edge_list); x++)
if (TEST_BIT (pre_insert_map[x], ptr->index))
remove_fake_edges ();
end_alias_analysis ();
}
+
+#include "gt-gcse.h"
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