}
else
{
+ rtx def_reg = REG_P (SET_DEST (def_set)) ? SET_DEST (def_set) : NULL_RTX;
+
/* Look at all the uses of DEF_INSN, and see if they are not
killed between DEF_INSN and TARGET_INSN. */
for (use_rec = DF_INSN_INFO_USES (insn_info); *use_rec; use_rec++)
{
df_ref use = *use_rec;
+ if (def_reg && rtx_equal_p (DF_REF_REG (use), def_reg))
+ return false;
if (use_killed_between (use, def_insn, target_insn))
return false;
}
for (use_rec = DF_INSN_INFO_EQ_USES (insn_info); *use_rec; use_rec++)
{
df_ref use = *use_rec;
+ if (def_reg && rtx_equal_p (DF_REF_REG (use), def_reg))
+ return false;
if (use_killed_between (use, def_insn, target_insn))
return false;
}
{
rtx reg;
df_ref *use_vec;
- df_ref use, def;
+ df_ref use = 0, def;
reg = XEXP (src, 0);
#ifdef LOAD_EXTEND_OP