unsigned HOST_WIDE_INT, int);
static void do_cmp_and_jump (rtx, rtx, enum rtx_code, enum machine_mode, rtx);
static rtx expand_smod_pow2 (enum machine_mode, rtx, HOST_WIDE_INT);
+static rtx expand_sdiv_pow2 (enum machine_mode, rtx, HOST_WIDE_INT);
/* Nonzero means divides or modulus operations are relatively cheap for
powers of two, so don't use branches; emit the operation instead.
void
init_expmed (void)
{
- rtx reg, shift_insn, shiftadd_insn, shiftsub_insn;
- rtx shift_pat, shiftadd_pat, shiftsub_pat;
+ struct
+ {
+ struct rtx_def reg;
+ struct rtx_def plus; rtunion plus_fld1;
+ struct rtx_def neg;
+ struct rtx_def udiv; rtunion udiv_fld1;
+ struct rtx_def mult; rtunion mult_fld1;
+ struct rtx_def div; rtunion div_fld1;
+ struct rtx_def mod; rtunion mod_fld1;
+ struct rtx_def zext;
+ struct rtx_def wide_mult; rtunion wide_mult_fld1;
+ struct rtx_def wide_lshr; rtunion wide_lshr_fld1;
+ struct rtx_def wide_trunc;
+ struct rtx_def shift; rtunion shift_fld1;
+ struct rtx_def shift_mult; rtunion shift_mult_fld1;
+ struct rtx_def shift_add; rtunion shift_add_fld1;
+ struct rtx_def shift_sub; rtunion shift_sub_fld1;
+ } all;
+
rtx pow2[MAX_BITS_PER_WORD];
rtx cint[MAX_BITS_PER_WORD];
- int dummy;
int m, n;
enum machine_mode mode, wider_mode;
- start_sequence ();
-
zero_cost = rtx_cost (const0_rtx, 0);
- init_recog ();
-
for (m = 1; m < MAX_BITS_PER_WORD; m++)
{
pow2[m] = GEN_INT ((HOST_WIDE_INT) 1 << m);
cint[m] = GEN_INT (m);
}
+ memset (&all, 0, sizeof all);
+
+ PUT_CODE (&all.reg, REG);
+ REGNO (&all.reg) = 10000;
+
+ PUT_CODE (&all.plus, PLUS);
+ XEXP (&all.plus, 0) = &all.reg;
+ XEXP (&all.plus, 1) = &all.reg;
+
+ PUT_CODE (&all.neg, NEG);
+ XEXP (&all.neg, 0) = &all.reg;
+
+ PUT_CODE (&all.udiv, UDIV);
+ XEXP (&all.udiv, 0) = &all.reg;
+ XEXP (&all.udiv, 1) = &all.reg;
+
+ PUT_CODE (&all.mult, MULT);
+ XEXP (&all.mult, 0) = &all.reg;
+ XEXP (&all.mult, 1) = &all.reg;
+
+ PUT_CODE (&all.div, DIV);
+ XEXP (&all.div, 0) = &all.reg;
+ XEXP (&all.div, 1) = 32 < MAX_BITS_PER_WORD ? cint[32] : GEN_INT (32);
+
+ PUT_CODE (&all.mod, MOD);
+ XEXP (&all.mod, 0) = &all.reg;
+ XEXP (&all.mod, 1) = XEXP (&all.div, 1);
+
+ PUT_CODE (&all.zext, ZERO_EXTEND);
+ XEXP (&all.zext, 0) = &all.reg;
+
+ PUT_CODE (&all.wide_mult, MULT);
+ XEXP (&all.wide_mult, 0) = &all.zext;
+ XEXP (&all.wide_mult, 1) = &all.zext;
+
+ PUT_CODE (&all.wide_lshr, LSHIFTRT);
+ XEXP (&all.wide_lshr, 0) = &all.wide_mult;
+
+ PUT_CODE (&all.wide_trunc, TRUNCATE);
+ XEXP (&all.wide_trunc, 0) = &all.wide_lshr;
+
+ PUT_CODE (&all.shift, ASHIFT);
+ XEXP (&all.shift, 0) = &all.reg;
+
+ PUT_CODE (&all.shift_mult, MULT);
+ XEXP (&all.shift_mult, 0) = &all.reg;
+
+ PUT_CODE (&all.shift_add, PLUS);
+ XEXP (&all.shift_add, 0) = &all.shift_mult;
+ XEXP (&all.shift_add, 1) = &all.reg;
+
+ PUT_CODE (&all.shift_sub, MINUS);
+ XEXP (&all.shift_sub, 0) = &all.shift_mult;
+ XEXP (&all.shift_sub, 1) = &all.reg;
+
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- reg = gen_rtx_REG (mode, 10000);
- add_cost[mode] = rtx_cost (gen_rtx_PLUS (mode, reg, reg), SET);
- neg_cost[mode] = rtx_cost (gen_rtx_NEG (mode, reg), SET);
- div_cost[mode] = rtx_cost (gen_rtx_UDIV (mode, reg, reg), SET);
- mul_cost[mode] = rtx_cost (gen_rtx_MULT (mode, reg, reg), SET);
-
- sdiv_pow2_cheap[mode]
- = (rtx_cost (gen_rtx_DIV (mode, reg, GEN_INT (32)), SET)
- <= 2 * add_cost[mode]);
- smod_pow2_cheap[mode]
- = (rtx_cost (gen_rtx_MOD (mode, reg, GEN_INT (32)), SET)
- <= 2 * add_cost[mode]);
+ PUT_MODE (&all.reg, mode);
+ PUT_MODE (&all.plus, mode);
+ PUT_MODE (&all.neg, mode);
+ PUT_MODE (&all.udiv, mode);
+ PUT_MODE (&all.mult, mode);
+ PUT_MODE (&all.div, mode);
+ PUT_MODE (&all.mod, mode);
+ PUT_MODE (&all.wide_trunc, mode);
+ PUT_MODE (&all.shift, mode);
+ PUT_MODE (&all.shift_mult, mode);
+ PUT_MODE (&all.shift_add, mode);
+ PUT_MODE (&all.shift_sub, mode);
+
+ add_cost[mode] = rtx_cost (&all.plus, SET);
+ neg_cost[mode] = rtx_cost (&all.neg, SET);
+ div_cost[mode] = rtx_cost (&all.udiv, SET);
+ mul_cost[mode] = rtx_cost (&all.mult, SET);
+
+ sdiv_pow2_cheap[mode] = (rtx_cost (&all.div, SET) <= 2 * add_cost[mode]);
+ smod_pow2_cheap[mode] = (rtx_cost (&all.mod, SET) <= 2 * add_cost[mode]);
wider_mode = GET_MODE_WIDER_MODE (mode);
if (wider_mode != VOIDmode)
{
- mul_widen_cost[wider_mode]
- = rtx_cost (gen_rtx_MULT (wider_mode,
- gen_rtx_ZERO_EXTEND (wider_mode, reg),
- gen_rtx_ZERO_EXTEND (wider_mode, reg)),
- SET);
- mul_highpart_cost[mode]
- = rtx_cost (gen_rtx_TRUNCATE
- (mode,
- gen_rtx_LSHIFTRT (wider_mode,
- gen_rtx_MULT (wider_mode,
- gen_rtx_ZERO_EXTEND
- (wider_mode, reg),
- gen_rtx_ZERO_EXTEND
- (wider_mode, reg)),
- GEN_INT (GET_MODE_BITSIZE (mode)))),
- SET);
+ PUT_MODE (&all.zext, wider_mode);
+ PUT_MODE (&all.wide_mult, wider_mode);
+ PUT_MODE (&all.wide_lshr, wider_mode);
+ XEXP (&all.wide_lshr, 1) = GEN_INT (GET_MODE_BITSIZE (mode));
+
+ mul_widen_cost[wider_mode] = rtx_cost (&all.wide_mult, SET);
+ mul_highpart_cost[mode] = rtx_cost (&all.wide_trunc, SET);
}
- shift_insn = emit_insn (gen_rtx_SET (VOIDmode, reg,
- gen_rtx_ASHIFT (mode, reg,
- const0_rtx)));
-
- shiftadd_insn
- = emit_insn (gen_rtx_SET (VOIDmode, reg,
- gen_rtx_PLUS (mode,
- gen_rtx_MULT (mode,
- reg,
- const0_rtx),
- reg)));
-
- shiftsub_insn
- = emit_insn (gen_rtx_SET (VOIDmode, reg,
- gen_rtx_MINUS (mode,
- gen_rtx_MULT (mode,
- reg,
- const0_rtx),
- reg)));
-
- shift_pat = PATTERN (shift_insn);
- shiftadd_pat = PATTERN (shiftadd_insn);
- shiftsub_pat = PATTERN (shiftsub_insn);
-
- shift_cost[mode][0] = 0;
- shiftadd_cost[mode][0] = shiftsub_cost[mode][0] = add_cost[mode];
-
- n = MIN (MAX_BITS_PER_WORD, GET_MODE_BITSIZE (mode));
- for (m = 1; m < n; m++)
- {
- shift_cost[mode][m] = 32000;
- XEXP (SET_SRC (shift_pat), 1) = cint[m];
- if (recog (shift_pat, shift_insn, &dummy) >= 0)
- shift_cost[mode][m] = rtx_cost (SET_SRC (shift_pat), SET);
-
- shiftadd_cost[mode][m] = 32000;
- XEXP (XEXP (SET_SRC (shiftadd_pat), 0), 1) = pow2[m];
- if (recog (shiftadd_pat, shiftadd_insn, &dummy) >= 0)
- shiftadd_cost[mode][m] = rtx_cost (SET_SRC (shiftadd_pat), SET);
-
- shiftsub_cost[mode][m] = 32000;
- XEXP (XEXP (SET_SRC (shiftsub_pat), 0), 1) = pow2[m];
- if (recog (shiftsub_pat, shiftsub_insn, &dummy) >= 0)
- shiftsub_cost[mode][m] = rtx_cost (SET_SRC (shiftsub_pat), SET);
- }
- }
+ shift_cost[mode][0] = 0;
+ shiftadd_cost[mode][0] = shiftsub_cost[mode][0] = add_cost[mode];
+
+ n = MIN (MAX_BITS_PER_WORD, GET_MODE_BITSIZE (mode));
+ for (m = 1; m < n; m++)
+ {
+ XEXP (&all.shift, 1) = cint[m];
+ XEXP (&all.shift_mult, 1) = pow2[m];
- end_sequence ();
+ shift_cost[mode][m] = rtx_cost (&all.shift, SET);
+ shiftadd_cost[mode][m] = rtx_cost (&all.shift_add, SET);
+ shiftsub_cost[mode][m] = rtx_cost (&all.shift_sub, SET);
+ }
+ }
}
/* Return an rtx representing minus the value of X.
rtx
store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum, enum machine_mode fieldmode,
- rtx value, HOST_WIDE_INT total_size)
+ rtx value)
{
unsigned int unit
= (MEM_P (str_rtx)) ? BITS_PER_UNIT : BITS_PER_WORD;
enum machine_mode op_mode = mode_for_extraction (EP_insv, 3);
- /* Discount the part of the structure before the desired byte.
- We need to know how many bytes are safe to reference after it. */
- if (total_size >= 0)
- total_size -= (bitpos / BIGGEST_ALIGNMENT
- * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
-
while (GET_CODE (op0) == SUBREG)
{
/* The following line once was done only if WORDS_BIG_ENDIAN,
op0 = SUBREG_REG (op0);
}
- value = protect_from_queue (value, 0);
-
- /* Use vec_extract patterns for extracting parts of vectors whenever
+ /* Use vec_set patterns for inserting parts of vectors whenever
available. */
if (VECTOR_MODE_P (GET_MODE (op0))
&& !MEM_P (op0)
store_bit_field (op0, MIN (BITS_PER_WORD,
bitsize - i * BITS_PER_WORD),
bitnum + bit_offset, word_mode,
- operand_subword_force (value, wordnum, fieldmode),
- total_size);
+ operand_subword_force (value, wordnum, fieldmode));
}
return value;
}
}
offset = 0;
}
- else
- op0 = protect_from_queue (op0, 1);
/* If VALUE is a floating-point mode, access it as an integer of the
corresponding size. This can occur on a machine with 64 bit registers
/* Fetch that unit, store the bitfield in it, then store
the unit. */
tempreg = copy_to_reg (op0);
- store_bit_field (tempreg, bitsize, bitpos, fieldmode, value,
- total_size);
+ store_bit_field (tempreg, bitsize, bitpos, fieldmode, value);
emit_move_insn (op0, tempreg);
return value;
}
The field starts at position BITPOS within the byte.
(If OP0 is a register, it may be a full word or a narrower mode,
but BITPOS still counts within a full word,
- which is significant on bigendian machines.)
-
- Note that protect_from_queue has already been done on OP0 and VALUE. */
+ which is significant on bigendian machines.) */
static void
store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset,
containing BITSIZE bits, starting at BITNUM,
and put it in TARGET if possible (if TARGET is nonzero).
Regardless of TARGET, we return the rtx for where the value is placed.
- It may be a QUEUED.
STR_RTX is the structure containing the byte (a REG or MEM).
UNSIGNEDP is nonzero if this is an unsigned bit field.
rtx
extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
- enum machine_mode mode, enum machine_mode tmode,
- HOST_WIDE_INT total_size)
+ enum machine_mode mode, enum machine_mode tmode)
{
unsigned int unit
= (MEM_P (str_rtx)) ? BITS_PER_UNIT : BITS_PER_WORD;
enum machine_mode mode1;
int byte_offset;
- /* Discount the part of the structure before the desired byte.
- We need to know how many bytes are safe to reference after it. */
- if (total_size >= 0)
- total_size -= (bitpos / BIGGEST_ALIGNMENT
- * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
-
if (tmode == VOIDmode)
tmode = mode;
&& !MEM_P (op0)
&& (vec_extract_optab->handlers[GET_MODE (op0)].insn_code
!= CODE_FOR_nothing)
- && ((bitsize + bitnum) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
- == bitsize / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
+ && ((bitnum + bitsize - 1) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
+ == bitnum / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
{
enum machine_mode outermode = GET_MODE (op0);
enum machine_mode innermode = GET_MODE_INNER (outermode);
int icode = (int) vec_extract_optab->handlers[outermode].insn_code;
- int pos = bitnum / GET_MODE_BITSIZE (innermode);
+ unsigned HOST_WIDE_INT pos = bitnum / GET_MODE_BITSIZE (innermode);
rtx rtxpos = GEN_INT (pos);
rtx src = op0;
rtx dest = NULL, pat, seq;
= extract_bit_field (op0, MIN (BITS_PER_WORD,
bitsize - i * BITS_PER_WORD),
bitnum + bit_offset, 1, target_part, mode,
- word_mode, total_size);
+ word_mode);
if (target_part == 0)
abort ();
}
offset = 0;
}
- else
- op0 = protect_from_queue (str_rtx, 1);
/* Now OFFSET is nonzero only for memory operands. */
bitsize_rtx = GEN_INT (bitsize);
bitpos_rtx = GEN_INT (xbitpos);
- pat = gen_extzv (protect_from_queue (xtarget, 1),
- xop0, bitsize_rtx, bitpos_rtx);
+ pat = gen_extzv (xtarget, xop0, bitsize_rtx, bitpos_rtx);
if (pat)
{
emit_insn (pat);
bitsize_rtx = GEN_INT (bitsize);
bitpos_rtx = GEN_INT (xbitpos);
- pat = gen_extv (protect_from_queue (xtarget, 1),
- xop0, bitsize_rtx, bitpos_rtx);
+ pat = gen_extv (xtarget, xop0, bitsize_rtx, bitpos_rtx);
if (pat)
{
emit_insn (pat);
int opno;
enum machine_mode nmode;
- /* op0 must be register to make mult_cost match the precomputed
- shiftadd_cost array. */
- op0 = protect_from_queue (op0, 0);
-
/* Avoid referencing memory over and over.
For speed, but also for correctness when mem is volatile. */
if (MEM_P (op0))
emit_label (label);
return result;
}
+
+/* Expand signed division of OP0 by a power of two D in mode MODE.
+ This routine is only called for positive values of D. */
+
+static rtx
+expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
+{
+ rtx temp, label;
+ tree shift;
+ int logd;
+
+ logd = floor_log2 (d);
+ shift = build_int_2 (logd, 0);
+
+ if (d == 2 && BRANCH_COST >= 1)
+ {
+ temp = gen_reg_rtx (mode);
+ temp = emit_store_flag (temp, LT, op0, const0_rtx, mode, 0, 1);
+ temp = expand_binop (mode, add_optab, temp, op0, NULL_RTX,
+ 0, OPTAB_LIB_WIDEN);
+ return expand_shift (RSHIFT_EXPR, mode, temp, shift, NULL_RTX, 0);
+ }
+
+ if (BRANCH_COST >= 2)
+ {
+ int ushift = GET_MODE_BITSIZE (mode) - logd;
+
+ temp = gen_reg_rtx (mode);
+ temp = emit_store_flag (temp, LT, op0, const0_rtx, mode, 0, -1);
+ if (shift_cost[mode][ushift] > COSTS_N_INSNS (1))
+ temp = expand_binop (mode, and_optab, temp, GEN_INT (d - 1),
+ NULL_RTX, 0, OPTAB_LIB_WIDEN);
+ else
+ temp = expand_shift (RSHIFT_EXPR, mode, temp,
+ build_int_2 (ushift, 0), NULL_RTX, 1);
+ temp = expand_binop (mode, add_optab, temp, op0, NULL_RTX,
+ 0, OPTAB_LIB_WIDEN);
+ return expand_shift (RSHIFT_EXPR, mode, temp, shift, NULL_RTX, 0);
+ }
+
+ label = gen_label_rtx ();
+ temp = copy_to_mode_reg (mode, op0);
+ do_cmp_and_jump (temp, const0_rtx, GE, mode, label);
+ expand_inc (temp, GEN_INT (d - 1));
+ emit_label (label);
+ return expand_shift (RSHIFT_EXPR, mode, temp, shift, NULL_RTX, 0);
+}
\f
/* Emit the code to divide OP0 by OP1, putting the result in TARGET
if that is convenient, and returning where the result is.
if (remainder)
return gen_lowpart (mode, remainder);
}
- lgup = floor_log2 (abs_d);
- if (BRANCH_COST < 1 || (abs_d != 2 && BRANCH_COST < 3))
- {
- rtx label = gen_label_rtx ();
- rtx t1;
-
- t1 = copy_to_mode_reg (compute_mode, op0);
- do_cmp_and_jump (t1, const0_rtx, GE,
- compute_mode, label);
- expand_inc (t1, gen_int_mode (abs_d - 1,
- compute_mode));
- emit_label (label);
- quotient = expand_shift (RSHIFT_EXPR, compute_mode, t1,
- build_int_2 (lgup, 0),
- tquotient, 0);
- }
- else
- {
- rtx t1, t2, t3;
- t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0,
- build_int_2 (size - 1, 0),
- NULL_RTX, 0);
- t2 = expand_shift (RSHIFT_EXPR, compute_mode, t1,
- build_int_2 (size - lgup, 0),
- NULL_RTX, 1);
- t3 = force_operand (gen_rtx_PLUS (compute_mode,
- op0, t2),
- NULL_RTX);
- quotient = expand_shift (RSHIFT_EXPR, compute_mode, t3,
- build_int_2 (lgup, 0),
- tquotient, 0);
- }
+ quotient = expand_sdiv_pow2 (compute_mode, op0, abs_d);
/* We have computed OP0 / abs(OP1). If OP1 is negative,
negate the quotient. */
rtx last = get_last_insn ();
rtx pattern, comparison;
- /* ??? Ok to do this and then fail? */
- op0 = protect_from_queue (op0, 0);
- op1 = protect_from_queue (op1, 0);
-
if (unsignedp)
code = unsigned_condition (code);
first. */
if (GET_MODE_SIZE (target_mode) > GET_MODE_SIZE (mode))
{
- op0 = protect_from_queue (op0, 0);
op0 = convert_modes (target_mode, mode, op0, 0);
mode = target_mode;
}
insn_operand_predicate_fn pred;
/* We think we may be able to do this with a scc insn. Emit the
- comparison and then the scc insn.
-
- compare_from_rtx may call emit_queue, which would be deleted below
- if the scc insn fails. So call it ourselves before setting LAST.
- Likewise for do_pending_stack_adjust. */
+ comparison and then the scc insn. */
- emit_queue ();
do_pending_stack_adjust ();
last = get_last_insn ();
tem = expand_unop (mode, ffs_optab, op0, subtarget, 1);
else if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
{
- op0 = protect_from_queue (op0, 0);
tem = convert_modes (word_mode, mode, op0, 1);
mode = word_mode;
}
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