static void store_fixed_bit_field PARAMS ((rtx, unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT,
- unsigned HOST_WIDE_INT, rtx,
- unsigned int));
+ unsigned HOST_WIDE_INT, rtx));
static void store_split_bit_field PARAMS ((rtx, unsigned HOST_WIDE_INT,
- unsigned HOST_WIDE_INT, rtx,
- unsigned int));
+ unsigned HOST_WIDE_INT, rtx));
static rtx extract_fixed_bit_field PARAMS ((enum machine_mode, rtx,
unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT,
- rtx, int, unsigned int));
+ rtx, int));
static rtx mask_rtx PARAMS ((enum machine_mode, int,
int, int));
static rtx lshift_value PARAMS ((enum machine_mode, rtx,
int, int));
static rtx extract_split_bit_field PARAMS ((rtx, unsigned HOST_WIDE_INT,
- unsigned HOST_WIDE_INT, int,
- unsigned int));
+ unsigned HOST_WIDE_INT, int));
static void do_cmp_and_jump PARAMS ((rtx, rtx, enum rtx_code,
enum machine_mode, rtx));
else, we use the mode of operand 3. */
rtx
-store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
+store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, total_size)
rtx str_rtx;
unsigned HOST_WIDE_INT bitsize;
unsigned HOST_WIDE_INT bitnum;
enum machine_mode fieldmode;
rtx value;
- unsigned int align;
HOST_WIDE_INT total_size;
{
unsigned int unit
= (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD;
unsigned HOST_WIDE_INT offset = bitnum / unit;
unsigned HOST_WIDE_INT bitpos = bitnum % unit;
- register rtx op0 = str_rtx;
+ rtx op0 = str_rtx;
enum machine_mode op_mode = mode_for_extraction (EP_insv, 3);
- /* It is wrong to have align==0, since every object is aligned at
- least at a bit boundary. This usually means a bug elsewhere. */
- if (align == 0)
- abort ();
-
/* Discount the part of the structure before the desired byte.
We need to know how many bytes are safe to reference after it. */
if (total_size >= 0)
&& (GET_CODE (op0) != MEM
? (GET_MODE_SIZE (fieldmode) >= UNITS_PER_WORD
|| GET_MODE_SIZE (GET_MODE (op0)) == GET_MODE_SIZE (fieldmode))
- : (! SLOW_UNALIGNED_ACCESS (fieldmode, align)
+ : (! SLOW_UNALIGNED_ACCESS (fieldmode, MEM_ALIGN (op0))
|| (offset * BITS_PER_UNIT % bitsize == 0
- && align % GET_MODE_BITSIZE (fieldmode) == 0))))
+ && MEM_ALIGN (op0) % GET_MODE_BITSIZE (fieldmode) == 0))))
{
if (GET_MODE (op0) != fieldmode)
{
if I is 1, use the next to lowest word; and so on. */
unsigned int wordnum = (backwards ? nwords - i - 1 : i);
unsigned int bit_offset = (backwards
- ? MAX ((int) bitsize - ((int) i + 1)
- * BITS_PER_WORD,
- 0)
- : (int) i * BITS_PER_WORD);
+ ? MAX ((int) bitsize - ((int) i + 1)
+ * BITS_PER_WORD,
+ 0)
+ : (int) i * BITS_PER_WORD);
store_bit_field (op0, MIN (BITS_PER_WORD,
bitsize - i * BITS_PER_WORD),
(GET_MODE (value) == VOIDmode
? fieldmode
: GET_MODE (value))),
- align, total_size);
+ total_size);
}
return value;
}
offset = 0;
}
else
- {
- op0 = protect_from_queue (op0, 1);
- }
+ op0 = protect_from_queue (op0, 1);
/* If VALUE is a floating-point mode, access it as an integer of the
corresponding size. This can occur on a machine with 64 bit registers
if (GET_MODE (op0) == BLKmode
|| GET_MODE_SIZE (GET_MODE (op0)) > GET_MODE_SIZE (maxmode))
bestmode
- = get_best_mode (bitsize, bitnum, align, maxmode,
+ = get_best_mode (bitsize, bitnum, MEM_ALIGN (op0), maxmode,
MEM_VOLATILE_P (op0));
else
bestmode = GET_MODE (op0);
if (bestmode == VOIDmode
- || (SLOW_UNALIGNED_ACCESS (bestmode, align)
- && GET_MODE_BITSIZE (bestmode) > align))
+ || (SLOW_UNALIGNED_ACCESS (bestmode, MEM_ALIGN (op0))
+ && GET_MODE_BITSIZE (bestmode) > MEM_ALIGN (op0)))
goto insv_loses;
- /* Adjust address to point to the containing unit of that mode. */
+ /* Adjust address to point to the containing unit of that mode.
+ Compute offset as multiple of this unit, counting in bytes. */
unit = GET_MODE_BITSIZE (bestmode);
- /* Compute offset as multiple of this unit, counting in bytes. */
offset = (bitnum / unit) * GET_MODE_SIZE (bestmode);
bitpos = bitnum % unit;
op0 = adjust_address (op0, bestmode, offset);
the unit. */
tempreg = copy_to_reg (op0);
store_bit_field (tempreg, bitsize, bitpos, fieldmode, value,
- align, total_size);
+ total_size);
emit_move_insn (op0, tempreg);
return value;
}
if we must narrow it, be sure we do it correctly. */
if (GET_MODE_SIZE (GET_MODE (value)) < GET_MODE_SIZE (maxmode))
- {
- /* Avoid making subreg of a subreg, or of a mem. */
- if (GET_CODE (value1) != REG)
- value1 = copy_to_reg (value1);
- value1 = gen_rtx_SUBREG (maxmode, value1, 0);
- }
+ value1 = simplify_gen_subreg (maxmode, value1,
+ GET_MODE (value1), 0);
else
value1 = gen_lowpart (maxmode, value1);
}
else
{
delete_insns_since (last);
- store_fixed_bit_field (op0, offset, bitsize, bitpos, value, align);
+ store_fixed_bit_field (op0, offset, bitsize, bitpos, value);
}
}
else
insv_loses:
/* Insv is not available; store using shifts and boolean ops. */
- store_fixed_bit_field (op0, offset, bitsize, bitpos, value, align);
+ store_fixed_bit_field (op0, offset, bitsize, bitpos, value);
return value;
}
\f
(If OP0 is a register, it may be a full word or a narrower mode,
but BITPOS still counts within a full word,
which is significant on bigendian machines.)
- STRUCT_ALIGN is the alignment the structure is known to have.
Note that protect_from_queue has already been done on OP0 and VALUE. */
static void
-store_fixed_bit_field (op0, offset, bitsize, bitpos, value, struct_align)
- register rtx op0;
+store_fixed_bit_field (op0, offset, bitsize, bitpos, value)
+ rtx op0;
unsigned HOST_WIDE_INT offset, bitsize, bitpos;
- register rtx value;
- unsigned int struct_align;
+ rtx value;
{
- register enum machine_mode mode;
+ enum machine_mode mode;
unsigned int total_bits = BITS_PER_WORD;
rtx subtarget, temp;
int all_zero = 0;
int all_one = 0;
- if (! SLOW_UNALIGNED_ACCESS (word_mode, struct_align))
- struct_align = BIGGEST_ALIGNMENT;
-
/* There is a case not handled here:
a structure with a known alignment of just a halfword
and a field split across two aligned halfwords within the structure.
/* Special treatment for a bit field split across two registers. */
if (bitsize + bitpos > BITS_PER_WORD)
{
- store_split_bit_field (op0, bitsize, bitpos,
- value, BITS_PER_WORD);
+ store_split_bit_field (op0, bitsize, bitpos, value);
return;
}
}
|| GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode))
mode = word_mode;
mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT,
- struct_align, mode,
- GET_CODE (op0) == MEM && MEM_VOLATILE_P (op0));
+ MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0));
if (mode == VOIDmode)
{
/* The only way this should occur is if the field spans word
boundaries. */
- store_split_bit_field (op0,
- bitsize, bitpos + offset * BITS_PER_UNIT,
- value, struct_align);
+ store_split_bit_field (op0, bitsize, bitpos + offset * BITS_PER_UNIT,
+ value);
return;
}
if (GET_CODE (value) == CONST_INT)
{
- register HOST_WIDE_INT v = INTVAL (value);
+ HOST_WIDE_INT v = INTVAL (value);
if (bitsize < HOST_BITS_PER_WIDE_INT)
v &= ((HOST_WIDE_INT) 1 << bitsize) - 1;
BITSIZE is the field width; BITPOS the position of its first bit
(within the word).
VALUE is the value to store.
- ALIGN is the known alignment of OP0.
- This is also the size of the memory objects to be used.
This does not yet handle fields wider than BITS_PER_WORD. */
static void
-store_split_bit_field (op0, bitsize, bitpos, value, align)
+store_split_bit_field (op0, bitsize, bitpos, value)
rtx op0;
unsigned HOST_WIDE_INT bitsize, bitpos;
rtx value;
- unsigned int align;
{
unsigned int unit;
unsigned int bitsdone = 0;
if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
unit = BITS_PER_WORD;
else
- unit = MIN (align, BITS_PER_WORD);
+ unit = MIN (MEM_ALIGN (op0), BITS_PER_WORD);
/* If VALUE is a constant other than a CONST_INT, get it into a register in
WORD_MODE. If we can do this using gen_lowpart_common, do so. Note
else
/* The args are chosen so that the last part includes the
lsb. Give extract_bit_field the value it needs (with
- endianness compensation) to fetch the piece we want.
-
- ??? We have no idea what the alignment of VALUE is, so
- we have to use a guess. */
- part
- = extract_fixed_bit_field
- (word_mode, value, 0, thissize,
- total_bits - bitsize + bitsdone, NULL_RTX, 1,
- GET_MODE (value) == VOIDmode
- ? UNITS_PER_WORD
- : (GET_MODE (value) == BLKmode
- ? 1 : GET_MODE_ALIGNMENT (GET_MODE (value))));
+ endianness compensation) to fetch the piece we want. */
+ part = extract_fixed_bit_field (word_mode, value, 0, thissize,
+ total_bits - bitsize + bitsdone,
+ NULL_RTX, 1);
}
else
{
>> bitsdone)
& (((HOST_WIDE_INT) 1 << thissize) - 1));
else
- part
- = extract_fixed_bit_field
- (word_mode, value, 0, thissize, bitsdone, NULL_RTX, 1,
- GET_MODE (value) == VOIDmode
- ? UNITS_PER_WORD
- : (GET_MODE (value) == BLKmode
- ? 1 : GET_MODE_ALIGNMENT (GET_MODE (value))));
+ part = extract_fixed_bit_field (word_mode, value, 0, thissize,
+ bitsdone, NULL_RTX, 1);
}
/* If OP0 is a register, then handle OFFSET here.
/* OFFSET is in UNITs, and UNIT is in bits.
store_fixed_bit_field wants offset in bytes. */
- store_fixed_bit_field (word, offset * unit / BITS_PER_UNIT,
- thissize, thispos, part, align);
+ store_fixed_bit_field (word, offset * unit / BITS_PER_UNIT, thissize,
+ thispos, part);
bitsdone += thissize;
}
}
TMODE is the mode the caller would like the value to have;
but the value may be returned with type MODE instead.
- ALIGN is the alignment that STR_RTX is known to have.
TOTAL_SIZE is the size in bytes of the containing structure,
or -1 if varying.
rtx
extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
- target, mode, tmode, align, total_size)
+ target, mode, tmode, total_size)
rtx str_rtx;
unsigned HOST_WIDE_INT bitsize;
unsigned HOST_WIDE_INT bitnum;
int unsignedp;
rtx target;
enum machine_mode mode, tmode;
- unsigned int align;
HOST_WIDE_INT total_size;
{
unsigned int unit
= (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD;
unsigned HOST_WIDE_INT offset = bitnum / unit;
unsigned HOST_WIDE_INT bitpos = bitnum % unit;
- register rtx op0 = str_rtx;
+ rtx op0 = str_rtx;
rtx spec_target = target;
rtx spec_target_subreg = 0;
enum machine_mode int_mode;
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (GET_MODE (op0))))
|| (GET_CODE (op0) == MEM
- && (! SLOW_UNALIGNED_ACCESS (mode, align)
+ && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0))
|| (offset * BITS_PER_UNIT % bitsize == 0
- && align % bitsize == 0))))
+ && MEM_ALIGN (op0) % bitsize == 0))))
&& ((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode)
&& bitpos % BITS_PER_WORD == 0)
|| (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode
= extract_bit_field (op0, MIN (BITS_PER_WORD,
bitsize - i * BITS_PER_WORD),
bitnum + bit_offset, 1, target_part, mode,
- word_mode, align, total_size);
+ word_mode, total_size);
if (target_part == 0)
abort ();
total_words = GET_MODE_SIZE (GET_MODE (target)) / UNITS_PER_WORD;
for (i = nwords; i < total_words; i++)
- {
- int wordnum = WORDS_BIG_ENDIAN ? total_words - i - 1 : i;
- rtx target_part = operand_subword (target, wordnum, 1, VOIDmode);
- emit_move_insn (target_part, const0_rtx);
- }
+ emit_move_insn
+ (operand_subword (target,
+ WORDS_BIG_ENDIAN ? total_words - i - 1 : i,
+ 1, VOIDmode),
+ const0_rtx);
}
return target;
}
offset = 0;
}
else
- {
- op0 = protect_from_queue (str_rtx, 1);
- }
+ op0 = protect_from_queue (str_rtx, 1);
/* Now OFFSET is nonzero only for memory operands. */
if (GET_MODE (xop0) == BLKmode
|| (GET_MODE_SIZE (GET_MODE (op0))
> GET_MODE_SIZE (maxmode)))
- bestmode = get_best_mode (bitsize, bitnum, align, maxmode,
+ bestmode = get_best_mode (bitsize, bitnum,
+ MEM_ALIGN (xop0), maxmode,
MEM_VOLATILE_P (xop0));
else
bestmode = GET_MODE (xop0);
if (bestmode == VOIDmode
- || (SLOW_UNALIGNED_ACCESS (bestmode, align)
- && GET_MODE_BITSIZE (bestmode) > align))
+ || (SLOW_UNALIGNED_ACCESS (bestmode, MEM_ALIGN (xop0))
+ && GET_MODE_BITSIZE (bestmode) > MEM_ALIGN (xop0)))
goto extzv_loses;
/* Compute offset as multiple of this unit,
{
delete_insns_since (last);
target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
- bitpos, target, 1, align);
+ bitpos, target, 1);
}
}
else
- extzv_loses:
- target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
- bitpos, target, 1, align);
+ extzv_loses:
+ target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
+ bitpos, target, 1);
}
else
{
if (GET_MODE (xop0) == BLKmode
|| (GET_MODE_SIZE (GET_MODE (op0))
> GET_MODE_SIZE (maxmode)))
- bestmode = get_best_mode (bitsize, bitnum, align, maxmode,
+ bestmode = get_best_mode (bitsize, bitnum,
+ MEM_ALIGN (xop0), maxmode,
MEM_VOLATILE_P (xop0));
else
bestmode = GET_MODE (xop0);
if (bestmode == VOIDmode
- || (SLOW_UNALIGNED_ACCESS (bestmode, align)
- && GET_MODE_BITSIZE (bestmode) > align))
+ || (SLOW_UNALIGNED_ACCESS (bestmode, MEM_ALIGN (xop0))
+ && GET_MODE_BITSIZE (bestmode) > MEM_ALIGN (xop0)))
goto extv_loses;
/* Compute offset as multiple of this unit,
{
delete_insns_since (last);
target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
- bitpos, target, 0, align);
+ bitpos, target, 0);
}
}
else
- extv_loses:
- target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
- bitpos, target, 0, align);
+ extv_loses:
+ target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
+ bitpos, target, 0);
}
if (target == spec_target)
return target;
UNSIGNEDP is nonzero for an unsigned bit field (don't sign-extend value).
If TARGET is nonzero, attempts to store the value there
and return TARGET, but this is not guaranteed.
- If TARGET is not used, create a pseudo-reg of mode TMODE for the value.
-
- ALIGN is the alignment that STR_RTX is known to have. */
+ If TARGET is not used, create a pseudo-reg of mode TMODE for the value. */
static rtx
extract_fixed_bit_field (tmode, op0, offset, bitsize, bitpos,
- target, unsignedp, align)
+ target, unsignedp)
enum machine_mode tmode;
- register rtx op0, target;
+ rtx op0, target;
unsigned HOST_WIDE_INT offset, bitsize, bitpos;
int unsignedp;
- unsigned int align;
{
unsigned int total_bits = BITS_PER_WORD;
enum machine_mode mode;
{
/* Special treatment for a bit field split across two registers. */
if (bitsize + bitpos > BITS_PER_WORD)
- return extract_split_bit_field (op0, bitsize, bitpos,
- unsignedp, align);
+ return extract_split_bit_field (op0, bitsize, bitpos, unsignedp);
}
else
{
includes the entire field. If such a mode would be larger than
a word, we won't be doing the extraction the normal way. */
- mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT, align,
- word_mode,
- GET_CODE (op0) == MEM && MEM_VOLATILE_P (op0));
+ mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT,
+ MEM_ALIGN (op0), word_mode, MEM_VOLATILE_P (op0));
if (mode == VOIDmode)
/* The only way this should occur is if the field spans word
boundaries. */
return extract_split_bit_field (op0, bitsize,
bitpos + offset * BITS_PER_UNIT,
- unsignedp, align);
+ unsignedp);
total_bits = GET_MODE_BITSIZE (mode);
mode = GET_MODE (op0);
if (BYTES_BIG_ENDIAN)
- {
- /* BITPOS is the distance between our msb and that of OP0.
- Convert it to the distance from the lsb. */
-
- bitpos = total_bits - bitsize - bitpos;
- }
+ /* BITPOS is the distance between our msb and that of OP0.
+ Convert it to the distance from the lsb. */
+ bitpos = total_bits - bitsize - bitpos;
/* Now BITPOS is always the distance between the field's lsb and that of OP0.
We have reduced the big-endian case to the little-endian case. */
if (GET_MODE_BITSIZE (mode) != (bitsize + bitpos))
{
- tree amount = build_int_2 (GET_MODE_BITSIZE (mode) - (bitsize + bitpos), 0);
+ tree amount
+ = build_int_2 (GET_MODE_BITSIZE (mode) - (bitsize + bitpos), 0);
/* Maybe propagate the target for the shift. */
/* But not if we will return the result--could confuse integrate.c. */
rtx subtarget = (target != 0 && GET_CODE (target) == REG
OP0 is the REG, SUBREG or MEM rtx for the first of the two words.
BITSIZE is the field width; BITPOS, position of its first bit, in the word.
- UNSIGNEDP is 1 if should zero-extend the contents; else sign-extend.
-
- ALIGN is the known alignment of OP0. This is also the size of the
- memory objects to be used. */
+ UNSIGNEDP is 1 if should zero-extend the contents; else sign-extend. */
static rtx
-extract_split_bit_field (op0, bitsize, bitpos, unsignedp, align)
+extract_split_bit_field (op0, bitsize, bitpos, unsignedp)
rtx op0;
unsigned HOST_WIDE_INT bitsize, bitpos;
int unsignedp;
- unsigned int align;
{
unsigned int unit;
unsigned int bitsdone = 0;
if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
unit = BITS_PER_WORD;
else
- unit = MIN (align, BITS_PER_WORD);
+ unit = MIN (MEM_ALIGN (op0), BITS_PER_WORD);
while (bitsdone < bitsize)
{
extract_fixed_bit_field wants offset in bytes. */
part = extract_fixed_bit_field (word_mode, word,
offset * unit / BITS_PER_UNIT,
- thissize, thispos, 0, 1, align);
+ thissize, thispos, 0, 1);
bitsdone += thissize;
/* Shift this part into place for the result. */
rtx
expand_shift (code, mode, shifted, amount, target, unsignedp)
enum tree_code code;
- register enum machine_mode mode;
+ enum machine_mode mode;
rtx shifted;
tree amount;
- register rtx target;
+ rtx target;
int unsignedp;
{
- register rtx op1, temp = 0;
- register int left = (code == LSHIFT_EXPR || code == LROTATE_EXPR);
- register int rotate = (code == LROTATE_EXPR || code == RROTATE_EXPR);
+ rtx op1, temp = 0;
+ int left = (code == LSHIFT_EXPR || code == LROTATE_EXPR);
+ int rotate = (code == LROTATE_EXPR || code == RROTATE_EXPR);
int try;
/* Previously detected shift-counts computed by NEGATE_EXPR
rtx
expand_mult (mode, op0, op1, target, unsignedp)
enum machine_mode mode;
- register rtx op0, op1, target;
+ rtx op0, op1, target;
int unsignedp;
{
rtx const_op1 = op1;
int mult_cost;
enum {basic_variant, negate_variant, add_variant} variant = basic_variant;
+ /* op0 must be register to make mult_cost match the precomputed
+ shiftadd_cost array. */
+ op0 = force_reg (mode, op0);
+
/* Try to do the computation three ways: multiply by the negative of OP1
and then negate, do the multiplication directly, or do multiplication
by OP1 - 1. */
rtx
expand_mult_highpart_adjust (mode, adj_operand, op0, op1, target, unsignedp)
enum machine_mode mode;
- register rtx adj_operand, op0, op1, target;
+ rtx adj_operand, op0, op1, target;
int unsignedp;
{
rtx tem;
rtx
expand_mult_highpart (mode, op0, cnst1, target, unsignedp, max_cost)
enum machine_mode mode;
- register rtx op0, target;
+ rtx op0, target;
unsigned HOST_WIDE_INT cnst1;
int unsignedp;
int max_cost;
int rem_flag;
enum tree_code code;
enum machine_mode mode;
- register rtx op0, op1, target;
+ rtx op0, op1, target;
int unsignedp;
{
enum machine_mode compute_mode;
- register rtx tquotient;
+ rtx tquotient;
rtx quotient = 0, remainder = 0;
rtx last;
int size;
/* Return a tree node with data type TYPE, describing the value of X.
Usually this is an RTL_EXPR, if there is no obvious better choice.
X may be an expression, however we only support those expressions
- generated by loop.c. */
+ generated by loop.c. */
tree
make_tree (type, x)
last = get_last_insn ();
comparison
- = compare_from_rtx (op0, op1, code, unsignedp, mode, NULL_RTX, 0);
+ = compare_from_rtx (op0, op1, code, unsignedp, mode, NULL_RTX);
if (GET_CODE (comparison) == CONST_INT)
return (comparison == const0_rtx ? const0_rtx
: normalizep == 1 ? const1_rtx
emit_move_insn (target, const1_rtx);
label = gen_label_rtx ();
- do_compare_rtx_and_jump (op0, op1, code, unsignedp, mode, NULL_RTX, 0,
+ do_compare_rtx_and_jump (op0, op1, code, unsignedp, mode, NULL_RTX,
NULL_RTX, label);
emit_move_insn (target, const0_rtx);
emit_label (label2);
}
else
- {
- emit_cmp_and_jump_insns (arg1, arg2, op, NULL_RTX, mode, 0, 0, label);
- }
+ emit_cmp_and_jump_insns (arg1, arg2, op, NULL_RTX, mode, 0, label);
}
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