#include "flags.h"
#include "rtl.h"
#include "function.h"
+#include "basic-block.h"
#include "dwarf2.h"
#include "dwarf2out.h"
#include "dwarf2asm.h"
/* Maximum size (in bytes) of an artificially generated label. */
#define MAX_ARTIFICIAL_LABEL_BYTES 30
\f
+/* A collected description of an entire row of the abstract CFI table. */
+typedef struct GTY(()) dw_cfi_row_struct
+{
+ /* The expression that computes the CFA, expressed in two different ways.
+ The CFA member for the simple cases, and the full CFI expression for
+ the complex cases. The later will be a DW_CFA_cfa_expression. */
+ dw_cfa_location cfa;
+ dw_cfi_ref cfa_cfi;
+
+ /* The expressions for any register column that is saved. */
+ cfi_vec reg_save;
+} dw_cfi_row;
+
+/* The caller's ORIG_REG is saved in SAVED_IN_REG. */
+typedef struct GTY(()) reg_saved_in_data_struct {
+ rtx orig_reg;
+ rtx saved_in_reg;
+} reg_saved_in_data;
+
+DEF_VEC_O (reg_saved_in_data);
+DEF_VEC_ALLOC_O (reg_saved_in_data, heap);
+
+/* Since we no longer have a proper CFG, we're going to create a facsimile
+ of one on the fly while processing the frame-related insns.
+
+ We create dw_trace_info structures for each extended basic block beginning
+ and ending at a "save point". Save points are labels, barriers, certain
+ notes, and of course the beginning and end of the function.
+
+ As we encounter control transfer insns, we propagate the "current"
+ row state across the edges to the starts of traces. When checking is
+ enabled, we validate that we propagate the same data from all sources.
+
+ All traces are members of the TRACE_INFO array, in the order in which
+ they appear in the instruction stream.
+
+ All save points are present in the TRACE_INDEX hash, mapping the insn
+ starting a trace to the dw_trace_info describing the trace. */
+
+typedef struct
+{
+ /* The insn that begins the trace. */
+ rtx head;
+
+ /* The row state at the beginning and end of the trace. */
+ dw_cfi_row *beg_row, *end_row;
+
+ /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
+ while scanning insns. However, the args_size value is irrelevant at
+ any point except can_throw_internal_p insns. Therefore the "delay"
+ sizes the values that must actually be emitted for this trace. */
+ HOST_WIDE_INT beg_true_args_size, end_true_args_size;
+ HOST_WIDE_INT beg_delay_args_size, end_delay_args_size;
+
+ /* The first EH insn in the trace, where beg_delay_args_size must be set. */
+ rtx eh_head;
+
+ /* The following variables contain data used in interpreting frame related
+ expressions. These are not part of the "real" row state as defined by
+ Dwarf, but it seems like they need to be propagated into a trace in case
+ frame related expressions have been sunk. */
+ /* ??? This seems fragile. These variables are fragments of a larger
+ expression. If we do not keep the entire expression together, we risk
+ not being able to put it together properly. Consider forcing targets
+ to generate self-contained expressions and dropping all of the magic
+ interpretation code in this file. Or at least refusing to shrink wrap
+ any frame related insn that doesn't contain a complete expression. */
+
+ /* The register used for saving registers to the stack, and its offset
+ from the CFA. */
+ dw_cfa_location cfa_store;
+
+ /* A temporary register holding an integral value used in adjusting SP
+ or setting up the store_reg. The "offset" field holds the integer
+ value, not an offset. */
+ dw_cfa_location cfa_temp;
+
+ /* A set of registers saved in other registers. This is the inverse of
+ the row->reg_save info, if the entry is a DW_CFA_register. This is
+ implemented as a flat array because it normally contains zero or 1
+ entry, depending on the target. IA-64 is the big spender here, using
+ a maximum of 5 entries. */
+ VEC(reg_saved_in_data, heap) *regs_saved_in_regs;
+
+ /* An identifier for this trace. Used only for debugging dumps. */
+ unsigned id;
+
+ /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
+ bool switch_sections;
+
+ /* True if we've seen different values incoming to beg_true_args_size. */
+ bool args_size_undefined;
+} dw_trace_info;
+
+DEF_VEC_O (dw_trace_info);
+DEF_VEC_ALLOC_O (dw_trace_info, heap);
+
+typedef dw_trace_info *dw_trace_info_ref;
+
+DEF_VEC_P (dw_trace_info_ref);
+DEF_VEC_ALLOC_P (dw_trace_info_ref, heap);
+
+/* The variables making up the pseudo-cfg, as described above. */
+static VEC (dw_trace_info, heap) *trace_info;
+static VEC (dw_trace_info_ref, heap) *trace_work_list;
+static htab_t trace_index;
+
/* A vector of call frame insns for the CIE. */
cfi_vec cie_cfi_vec;
+/* The state of the first row of the FDE table, which includes the
+ state provided by the CIE. */
+static GTY(()) dw_cfi_row *cie_cfi_row;
+
+static GTY(()) reg_saved_in_data *cie_return_save;
+
static GTY(()) unsigned long dwarf2out_cfi_label_num;
/* The insn after which a new CFI note should be emitted. */
-static rtx cfi_insn;
+static rtx add_cfi_insn;
/* When non-null, add_cfi will add the CFI to this vector. */
static cfi_vec *add_cfi_vec;
-/* True if remember_state should be emitted before following CFI directive. */
-static bool emit_cfa_remember;
+/* The current instruction trace. */
+static dw_trace_info *cur_trace;
+
+/* The current, i.e. most recently generated, row of the CFI table. */
+static dw_cfi_row *cur_row;
+
+/* A copy of the current CFA, for use during the processing of a
+ single insn. */
+static dw_cfa_location *cur_cfa;
+
+/* We delay emitting a register save until either (a) we reach the end
+ of the prologue or (b) the register is clobbered. This clusters
+ register saves so that there are fewer pc advances. */
+
+typedef struct {
+ rtx reg;
+ rtx saved_reg;
+ HOST_WIDE_INT cfa_offset;
+} queued_reg_save;
+
+DEF_VEC_O (queued_reg_save);
+DEF_VEC_ALLOC_O (queued_reg_save, heap);
+
+static VEC(queued_reg_save, heap) *queued_reg_saves;
/* True if any CFI directives were emitted at the current insn. */
static bool any_cfis_emitted;
-\f
-
-static void dwarf2out_cfi_begin_epilogue (rtx insn);
-static void dwarf2out_frame_debug_restore_state (void);
+/* Short-hand for commonly used register numbers. */
+static unsigned dw_stack_pointer_regnum;
+static unsigned dw_frame_pointer_regnum;
\f
/* Hook used by __throw. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
- int rnum = DWARF2_FRAME_REG_OUT (DWARF_FRAME_REGNUM (i), 1);
+ unsigned int dnum = DWARF_FRAME_REGNUM (i);
+ unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
if (rnum < DWARF_FRAME_REGISTERS)
{
if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode))
save_mode = choose_hard_reg_mode (i, 1, true);
- if (DWARF_FRAME_REGNUM (i) == DWARF_FRAME_RETURN_COLUMN)
+ if (dnum == DWARF_FRAME_RETURN_COLUMN)
{
if (save_mode == VOIDmode)
continue;
targetm.init_dwarf_reg_sizes_extra (address);
}
+\f
+static hashval_t
+dw_trace_info_hash (const void *ptr)
+{
+ const dw_trace_info *ti = (const dw_trace_info *) ptr;
+ return INSN_UID (ti->head);
+}
+
+static int
+dw_trace_info_eq (const void *ptr_a, const void *ptr_b)
+{
+ const dw_trace_info *a = (const dw_trace_info *) ptr_a;
+ const dw_trace_info *b = (const dw_trace_info *) ptr_b;
+ return a->head == b->head;
+}
+
+static dw_trace_info *
+get_trace_info (rtx insn)
+{
+ dw_trace_info dummy;
+ dummy.head = insn;
+ return (dw_trace_info *)
+ htab_find_with_hash (trace_index, &dummy, INSN_UID (insn));
+}
+
+static bool
+save_point_p (rtx insn)
+{
+ /* Labels, except those that are really jump tables. */
+ if (LABEL_P (insn))
+ return inside_basic_block_p (insn);
+
+ /* We split traces at the prologue/epilogue notes because those
+ are points at which the unwind info is usually stable. This
+ makes it easier to find spots with identical unwind info so
+ that we can use remember/restore_state opcodes. */
+ if (NOTE_P (insn))
+ switch (NOTE_KIND (insn))
+ {
+ case NOTE_INSN_PROLOGUE_END:
+ case NOTE_INSN_EPILOGUE_BEG:
+ return true;
+ }
+
+ return false;
+}
+
/* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
static inline HOST_WIDE_INT
return cfi;
}
+/* Return a newly allocated CFI row, with no defined data. */
+
+static dw_cfi_row *
+new_cfi_row (void)
+{
+ dw_cfi_row *row = ggc_alloc_cleared_dw_cfi_row ();
+
+ row->cfa.reg = INVALID_REGNUM;
+
+ return row;
+}
+
+/* Return a copy of an existing CFI row. */
+
+static dw_cfi_row *
+copy_cfi_row (dw_cfi_row *src)
+{
+ dw_cfi_row *dst = ggc_alloc_dw_cfi_row ();
+
+ *dst = *src;
+ dst->reg_save = VEC_copy (dw_cfi_ref, gc, src->reg_save);
+
+ return dst;
+}
+
/* Generate a new label for the CFI info to refer to. */
static char *
static void
add_cfi (dw_cfi_ref cfi)
{
- if (emit_cfa_remember)
- {
- dw_cfi_ref cfi_remember;
-
- /* Emit the state save. */
- emit_cfa_remember = false;
- cfi_remember = new_cfi ();
- cfi_remember->dw_cfi_opc = DW_CFA_remember_state;
- add_cfi (cfi_remember);
- }
-
any_cfis_emitted = true;
- if (cfi_insn != NULL)
+
+ if (add_cfi_insn != NULL)
{
- cfi_insn = emit_note_after (NOTE_INSN_CFI, cfi_insn);
- NOTE_CFI (cfi_insn) = cfi;
+ add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn);
+ NOTE_CFI (add_cfi_insn) = cfi;
}
+
if (add_cfi_vec != NULL)
VEC_safe_push (dw_cfi_ref, gc, *add_cfi_vec, cfi);
}
+static void
+add_cfi_args_size (HOST_WIDE_INT size)
+{
+ dw_cfi_ref cfi = new_cfi ();
+
+ /* While we can occasionally have args_size < 0 internally, this state
+ should not persist at a point we actually need an opcode. */
+ gcc_assert (size >= 0);
+
+ cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
+ cfi->dw_cfi_oprnd1.dw_cfi_offset = size;
+
+ add_cfi (cfi);
+}
+
+static void
+add_cfi_restore (unsigned reg)
+{
+ dw_cfi_ref cfi = new_cfi ();
+
+ cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
+ cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
+
+ add_cfi (cfi);
+}
+
+/* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
+ that the register column is no longer saved. */
+
+static void
+update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi)
+{
+ if (VEC_length (dw_cfi_ref, row->reg_save) <= column)
+ VEC_safe_grow_cleared (dw_cfi_ref, gc, row->reg_save, column + 1);
+ VEC_replace (dw_cfi_ref, row->reg_save, column, cfi);
+}
+
/* This function fills in aa dw_cfa_location structure from a dwarf location
descriptor sequence. */
}
}
-/* The current rule for calculating the DWARF2 canonical frame address. */
-static dw_cfa_location cfa;
-
-/* A copy of the CFA, for comparison purposes. */
-static dw_cfa_location old_cfa;
-
-/* The register used for saving registers to the stack, and its offset
- from the CFA. */
-static dw_cfa_location cfa_store;
-
-/* The current save location around an epilogue. */
-static dw_cfa_location cfa_remember;
-
-/* Like cfa_remember, but a copy of old_cfa. */
-static dw_cfa_location old_cfa_remember;
-
-/* The running total of the size of arguments pushed onto the stack. */
-static HOST_WIDE_INT args_size;
-
-/* The last args_size we actually output. */
-static HOST_WIDE_INT old_args_size;
-
/* Determine if two dw_cfa_location structures define the same data. */
bool
|| loc1->base_offset == loc2->base_offset));
}
-/* This routine does the actual work. The CFA is now calculated from
- the dw_cfa_location structure. */
+/* Determine if two CFI operands are identical. */
-static void
-def_cfa_1 (dw_cfa_location *loc_p)
+static bool
+cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b)
{
- dw_cfi_ref cfi;
- dw_cfa_location loc;
+ switch (t)
+ {
+ case dw_cfi_oprnd_unused:
+ return true;
+ case dw_cfi_oprnd_reg_num:
+ return a->dw_cfi_reg_num == b->dw_cfi_reg_num;
+ case dw_cfi_oprnd_offset:
+ return a->dw_cfi_offset == b->dw_cfi_offset;
+ case dw_cfi_oprnd_addr:
+ return (a->dw_cfi_addr == b->dw_cfi_addr
+ || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0);
+ case dw_cfi_oprnd_loc:
+ return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc);
+ }
+ gcc_unreachable ();
+}
+
+/* Determine if two CFI entries are identical. */
+
+static bool
+cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b)
+{
+ enum dwarf_call_frame_info opc;
+
+ /* Make things easier for our callers, including missing operands. */
+ if (a == b)
+ return true;
+ if (a == NULL || b == NULL)
+ return false;
+
+ /* Obviously, the opcodes must match. */
+ opc = a->dw_cfi_opc;
+ if (opc != b->dw_cfi_opc)
+ return false;
- cfa = *loc_p;
- loc = *loc_p;
+ /* Compare the two operands, re-using the type of the operands as
+ already exposed elsewhere. */
+ return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc),
+ &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1)
+ && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc),
+ &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2));
+}
+
+/* Determine if two CFI_ROW structures are identical. */
+
+static bool
+cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b)
+{
+ size_t i, n_a, n_b, n_max;
+
+ if (a->cfa_cfi)
+ {
+ if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi))
+ return false;
+ }
+ else if (!cfa_equal_p (&a->cfa, &b->cfa))
+ return false;
+
+ n_a = VEC_length (dw_cfi_ref, a->reg_save);
+ n_b = VEC_length (dw_cfi_ref, b->reg_save);
+ n_max = MAX (n_a, n_b);
+
+ for (i = 0; i < n_max; ++i)
+ {
+ dw_cfi_ref r_a = NULL, r_b = NULL;
+
+ if (i < n_a)
+ r_a = VEC_index (dw_cfi_ref, a->reg_save, i);
+ if (i < n_b)
+ r_b = VEC_index (dw_cfi_ref, b->reg_save, i);
+
+ if (!cfi_equal_p (r_a, r_b))
+ return false;
+ }
+
+ return true;
+}
- if (cfa_store.reg == loc.reg && loc.indirect == 0)
- cfa_store.offset = loc.offset;
+/* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
+ what opcode to emit. Returns the CFI opcode to effect the change, or
+ NULL if NEW_CFA == OLD_CFA. */
- loc.reg = DWARF_FRAME_REGNUM (loc.reg);
+static dw_cfi_ref
+def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa)
+{
+ dw_cfi_ref cfi;
/* If nothing changed, no need to issue any call frame instructions. */
- if (cfa_equal_p (&loc, &old_cfa))
- return;
+ if (cfa_equal_p (old_cfa, new_cfa))
+ return NULL;
cfi = new_cfi ();
- if (loc.reg == old_cfa.reg && !loc.indirect && !old_cfa.indirect)
+ if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect)
{
/* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
the CFA register did not change but the offset did. The data
factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
in the assembler via the .cfi_def_cfa_offset directive. */
- if (loc.offset < 0)
+ if (new_cfa->offset < 0)
cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf;
else
cfi->dw_cfi_opc = DW_CFA_def_cfa_offset;
- cfi->dw_cfi_oprnd1.dw_cfi_offset = loc.offset;
+ cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset;
}
#ifndef MIPS_DEBUGGING_INFO /* SGI dbx thinks this means no offset. */
- else if (loc.offset == old_cfa.offset
- && old_cfa.reg != INVALID_REGNUM
- && !loc.indirect
- && !old_cfa.indirect)
+ else if (new_cfa->offset == old_cfa->offset
+ && old_cfa->reg != INVALID_REGNUM
+ && !new_cfa->indirect
+ && !old_cfa->indirect)
{
/* Construct a "DW_CFA_def_cfa_register <register>" instruction,
indicating the CFA register has changed to <register> but the
offset has not changed. */
cfi->dw_cfi_opc = DW_CFA_def_cfa_register;
- cfi->dw_cfi_oprnd1.dw_cfi_reg_num = loc.reg;
+ cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
}
#endif
- else if (loc.indirect == 0)
+ else if (new_cfa->indirect == 0)
{
/* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
indicating the CFA register has changed to <register> with
the specified offset. The data factoring for DW_CFA_def_cfa_sf
happens in output_cfi, or in the assembler via the .cfi_def_cfa
directive. */
- if (loc.offset < 0)
+ if (new_cfa->offset < 0)
cfi->dw_cfi_opc = DW_CFA_def_cfa_sf;
else
cfi->dw_cfi_opc = DW_CFA_def_cfa;
- cfi->dw_cfi_oprnd1.dw_cfi_reg_num = loc.reg;
- cfi->dw_cfi_oprnd2.dw_cfi_offset = loc.offset;
+ cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
+ cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset;
}
else
{
struct dw_loc_descr_struct *loc_list;
cfi->dw_cfi_opc = DW_CFA_def_cfa_expression;
- loc_list = build_cfa_loc (&loc, 0);
+ loc_list = build_cfa_loc (new_cfa, 0);
cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list;
}
- add_cfi (cfi);
- old_cfa = loc;
+ return cfi;
+}
+
+/* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
+
+static void
+def_cfa_1 (dw_cfa_location *new_cfa)
+{
+ dw_cfi_ref cfi;
+
+ if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0)
+ cur_trace->cfa_store.offset = new_cfa->offset;
+
+ cfi = def_cfa_0 (&cur_row->cfa, new_cfa);
+ if (cfi)
+ {
+ cur_row->cfa = *new_cfa;
+ cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression
+ ? cfi : NULL);
+
+ add_cfi (cfi);
+ }
}
/* Add the CFI for saving a register. REG is the CFA column number.
cfi->dw_cfi_opc = DW_CFA_expression;
cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
cfi->dw_cfi_oprnd2.dw_cfi_loc
- = build_cfa_aligned_loc (&cfa, offset, fde->stack_realignment);
+ = build_cfa_aligned_loc (&cur_row->cfa, offset,
+ fde->stack_realignment);
}
else if (sreg == INVALID_REGNUM)
{
cfi->dw_cfi_oprnd2.dw_cfi_offset = offset;
}
else if (sreg == reg)
- cfi->dw_cfi_opc = DW_CFA_same_value;
- else
- {
- cfi->dw_cfi_opc = DW_CFA_register;
- cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
- }
-
- add_cfi (cfi);
-}
-
-/* Given a SET, calculate the amount of stack adjustment it
- contains. */
-
-static HOST_WIDE_INT
-stack_adjust_offset (const_rtx pattern, HOST_WIDE_INT cur_args_size,
- HOST_WIDE_INT cur_offset)
-{
- const_rtx src = SET_SRC (pattern);
- const_rtx dest = SET_DEST (pattern);
- HOST_WIDE_INT offset = 0;
- enum rtx_code code;
-
- if (dest == stack_pointer_rtx)
- {
- code = GET_CODE (src);
-
- /* Assume (set (reg sp) (reg whatever)) sets args_size
- level to 0. */
- if (code == REG && src != stack_pointer_rtx)
- {
- offset = -cur_args_size;
-#ifndef STACK_GROWS_DOWNWARD
- offset = -offset;
-#endif
- return offset - cur_offset;
- }
-
- if (! (code == PLUS || code == MINUS)
- || XEXP (src, 0) != stack_pointer_rtx
- || !CONST_INT_P (XEXP (src, 1)))
- return 0;
-
- /* (set (reg sp) (plus (reg sp) (const_int))) */
- offset = INTVAL (XEXP (src, 1));
- if (code == PLUS)
- offset = -offset;
- return offset;
- }
-
- if (MEM_P (src) && !MEM_P (dest))
- dest = src;
- if (MEM_P (dest))
- {
- /* (set (mem (pre_dec (reg sp))) (foo)) */
- src = XEXP (dest, 0);
- code = GET_CODE (src);
-
- switch (code)
- {
- case PRE_MODIFY:
- case POST_MODIFY:
- if (XEXP (src, 0) == stack_pointer_rtx)
- {
- rtx val = XEXP (XEXP (src, 1), 1);
- /* We handle only adjustments by constant amount. */
- gcc_assert (GET_CODE (XEXP (src, 1)) == PLUS
- && CONST_INT_P (val));
- offset = -INTVAL (val);
- break;
- }
- return 0;
-
- case PRE_DEC:
- case POST_DEC:
- if (XEXP (src, 0) == stack_pointer_rtx)
- {
- offset = GET_MODE_SIZE (GET_MODE (dest));
- break;
- }
- return 0;
-
- case PRE_INC:
- case POST_INC:
- if (XEXP (src, 0) == stack_pointer_rtx)
- {
- offset = -GET_MODE_SIZE (GET_MODE (dest));
- break;
- }
- return 0;
-
- default:
- return 0;
- }
- }
- else
- return 0;
-
- return offset;
-}
-
-/* Precomputed args_size for CODE_LABELs and BARRIERs preceeding them,
- indexed by INSN_UID. */
-
-static HOST_WIDE_INT *barrier_args_size;
-
-/* Helper function for compute_barrier_args_size. Handle one insn. */
-
-static HOST_WIDE_INT
-compute_barrier_args_size_1 (rtx insn, HOST_WIDE_INT cur_args_size,
- VEC (rtx, heap) **next)
-{
- HOST_WIDE_INT offset = 0;
- int i;
-
- if (! RTX_FRAME_RELATED_P (insn))
{
- if (prologue_epilogue_contains (insn))
- /* Nothing */;
- else if (GET_CODE (PATTERN (insn)) == SET)
- offset = stack_adjust_offset (PATTERN (insn), cur_args_size, 0);
- else if (GET_CODE (PATTERN (insn)) == PARALLEL
- || GET_CODE (PATTERN (insn)) == SEQUENCE)
- {
- /* There may be stack adjustments inside compound insns. Search
- for them. */
- for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
- offset += stack_adjust_offset (XVECEXP (PATTERN (insn), 0, i),
- cur_args_size, offset);
- }
+ /* While we could emit something like DW_CFA_same_value or
+ DW_CFA_restore, we never expect to see something like that
+ in a prologue. This is more likely to be a bug. A backend
+ can always bypass this by using REG_CFA_RESTORE directly. */
+ gcc_unreachable ();
}
else
- {
- rtx expr = find_reg_note (insn, REG_FRAME_RELATED_EXPR, NULL_RTX);
-
- if (expr)
- {
- expr = XEXP (expr, 0);
- if (GET_CODE (expr) == PARALLEL
- || GET_CODE (expr) == SEQUENCE)
- for (i = 1; i < XVECLEN (expr, 0); i++)
- {
- rtx elem = XVECEXP (expr, 0, i);
-
- if (GET_CODE (elem) == SET && !RTX_FRAME_RELATED_P (elem))
- offset += stack_adjust_offset (elem, cur_args_size, offset);
- }
- }
- }
-
-#ifndef STACK_GROWS_DOWNWARD
- offset = -offset;
-#endif
-
- cur_args_size += offset;
- if (cur_args_size < 0)
- cur_args_size = 0;
-
- if (JUMP_P (insn))
- {
- rtx dest = JUMP_LABEL (insn);
-
- if (dest)
- {
- if (barrier_args_size [INSN_UID (dest)] < 0)
- {
- barrier_args_size [INSN_UID (dest)] = cur_args_size;
- VEC_safe_push (rtx, heap, *next, dest);
- }
- }
- }
-
- return cur_args_size;
-}
-
-/* Walk the whole function and compute args_size on BARRIERs. */
-
-static void
-compute_barrier_args_size (void)
-{
- int max_uid = get_max_uid (), i;
- rtx insn;
- VEC (rtx, heap) *worklist, *next, *tmp;
-
- barrier_args_size = XNEWVEC (HOST_WIDE_INT, max_uid);
- for (i = 0; i < max_uid; i++)
- barrier_args_size[i] = -1;
-
- worklist = VEC_alloc (rtx, heap, 20);
- next = VEC_alloc (rtx, heap, 20);
- insn = get_insns ();
- barrier_args_size[INSN_UID (insn)] = 0;
- VEC_quick_push (rtx, worklist, insn);
- for (;;)
- {
- while (!VEC_empty (rtx, worklist))
- {
- rtx prev, body, first_insn;
- HOST_WIDE_INT cur_args_size;
-
- first_insn = insn = VEC_pop (rtx, worklist);
- cur_args_size = barrier_args_size[INSN_UID (insn)];
- prev = prev_nonnote_insn (insn);
- if (prev && BARRIER_P (prev))
- barrier_args_size[INSN_UID (prev)] = cur_args_size;
-
- for (; insn; insn = NEXT_INSN (insn))
- {
- if (INSN_DELETED_P (insn) || NOTE_P (insn))
- continue;
- if (BARRIER_P (insn))
- break;
-
- if (LABEL_P (insn))
- {
- if (insn == first_insn)
- continue;
- else if (barrier_args_size[INSN_UID (insn)] < 0)
- {
- barrier_args_size[INSN_UID (insn)] = cur_args_size;
- continue;
- }
- else
- {
- /* The insns starting with this label have been
- already scanned or are in the worklist. */
- break;
- }
- }
-
- body = PATTERN (insn);
- if (GET_CODE (body) == SEQUENCE)
- {
- HOST_WIDE_INT dest_args_size = cur_args_size;
- for (i = 1; i < XVECLEN (body, 0); i++)
- if (INSN_ANNULLED_BRANCH_P (XVECEXP (body, 0, 0))
- && INSN_FROM_TARGET_P (XVECEXP (body, 0, i)))
- dest_args_size
- = compute_barrier_args_size_1 (XVECEXP (body, 0, i),
- dest_args_size, &next);
- else
- cur_args_size
- = compute_barrier_args_size_1 (XVECEXP (body, 0, i),
- cur_args_size, &next);
-
- if (INSN_ANNULLED_BRANCH_P (XVECEXP (body, 0, 0)))
- compute_barrier_args_size_1 (XVECEXP (body, 0, 0),
- dest_args_size, &next);
- else
- cur_args_size
- = compute_barrier_args_size_1 (XVECEXP (body, 0, 0),
- cur_args_size, &next);
- }
- else
- cur_args_size
- = compute_barrier_args_size_1 (insn, cur_args_size, &next);
- }
- }
-
- if (VEC_empty (rtx, next))
- break;
-
- /* Swap WORKLIST with NEXT and truncate NEXT for next iteration. */
- tmp = next;
- next = worklist;
- worklist = tmp;
- VEC_truncate (rtx, next, 0);
- }
-
- VEC_free (rtx, heap, worklist);
- VEC_free (rtx, heap, next);
-}
-
-/* Add a CFI to update the running total of the size of arguments
- pushed onto the stack. */
-
-static void
-dwarf2out_args_size (HOST_WIDE_INT size)
-{
- dw_cfi_ref cfi;
-
- if (size == old_args_size)
- return;
-
- old_args_size = size;
+ {
+ cfi->dw_cfi_opc = DW_CFA_register;
+ cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
+ }
- cfi = new_cfi ();
- cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
- cfi->dw_cfi_oprnd1.dw_cfi_offset = size;
add_cfi (cfi);
+ update_row_reg_save (cur_row, reg, cfi);
}
-/* Record a stack adjustment of OFFSET bytes. */
+/* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
+ and adjust data structures to match. */
static void
-dwarf2out_stack_adjust (HOST_WIDE_INT offset)
+notice_args_size (rtx insn)
{
- if (cfa.reg == STACK_POINTER_REGNUM)
- cfa.offset += offset;
+ HOST_WIDE_INT args_size, delta;
+ rtx note;
- if (cfa_store.reg == STACK_POINTER_REGNUM)
- cfa_store.offset += offset;
+ note = find_reg_note (insn, REG_ARGS_SIZE, NULL);
+ if (note == NULL)
+ return;
- if (ACCUMULATE_OUTGOING_ARGS)
+ args_size = INTVAL (XEXP (note, 0));
+ delta = args_size - cur_trace->end_true_args_size;
+ if (delta == 0)
return;
-#ifndef STACK_GROWS_DOWNWARD
- offset = -offset;
-#endif
+ cur_trace->end_true_args_size = args_size;
- args_size += offset;
- if (args_size < 0)
- args_size = 0;
+ /* If the CFA is computed off the stack pointer, then we must adjust
+ the computation of the CFA as well. */
+ if (cur_cfa->reg == dw_stack_pointer_regnum)
+ {
+ gcc_assert (!cur_cfa->indirect);
- def_cfa_1 (&cfa);
- if (flag_asynchronous_unwind_tables)
- dwarf2out_args_size (args_size);
+ /* Convert a change in args_size (always a positive in the
+ direction of stack growth) to a change in stack pointer. */
+#ifndef STACK_GROWS_DOWNWARD
+ delta = -delta;
+#endif
+ cur_cfa->offset += delta;
+ }
}
-/* Check INSN to see if it looks like a push or a stack adjustment, and
- make a note of it if it does. EH uses this information to find out
- how much extra space it needs to pop off the stack. */
+/* A subroutine of scan_trace. INSN is can_throw_internal. Update the
+ data within the trace related to EH insns and args_size. */
static void
-dwarf2out_notice_stack_adjust (rtx insn, bool after_p)
+notice_eh_throw (rtx insn)
{
- HOST_WIDE_INT offset;
- int i;
-
- /* Don't handle epilogues at all. Certainly it would be wrong to do so
- with this function. Proper support would require all frame-related
- insns to be marked, and to be able to handle saving state around
- epilogues textually in the middle of the function. */
- if (prologue_epilogue_contains (insn))
- return;
-
- /* If INSN is an instruction from target of an annulled branch, the
- effects are for the target only and so current argument size
- shouldn't change at all. */
- if (final_sequence
- && INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence, 0, 0))
- && INSN_FROM_TARGET_P (insn))
- return;
-
- /* If only calls can throw, and we have a frame pointer,
- save up adjustments until we see the CALL_INSN. */
- if (!flag_asynchronous_unwind_tables && cfa.reg != STACK_POINTER_REGNUM)
- {
- if (CALL_P (insn) && !after_p)
- {
- /* Extract the size of the args from the CALL rtx itself. */
- insn = PATTERN (insn);
- if (GET_CODE (insn) == PARALLEL)
- insn = XVECEXP (insn, 0, 0);
- if (GET_CODE (insn) == SET)
- insn = SET_SRC (insn);
- gcc_assert (GET_CODE (insn) == CALL);
- dwarf2out_args_size (INTVAL (XEXP (insn, 1)));
- }
- return;
- }
+ HOST_WIDE_INT args_size;
- if (CALL_P (insn) && !after_p)
+ args_size = cur_trace->end_true_args_size;
+ if (cur_trace->eh_head == NULL)
{
- if (!flag_asynchronous_unwind_tables)
- dwarf2out_args_size (args_size);
- return;
+ cur_trace->eh_head = insn;
+ cur_trace->beg_delay_args_size = args_size;
+ cur_trace->end_delay_args_size = args_size;
}
- else if (BARRIER_P (insn))
+ else if (cur_trace->end_delay_args_size != args_size)
{
- /* Don't call compute_barrier_args_size () if the only
- BARRIER is at the end of function. */
- if (barrier_args_size == NULL && next_nonnote_insn (insn))
- compute_barrier_args_size ();
- if (barrier_args_size == NULL)
- offset = 0;
- else
- {
- offset = barrier_args_size[INSN_UID (insn)];
- if (offset < 0)
- offset = 0;
- }
+ cur_trace->end_delay_args_size = args_size;
- offset -= args_size;
-#ifndef STACK_GROWS_DOWNWARD
- offset = -offset;
-#endif
+ /* ??? If the CFA is the stack pointer, search backward for the last
+ CFI note and insert there. Given that the stack changed for the
+ args_size change, there *must* be such a note in between here and
+ the last eh insn. */
+ add_cfi_args_size (args_size);
}
- else if (GET_CODE (PATTERN (insn)) == SET)
- offset = stack_adjust_offset (PATTERN (insn), args_size, 0);
- else if (GET_CODE (PATTERN (insn)) == PARALLEL
- || GET_CODE (PATTERN (insn)) == SEQUENCE)
- {
- /* There may be stack adjustments inside compound insns. Search
- for them. */
- for (offset = 0, i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
- offset += stack_adjust_offset (XVECEXP (PATTERN (insn), 0, i),
- args_size, offset);
- }
- else
- return;
-
- if (offset == 0)
- return;
-
- dwarf2out_stack_adjust (offset);
}
-/* We delay emitting a register save until either (a) we reach the end
- of the prologue or (b) the register is clobbered. This clusters
- register saves so that there are fewer pc advances. */
-
-struct GTY(()) queued_reg_save {
- struct queued_reg_save *next;
- rtx reg;
- HOST_WIDE_INT cfa_offset;
- rtx saved_reg;
-};
-
-static GTY(()) struct queued_reg_save *queued_reg_saves;
+/* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
+/* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
+ used in places where rtl is prohibited. */
-/* The caller's ORIG_REG is saved in SAVED_IN_REG. */
-typedef struct GTY(()) reg_saved_in_data {
- rtx orig_reg;
- rtx saved_in_reg;
-} reg_saved_in_data;
-
-DEF_VEC_O (reg_saved_in_data);
-DEF_VEC_ALLOC_O (reg_saved_in_data, gc);
-
-/* A set of registers saved in other registers. This is implemented as
- a flat array because it normally contains zero or 1 entry, depending
- on the target. IA-64 is the big spender here, using a maximum of
- 5 entries. */
-static GTY(()) VEC(reg_saved_in_data, gc) *regs_saved_in_regs;
-
-static GTY(()) reg_saved_in_data *cie_return_save;
+static inline unsigned
+dwf_regno (const_rtx reg)
+{
+ return DWARF_FRAME_REGNUM (REGNO (reg));
+}
/* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
reg_saved_in_data *elt;
size_t i;
- FOR_EACH_VEC_ELT (reg_saved_in_data, regs_saved_in_regs, i, elt)
+ FOR_EACH_VEC_ELT (reg_saved_in_data, cur_trace->regs_saved_in_regs, i, elt)
if (compare_reg_or_pc (elt->orig_reg, src))
{
if (dest == NULL)
- VEC_unordered_remove(reg_saved_in_data, regs_saved_in_regs, i);
+ VEC_unordered_remove (reg_saved_in_data,
+ cur_trace->regs_saved_in_regs, i);
else
elt->saved_in_reg = dest;
return;
if (dest == NULL)
return;
- elt = VEC_safe_push(reg_saved_in_data, gc, regs_saved_in_regs, NULL);
+ elt = VEC_safe_push (reg_saved_in_data, heap,
+ cur_trace->regs_saved_in_regs, NULL);
elt->orig_reg = src;
elt->saved_in_reg = dest;
}
static void
queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset)
{
- struct queued_reg_save *q;
+ queued_reg_save *q;
+ size_t i;
/* Duplicates waste space, but it's also necessary to remove them
for correctness, since the queue gets output in reverse order. */
- for (q = queued_reg_saves; q != NULL; q = q->next)
+ FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
if (compare_reg_or_pc (q->reg, reg))
- break;
+ goto found;
- if (q == NULL)
- {
- q = ggc_alloc_queued_reg_save ();
- q->next = queued_reg_saves;
- queued_reg_saves = q;
- }
+ q = VEC_safe_push (queued_reg_save, heap, queued_reg_saves, NULL);
+ found:
q->reg = reg;
- q->cfa_offset = offset;
q->saved_reg = sreg;
+ q->cfa_offset = offset;
}
/* Output all the entries in QUEUED_REG_SAVES. */
static void
dwarf2out_flush_queued_reg_saves (void)
{
- struct queued_reg_save *q;
+ queued_reg_save *q;
+ size_t i;
- for (q = queued_reg_saves; q; q = q->next)
+ FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
{
unsigned int reg, sreg;
if (q->reg == pc_rtx)
reg = DWARF_FRAME_RETURN_COLUMN;
else
- reg = DWARF_FRAME_REGNUM (REGNO (q->reg));
+ reg = dwf_regno (q->reg);
if (q->saved_reg)
- sreg = DWARF_FRAME_REGNUM (REGNO (q->saved_reg));
+ sreg = dwf_regno (q->saved_reg);
else
sreg = INVALID_REGNUM;
reg_save (reg, sreg, q->cfa_offset);
}
- queued_reg_saves = NULL;
+ VEC_truncate (queued_reg_save, queued_reg_saves, 0);
}
/* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
static bool
clobbers_queued_reg_save (const_rtx insn)
{
- struct queued_reg_save *q;
+ queued_reg_save *q;
+ size_t iq;
- for (q = queued_reg_saves; q; q = q->next)
+ FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, iq, q)
{
- size_t i;
+ size_t ir;
reg_saved_in_data *rir;
if (modified_in_p (q->reg, insn))
return true;
- FOR_EACH_VEC_ELT (reg_saved_in_data, regs_saved_in_regs, i, rir)
+ FOR_EACH_VEC_ELT (reg_saved_in_data,
+ cur_trace->regs_saved_in_regs, ir, rir)
if (compare_reg_or_pc (q->reg, rir->orig_reg)
&& modified_in_p (rir->saved_in_reg, insn))
return true;
reg_saved_in (rtx reg)
{
unsigned int regn = REGNO (reg);
- struct queued_reg_save *q;
+ queued_reg_save *q;
reg_saved_in_data *rir;
size_t i;
- for (q = queued_reg_saves; q; q = q->next)
+ FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
if (q->saved_reg && regn == REGNO (q->saved_reg))
return q->reg;
- FOR_EACH_VEC_ELT (reg_saved_in_data, regs_saved_in_regs, i, rir)
+ FOR_EACH_VEC_ELT (reg_saved_in_data, cur_trace->regs_saved_in_regs, i, rir)
if (regn == REGNO (rir->saved_in_reg))
return rir->orig_reg;
return NULL_RTX;
}
-
-/* A temporary register holding an integral value used in adjusting SP
- or setting up the store_reg. The "offset" field holds the integer
- value, not an offset. */
-static dw_cfa_location cfa_temp;
-
/* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
static void
dwarf2out_frame_debug_def_cfa (rtx pat)
{
- memset (&cfa, 0, sizeof (cfa));
+ memset (cur_cfa, 0, sizeof (*cur_cfa));
- switch (GET_CODE (pat))
+ if (GET_CODE (pat) == PLUS)
{
- case PLUS:
- cfa.reg = REGNO (XEXP (pat, 0));
- cfa.offset = INTVAL (XEXP (pat, 1));
- break;
-
- case REG:
- cfa.reg = REGNO (pat);
- break;
-
- case MEM:
- cfa.indirect = 1;
+ cur_cfa->offset = INTVAL (XEXP (pat, 1));
+ pat = XEXP (pat, 0);
+ }
+ if (MEM_P (pat))
+ {
+ cur_cfa->indirect = 1;
pat = XEXP (pat, 0);
if (GET_CODE (pat) == PLUS)
{
- cfa.base_offset = INTVAL (XEXP (pat, 1));
+ cur_cfa->base_offset = INTVAL (XEXP (pat, 1));
pat = XEXP (pat, 0);
}
- cfa.reg = REGNO (pat);
- break;
-
- default:
- /* Recurse and define an expression. */
- gcc_unreachable ();
}
-
- def_cfa_1 (&cfa);
+ /* ??? If this fails, we could be calling into the _loc functions to
+ define a full expression. So far no port does that. */
+ gcc_assert (REG_P (pat));
+ cur_cfa->reg = dwf_regno (pat);
}
/* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
switch (GET_CODE (src))
{
case PLUS:
- gcc_assert (REGNO (XEXP (src, 0)) == cfa.reg);
- cfa.offset -= INTVAL (XEXP (src, 1));
+ gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg);
+ cur_cfa->offset -= INTVAL (XEXP (src, 1));
break;
case REG:
- break;
+ break;
default:
- gcc_unreachable ();
+ gcc_unreachable ();
}
- cfa.reg = REGNO (dest);
- gcc_assert (cfa.indirect == 0);
-
- def_cfa_1 (&cfa);
+ cur_cfa->reg = dwf_regno (dest);
+ gcc_assert (cur_cfa->indirect == 0);
}
/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
switch (GET_CODE (addr))
{
case REG:
- gcc_assert (REGNO (addr) == cfa.reg);
- offset = -cfa.offset;
+ gcc_assert (dwf_regno (addr) == cur_cfa->reg);
+ offset = -cur_cfa->offset;
break;
case PLUS:
- gcc_assert (REGNO (XEXP (addr, 0)) == cfa.reg);
- offset = INTVAL (XEXP (addr, 1)) - cfa.offset;
+ gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg);
+ offset = INTVAL (XEXP (addr, 1)) - cur_cfa->offset;
break;
default:
gcc_unreachable ();
span = NULL;
sregno = DWARF_FRAME_RETURN_COLUMN;
}
- else
+ else
{
span = targetm.dwarf_register_span (src);
- sregno = DWARF_FRAME_REGNUM (REGNO (src));
+ sregno = dwf_regno (src);
}
/* ??? We'd like to use queue_reg_save, but we need to come up with
{
rtx elem = XVECEXP (span, 0, par_index);
- sregno = DWARF_FRAME_REGNUM (REGNO (src));
+ sregno = dwf_regno (src);
reg_save (sregno, INVALID_REGNUM, span_offset);
span_offset += GET_MODE_SIZE (GET_MODE (elem));
}
if (src == pc_rtx)
sregno = DWARF_FRAME_RETURN_COLUMN;
else
- sregno = DWARF_FRAME_REGNUM (REGNO (src));
+ sregno = dwf_regno (src);
- dregno = DWARF_FRAME_REGNUM (REGNO (dest));
+ dregno = dwf_regno (dest);
/* ??? We'd like to use queue_reg_save, but we need to come up with
a different flushing heuristic for epilogues. */
{
rtx src, dest, span;
dw_cfi_ref cfi = new_cfi ();
+ unsigned regno;
dest = SET_DEST (set);
src = SET_SRC (set);
span = targetm.dwarf_register_span (src);
gcc_assert (!span);
+ regno = dwf_regno (src);
+
cfi->dw_cfi_opc = DW_CFA_expression;
- cfi->dw_cfi_oprnd1.dw_cfi_reg_num = DWARF_FRAME_REGNUM (REGNO (src));
+ cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
cfi->dw_cfi_oprnd2.dw_cfi_loc
= mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest),
GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
/* ??? We'd like to use queue_reg_save, were the interface different,
and, as above, we could manage flushing for epilogues. */
add_cfi (cfi);
+ update_row_reg_save (cur_row, regno, cfi);
}
/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
static void
dwarf2out_frame_debug_cfa_restore (rtx reg)
{
- dw_cfi_ref cfi = new_cfi ();
- unsigned int regno = DWARF_FRAME_REGNUM (REGNO (reg));
-
- cfi->dw_cfi_opc = (regno & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
- cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
+ unsigned int regno = dwf_regno (reg);
- add_cfi (cfi);
+ add_cfi_restore (regno);
+ update_row_reg_save (cur_row, regno, NULL);
}
/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
Invariants / Summaries of Rules
cfa current rule for calculating the CFA. It usually
- consists of a register and an offset.
+ consists of a register and an offset. This is
+ actually stored in *cur_cfa, but abbreviated
+ for the purposes of this documentation.
cfa_store register used by prologue code to save things to the stack
cfa_store.offset is the offset from the value of
cfa_store.reg to the actual CFA
&& (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE)
&& (RTX_FRAME_RELATED_P (elem) || par_index == 0))
dwarf2out_frame_debug_expr (elem);
- else if (GET_CODE (elem) == SET
- && par_index != 0
- && !RTX_FRAME_RELATED_P (elem))
- {
- /* Stack adjustment combining might combine some post-prologue
- stack adjustment into a prologue stack adjustment. */
- HOST_WIDE_INT offset = stack_adjust_offset (elem, args_size, 0);
-
- if (offset != 0)
- dwarf2out_stack_adjust (offset);
- }
}
return;
}
{
/* Setting FP from SP. */
case REG:
- if (cfa.reg == (unsigned) REGNO (src))
+ if (cur_cfa->reg == dwf_regno (src))
{
/* Rule 1 */
/* Update the CFA rule wrt SP or FP. Make sure src is
ARM copies SP to a temporary register, and from there to
FP. So we just rely on the backends to only set
RTX_FRAME_RELATED_P on appropriate insns. */
- cfa.reg = REGNO (dest);
- cfa_temp.reg = cfa.reg;
- cfa_temp.offset = cfa.offset;
+ cur_cfa->reg = dwf_regno (dest);
+ cur_trace->cfa_temp.reg = cur_cfa->reg;
+ cur_trace->cfa_temp.offset = cur_cfa->offset;
}
else
{
/* Saving a register in a register. */
gcc_assert (!fixed_regs [REGNO (dest)]
/* For the SPARC and its register window. */
- || (DWARF_FRAME_REGNUM (REGNO (src))
- == DWARF_FRAME_RETURN_COLUMN));
+ || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN));
/* After stack is aligned, we can only save SP in FP
if drap register is used. In this case, we have
&& REGNO (src) == STACK_POINTER_REGNUM)
gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM
&& fde->drap_reg != INVALID_REGNUM
- && cfa.reg != REGNO (src));
+ && cur_cfa->reg != dwf_regno (src));
else
queue_reg_save (src, dest, 0);
}
offset = INTVAL (XEXP (src, 1));
break;
case REG:
- gcc_assert ((unsigned) REGNO (XEXP (src, 1))
- == cfa_temp.reg);
- offset = cfa_temp.offset;
+ gcc_assert (dwf_regno (XEXP (src, 1))
+ == cur_trace->cfa_temp.reg);
+ offset = cur_trace->cfa_temp.offset;
break;
default:
gcc_unreachable ();
if (XEXP (src, 0) == hard_frame_pointer_rtx)
{
/* Restoring SP from FP in the epilogue. */
- gcc_assert (cfa.reg == (unsigned) HARD_FRAME_POINTER_REGNUM);
- cfa.reg = STACK_POINTER_REGNUM;
+ gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum);
+ cur_cfa->reg = dw_stack_pointer_regnum;
}
else if (GET_CODE (src) == LO_SUM)
/* Assume we've set the source reg of the LO_SUM from sp. */
if (GET_CODE (src) != MINUS)
offset = -offset;
- if (cfa.reg == STACK_POINTER_REGNUM)
- cfa.offset += offset;
- if (cfa_store.reg == STACK_POINTER_REGNUM)
- cfa_store.offset += offset;
+ if (cur_cfa->reg == dw_stack_pointer_regnum)
+ cur_cfa->offset += offset;
+ if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
+ cur_trace->cfa_store.offset += offset;
}
else if (dest == hard_frame_pointer_rtx)
{
gcc_assert (frame_pointer_needed);
gcc_assert (REG_P (XEXP (src, 0))
- && (unsigned) REGNO (XEXP (src, 0)) == cfa.reg
+ && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
&& CONST_INT_P (XEXP (src, 1)));
offset = INTVAL (XEXP (src, 1));
if (GET_CODE (src) != MINUS)
offset = -offset;
- cfa.offset += offset;
- cfa.reg = HARD_FRAME_POINTER_REGNUM;
+ cur_cfa->offset += offset;
+ cur_cfa->reg = dw_frame_pointer_regnum;
}
else
{
/* Rule 4 */
if (REG_P (XEXP (src, 0))
- && REGNO (XEXP (src, 0)) == cfa.reg
+ && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
&& CONST_INT_P (XEXP (src, 1)))
{
/* Setting a temporary CFA register that will be copied
into the FP later on. */
offset = - INTVAL (XEXP (src, 1));
- cfa.offset += offset;
- cfa.reg = REGNO (dest);
+ cur_cfa->offset += offset;
+ cur_cfa->reg = dwf_regno (dest);
/* Or used to save regs to the stack. */
- cfa_temp.reg = cfa.reg;
- cfa_temp.offset = cfa.offset;
+ cur_trace->cfa_temp.reg = cur_cfa->reg;
+ cur_trace->cfa_temp.offset = cur_cfa->offset;
}
/* Rule 5 */
else if (REG_P (XEXP (src, 0))
- && REGNO (XEXP (src, 0)) == cfa_temp.reg
+ && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
&& XEXP (src, 1) == stack_pointer_rtx)
{
/* Setting a scratch register that we will use instead
of SP for saving registers to the stack. */
- gcc_assert (cfa.reg == STACK_POINTER_REGNUM);
- cfa_store.reg = REGNO (dest);
- cfa_store.offset = cfa.offset - cfa_temp.offset;
+ gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum);
+ cur_trace->cfa_store.reg = dwf_regno (dest);
+ cur_trace->cfa_store.offset
+ = cur_cfa->offset - cur_trace->cfa_temp.offset;
}
/* Rule 9 */
else if (GET_CODE (src) == LO_SUM
&& CONST_INT_P (XEXP (src, 1)))
{
- cfa_temp.reg = REGNO (dest);
- cfa_temp.offset = INTVAL (XEXP (src, 1));
+ cur_trace->cfa_temp.reg = dwf_regno (dest);
+ cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1));
}
else
gcc_unreachable ();
/* Rule 6 */
case CONST_INT:
- cfa_temp.reg = REGNO (dest);
- cfa_temp.offset = INTVAL (src);
+ cur_trace->cfa_temp.reg = dwf_regno (dest);
+ cur_trace->cfa_temp.offset = INTVAL (src);
break;
/* Rule 7 */
case IOR:
gcc_assert (REG_P (XEXP (src, 0))
- && (unsigned) REGNO (XEXP (src, 0)) == cfa_temp.reg
+ && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
&& CONST_INT_P (XEXP (src, 1)));
- if ((unsigned) REGNO (dest) != cfa_temp.reg)
- cfa_temp.reg = REGNO (dest);
- cfa_temp.offset |= INTVAL (XEXP (src, 1));
+ cur_trace->cfa_temp.reg = dwf_regno (dest);
+ cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1));
break;
/* Skip over HIGH, assuming it will be followed by a LO_SUM,
Thus we must flush whatever we have queued first. */
dwarf2out_flush_queued_reg_saves ();
- gcc_assert (cfa_store.reg == REGNO (XEXP (src, 0)));
+ gcc_assert (cur_trace->cfa_store.reg
+ == dwf_regno (XEXP (src, 0)));
fde->stack_realign = 1;
fde->stack_realignment = INTVAL (XEXP (src, 1));
- cfa_store.offset = 0;
+ cur_trace->cfa_store.offset = 0;
- if (cfa.reg != STACK_POINTER_REGNUM
- && cfa.reg != HARD_FRAME_POINTER_REGNUM)
- fde->drap_reg = cfa.reg;
+ if (cur_cfa->reg != dw_stack_pointer_regnum
+ && cur_cfa->reg != dw_frame_pointer_regnum)
+ fde->drap_reg = cur_cfa->reg;
}
return;
default:
gcc_unreachable ();
}
-
- def_cfa_1 (&cfa);
break;
case MEM:
offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1));
gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM
- && cfa_store.reg == STACK_POINTER_REGNUM);
+ && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
- cfa_store.offset += offset;
- if (cfa.reg == STACK_POINTER_REGNUM)
- cfa.offset = cfa_store.offset;
+ cur_trace->cfa_store.offset += offset;
+ if (cur_cfa->reg == dw_stack_pointer_regnum)
+ cur_cfa->offset = cur_trace->cfa_store.offset;
if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY)
- offset -= cfa_store.offset;
+ offset -= cur_trace->cfa_store.offset;
else
- offset = -cfa_store.offset;
+ offset = -cur_trace->cfa_store.offset;
break;
/* Rule 11 */
gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0))
== STACK_POINTER_REGNUM)
- && cfa_store.reg == STACK_POINTER_REGNUM);
+ && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
- cfa_store.offset += offset;
+ cur_trace->cfa_store.offset += offset;
/* Rule 18: If stack is aligned, we will use FP as a
reference to represent the address of the stored
&& fde->stack_realign
&& src == hard_frame_pointer_rtx)
{
- gcc_assert (cfa.reg != HARD_FRAME_POINTER_REGNUM);
- cfa_store.offset = 0;
+ gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum);
+ cur_trace->cfa_store.offset = 0;
}
- if (cfa.reg == STACK_POINTER_REGNUM)
- cfa.offset = cfa_store.offset;
+ if (cur_cfa->reg == dw_stack_pointer_regnum)
+ cur_cfa->offset = cur_trace->cfa_store.offset;
if (GET_CODE (XEXP (dest, 0)) == POST_DEC)
- offset += -cfa_store.offset;
+ offset += -cur_trace->cfa_store.offset;
else
- offset = -cfa_store.offset;
+ offset = -cur_trace->cfa_store.offset;
break;
/* Rule 12 */
case MINUS:
case LO_SUM:
{
- int regno;
+ unsigned int regno;
gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1))
&& REG_P (XEXP (XEXP (dest, 0), 0)));
if (GET_CODE (XEXP (dest, 0)) == MINUS)
offset = -offset;
- regno = REGNO (XEXP (XEXP (dest, 0), 0));
+ regno = dwf_regno (XEXP (XEXP (dest, 0), 0));
- if (cfa.reg == (unsigned) regno)
- offset -= cfa.offset;
- else if (cfa_store.reg == (unsigned) regno)
- offset -= cfa_store.offset;
+ if (cur_cfa->reg == regno)
+ offset -= cur_cfa->offset;
+ else if (cur_trace->cfa_store.reg == regno)
+ offset -= cur_trace->cfa_store.offset;
else
{
- gcc_assert (cfa_temp.reg == (unsigned) regno);
- offset -= cfa_temp.offset;
+ gcc_assert (cur_trace->cfa_temp.reg == regno);
+ offset -= cur_trace->cfa_temp.offset;
}
}
break;
/* Without an offset. */
case REG:
{
- int regno = REGNO (XEXP (dest, 0));
+ unsigned int regno = dwf_regno (XEXP (dest, 0));
- if (cfa.reg == (unsigned) regno)
- offset = -cfa.offset;
- else if (cfa_store.reg == (unsigned) regno)
- offset = -cfa_store.offset;
+ if (cur_cfa->reg == regno)
+ offset = -cur_cfa->offset;
+ else if (cur_trace->cfa_store.reg == regno)
+ offset = -cur_trace->cfa_store.offset;
else
{
- gcc_assert (cfa_temp.reg == (unsigned) regno);
- offset = -cfa_temp.offset;
+ gcc_assert (cur_trace->cfa_temp.reg == regno);
+ offset = -cur_trace->cfa_temp.offset;
}
}
break;
/* Rule 14 */
case POST_INC:
- gcc_assert (cfa_temp.reg
- == (unsigned) REGNO (XEXP (XEXP (dest, 0), 0)));
- offset = -cfa_temp.offset;
- cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
+ gcc_assert (cur_trace->cfa_temp.reg
+ == dwf_regno (XEXP (XEXP (dest, 0), 0)));
+ offset = -cur_trace->cfa_temp.offset;
+ cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
break;
default:
if (REG_P (src)
&& REGNO (src) != STACK_POINTER_REGNUM
&& REGNO (src) != HARD_FRAME_POINTER_REGNUM
- && (unsigned) REGNO (src) == cfa.reg)
+ && dwf_regno (src) == cur_cfa->reg)
{
/* We're storing the current CFA reg into the stack. */
- if (cfa.offset == 0)
+ if (cur_cfa->offset == 0)
{
/* Rule 19 */
/* If stack is aligned, putting CFA reg into stack means
value. */
if (fde
&& fde->stack_realign
- && cfa.indirect == 0
- && cfa.reg != HARD_FRAME_POINTER_REGNUM)
+ && cur_cfa->indirect == 0
+ && cur_cfa->reg != dw_frame_pointer_regnum)
{
- dw_cfa_location cfa_exp;
+ gcc_assert (fde->drap_reg == cur_cfa->reg);
- gcc_assert (fde->drap_reg == cfa.reg);
-
- cfa_exp.indirect = 1;
- cfa_exp.reg = HARD_FRAME_POINTER_REGNUM;
- cfa_exp.base_offset = offset;
- cfa_exp.offset = 0;
+ cur_cfa->indirect = 1;
+ cur_cfa->reg = dw_frame_pointer_regnum;
+ cur_cfa->base_offset = offset;
+ cur_cfa->offset = 0;
fde->drap_reg_saved = 1;
-
- def_cfa_1 (&cfa_exp);
break;
}
/* If the source register is exactly the CFA, assume
we're saving SP like any other register; this happens
on the ARM. */
- def_cfa_1 (&cfa);
queue_reg_save (stack_pointer_rtx, NULL_RTX, offset);
break;
}
x = XEXP (x, 0);
gcc_assert (REG_P (x));
- cfa.reg = REGNO (x);
- cfa.base_offset = offset;
- cfa.indirect = 1;
- def_cfa_1 (&cfa);
+ cur_cfa->reg = dwf_regno (x);
+ cur_cfa->base_offset = offset;
+ cur_cfa->indirect = 1;
break;
}
}
- def_cfa_1 (&cfa);
-
span = NULL;
if (REG_P (src))
span = targetm.dwarf_register_span (src);
}
}
-/* Record call frame debugging information for INSN, which either
- sets SP or FP (adjusting how we calculate the frame address) or saves a
- register to the stack. If INSN is NULL_RTX, initialize our state.
-
- If AFTER_P is false, we're being called before the insn is emitted,
- otherwise after. Call instructions get invoked twice. */
+/* Record call frame debugging information for INSN, which either sets
+ SP or FP (adjusting how we calculate the frame address) or saves a
+ register to the stack. */
static void
-dwarf2out_frame_debug (rtx insn, bool after_p)
+dwarf2out_frame_debug (rtx insn)
{
rtx note, n;
bool handled_one = false;
bool need_flush = false;
- if (!NONJUMP_INSN_P (insn) || clobbers_queued_reg_save (insn))
- dwarf2out_flush_queued_reg_saves ();
-
- if (!RTX_FRAME_RELATED_P (insn))
- {
- /* ??? This should be done unconditionally since stack adjustments
- matter if the stack pointer is not the CFA register anymore but
- is still used to save registers. */
- if (!ACCUMULATE_OUTGOING_ARGS)
- dwarf2out_notice_stack_adjust (insn, after_p);
- return;
- }
-
any_cfis_emitted = false;
for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
{
gcc_assert (fde->vdrap_reg == INVALID_REGNUM);
if (REG_P (n))
- fde->vdrap_reg = REGNO (n);
+ fde->vdrap_reg = dwf_regno (n);
}
}
handled_one = true;
dwarf2out_flush_queued_reg_saves ();
}
+/* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
+
+static void
+change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row)
+{
+ size_t i, n_old, n_new, n_max;
+ dw_cfi_ref cfi;
+
+ if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi))
+ add_cfi (new_row->cfa_cfi);
+ else
+ {
+ cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa);
+ if (cfi)
+ add_cfi (cfi);
+ }
+
+ n_old = VEC_length (dw_cfi_ref, old_row->reg_save);
+ n_new = VEC_length (dw_cfi_ref, new_row->reg_save);
+ n_max = MAX (n_old, n_new);
+
+ for (i = 0; i < n_max; ++i)
+ {
+ dw_cfi_ref r_old = NULL, r_new = NULL;
+
+ if (i < n_old)
+ r_old = VEC_index (dw_cfi_ref, old_row->reg_save, i);
+ if (i < n_new)
+ r_new = VEC_index (dw_cfi_ref, new_row->reg_save, i);
+
+ if (r_old == r_new)
+ ;
+ else if (r_new == NULL)
+ add_cfi_restore (i);
+ else if (!cfi_equal_p (r_old, r_new))
+ add_cfi (r_new);
+ }
+}
+
/* Examine CFI and return true if a cfi label and set_loc is needed
beforehand. Even when generating CFI assembler instructions, we
still have to add the cfi to the list so that lookup_cfa_1 works
return false;
}
-/* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
- function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
- necessary. */
+/* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
+ function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
+ necessary. */
+static void
+add_cfis_to_fde (void)
+{
+ dw_fde_ref fde = cfun->fde;
+ rtx insn, next;
+ /* We always start with a function_begin label. */
+ bool first = false;
+
+ for (insn = get_insns (); insn; insn = next)
+ {
+ next = NEXT_INSN (insn);
+
+ if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
+ {
+ fde->dw_fde_switch_cfi_index
+ = VEC_length (dw_cfi_ref, fde->dw_fde_cfi);
+ /* Don't attempt to advance_loc4 between labels
+ in different sections. */
+ first = true;
+ }
+
+ if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
+ {
+ bool required = cfi_label_required_p (NOTE_CFI (insn));
+ while (next)
+ if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
+ {
+ required |= cfi_label_required_p (NOTE_CFI (next));
+ next = NEXT_INSN (next);
+ }
+ else if (active_insn_p (next)
+ || (NOTE_P (next) && (NOTE_KIND (next)
+ == NOTE_INSN_SWITCH_TEXT_SECTIONS)))
+ break;
+ else
+ next = NEXT_INSN (next);
+ if (required)
+ {
+ int num = dwarf2out_cfi_label_num;
+ const char *label = dwarf2out_cfi_label ();
+ dw_cfi_ref xcfi;
+ rtx tmp;
+
+ /* Set the location counter to the new label. */
+ xcfi = new_cfi ();
+ xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc
+ : DW_CFA_advance_loc4);
+ xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
+ VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi, xcfi);
+
+ tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
+ NOTE_LABEL_NUMBER (tmp) = num;
+ }
+
+ do
+ {
+ if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
+ VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi,
+ NOTE_CFI (insn));
+ insn = NEXT_INSN (insn);
+ }
+ while (insn != next);
+ first = false;
+ }
+ }
+}
+
+/* If LABEL is the start of a trace, then initialize the state of that
+ trace from CUR_TRACE and CUR_ROW. */
+
+static void
+maybe_record_trace_start (rtx start, rtx origin)
+{
+ dw_trace_info *ti;
+ HOST_WIDE_INT args_size;
+
+ ti = get_trace_info (start);
+ gcc_assert (ti != NULL);
+
+ if (dump_file)
+ {
+ fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n",
+ cur_trace->id, ti->id,
+ (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"),
+ (origin ? INSN_UID (origin) : 0));
+ }
+
+ args_size = cur_trace->end_true_args_size;
+ if (ti->beg_row == NULL)
+ {
+ /* This is the first time we've encountered this trace. Propagate
+ state across the edge and push the trace onto the work list. */
+ ti->beg_row = copy_cfi_row (cur_row);
+ ti->beg_true_args_size = args_size;
+
+ ti->cfa_store = cur_trace->cfa_store;
+ ti->cfa_temp = cur_trace->cfa_temp;
+ ti->regs_saved_in_regs = VEC_copy (reg_saved_in_data, heap,
+ cur_trace->regs_saved_in_regs);
+
+ VEC_safe_push (dw_trace_info_ref, heap, trace_work_list, ti);
+
+ if (dump_file)
+ fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id);
+ }
+ else
+ {
+
+ /* We ought to have the same state incoming to a given trace no
+ matter how we arrive at the trace. Anything else means we've
+ got some kind of optimization error. */
+ gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row));
+
+ /* The args_size is allowed to conflict if it isn't actually used. */
+ if (ti->beg_true_args_size != args_size)
+ ti->args_size_undefined = true;
+ }
+}
+
+/* Similarly, but handle the args_size and CFA reset across EH
+ and non-local goto edges. */
+
+static void
+maybe_record_trace_start_abnormal (rtx start, rtx origin)
+{
+ HOST_WIDE_INT save_args_size, delta;
+ dw_cfa_location save_cfa;
+
+ save_args_size = cur_trace->end_true_args_size;
+ if (save_args_size == 0)
+ {
+ maybe_record_trace_start (start, origin);
+ return;
+ }
+
+ delta = -save_args_size;
+ cur_trace->end_true_args_size = 0;
+
+ save_cfa = cur_row->cfa;
+ if (cur_row->cfa.reg == dw_stack_pointer_regnum)
+ {
+ /* Convert a change in args_size (always a positive in the
+ direction of stack growth) to a change in stack pointer. */
+#ifndef STACK_GROWS_DOWNWARD
+ delta = -delta;
+#endif
+ cur_row->cfa.offset += delta;
+ }
+
+ maybe_record_trace_start (start, origin);
+
+ cur_trace->end_true_args_size = save_args_size;
+ cur_row->cfa = save_cfa;
+}
+
+/* Propagate CUR_TRACE state to the destinations implied by INSN. */
+/* ??? Sadly, this is in large part a duplicate of make_edges. */
+
+static void
+create_trace_edges (rtx insn)
+{
+ rtx tmp, lab;
+ int i, n;
+
+ if (JUMP_P (insn))
+ {
+ if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
+ return;
+
+ if (tablejump_p (insn, NULL, &tmp))
+ {
+ rtvec vec;
+
+ tmp = PATTERN (tmp);
+ vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
+
+ n = GET_NUM_ELEM (vec);
+ for (i = 0; i < n; ++i)
+ {
+ lab = XEXP (RTVEC_ELT (vec, i), 0);
+ maybe_record_trace_start (lab, insn);
+ }
+ }
+ else if (computed_jump_p (insn))
+ {
+ for (lab = forced_labels; lab; lab = XEXP (lab, 1))
+ maybe_record_trace_start (XEXP (lab, 0), insn);
+ }
+ else if (returnjump_p (insn))
+ ;
+ else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL)
+ {
+ n = ASM_OPERANDS_LABEL_LENGTH (tmp);
+ for (i = 0; i < n; ++i)
+ {
+ lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
+ maybe_record_trace_start (lab, insn);
+ }
+ }
+ else
+ {
+ lab = JUMP_LABEL (insn);
+ gcc_assert (lab != NULL);
+ maybe_record_trace_start (lab, insn);
+ }
+ }
+ else if (CALL_P (insn))
+ {
+ /* Sibling calls don't have edges inside this function. */
+ if (SIBLING_CALL_P (insn))
+ return;
+
+ /* Process non-local goto edges. */
+ if (can_nonlocal_goto (insn))
+ for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
+ maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
+ }
+ else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
+ {
+ rtx seq = PATTERN (insn);
+ int i, n = XVECLEN (seq, 0);
+ for (i = 0; i < n; ++i)
+ create_trace_edges (XVECEXP (seq, 0, i));
+ return;
+ }
+
+ /* Process EH edges. */
+ if (CALL_P (insn) || cfun->can_throw_non_call_exceptions)
+ {
+ eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn);
+ if (lp)
+ maybe_record_trace_start_abnormal (lp->landing_pad, insn);
+ }
+}
+
+/* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
+
+static void
+scan_insn_after (rtx insn)
+{
+ if (RTX_FRAME_RELATED_P (insn))
+ dwarf2out_frame_debug (insn);
+ notice_args_size (insn);
+}
+
+/* Scan the trace beginning at INSN and create the CFI notes for the
+ instructions therein. */
+
static void
-add_cfis_to_fde (void)
+scan_trace (dw_trace_info *trace)
{
- dw_fde_ref fde = cfun->fde;
- rtx insn, next;
- /* We always start with a function_begin label. */
- bool first = false;
+ rtx prev, insn = trace->head;
+ dw_cfa_location this_cfa;
- for (insn = get_insns (); insn; insn = next)
+ if (dump_file)
+ fprintf (dump_file, "Processing trace %u : start at %s %d\n",
+ trace->id, rtx_name[(int) GET_CODE (insn)],
+ INSN_UID (insn));
+
+ trace->end_row = copy_cfi_row (trace->beg_row);
+ trace->end_true_args_size = trace->beg_true_args_size;
+
+ cur_trace = trace;
+ cur_row = trace->end_row;
+
+ this_cfa = cur_row->cfa;
+ cur_cfa = &this_cfa;
+
+ for (prev = insn, insn = NEXT_INSN (insn);
+ insn;
+ prev = insn, insn = NEXT_INSN (insn))
{
- next = NEXT_INSN (insn);
+ rtx control;
- if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
+ /* Do everything that happens "before" the insn. */
+ add_cfi_insn = prev;
+
+ /* Notice the end of a trace. */
+ if (BARRIER_P (insn))
{
- /* Don't attempt to advance_loc4 between labels
- in different sections. */
- first = true;
+ /* Don't bother saving the unneeded queued registers at all. */
+ VEC_truncate (queued_reg_save, queued_reg_saves, 0);
+ break;
+ }
+ if (save_point_p (insn))
+ {
+ /* Propagate across fallthru edges. */
+ dwarf2out_flush_queued_reg_saves ();
+ maybe_record_trace_start (insn, NULL);
+ break;
}
- if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
+ if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn))
+ continue;
+
+ /* Handle all changes to the row state. Sequences require special
+ handling for the positioning of the notes. */
+ if (GET_CODE (PATTERN (insn)) == SEQUENCE)
{
- bool required = cfi_label_required_p (NOTE_CFI (insn));
- while (next && NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
+ rtx elt, pat = PATTERN (insn);
+ int i, n = XVECLEN (pat, 0);
+
+ control = XVECEXP (pat, 0, 0);
+ if (can_throw_internal (control))
+ notice_eh_throw (control);
+ dwarf2out_flush_queued_reg_saves ();
+
+ if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
{
- required |= cfi_label_required_p (NOTE_CFI (next));
- next = NEXT_INSN (next);
+ /* ??? Hopefully multiple delay slots are not annulled. */
+ gcc_assert (n == 2);
+ gcc_assert (!RTX_FRAME_RELATED_P (control));
+ gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL));
+
+ elt = XVECEXP (pat, 0, 1);
+
+ /* If ELT is an instruction from target of an annulled branch,
+ the effects are for the target only and so the args_size
+ and CFA along the current path shouldn't change. */
+ if (INSN_FROM_TARGET_P (elt))
+ {
+ HOST_WIDE_INT restore_args_size;
+
+ add_cfi_insn = NULL;
+ restore_args_size = cur_trace->end_true_args_size;
+ cur_cfa = &cur_row->cfa;
+
+ scan_insn_after (elt);
+
+ /* ??? Should we instead save the entire row state? */
+ gcc_assert (!VEC_length (queued_reg_save, queued_reg_saves));
+
+ create_trace_edges (control);
+
+ cur_trace->end_true_args_size = restore_args_size;
+ cur_row->cfa = this_cfa;
+ cur_cfa = &this_cfa;
+ continue;
+ }
}
- if (required)
- {
- int num = dwarf2out_cfi_label_num;
- const char *label = dwarf2out_cfi_label ();
- dw_cfi_ref xcfi;
- rtx tmp;
- /* Set the location counter to the new label. */
- xcfi = new_cfi ();
- xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc
- : DW_CFA_advance_loc4);
- xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
- VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi, xcfi);
+ /* The insns in the delay slot should all be considered to happen
+ "before" a call insn. Consider a call with a stack pointer
+ adjustment in the delay slot. The backtrace from the callee
+ should include the sp adjustment. Unfortunately, that leaves
+ us with an unavoidable unwinding error exactly at the call insn
+ itself. For jump insns we'd prefer to avoid this error by
+ placing the notes after the sequence. */
+ if (JUMP_P (control))
+ add_cfi_insn = insn;
- tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
- NOTE_LABEL_NUMBER (tmp) = num;
+ for (i = 1; i < n; ++i)
+ {
+ elt = XVECEXP (pat, 0, i);
+ scan_insn_after (elt);
}
- do
+ /* Make sure any register saves are visible at the jump target. */
+ dwarf2out_flush_queued_reg_saves ();
+
+ /* However, if there is some adjustment on the call itself, e.g.
+ a call_pop, that action should be considered to happen after
+ the call returns. */
+ add_cfi_insn = insn;
+ scan_insn_after (control);
+ }
+ else
+ {
+ /* Flush data before calls and jumps, and of course if necessary. */
+ if (can_throw_internal (insn))
{
- VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi, NOTE_CFI (insn));
- insn = NEXT_INSN (insn);
+ notice_eh_throw (insn);
+ dwarf2out_flush_queued_reg_saves ();
}
- while (insn != next);
- first = false;
+ else if (!NONJUMP_INSN_P (insn)
+ || clobbers_queued_reg_save (insn)
+ || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
+ dwarf2out_flush_queued_reg_saves ();
+
+ add_cfi_insn = insn;
+ scan_insn_after (insn);
+ control = insn;
}
+
+ /* Between frame-related-p and args_size we might have otherwise
+ emitted two cfa adjustments. Do it now. */
+ def_cfa_1 (&this_cfa);
+
+ /* Note that a test for control_flow_insn_p does exactly the
+ same tests as are done to actually create the edges. So
+ always call the routine and let it not create edges for
+ non-control-flow insns. */
+ create_trace_edges (control);
}
+
+ add_cfi_insn = NULL;
+ cur_row = NULL;
+ cur_trace = NULL;
+ cur_cfa = NULL;
}
/* Scan the function and create the initial set of CFI notes. */
-
+
static void
create_cfi_notes (void)
{
- rtx insn;
+ dw_trace_info *ti;
+
+ gcc_checking_assert (queued_reg_saves == NULL);
+ gcc_checking_assert (trace_work_list == NULL);
+
+ /* Always begin at the entry trace. */
+ ti = VEC_index (dw_trace_info, trace_info, 0);
+ scan_trace (ti);
- for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
+ while (!VEC_empty (dw_trace_info_ref, trace_work_list))
{
- rtx pat;
+ ti = VEC_pop (dw_trace_info_ref, trace_work_list);
+ scan_trace (ti);
+ }
- cfi_insn = PREV_INSN (insn);
+ VEC_free (queued_reg_save, heap, queued_reg_saves);
+ VEC_free (dw_trace_info_ref, heap, trace_work_list);
+}
- if (BARRIER_P (insn))
- {
- dwarf2out_frame_debug (insn, false);
- continue;
- }
+/* Return the insn before the first NOTE_INSN_CFI after START. */
- if (NOTE_P (insn))
+static rtx
+before_next_cfi_note (rtx start)
+{
+ rtx prev = start;
+ while (start)
+ {
+ if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
+ return prev;
+ prev = start;
+ start = NEXT_INSN (start);
+ }
+ gcc_unreachable ();
+}
+
+/* Insert CFI notes between traces to properly change state between them. */
+
+static void
+connect_traces (void)
+{
+ unsigned i, n = VEC_length (dw_trace_info, trace_info);
+ dw_trace_info *prev_ti, *ti;
+
+ /* ??? Ideally, we should have both queued and processed every trace.
+ However the current representation of constant pools on various targets
+ is indistinguishable from unreachable code. Assume for the moment that
+ we can simply skip over such traces. */
+ /* ??? Consider creating a DATA_INSN rtx code to indicate that
+ these are not "real" instructions, and should not be considered.
+ This could be generically useful for tablejump data as well. */
+ /* Remove all unprocessed traces from the list. */
+ for (i = n - 1; i > 0; --i)
+ {
+ ti = VEC_index (dw_trace_info, trace_info, i);
+ if (ti->beg_row == NULL)
{
- switch (NOTE_KIND (insn))
- {
- case NOTE_INSN_PROLOGUE_END:
- dwarf2out_flush_queued_reg_saves ();
- break;
+ VEC_ordered_remove (dw_trace_info, trace_info, i);
+ n -= 1;
+ }
+ else
+ gcc_assert (ti->end_row != NULL);
+ }
- case NOTE_INSN_EPILOGUE_BEG:
-#if defined(HAVE_epilogue)
- dwarf2out_cfi_begin_epilogue (insn);
-#endif
- break;
+ /* Work from the end back to the beginning. This lets us easily insert
+ remember/restore_state notes in the correct order wrt other notes. */
+ prev_ti = VEC_index (dw_trace_info, trace_info, n - 1);
+ for (i = n - 1; i > 0; --i)
+ {
+ dw_cfi_row *old_row;
- case NOTE_INSN_CFA_RESTORE_STATE:
- cfi_insn = insn;
- dwarf2out_frame_debug_restore_state ();
- break;
+ ti = prev_ti;
+ prev_ti = VEC_index (dw_trace_info, trace_info, i - 1);
+
+ add_cfi_insn = ti->head;
+
+ /* In dwarf2out_switch_text_section, we'll begin a new FDE
+ for the portion of the function in the alternate text
+ section. The row state at the very beginning of that
+ new FDE will be exactly the row state from the CIE. */
+ if (ti->switch_sections)
+ old_row = cie_cfi_row;
+ else
+ {
+ old_row = prev_ti->end_row;
+ /* If there's no change from the previous end state, fine. */
+ if (cfi_row_equal_p (old_row, ti->beg_row))
+ ;
+ /* Otherwise check for the common case of sharing state with
+ the beginning of an epilogue, but not the end. Insert
+ remember/restore opcodes in that case. */
+ else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row))
+ {
+ dw_cfi_ref cfi;
+
+ /* Note that if we blindly insert the remember at the
+ start of the trace, we can wind up increasing the
+ size of the unwind info due to extra advance opcodes.
+ Instead, put the remember immediately before the next
+ state change. We know there must be one, because the
+ state at the beginning and head of the trace differ. */
+ add_cfi_insn = before_next_cfi_note (prev_ti->head);
+ cfi = new_cfi ();
+ cfi->dw_cfi_opc = DW_CFA_remember_state;
+ add_cfi (cfi);
+
+ add_cfi_insn = ti->head;
+ cfi = new_cfi ();
+ cfi->dw_cfi_opc = DW_CFA_restore_state;
+ add_cfi (cfi);
+
+ old_row = prev_ti->beg_row;
}
- continue;
+ /* Otherwise, we'll simply change state from the previous end. */
}
- if (!NONDEBUG_INSN_P (insn))
- continue;
+ change_cfi_row (old_row, ti->beg_row);
- pat = PATTERN (insn);
- if (asm_noperands (pat) >= 0)
+ if (dump_file && add_cfi_insn != ti->head)
{
- dwarf2out_frame_debug (insn, false);
- continue;
+ rtx note;
+
+ fprintf (dump_file, "Fixup between trace %u and %u:\n",
+ prev_ti->id, ti->id);
+
+ note = ti->head;
+ do
+ {
+ note = NEXT_INSN (note);
+ gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI);
+ output_cfi_directive (dump_file, NOTE_CFI (note));
+ }
+ while (note != add_cfi_insn);
}
+ }
- if (GET_CODE (pat) == SEQUENCE)
+ /* Connect args_size between traces that have can_throw_internal insns. */
+ if (cfun->eh->lp_array != NULL)
+ {
+ HOST_WIDE_INT prev_args_size = 0;
+
+ for (i = 0; i < n; ++i)
{
- int i, n = XVECLEN (pat, 0);
- for (i = 1; i < n; ++i)
- dwarf2out_frame_debug (XVECEXP (pat, 0, i), false);
- }
+ ti = VEC_index (dw_trace_info, trace_info, i);
- if (CALL_P (insn)
- || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
- dwarf2out_frame_debug (insn, false);
+ if (ti->switch_sections)
+ prev_args_size = 0;
+ if (ti->eh_head == NULL)
+ continue;
+ gcc_assert (!ti->args_size_undefined);
- /* Do not separate tablejump insns from their ADDR_DIFF_VEC.
- Putting the note after the VEC should be ok. */
- if (!tablejump_p (insn, NULL, &cfi_insn))
- cfi_insn = insn;
+ if (ti->beg_delay_args_size != prev_args_size)
+ {
+ /* ??? Search back to previous CFI note. */
+ add_cfi_insn = PREV_INSN (ti->eh_head);
+ add_cfi_args_size (ti->beg_delay_args_size);
+ }
- dwarf2out_frame_debug (insn, true);
+ prev_args_size = ti->end_delay_args_size;
+ }
}
-
- cfi_insn = NULL;
}
-/* Determine if we need to save and restore CFI information around this
- epilogue. If SIBCALL is true, then this is a sibcall epilogue. If
- we do need to save/restore, then emit the save now, and insert a
- NOTE_INSN_CFA_RESTORE_STATE at the appropriate place in the stream. */
+/* Set up the pseudo-cfg of instruction traces, as described at the
+ block comment at the top of the file. */
static void
-dwarf2out_cfi_begin_epilogue (rtx insn)
+create_pseudo_cfg (void)
{
- bool saw_frp = false;
- rtx i;
+ bool saw_barrier, switch_sections;
+ dw_trace_info *ti;
+ rtx insn;
+ unsigned i;
+
+ /* The first trace begins at the start of the function,
+ and begins with the CIE row state. */
+ trace_info = VEC_alloc (dw_trace_info, heap, 16);
+ ti = VEC_quick_push (dw_trace_info, trace_info, NULL);
+
+ memset (ti, 0, sizeof (*ti));
+ ti->head = get_insns ();
+ ti->beg_row = cie_cfi_row;
+ ti->cfa_store = cie_cfi_row->cfa;
+ ti->cfa_temp.reg = INVALID_REGNUM;
+ if (cie_return_save)
+ VEC_safe_push (reg_saved_in_data, heap,
+ ti->regs_saved_in_regs, cie_return_save);
- /* Scan forward to the return insn, noticing if there are possible
- frame related insns. */
- for (i = NEXT_INSN (insn); i ; i = NEXT_INSN (i))
+ /* Walk all the insns, collecting start of trace locations. */
+ saw_barrier = false;
+ switch_sections = false;
+ for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
{
- if (!INSN_P (i))
- continue;
-
- /* Look for both regular and sibcalls to end the block. */
- if (returnjump_p (i))
- break;
- if (CALL_P (i) && SIBLING_CALL_P (i))
- break;
-
- if (GET_CODE (PATTERN (i)) == SEQUENCE)
+ if (BARRIER_P (insn))
+ saw_barrier = true;
+ else if (NOTE_P (insn)
+ && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
{
- int idx;
- rtx seq = PATTERN (i);
-
- if (returnjump_p (XVECEXP (seq, 0, 0)))
- break;
- if (CALL_P (XVECEXP (seq, 0, 0))
- && SIBLING_CALL_P (XVECEXP (seq, 0, 0)))
- break;
-
- for (idx = 0; idx < XVECLEN (seq, 0); idx++)
- if (RTX_FRAME_RELATED_P (XVECEXP (seq, 0, idx)))
- saw_frp = true;
+ /* We should have just seen a barrier. */
+ gcc_assert (saw_barrier);
+ switch_sections = true;
+ }
+ /* Watch out for save_point notes between basic blocks.
+ In particular, a note after a barrier. Do not record these,
+ delaying trace creation until the label. */
+ else if (save_point_p (insn)
+ && (LABEL_P (insn) || !saw_barrier))
+ {
+ ti = VEC_safe_push (dw_trace_info, heap, trace_info, NULL);
+ memset (ti, 0, sizeof (*ti));
+ ti->head = insn;
+ ti->switch_sections = switch_sections;
+ ti->id = VEC_length (dw_trace_info, trace_info) - 1;
+
+ saw_barrier = false;
+ switch_sections = false;
}
-
- if (RTX_FRAME_RELATED_P (i))
- saw_frp = true;
}
- /* If the port doesn't emit epilogue unwind info, we don't need a
- save/restore pair. */
- if (!saw_frp)
- return;
-
- /* Otherwise, search forward to see if the return insn was the last
- basic block of the function. If so, we don't need save/restore. */
- gcc_assert (i != NULL);
- i = next_real_insn (i);
- if (i == NULL)
- return;
-
- /* Insert the restore before that next real insn in the stream, and before
- a potential NOTE_INSN_EPILOGUE_BEG -- we do need these notes to be
- properly nested. This should be after any label or alignment. This
- will be pushed into the CFI stream by the function below. */
- while (1)
+ /* Create the trace index after we've finished building trace_info,
+ avoiding stale pointer problems due to reallocation. */
+ trace_index = htab_create (VEC_length (dw_trace_info, trace_info),
+ dw_trace_info_hash, dw_trace_info_eq, NULL);
+ FOR_EACH_VEC_ELT (dw_trace_info, trace_info, i, ti)
{
- rtx p = PREV_INSN (i);
- if (!NOTE_P (p))
- break;
- if (NOTE_KIND (p) == NOTE_INSN_BASIC_BLOCK)
- break;
- i = p;
- }
- emit_note_before (NOTE_INSN_CFA_RESTORE_STATE, i);
+ void **slot;
- emit_cfa_remember = true;
+ if (dump_file)
+ fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i,
+ rtx_name[(int) GET_CODE (ti->head)], INSN_UID (ti->head),
+ ti->switch_sections ? " (section switch)" : "");
- /* And emulate the state save. */
- gcc_assert (!cfa_remember.in_use);
- cfa_remember = cfa;
- old_cfa_remember = old_cfa;
- cfa_remember.in_use = 1;
+ slot = htab_find_slot_with_hash (trace_index, ti,
+ INSN_UID (ti->head), INSERT);
+ gcc_assert (*slot == NULL);
+ *slot = (void *) ti;
+ }
}
-/* A "subroutine" of dwarf2out_cfi_begin_epilogue. Emit the restore
- required. */
-
-static void
-dwarf2out_frame_debug_restore_state (void)
-{
- dw_cfi_ref cfi = new_cfi ();
-
- cfi->dw_cfi_opc = DW_CFA_restore_state;
- add_cfi (cfi);
-
- gcc_assert (cfa_remember.in_use);
- cfa = cfa_remember;
- old_cfa = old_cfa_remember;
- cfa_remember.in_use = 0;
-}
-\f
/* Record the initial position of the return address. RTL is
INCOMING_RETURN_ADDR_RTX. */
{
case REG:
/* RA is in a register. */
- reg = DWARF_FRAME_REGNUM (REGNO (rtl));
+ reg = dwf_regno (rtl);
break;
case MEM:
{
if (reg != INVALID_REGNUM)
record_reg_saved_in_reg (rtl, pc_rtx);
- reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cfa.offset);
+ reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset);
}
}
-/* Annotate the function with NOTE_INSN_CFI notes to record the CFI
- state at each location within the function. These notes will be
- emitted during pass_final. */
-
-static unsigned int
-execute_dwarf2_frame (void)
+static void
+create_cie_data (void)
{
- /* The first time we're called, compute the incoming frame state. */
- if (cie_cfi_vec == NULL)
- {
- dw_cfa_location loc;
+ dw_cfa_location loc;
+ dw_trace_info cie_trace;
+
+ dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
+ dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM);
- add_cfi_vec = &cie_cfi_vec;
+ memset (&cie_trace, 0, sizeof(cie_trace));
+ cur_trace = &cie_trace;
- memset(&old_cfa, 0, sizeof (old_cfa));
- old_cfa.reg = INVALID_REGNUM;
+ add_cfi_vec = &cie_cfi_vec;
+ cie_cfi_row = cur_row = new_cfi_row ();
- /* On entry, the Canonical Frame Address is at SP. */
- memset(&loc, 0, sizeof (loc));
- loc.reg = STACK_POINTER_REGNUM;
- loc.offset = INCOMING_FRAME_SP_OFFSET;
- def_cfa_1 (&loc);
+ /* On entry, the Canonical Frame Address is at SP. */
+ memset(&loc, 0, sizeof (loc));
+ loc.reg = dw_stack_pointer_regnum;
+ loc.offset = INCOMING_FRAME_SP_OFFSET;
+ def_cfa_1 (&loc);
- if (targetm.debug_unwind_info () == UI_DWARF2
- || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
+ if (targetm.debug_unwind_info () == UI_DWARF2
+ || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
+ {
+ initial_return_save (INCOMING_RETURN_ADDR_RTX);
+
+ /* For a few targets, we have the return address incoming into a
+ register, but choose a different return column. This will result
+ in a DW_CFA_register for the return, and an entry in
+ regs_saved_in_regs to match. If the target later stores that
+ return address register to the stack, we want to be able to emit
+ the DW_CFA_offset against the return column, not the intermediate
+ save register. Save the contents of regs_saved_in_regs so that
+ we can re-initialize it at the start of each function. */
+ switch (VEC_length (reg_saved_in_data, cie_trace.regs_saved_in_regs))
{
- initial_return_save (INCOMING_RETURN_ADDR_RTX);
-
- /* For a few targets, we have the return address incoming into a
- register, but choose a different return column. This will result
- in a DW_CFA_register for the return, and an entry in
- regs_saved_in_regs to match. If the target later stores that
- return address register to the stack, we want to be able to emit
- the DW_CFA_offset against the return column, not the intermediate
- save register. Save the contents of regs_saved_in_regs so that
- we can re-initialize it at the start of each function. */
- switch (VEC_length (reg_saved_in_data, regs_saved_in_regs))
- {
- case 0:
- break;
- case 1:
- cie_return_save = ggc_alloc_reg_saved_in_data ();
- *cie_return_save = *VEC_index (reg_saved_in_data,
- regs_saved_in_regs, 0);
- regs_saved_in_regs = NULL;
- break;
- default:
- gcc_unreachable ();
- }
+ case 0:
+ break;
+ case 1:
+ cie_return_save = ggc_alloc_reg_saved_in_data ();
+ *cie_return_save = *VEC_index (reg_saved_in_data,
+ cie_trace.regs_saved_in_regs, 0);
+ VEC_free (reg_saved_in_data, heap, cie_trace.regs_saved_in_regs);
+ break;
+ default:
+ gcc_unreachable ();
}
-
- add_cfi_vec = NULL;
}
- /* Set up state for generating call frame debug info. */
- gcc_checking_assert (queued_reg_saves == NULL);
- gcc_checking_assert (regs_saved_in_regs == NULL);
-
- memset (&cfa, 0, sizeof(cfa));
- cfa.reg = STACK_POINTER_REGNUM;
- cfa.offset = INCOMING_FRAME_SP_OFFSET;
-
- old_cfa = cfa;
- cfa_store = cfa;
+ add_cfi_vec = NULL;
+ cur_row = NULL;
+ cur_trace = NULL;
+}
- memset (&cfa_temp, 0, sizeof(cfa_temp));
- cfa_temp.reg = INVALID_REGNUM;
+/* Annotate the function with NOTE_INSN_CFI notes to record the CFI
+ state at each location within the function. These notes will be
+ emitted during pass_final. */
- if (cie_return_save)
- VEC_safe_push (reg_saved_in_data, gc, regs_saved_in_regs, cie_return_save);
+static unsigned int
+execute_dwarf2_frame (void)
+{
+ /* The first time we're called, compute the incoming frame state. */
+ if (cie_cfi_vec == NULL)
+ create_cie_data ();
dwarf2out_alloc_current_fde ();
+ create_pseudo_cfg ();
+
/* Do the work. */
create_cfi_notes ();
+ connect_traces ();
add_cfis_to_fde ();
- /* Reset all function-specific information, particularly for GC. */
- XDELETEVEC (barrier_args_size);
- barrier_args_size = NULL;
- regs_saved_in_regs = NULL;
- queued_reg_saves = NULL;
+ /* Free all the data we allocated. */
+ {
+ size_t i;
+ dw_trace_info *ti;
+
+ FOR_EACH_VEC_ELT (dw_trace_info, trace_info, i, ti)
+ VEC_free (reg_saved_in_data, heap, ti->regs_saved_in_regs);
+ }
+ VEC_free (dw_trace_info, heap, trace_info);
+
+ htab_delete (trace_index);
+ trace_index = NULL;
return 0;
}
if (cfi->dw_cfi_opc == DW_CFA_expression)
{
- unsigned r =
+ unsigned r =
DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
dw2_asm_output_data (1, r, NULL);
loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
if (cfi->dw_cfi_opc == DW_CFA_expression)
{
- unsigned r =
+ unsigned r =
DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
fprintf (asm_out_file, "%#x,", r);
loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
output_cfi_directive (asm_out_file, cfi);
}
-/* Output CFIs from VEC, up to index UPTO, to bring current FDE to the
- same state as after executing CFIs in CFI chain. DO_CFI_ASM is
- true if .cfi_* directives shall be emitted, false otherwise. If it
- is false, FDE and FOR_EH are the other arguments to pass to
- output_cfi. */
-
-void
-output_cfis (cfi_vec vec, int upto, bool do_cfi_asm,
- dw_fde_ref fde, bool for_eh)
+static void
+dump_cfi_row (FILE *f, dw_cfi_row *row)
{
- int ix;
- struct dw_cfi_struct cfi_buf;
- dw_cfi_ref cfi2;
- dw_cfi_ref cfi_args_size = NULL, cfi_cfa = NULL, cfi_cfa_offset = NULL;
- VEC(dw_cfi_ref, heap) *regs = VEC_alloc (dw_cfi_ref, heap, 32);
- unsigned int len, idx;
+ dw_cfi_ref cfi;
+ unsigned i;
- for (ix = 0; ix < upto + 1; ix++)
+ cfi = row->cfa_cfi;
+ if (!cfi)
{
- dw_cfi_ref cfi = ix < upto ? VEC_index (dw_cfi_ref, vec, ix) : NULL;
- switch (cfi ? cfi->dw_cfi_opc : DW_CFA_nop)
- {
- case DW_CFA_advance_loc:
- case DW_CFA_advance_loc1:
- case DW_CFA_advance_loc2:
- case DW_CFA_advance_loc4:
- case DW_CFA_MIPS_advance_loc8:
- case DW_CFA_set_loc:
- /* All advances should be ignored. */
- break;
- case DW_CFA_remember_state:
- {
- dw_cfi_ref args_size = cfi_args_size;
+ dw_cfa_location dummy;
+ memset(&dummy, 0, sizeof(dummy));
+ dummy.reg = INVALID_REGNUM;
+ cfi = def_cfa_0 (&dummy, &row->cfa);
+ }
+ output_cfi_directive (f, cfi);
- /* Skip everything between .cfi_remember_state and
- .cfi_restore_state. */
- ix++;
- if (ix == upto)
- goto flush_all;
+ FOR_EACH_VEC_ELT (dw_cfi_ref, row->reg_save, i, cfi)
+ if (cfi)
+ output_cfi_directive (f, cfi);
+}
- for (; ix < upto; ix++)
- {
- cfi2 = VEC_index (dw_cfi_ref, vec, ix);
- if (cfi2->dw_cfi_opc == DW_CFA_restore_state)
- break;
- else if (cfi2->dw_cfi_opc == DW_CFA_GNU_args_size)
- args_size = cfi2;
- else
- gcc_assert (cfi2->dw_cfi_opc != DW_CFA_remember_state);
- }
+void debug_cfi_row (dw_cfi_row *row);
- cfi_args_size = args_size;
- break;
- }
- case DW_CFA_GNU_args_size:
- cfi_args_size = cfi;
- break;
- case DW_CFA_GNU_window_save:
- goto flush_all;
- case DW_CFA_offset:
- case DW_CFA_offset_extended:
- case DW_CFA_offset_extended_sf:
- case DW_CFA_restore:
- case DW_CFA_restore_extended:
- case DW_CFA_undefined:
- case DW_CFA_same_value:
- case DW_CFA_register:
- case DW_CFA_val_offset:
- case DW_CFA_val_offset_sf:
- case DW_CFA_expression:
- case DW_CFA_val_expression:
- case DW_CFA_GNU_negative_offset_extended:
- if (VEC_length (dw_cfi_ref, regs)
- <= cfi->dw_cfi_oprnd1.dw_cfi_reg_num)
- VEC_safe_grow_cleared (dw_cfi_ref, heap, regs,
- cfi->dw_cfi_oprnd1.dw_cfi_reg_num + 1);
- VEC_replace (dw_cfi_ref, regs, cfi->dw_cfi_oprnd1.dw_cfi_reg_num,
- cfi);
- break;
- case DW_CFA_def_cfa:
- case DW_CFA_def_cfa_sf:
- case DW_CFA_def_cfa_expression:
- cfi_cfa = cfi;
- cfi_cfa_offset = cfi;
- break;
- case DW_CFA_def_cfa_register:
- cfi_cfa = cfi;
- break;
- case DW_CFA_def_cfa_offset:
- case DW_CFA_def_cfa_offset_sf:
- cfi_cfa_offset = cfi;
- break;
- case DW_CFA_nop:
- gcc_assert (cfi == NULL);
- flush_all:
- len = VEC_length (dw_cfi_ref, regs);
- for (idx = 0; idx < len; idx++)
- {
- cfi2 = VEC_replace (dw_cfi_ref, regs, idx, NULL);
- if (cfi2 != NULL
- && cfi2->dw_cfi_opc != DW_CFA_restore
- && cfi2->dw_cfi_opc != DW_CFA_restore_extended)
- {
- if (do_cfi_asm)
- output_cfi_directive (asm_out_file, cfi2);
- else
- output_cfi (cfi2, fde, for_eh);
- }
- }
- if (cfi_cfa && cfi_cfa_offset && cfi_cfa_offset != cfi_cfa)
- {
- gcc_assert (cfi_cfa->dw_cfi_opc != DW_CFA_def_cfa_expression);
- cfi_buf = *cfi_cfa;
- switch (cfi_cfa_offset->dw_cfi_opc)
- {
- case DW_CFA_def_cfa_offset:
- cfi_buf.dw_cfi_opc = DW_CFA_def_cfa;
- cfi_buf.dw_cfi_oprnd2 = cfi_cfa_offset->dw_cfi_oprnd1;
- break;
- case DW_CFA_def_cfa_offset_sf:
- cfi_buf.dw_cfi_opc = DW_CFA_def_cfa_sf;
- cfi_buf.dw_cfi_oprnd2 = cfi_cfa_offset->dw_cfi_oprnd1;
- break;
- case DW_CFA_def_cfa:
- case DW_CFA_def_cfa_sf:
- cfi_buf.dw_cfi_opc = cfi_cfa_offset->dw_cfi_opc;
- cfi_buf.dw_cfi_oprnd2 = cfi_cfa_offset->dw_cfi_oprnd2;
- break;
- default:
- gcc_unreachable ();
- }
- cfi_cfa = &cfi_buf;
- }
- else if (cfi_cfa_offset)
- cfi_cfa = cfi_cfa_offset;
- if (cfi_cfa)
- {
- if (do_cfi_asm)
- output_cfi_directive (asm_out_file, cfi_cfa);
- else
- output_cfi (cfi_cfa, fde, for_eh);
- }
- cfi_cfa = NULL;
- cfi_cfa_offset = NULL;
- if (cfi_args_size
- && cfi_args_size->dw_cfi_oprnd1.dw_cfi_offset)
- {
- if (do_cfi_asm)
- output_cfi_directive (asm_out_file, cfi_args_size);
- else
- output_cfi (cfi_args_size, fde, for_eh);
- }
- cfi_args_size = NULL;
- if (cfi == NULL)
- {
- VEC_free (dw_cfi_ref, heap, regs);
- return;
- }
- else if (do_cfi_asm)
- output_cfi_directive (asm_out_file, cfi);
- else
- output_cfi (cfi, fde, for_eh);
- break;
- default:
- gcc_unreachable ();
- }
- }
+void
+debug_cfi_row (dw_cfi_row *row)
+{
+ dump_cfi_row (stderr, row);
}
\f
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