-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
-fallow-single-precision -fcond-mismatch @gol
-fsigned-bitfields -fsigned-char @gol
--funsigned-bitfields -funsigned-char @gol
--fwritable-strings}
+-funsigned-bitfields -funsigned-char}
@item C++ Language Options
@xref{C++ Dialect Options,,Options Controlling C++ Dialect}.
-Wsystem-headers -Wtrigraphs -Wundef -Wuninitialized @gol
-Wunknown-pragmas -Wunreachable-code @gol
-Wunused -Wunused-function -Wunused-label -Wunused-parameter @gol
--Wunused-value -Wunused-variable -Wwrite-strings}
+-Wunused-value -Wunused-variable -Wwrite-strings @gol
+-Wvariadic-macros}
@item C-only Warning Options
@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol
-feliminate-dwarf2-dups -feliminate-unused-debug-types @gol
-feliminate-unused-debug-symbols -fmem-report -fprofile-arcs @gol
-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol
--ftest-coverage -ftime-report @gol
+-ftest-coverage -ftime-report -fvar-tracking @gol
-g -g@var{level} -gcoff -gdwarf-2 @gol
-ggdb -gstabs -gstabs+ -gvms -gxcoff -gxcoff+ @gol
-p -pg -print-file-name=@var{library} -print-libgcc-file-name @gol
@gccoptlist{-falign-functions=@var{n} -falign-jumps=@var{n} @gol
-falign-labels=@var{n} -falign-loops=@var{n} @gol
-fbranch-probabilities -fprofile-values -fvpt -fbranch-target-load-optimize @gol
--fbranch-target-load-optimize2 -fcaller-saves -fcprop-registers @gol
+-fbranch-target-load-optimize2 -fbtr-bb-exclusive @gol
+-fcaller-saves -fcprop-registers @gol
-fcse-follow-jumps -fcse-skip-blocks -fdata-sections @gol
-fdelayed-branch -fdelete-null-pointer-checks @gol
-fexpensive-optimizations -ffast-math -ffloat-store @gol
-fforce-addr -fforce-mem -ffunction-sections @gol
--fgcse -fgcse-lm -fgcse-sm -fgcse-las -floop-optimize @gol
--fcrossjumping -fif-conversion -fif-conversion2 @gol
+-fgcse -fgcse-lm -fgcse-sm -fgcse-las -fgcse-after-reload @gol
+-floop-optimize -fcrossjumping -fif-conversion -fif-conversion2 @gol
-finline-functions -finline-limit=@var{n} -fkeep-inline-functions @gol
-fkeep-static-consts -fmerge-constants -fmerge-all-constants @gol
-fmove-all-movables -fnew-ra -fno-branch-count-reg @gol
@gccoptlist{-mcpu=@var{cpu-type} @gol
-mtune=@var{cpu-type} @gol
-mcmodel=@var{code-model} @gol
--m32 -m64 @gol
--mapp-regs -mbroken-saverestore -mcypress @gol
--mfaster-structs -mflat @gol
--mfpu -mhard-float -mhard-quad-float @gol
--mimpure-text -mlittle-endian -mlive-g0 -mno-app-regs @gol
--mno-faster-structs -mno-flat -mno-fpu @gol
--mno-impure-text -mno-stack-bias -mno-unaligned-doubles @gol
--msoft-float -msoft-quad-float -msparclite -mstack-bias @gol
--msupersparc -munaligned-doubles -mv8}
+-m32 -m64 -mapp-regs -mno-app-regs @gol
+-mfaster-structs -mno-faster-structs @gol
+-mfpu -mno-fpu -mhard-float -msoft-float @gol
+-mhard-quad-float -msoft-quad-float @gol
+-mimpure-text -mno-impure-text -mlittle-endian @gol
+-mstack-bias -mno-stack-bias @gol
+-munaligned-doubles -mno-unaligned-doubles @gol
+-mv8plus -mno-v8plus -mvis -mno-vis}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
-msched-prolog -mno-sched-prolog @gol
-mlittle-endian -mbig-endian -mwords-little-endian @gol
-malignment-traps -mno-alignment-traps @gol
--msoft-float -mhard-float -mfpe @gol
+-mfloat-abi=@var{name} soft-float -mhard-float -mfpe @gol
-mthumb-interwork -mno-thumb-interwork @gol
--mcpu=@var{name} -march=@var{name} -mfpe=@var{name} @gol
+-mcpu=@var{name} -march=@var{name} -mfpu=@var{name} @gol
-mstructure-size-boundary=@var{n} @gol
-mabort-on-noreturn @gol
-mlong-calls -mno-long-calls @gol
-mtpcs-frame -mtpcs-leaf-frame @gol
-mcaller-super-interworking -mcallee-super-interworking}
-@emph{MN10200 Options}
-@gccoptlist{-mrelax}
-
@emph{MN10300 Options}
@gccoptlist{-mmult-bug -mno-mult-bug @gol
-mam33 -mno-am33 @gol
-mno-flush-trap -mflush-trap=@var{number} @gol
-G @var{num}}
-@emph{M88K Options}
-@gccoptlist{-m88000 -m88100 -m88110 -mbig-pic @gol
--mcheck-zero-division -mhandle-large-shift @gol
--midentify-revision -mno-check-zero-division @gol
--mno-ocs-debug-info -mno-ocs-frame-position @gol
--mno-optimize-arg-area -mno-serialize-volatile @gol
--mno-underscores -mocs-debug-info @gol
--mocs-frame-position -moptimize-arg-area @gol
--mserialize-volatile -mshort-data-@var{num} -msvr3 @gol
--msvr4 -mtrap-large-shift -muse-div-instruction @gol
--mversion-03.00 -mwarn-passed-structs}
-
@emph{RS/6000 and PowerPC Options}
@gccoptlist{-mcpu=@var{cpu-type} @gol
-mtune=@var{cpu-type} @gol
-single_module -static -sub_library -sub_umbrella @gol
-twolevel_namespace -umbrella -undefined @gol
-unexported_symbols_list -weak_reference_mismatches @gol
--whatsloaded}
-
-@emph{RT Options}
-@gccoptlist{-mcall-lib-mul -mfp-arg-in-fpregs -mfp-arg-in-gregs @gol
--mfull-fp-blocks -mhc-struct-return -min-line-mul @gol
--mminimum-fp-blocks -mnohc-struct-return}
+-whatsloaded -F}
@emph{MIPS Options}
@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
-msingle-float -mdouble-float -mint64 -mlong64 -mlong32 @gol
-G@var{num} -membedded-data -mno-embedded-data @gol
-muninit-const-in-rodata -mno-uninit-const-in-rodata @gol
--msplit-addresses -mno-split-addresses -mrnames -mno-rnames @gol
+-msplit-addresses -mno-split-addresses @gol
+-mexplicit-relocs -mno-explicit-relocs @gol
+-mrnames -mno-rnames @gol
-mcheck-zero-division -mno-check-zero-division @gol
-mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol
-mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol
--mfix-sb1 -mno-fix-sb1 -mflush-func=@var{func} @gol
--mno-flush-func -mbranch-likely -mno-branch-likely}
+-mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol
+-mfix-sb1 -mno-fix-sb1 @gol
+-mflush-func=@var{func} -mno-flush-func @gol
+-mbranch-likely -mno-branch-likely}
@emph{i386 and x86-64 Options}
@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
-mno-wide-multiply -mrtd -malign-double @gol
-mpreferred-stack-boundary=@var{num} @gol
--mmmx -msse -msse2 -mpni -m3dnow @gol
+-mmmx -msse -msse2 -msse3 -m3dnow @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
-m96bit-long-double -mregparm=@var{num} -momit-leaf-frame-pointer @gol
-mschedule=@var{cpu-type} -mspace-regs -msio -mwsio @gol
-nolibdld -static -threads}
-@emph{Intel 960 Options}
-@gccoptlist{-m@var{cpu-type} -masm-compat -mclean-linkage @gol
--mcode-align -mcomplex-addr -mleaf-procedures @gol
--mic-compat -mic2.0-compat -mic3.0-compat @gol
--mintel-asm -mno-clean-linkage -mno-code-align @gol
--mno-complex-addr -mno-leaf-procedures @gol
--mno-old-align -mno-strict-align -mno-tail-call @gol
--mnumerics -mold-align -msoft-float -mstrict-align @gol
--mtail-call}
-
@emph{DEC Alpha Options}
@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol
-mieee -mieee-with-inexact -mieee-conformant @gol
-minline-int-divide-max-throughput -mno-dwarf2-asm @gol
-mfixed-range=@var{register-range}}
-@emph{D30V Options}
-@gccoptlist{-mextmem -mextmemory -monchip -mno-asm-optimize @gol
--masm-optimize -mbranch-cost=@var{n} -mcond-exec=@var{n}}
-
@emph{S/390 and zSeries Options}
@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
-mhard-float -msoft-float -mbackchain -mno-backchain @gol
-malloc-cc -mfixed-cc -mdword -mno-dword @gol
-mdouble -mno-double @gol
-mmedia -mno-media -mmuladd -mno-muladd @gol
+-mfdpic -minline-plt -mgprel-ro -multilib-library-pic -mlinked-fp @gol
-mlibrary-pic -macc-4 -macc-8 @gol
-mpack -mno-pack -mno-eflags -mcond-move -mno-cond-move @gol
-mscc -mno-scc -mcond-exec -mno-cond-exec @gol
(rather than letting the compiler choose a default based on the file
name suffix). This option applies to all following input files until
the next @option{-x} option. Possible values for @var{language} are:
-@example
+@smallexample
c c-header cpp-output
c++ c++-header c++-cpp-output
objective-c objective-c-header objc-cpp-output
f77 f77-cpp-input ratfor
java
treelang
-@end example
+@end smallexample
@item -x none
Turn off any specification of a language, so that subsequent files are
declaration does not use either @code{signed} or @code{unsigned}. By
default, such a bit-field is signed, because this is consistent: the
basic integer types such as @code{int} are signed types.
-
-@item -fwritable-strings
-@opindex fwritable-strings
-Store string constants in the writable data segment and don't uniquize
-them. This is for compatibility with old programs which assume they can
-write into string constants.
-
-Writing into string constants is a very bad idea; ``constants'' should
-be constant.
-
-This option is deprecated.
@end table
@node C++ Dialect Options
regardless of what language your program is in. For example, you
might compile a file @code{firstClass.C} like this:
-@example
+@smallexample
g++ -g -frepo -O -c firstClass.C
-@end example
+@end smallexample
@noindent
In this example, only @option{-frepo} is an option meant
Therefore, the ABI obtained using version 0 will change as ABI bugs
are fixed.
-The default is version 1.
+The default is version 2.
@item -fno-access-control
@opindex fno-access-control
Give string constants type @code{char *} instead of type @code{const
char *}. By default, G++ uses type @code{const char *} as required by
the standard. Even if you use @option{-fno-const-strings}, you cannot
-actually modify the value of a string constant, unless you also use
-@option{-fwritable-strings}.
+actually modify the value of a string constant.
This option might be removed in a future release of G++. For maximum
portability, you should structure your code so that it works with
@opindex Wabi
Warn when G++ generates code that is probably not compatible with the
vendor-neutral C++ ABI. Although an effort has been made to warn about
-all such cases, there are probably some cases that are not warned about,
+all such cases, there are probably some cases that are not warned about,
even though G++ is generating incompatible code. There may also be
cases where warnings are emitted even though the code that is generated
will be compatible.
@noindent
In this case, G++ will place @code{B::f2} into the same byte
-as@code{A::f1}; other compilers will not. You can avoid this problem
+as@code{A::f1}; other compilers will not. You can avoid this problem
by explicitly padding @code{A} so that its size is a multiple of the
byte size on your platform; that will cause G++ and other compilers to
layout @code{B} identically.
@item
Empty classes can be placed at incorrect offsets. For example:
-
+
@smallexample
struct A @{@};
@end itemize
-Also warn about violations of the following style guidelines from
+Also warn about violations of the following style guidelines from
Scott Meyers' @cite{More Effective C++} book:
@itemize @bullet
options regardless of what language your program is in. For example,
you might compile a file @code{some_class.m} like this:
-@example
+@smallexample
gcc -g -fgnu-runtime -O -c some_class.m
-@end example
+@end smallexample
@noindent
In this example, @option{-fgnu-runtime} is an option meant only for
@item -fno-nil-receivers
@opindex -fno-nil-receivers
-Assume that all Objective-C message dispatches (e.g.,
-@code{[receiver message:arg]}) in this translation unit ensure that the receiver
-is not @code{nil}. This allows for more efficient entry points in the runtime to be
-used. Currently, this option is only available in conjunction with
+Assume that all Objective-C message dispatches (e.g.,
+@code{[receiver message:arg]}) in this translation unit ensure that the receiver
+is not @code{nil}. This allows for more efficient entry points in the runtime to be
+used. Currently, this option is only available in conjunction with
the NeXT runtime on Mac OS X 10.3 and later.
@item -fobjc-exceptions
@opindex -fobjc-exceptions
-Enable syntactic support for structured exception handling in Objective-C,
-similar to what is offered by C++ and Java. Currently, this option is only
-available in conjunction with the NeXT runtime on Mac OS X 10.3 and later.
+Enable syntactic support for structured exception handling in Objective-C,
+similar to what is offered by C++ and Java. Currently, this option is only
+available in conjunction with the NeXT runtime on Mac OS X 10.3 and later.
@smallexample
@@try @{
@end smallexample
The @code{@@throw} statement may appear anywhere in an Objective-C or
-Objective-C++ program; when used inside of a @code{@@catch} block, the
-@code{@@throw} may appear without an argument (as shown above), in which case
+Objective-C++ program; when used inside of a @code{@@catch} block, the
+@code{@@throw} may appear without an argument (as shown above), in which case
the object caught by the @code{@@catch} will be rethrown.
Note that only (pointers to) Objective-C objects may be thrown and
caught using this scheme. When an object is thrown, it will be caught
by the nearest @code{@@catch} clause capable of handling objects of that type,
-analogously to how @code{catch} blocks work in C++ and Java. A
-@code{@@catch(id @dots{})} clause (as shown above) may also be provided to catch
+analogously to how @code{catch} blocks work in C++ and Java. A
+@code{@@catch(id @dots{})} clause (as shown above) may also be provided to catch
any and all Objective-C exceptions not caught by previous @code{@@catch}
clauses (if any).
@itemize @bullet
@item
-Although currently designed to be binary compatible with @code{NS_HANDLER}-style
+Although currently designed to be binary compatible with @code{NS_HANDLER}-style
idioms provided by the @code{NSException} class, the new
exceptions can only be used on Mac OS X 10.3 (Panther) and later
systems, due to additional functionality needed in the (NeXT) Objective-C
@item
As mentioned above, the new exceptions do not support handling
-types other than Objective-C objects. Furthermore, when used from
+types other than Objective-C objects. Furthermore, when used from
Objective-C++, the Objective-C exception model does not interoperate with C++
exceptions at this time. This means you cannot @code{@@throw} an exception
-from Objective-C and @code{catch} it in C++, or vice versa
+from Objective-C and @code{catch} it in C++, or vice versa
(i.e., @code{throw @dots{} @@catch}).
@end itemize
-
+
The @option{-fobjc-exceptions} switch also enables the use of synchronization
blocks for thread-safe execution:
Upon entering the @code{@@synchronized} block, a thread of execution shall
first check whether a lock has been placed on the corresponding @code{guard}
object by another thread. If it has, the current thread shall wait until
-the other thread relinquishes its lock. Once @code{guard} becomes available,
+the other thread relinquishes its lock. Once @code{guard} becomes available,
the current thread will place its own lock on it, execute the code contained in
the @code{@@synchronized} block, and finally relinquish the lock (thereby
making @code{guard} available to other threads).
Emit a special marker instructing @command{ld(1)} not to statically link in
the resulting object file, and allow @command{dyld(1)} to load it in at
run time instead. This is used in conjunction with the Fix-and-Continue
-debugging mode, where the object file in question may be recompiled and
+debugging mode, where the object file in question may be recompiled and
dynamically reloaded in the course of program execution, without the need
to restart the program itself. Currently, Fix-and-Continue functionality
-is only available in conjunction with the NeXT runtime on Mac OS X 10.3
+is only available in conjunction with the NeXT runtime on Mac OS X 10.3
and later.
@item -fzero-link
compile time) with static class references that get initialized at load time,
which improves run-time performance. Specifying the @option{-fzero-link} flag
suppresses this behavior and causes calls to @code{objc_getClass("@dots{}")}
-to be retained. This is useful in Zero-Link debugging mode, since it allows
+to be retained. This is useful in Zero-Link debugging mode, since it allows
for individual class implementations to be modified during program execution.
@item -gen-decls
@opindex Wundeclared-selector
Warn if a @code{@@selector(@dots{})} expression referring to an
undeclared selector is found. A selector is considered undeclared if no
-method with that name has been declared before the
+method with that name has been declared before the
@code{@@selector(@dots{})} expression, either explicitly in an
@code{@@interface} or @code{@@protocol} declaration, or implicitly in
an @code{@@implementation} section. This option always performs its
@option{-Wnonnull} is included in @option{-Wall} and @option{-Wformat}. It
can be disabled with the @option{-Wno-nonnull} option.
-@item -Winit-self @r{(C, C++, and Objective-C only)}
+@item -Winit-self @r{(C, C++, and Objective-C only)}
@opindex Winit-self
Warn about uninitialized variables which are initialized with themselves.
Note this option can only be used with the @option{-Wuninitialized} option,
@opindex Winline
Warn if a function can not be inlined and it was declared as inline.
Even with this option, the compiler will not warn about failures to
-inline functions declared in system headers.
+inline functions declared in system headers.
The compiler uses a variety of heuristics to determine whether or not
to inline a function. For example, the compiler takes into account
@option{-Wlong-long} and @option{-Wno-long-long} are taken into account
only when @option{-pedantic} flag is used.
+@item -Wvariadic-macros
+@opindex Wvariadic-macros
+@opindex Wno-variadic-macros
+Warn if variadic macros are used in pedantic ISO C90 mode, or the GNU
+alternate syntax when in pedantic ISO C99 mode. This is default.
+To inhibit the warning messages, use @option{-Wno-variadic-macros}.
+
@item -Wdisabled-optimization
@opindex Wdisabled-optimization
Warn if a requested optimization pass is disabled. This warning does
Dump after computing branch probabilities, to @file{@var{file}.12.bp}.
@item B
@opindex dB
-Dump after block reordering, to @file{@var{file}.30.bbro}.
+Dump after block reordering, to @file{@var{file}.31.bbro}.
@item c
@opindex dc
Dump after instruction combination, to the file @file{@var{file}.20.combine}.
normal output.
@item E
@opindex dE
-Dump after the second if conversion, to @file{@var{file}.31.ce3}.
+Dump after the third if conversion, to @file{@var{file}.30.ce3}.
@item f
@opindex df
Dump after control and data flow analysis, to @file{@var{file}.11.cfg}.
@item V
@opindex dV
Dump after the value profile transformations, to @file{@var{file}.13.vpt}.
+Also dump after variable tracking, to @file{@var{file}.35.vartrack}.
@item w
@opindex dw
Dump after the second flow pass, to @file{@var{file}.27.flow2}.
time spent executing operating system routines on behalf of the program.
Both numbers are in seconds.
+@item -fvar-tracking
+@opindex fvar-tracking
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+
+It is enabled by default when compiling with optimization (@option{-Os},
+@option{-O}, @option{-O2}, ...), debugging information (@option{-g}) and
+the debug info format supports it.
+
@item -print-file-name=@var{library}
@opindex print-file-name
Print the full absolute name of the library file @var{library} that
This is useful when you use @option{-nostdlib} or @option{-nodefaultlibs}
but you do want to link with @file{libgcc.a}. You can do
-@example
+@smallexample
gcc -nostdlib @var{files}@dots{} `gcc -print-libgcc-file-name`
-@end example
+@end smallexample
@item -print-search-dirs
@opindex print-search-dirs
the performance and/or code size at the expense of compilation time
and possibly the ability to debug the program.
-The compiler performs optimisation based on the knowledge it has of
+The compiler performs optimization based on the knowledge it has of
the program. Using the @option{-funit-at-a-time} flag will allow the
compiler to consider information gained from later functions in the
file when compiling a function. Compiling multiple files at once to a
time, without performing any optimizations that take a great deal of
compilation time.
-@option{-O} turns on the following optimization flags:
+@option{-O} turns on the following optimization flags:
@gccoptlist{-fdefer-pop @gol
-fmerge-constants @gol
-fthread-jumps @gol
@opindex O3
Optimize yet more. @option{-O3} turns on all optimizations specified by
@option{-O2} and also turns on the @option{-finline-functions},
-@option{-fweb} and @option{-frename-registers} options.
+@option{-fweb}, @option{-frename-registers}
+and @option{-fgcse-after-reload} options.
@item -O0
@opindex O0
Inlining is actually controlled by a number of parameters, which may be
specified individually by using @option{--param @var{name}=@var{value}}.
-The @option{-finline-limit=@var{n}} option sets some of these parameters
+The @option{-finline-limit=@var{n}} option sets some of these parameters
as follows:
@table @gcctabopt
Enabled by default when gcse is enabled.
+@item -fgcse-after-reload
+@opindex fgcse-after-reload
+When @option{-fgcse-after-reload} is enabled, a redundant load elimination
+pass is performed after reload. The purpose of this pass is to cleanup
+redundant spilling.
+
@item -floop-optimize
@opindex floop-optimize
Perform loop optimizations: move constant expressions out of loops, simplify
@item -fsched-stalled-insns-dep=@var{n}
@opindex fsched-stalled-insns-dep
-Define how many insn groups (cycles) will be examined for a dependency
-on a stalled insn that is candidate for premature removal from the queue
-of stalled insns. Has an effect only during the second scheduling pass,
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns. Has an effect only during the second scheduling pass,
and only if @option{-fsched-stalled-insns} is used and its value is not zero.
@item -fsched2-use-superblocks
algorithm. Superblock scheduling allows motion across basic block boundaries
resulting on faster schedules. This option is experimental, as not all machine
descriptions used by GCC model the CPU closely enough to avoid unreliable
-results from the algorithm.
+results from the algorithm.
This only makes sense when scheduling after register allocation, i.e.@: with
@option{-fschedule-insns2} or at @option{-O2} or higher.
type.
Pay special attention to code like this:
-@example
+@smallexample
union a_union @{
int i;
double d;
t.d = 3.0;
return t.i;
@}
-@end example
+@end smallexample
The practice of reading from a different union member than the one most
recently written to (called ``type-punning'') is common. Even with
@option{-fstrict-aliasing}, type-punning is allowed, provided the memory
is accessed through the union type. So, the code above will work as
expected. However, this code might not:
-@example
+@smallexample
int f() @{
a_union t;
int* ip;
ip = &t.i;
return *ip;
@}
-@end example
+@end smallexample
Every language that wishes to perform language-specific alias analysis
should define a function that computes, given an @code{tree}
structure of the generated code, so you must use the same source code
and the same optimization options for both compilations.
-With @option{-fbranch-probabilities}, GCC puts a
+With @option{-fbranch-probabilities}, GCC puts a
@samp{REG_BR_PROB} note on each @samp{JUMP_INSN} and @samp{CALL_INSN}.
These can be used to improve optimization. Currently, they are only
used in one place: in @file{reorg.c}, instead of guessing which path a
recognition is based on notes from frontend. This usually makes programs run more slowly.
@option{-fold-unroll-all-loops} implies the same options as
@option{-fold-unroll-loops}.
-
+
@item -funswitch-loops
@opindex funswitch-loops
Move branches with loop invariant conditions out of the loop, with duplicates
Perform branch target register load optimization after prologue / epilogue
threading.
+@item -fbtr-bb-exclusive
+@opindex fbtr-bb-exclusive
+WHen performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+
@item --param @var{name}=@var{value}
@opindex param
In some places, GCC uses various constants to control the amount of
control some of these constants on the command-line using the
@option{--param} option.
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+
In each case, the @var{value} is an integer. The allowable choices for
@var{name} are given in the following table:
@item max-inline-insns-single
Several parameters control the tree inliner used in gcc.
This number sets the maximum number of instructions (counted in gcc's
-internal representation) in a single function that the tree inliner
+internal representation) in a single function that the tree inliner
will consider for inlining. This only affects functions declared
inline and methods implemented in a class declaration (C++).
The default value is 500.
by the compiler will be investigated. To those functions, a different
(more restrictive) limit compared to functions declared inline can
be applied.
-The default value is 150.
+The default value is 120.
@item large-function-insns
The limit specifying really large functions. For functions greater than this
This parameter is useful primarily to avoid extreme compilation time caused by non-linear
algorithms used by the backend.
This parameter is ignored when @option{-funit-at-a-time} is not used.
-The default value is 30000.
+The default value is 3000.
@item large-function-growth
-Specifies maximal growth of large functtion caused by inlining in percents.
+Specifies maximal growth of large function caused by inlining in percents.
This parameter is ignored when @option{-funit-at-a-time} is not used.
The default value is 200.
@item max-inline-insns-rtl
For languages that use the RTL inliner (this happens at a later stage
-than tree inlining), you can set the maximum allowable size (counted
+than tree inlining), you can set the maximum allowable size (counted
in RTL instructions) for the RTL inliner with this parameter.
The default value is 600.
this parameter and @option{ggc-min-expand} to zero causes a full
collection to occur at every opportunity.
+@item max-reload-search-insns
+The maximum number of instruction reload should look backward for equivalent
+register. Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance. The default
+value is 100.
+
+@item max-cselib-memory-location
+The maximum number of memory locations cselib should take into acount.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance. The default value is 500.
+
@item reorder-blocks-duplicate
@itemx reorder-blocks-duplicate-feedback
This way, @code{if-exists-else} can be used to select one file or another,
based on the existence of the first. Here is a small example of its usage:
-@smallexample
+@smallexample
*startfile:
crt0%O%s %:if-exists(crti%O%s) \
%:if-exists-else(crtbeginT%O%s crtbegin%O%s)
@end smallexample
-@end table
+@end table
@item %@{@code{S}@}
Substitutes the @code{-S} switch, if that switch was given to GCC@.
If @code{S} was given to GCC, substitutes @code{X}; else if @code{T} was
given to GCC, substitutes @code{Y}; else substitutes @code{D}. There can
-be as many clauses as you need. This may be combined with @code{.},
+be as many clauses as you need. This may be combined with @code{.},
@code{!}, @code{|}, and @code{*} as needed.
* VAX Options::
* SPARC Options::
* ARM Options::
-* MN10200 Options::
* MN10300 Options::
* M32R/D Options::
-* M88K Options::
* RS/6000 and PowerPC Options::
* Darwin Options::
-* RT Options::
* MIPS Options::
* i386 and x86-64 Options::
* HPPA Options::
-* Intel 960 Options::
* DEC Alpha Options::
* DEC Alpha/VMS Options::
* H8/300 Options::
* AVR Options::
* MCore Options::
* IA-64 Options::
-* D30V Options::
* S/390 and zSeries Options::
* CRIS Options::
* MMIX Options::
@itemx -m68hcs12
@opindex m68S12
@opindex m68hcs12
-Generate output for a 68HCS12.
+Generate output for a 68HCS12.
@item -mauto-incdec
@opindex mauto-incdec
@subsection SPARC Options
@cindex SPARC options
-These @samp{-m} switches are supported on the SPARC:
+These @samp{-m} options are supported on the SPARC:
@table @gcctabopt
@item -mno-app-regs
floating point instructions. The functions called are those specified
in the SPARC ABI@. This is the default.
-As of this writing, there are no sparc implementations that have hardware
+As of this writing, there are no SPARC implementations that have hardware
support for the quad-word floating point instructions. They all invoke
a trap handler for one of these instructions, and then the trap handler
emulates the effect of the instruction. Because of the trap handler overhead,
this is much slower than calling the ABI library routines. Thus the
@option{-msoft-quad-float} option is the default.
-@item -mno-flat
-@itemx -mflat
-@opindex mno-flat
-@opindex mflat
-With @option{-mflat}, the compiler does not generate save/restore instructions
-and will use a ``flat'' or single register window calling convention.
-This model uses %i7 as the frame pointer and is compatible with the normal
-register window model. Code from either may be intermixed.
-The local registers and the input registers (0--5) are still treated as
-``call saved'' registers and will be saved on the stack as necessary.
-
-With @option{-mno-flat} (the default), the compiler emits save/restore
-instructions (except for leaf functions) and is the normal mode of operation.
-
@item -mno-unaligned-doubles
@itemx -munaligned-doubles
@opindex mno-unaligned-doubles
@option{-mimpure-text}, used in addition to @option{-shared}, tells
the compiler to not pass @option{-z text} to the linker when linking a
shared object. Using this option, you can link position-dependent
-code into a shared object.
+code into a shared object.
@option{-mimpure-text} suppresses the ``relocations remain against
allocatable but non-writable sections'' linker error message.
This option is only available on SunOS and Solaris.
-@item -mv8
-@itemx -msparclite
-@opindex mv8
-@opindex msparclite
-These two options select variations on the SPARC architecture.
-
-By default (unless specifically configured for the Fujitsu SPARClite),
-GCC generates code for the v7 variant of the SPARC architecture.
-
-@option{-mv8} will give you SPARC v8 code. The only difference from v7
-code is that the compiler emits the integer multiply and integer
-divide instructions which exist in SPARC v8 but not in SPARC v7.
-
-@option{-msparclite} will give you SPARClite code. This adds the integer
-multiply, integer divide step and scan (@code{ffs}) instructions which
-exist in SPARClite but not in SPARC v7.
-
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @option{-mcpu=xxx}.
-
-@item -mcypress
-@itemx -msupersparc
-@opindex mcypress
-@opindex msupersparc
-These two options select the processor for which the code is optimized.
-
-With @option{-mcypress} (the default), the compiler optimizes code for the
-Cypress CY7C602 chip, as used in the SPARCStation/SPARCServer 3xx series.
-This is also appropriate for the older SPARCStation 1, 2, IPX etc.
-
-With @option{-msupersparc} the compiler optimizes code for the SuperSPARC cpu, as
-used in the SPARCStation 10, 1000 and 2000 series. This flag also enables use
-of the full SPARC v8 instruction set.
-
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @option{-mcpu=xxx}.
-
@item -mcpu=@var{cpu_type}
@opindex mcpu
Set the instruction set, register set, and instruction scheduling parameters
for machine type @var{cpu_type}. Supported values for @var{cpu_type} are
@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{sparclite},
-@samp{hypersparc}, @samp{sparclite86x}, @samp{f930}, @samp{f934},
+@samp{f930}, @samp{f934}, @samp{hypersparc}, @samp{sparclite86x},
@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, and
@samp{ultrasparc3}.
v9: ultrasparc, ultrasparc3
@end smallexample
+By default (unless configured otherwise), GCC generates code for the V7
+variant of the SPARC architecture. With @option{-mcpu=cypress}, the compiler
+additionally optimizes it for the Cypress CY7C602 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, IPX etc.
+
+With @option{-mcpu=v8}, GCC generates code for the V8 variant of the SPARC
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in SPARC-V8
+but not in SPARC-V7. With @option{-mcpu=supersparc}, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+
+With @option{-mcpu=sparclite}, GCC generates code for the SPARClite variant of
+the SPARC architecture. This adds the integer multiply, integer divide step
+and scan (@code{ffs}) instructions which exist in SPARClite but not in SPARC-V7.
+With @option{-mcpu=f930}, the compiler additionally optimizes it for the
+Fujitsu MB86930 chip, which is the original SPARClite, with no FPU. With
+@option{-mcpu=f934}, the compiler additionally optimizes it for the Fujitsu
+MB86934 chip, which is the more recent SPARClite with FPU.
+
+With @option{-mcpu=sparclet}, GCC generates code for the SPARClet variant of
+the SPARC architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (@code{ffs}) instructions which exist in SPARClet
+but not in SPARC-V7. With @option{-mcpu=tsc701}, the compiler additionally
+optimizes it for the TEMIC SPARClet chip.
+
+With @option{-mcpu=v9}, GCC generates code for the V9 variant of the SPARC
+architecture. This adds 64-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With @option{-mcpu=ultrasparc}, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II chips. With
+@option{-mcpu=ultrasparc3}, the compiler additionally optimizes it for the
+Sun UltraSPARC III chip.
+
@item -mtune=@var{cpu_type}
@opindex mtune
Set the instruction scheduling parameters for machine type
@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, and
@samp{ultrasparc3}.
+@item -mv8plus
+@itemx -mno-v8plus
+@opindex -mv8plus
+@opindex -mno-v8plus
+With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI. The
+difference from the V8 ABI is that the global and out registers are
+considered 64-bit wide. This is enabled by default on Solaris in 32-bit
+mode for all SPARC-V9 processors.
+
+@item -mvis
+@itemx -mno-vis
+@opindex -mvis
+@opindex -mno-vis
+With @option{-mvis}, GCC generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is @option{-mno-vis}.
@end table
-These @samp{-m} switches are supported in addition to the above
-on the SPARCLET processor.
-
-@table @gcctabopt
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate code for a processor running in little-endian mode.
-
-@item -mlive-g0
-@opindex mlive-g0
-Treat register @code{%g0} as a normal register.
-GCC will continue to clobber it as necessary but will not assume
-it always reads as 0.
-
-@item -mbroken-saverestore
-@opindex mbroken-saverestore
-Generate code that does not use non-trivial forms of the @code{save} and
-@code{restore} instructions. Early versions of the SPARCLET processor do
-not correctly handle @code{save} and @code{restore} instructions used with
-arguments. They correctly handle them used without arguments. A @code{save}
-instruction used without arguments increments the current window pointer
-but does not allocate a new stack frame. It is assumed that the window
-overflow trap handler will properly handle this case as will interrupt
-handlers.
-@end table
-
-These @samp{-m} switches are supported in addition to the above
-on SPARC V9 processors in 64-bit environments.
+These @samp{-m} options are supported in addition to the above
+on SPARC-V9 processors in 64-bit environments:
@table @gcctabopt
@item -mlittle-endian
@opindex mno-stack-bias
With @option{-mstack-bias}, GCC assumes that the stack pointer, and
frame pointer if present, are offset by @minus{}2047 which must be added back
-when making stack frame references.
+when making stack frame references. This is the default in 64-bit mode.
Otherwise, assume no such offset is present.
@end table
library that comes with GCC, with @option{-msoft-float} in order for
this to work.
+@item -mfloat-abi=@var{name}
+@opindex mfloat-abi
+Specifies which ABI to use for floating point values. Permissible values
+are: @samp{soft}, @samp{softfp} and @samp{hard}.
+
+@samp{soft} and @samp{hard} are equivalent to @option{-msoft-float}
+and @option{-mhard-float} respectively. @samp{softfp} allows the generation
+of floating point instructions, but still uses the soft-float calling
+conventions.
+
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a processor running in little-endian mode. This is
assembly code. This option can be used in conjunction with or instead
of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
-@samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6j},
+@samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6}, @samp{armv6j},
@samp{iwmmxt}, @samp{ep9312}.
-@item -mfpe=@var{number}
+@item -mfpu=@var{name}
+@itemx -mfpe=@var{number}
@itemx -mfp=@var{number}
+@opindex mfpu
@opindex mfpe
@opindex mfp
-This specifies the version of the floating point emulation available on
-the target. Permissible values are 2 and 3. @option{-mfp=} is a synonym
-for @option{-mfpe=}, for compatibility with older versions of GCC@.
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: @samp{fpa}, @samp{fpe2},
+@samp{fpe3}, @samp{maverick}, @samp{vfp}. @option{-mfp} and @option{-mfpe}
+are synonyms for @option{-mpfu}=@samp{fpe}@var{number}, for compatibility
+with older versions of GCC@.
+
+If @option{-msoft-float} is specified this specifies the format of
+floating point values.
@item -mstructure-size-boundary=@var{n}
@opindex mstructure-size-boundary
@end table
-@node MN10200 Options
-@subsection MN10200 Options
-@cindex MN10200 options
-
-These @option{-m} options are defined for Matsushita MN10200 architectures:
-@table @gcctabopt
-
-@item -mrelax
-@opindex mrelax
-Indicate to the linker that it should perform a relaxation optimization pass
-to shorten branches, calls and absolute memory addresses. This option only
-has an effect when used on the command line for the final link step.
-
-This option makes symbolic debugging impossible.
-@end table
-
@node MN10300 Options
@subsection MN10300 Options
@cindex MN10300 options
@item -mbranch-cost=@var{number}
@opindex mbranch-cost=@var{number}
@var{number} can only be 1 or 2. If it is 1 then branches will be
-prefered over conditional code, if it is 2, then the opposite will
+preferred over conditional code, if it is 2, then the opposite will
apply.
@item -mflush-trap=@var{number}
@end table
-@node M88K Options
-@subsection M88K Options
-@cindex M88k options
-
-These @samp{-m} options are defined for Motorola 88k architectures:
-
-@table @gcctabopt
-@item -m88000
-@opindex m88000
-Generate code that works well on both the m88100 and the
-m88110.
-
-@item -m88100
-@opindex m88100
-Generate code that works best for the m88100, but that also
-runs on the m88110.
-
-@item -m88110
-@opindex m88110
-Generate code that works best for the m88110, and may not run
-on the m88100.
-
-@item -mbig-pic
-@opindex mbig-pic
-Obsolete option to be removed from the next revision.
-Use @option{-fPIC}.
-
-@item -midentify-revision
-@opindex midentify-revision
-@cindex identifying source, compiler (88k)
-Include an @code{ident} directive in the assembler output recording the
-source file name, compiler name and version, timestamp, and compilation
-flags used.
-
-@item -mno-underscores
-@opindex mno-underscores
-@cindex underscores, avoiding (88k)
-In assembler output, emit symbol names without adding an underscore
-character at the beginning of each name. The default is to use an
-underscore as prefix on each name.
-
-@item -mocs-debug-info
-@itemx -mno-ocs-debug-info
-@opindex mocs-debug-info
-@opindex mno-ocs-debug-info
-@cindex OCS (88k)
-@cindex debugging, 88k OCS
-Include (or omit) additional debugging information (about registers used
-in each stack frame) as specified in the 88open Object Compatibility
-Standard, ``OCS''@. This extra information allows debugging of code that
-has had the frame pointer eliminated. The default for SVr4 and Delta 88
-SVr3.2 is to include this information; other 88k configurations omit this
-information by default.
-
-@item -mocs-frame-position
-@opindex mocs-frame-position
-@cindex register positions in frame (88k)
-When emitting COFF debugging information for automatic variables and
-parameters stored on the stack, use the offset from the canonical frame
-address, which is the stack pointer (register 31) on entry to the
-function. The SVr4 and Delta88 SVr3.2, and BCS configurations use
-@option{-mocs-frame-position}; other 88k configurations have the default
-@option{-mno-ocs-frame-position}.
-
-@item -mno-ocs-frame-position
-@opindex mno-ocs-frame-position
-@cindex register positions in frame (88k)
-When emitting COFF debugging information for automatic variables and
-parameters stored on the stack, use the offset from the frame pointer
-register (register 30). When this option is in effect, the frame
-pointer is not eliminated when debugging information is selected by the
--g switch.
-
-@item -moptimize-arg-area
-@opindex moptimize-arg-area
-@cindex arguments in frame (88k)
-Save space by reorganizing the stack frame. This option generates code
-that does not agree with the 88open specifications, but uses less
-memory.
-
-@itemx -mno-optimize-arg-area
-@opindex mno-optimize-arg-area
-Do not reorganize the stack frame to save space. This is the default.
-The generated conforms to the specification, but uses more memory.
-
-@item -mshort-data-@var{num}
-@opindex mshort-data
-@cindex smaller data references (88k)
-@cindex r0-relative references (88k)
-Generate smaller data references by making them relative to @code{r0},
-which allows loading a value using a single instruction (rather than the
-usual two). You control which data references are affected by
-specifying @var{num} with this option. For example, if you specify
-@option{-mshort-data-512}, then the data references affected are those
-involving displacements of less than 512 bytes.
-@option{-mshort-data-@var{num}} is not effective for @var{num} greater
-than 64k.
-
-@item -mserialize-volatile
-@opindex mserialize-volatile
-@itemx -mno-serialize-volatile
-@opindex mno-serialize-volatile
-@cindex sequential consistency on 88k
-Do, or don't, generate code to guarantee sequential consistency
-of volatile memory references. By default, consistency is
-guaranteed.
-
-The order of memory references made by the MC88110 processor does
-not always match the order of the instructions requesting those
-references. In particular, a load instruction may execute before
-a preceding store instruction. Such reordering violates
-sequential consistency of volatile memory references, when there
-are multiple processors. When consistency must be guaranteed,
-GCC generates special instructions, as needed, to force
-execution in the proper order.
-
-The MC88100 processor does not reorder memory references and so
-always provides sequential consistency. However, by default, GCC
-generates the special instructions to guarantee consistency
-even when you use @option{-m88100}, so that the code may be run on an
-MC88110 processor. If you intend to run your code only on the
-MC88100 processor, you may use @option{-mno-serialize-volatile}.
-
-The extra code generated to guarantee consistency may affect the
-performance of your application. If you know that you can safely
-forgo this guarantee, you may use @option{-mno-serialize-volatile}.
-
-@item -msvr4
-@itemx -msvr3
-@opindex msvr4
-@opindex msvr3
-@cindex assembler syntax, 88k
-@cindex SVr4
-Turn on (@option{-msvr4}) or off (@option{-msvr3}) compiler extensions
-related to System V release 4 (SVr4). This controls the following:
-
-@enumerate
-@item
-Which variant of the assembler syntax to emit.
-@item
-@option{-msvr4} makes the C preprocessor recognize @samp{#pragma weak}
-that is used on System V release 4.
-@item
-@option{-msvr4} makes GCC issue additional declaration directives used in
-SVr4.
-@end enumerate
-
-@option{-msvr4} is the default for the m88k-motorola-sysv4 configuration.
-@option{-msvr3} is the default for all other m88k configurations.
-
-@item -mversion-03.00
-@opindex mversion-03.00
-This option is obsolete, and is ignored.
-@c ??? which asm syntax better for GAS? option there too?
-
-@item -mno-check-zero-division
-@itemx -mcheck-zero-division
-@opindex mno-check-zero-division
-@opindex mcheck-zero-division
-@cindex zero division on 88k
-Do, or don't, generate code to guarantee that integer division by
-zero will be detected. By default, detection is guaranteed.
-
-Some models of the MC88100 processor fail to trap upon integer
-division by zero under certain conditions. By default, when
-compiling code that might be run on such a processor, GCC
-generates code that explicitly checks for zero-valued divisors
-and traps with exception number 503 when one is detected. Use of
-@option{-mno-check-zero-division} suppresses such checking for code
-generated to run on an MC88100 processor.
-
-GCC assumes that the MC88110 processor correctly detects all instances
-of integer division by zero. When @option{-m88110} is specified, no
-explicit checks for zero-valued divisors are generated, and both
-@option{-mcheck-zero-division} and @option{-mno-check-zero-division} are
-ignored.
-
-@item -muse-div-instruction
-@opindex muse-div-instruction
-@cindex divide instruction, 88k
-Use the div instruction for signed integer division on the
-MC88100 processor. By default, the div instruction is not used.
-
-On the MC88100 processor the signed integer division instruction
-div) traps to the operating system on a negative operand. The
-operating system transparently completes the operation, but at a
-large cost in execution time. By default, when compiling code
-that might be run on an MC88100 processor, GCC emulates signed
-integer division using the unsigned integer division instruction
-divu), thereby avoiding the large penalty of a trap to the
-operating system. Such emulation has its own, smaller, execution
-cost in both time and space. To the extent that your code's
-important signed integer division operations are performed on two
-nonnegative operands, it may be desirable to use the div
-instruction directly.
-
-On the MC88110 processor the div instruction (also known as the
-divs instruction) processes negative operands without trapping to
-the operating system. When @option{-m88110} is specified,
-@option{-muse-div-instruction} is ignored, and the div instruction is used
-for signed integer division.
-
-Note that the result of dividing @code{INT_MIN} by @minus{}1 is undefined. In
-particular, the behavior of such a division with and without
-@option{-muse-div-instruction} may differ.
-
-@item -mtrap-large-shift
-@itemx -mhandle-large-shift
-@opindex mtrap-large-shift
-@opindex mhandle-large-shift
-@cindex bit shift overflow (88k)
-@cindex large bit shifts (88k)
-Include code to detect bit-shifts of more than 31 bits; respectively,
-trap such shifts or emit code to handle them properly. By default GCC
-makes no special provision for large bit shifts.
-
-@item -mwarn-passed-structs
-@opindex mwarn-passed-structs
-@cindex structure passing (88k)
-Warn when a function passes a struct as an argument or result.
-Structure-passing conventions have changed during the evolution of the C
-language, and are often the source of portability problems. By default,
-GCC issues no such warning.
-@end table
-
-@c break page here to avoid unsightly interparagraph stretch.
-@c -zw, 2001-8-17
-@page
-
@node RS/6000 and PowerPC Options
@subsection IBM RS/6000 and PowerPC Options
@cindex RS/6000 and PowerPC Options
@itemx -malign-power
@opindex malign-natural
@opindex malign-power
-On AIX, Darwin, and 64-bit PowerPC Linux, the option
+On AIX, Darwin, and 64-bit PowerPC GNU/Linux, the option
@option{-malign-natural} overrides the ABI-defined alignment of larger
types, such as floating-point doubles, on their natural size-based boundary.
The option @option{-malign-power} instructs GCC to follow the ABI-specified
@item -mprioritize-restricted-insns=@var{priority}
@opindex mprioritize-restricted-insns
-This option controls the priority that is assigned to
-dispatch-slot restricted instructions during the second scheduling
-pass. The argument @var{priority} takes the value @var{0/1/2} to assign
-@var{no/highest/second-highest} priority to dispatch slot restricted
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument @var{priority} takes the value @var{0/1/2} to assign
+@var{no/highest/second-highest} priority to dispatch slot restricted
instructions.
@item -msched-costly-dep=@var{dependence_type}
This option controls which dependences are considered costly
by the target during instruction scheduling. The argument
@var{dependence_type} takes one of the following values:
-@var{no}: no dependence is costly,
-@var{all}: all dependences are costly,
+@var{no}: no dependence is costly,
+@var{all}: all dependences are costly,
@var{true_store_to_load}: a true dependence from store to load is costly,
@var{store_to_load}: any dependence from store to load is costly,
@var{number}: any dependence which latency >= @var{number} is costly.
-
+
@item -minsert-sched-nops=@var{scheme}
@opindex minsert-sched-nops
This option controls which nop insertion scheme will be used during
according to the scheduler's grouping.
@var{regroup_exact}: Insert nops to force costly dependent insns into
separate groups. Insert exactly as many nops as needed to force an insn
-to a new group, according to the estimatied processor grouping.
-@var{number}: Insert nops to force costly dependent insns into
+to a new group, according to the estimated processor grouping.
+@var{number}: Insert nops to force costly dependent insns into
separate groups. Insert @var{number} nops to force an insn to a new group.
@item -mcall-sysv
system. They are useful for compatibility with other Mac OS compilers.
@table @gcctabopt
-@item -all_load
-@opindex all_load
+@item -F@var{dir}
+@opindex F
+Add the framework directory @var{dir} to the head of the list of
+directories to be searched for header files. These directories are
+interleaved with those specified by @option{-I} options and are
+scanned in a left-to-right order.
+
+A framework directory is a directory with frameworks in it. A
+framework is a directory with a @samp{"Headers"} and/or
+@samp{"PrivateHeaders"} directory contained directly in it that ends
+in @samp{".framework"}. The name of a framework is the name of this
+directory excluding the @samp{".framework"}. Headers associated with
+the framework are found in one of those two directories, with
+@samp{"Headers"} being searched first. A subframework is a framework
+directory that is in a framework's @samp{"Frameworks"} directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header. Two subframeworks are siblings if they occur in the same
+framework. A subframework should not have the same name as a
+framework, a warning will be issued if this is violated. Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this. The standard frameworks can be found
+in @samp{"/System/Library/Frameworks"}, @samp{"/Library/Frameworks"}
+and @samp{"/Local/Library/Frameworks"}. An example include looks like
+@code{#include <Framework/header.h>}, where @samp{Framework} denotes
+the name of the framework and header.h is found in the
+@samp{"PrivateHeaders"} or @samp{"Headers"} directory.
+
+@item -all_load
+@opindex all_load
Loads all members of static archive libraries.
See man ld(1) for more information.
Causes the output file to be marked such that the dynamic linker will
bind all undefined references when the file is loaded or launched.
-@item -bundle
+@item -bundle
@opindex bundle
Produce a Mach-o bundle format file.
See man ld(1) for more information.
@item -allowable_client @var{client_name}
@itemx -arch_only
-@itemx -client_name
+@itemx -client_name
@itemx -compatibility_version
-@itemx -current_version
+@itemx -current_version
@itemx -dependency-file
-@itemx -dylib_file
+@itemx -dylib_file
@itemx -dylinker_install_name
@itemx -dynamic
-@itemx -dynamiclib
-@itemx -exported_symbols_list
+@itemx -dynamiclib
+@itemx -exported_symbols_list
@itemx -filelist
-@itemx -flat_namespace
+@itemx -flat_namespace
@itemx -force_cpusubtype_ALL
-@itemx -force_flat_namespace
+@itemx -force_flat_namespace
@itemx -headerpad_max_install_names
-@itemx -image_base
+@itemx -image_base
@itemx -init
@itemx -install_name
@itemx -keep_private_externs
@itemx -multi_module
-@itemx -multiply_defined
-@itemx -multiply_defined_unused
-@itemx -noall_load
+@itemx -multiply_defined
+@itemx -multiply_defined_unused
+@itemx -noall_load
@itemx -nofixprebinding
@itemx -nomultidefs
-@itemx -noprebind
+@itemx -noprebind
@itemx -noseglinkedit
-@itemx -pagezero_size
+@itemx -pagezero_size
@itemx -prebind
@itemx -prebind_all_twolevel_modules
@itemx -private_bundle
@itemx -read_only_relocs
-@itemx -sectalign
-@itemx -sectobjectsymbols
+@itemx -sectalign
+@itemx -sectobjectsymbols
@itemx -whyload
-@itemx -seg1addr
+@itemx -seg1addr
@itemx -sectcreate
@itemx -sectobjectsymbols
@itemx -sectorder
@itemx -seg_addr_table
@itemx -seg_addr_table_filename
@itemx -seglinkedit
-@itemx -segprot
+@itemx -segprot
@itemx -segs_read_only_addr
@itemx -segs_read_write_addr
-@itemx -single_module
+@itemx -single_module
@itemx -static
@itemx -sub_library
-@itemx -sub_umbrella
+@itemx -sub_umbrella
@itemx -twolevel_namespace
@itemx -umbrella
@itemx -undefined
@itemx -unexported_symbols_list
@itemx -weak_reference_mismatches
-@itemx -whatsloaded
+@itemx -whatsloaded
@opindex allowable_client
-@opindex arch_only
+@opindex arch_only
@opindex client_name
@opindex compatibility_version
@opindex current_version
@opindex dynamic
@opindex dynamiclib
@opindex exported_symbols_list
-@opindex filelist
-@opindex flat_namespace
+@opindex filelist
+@opindex flat_namespace
@opindex force_cpusubtype_ALL
@opindex force_flat_namespace
@opindex headerpad_max_install_names
@opindex image_base
-@opindex init
+@opindex init
@opindex install_name
@opindex keep_private_externs
-@opindex multi_module
+@opindex multi_module
@opindex multiply_defined
-@opindex multiply_defined_unused
-@opindex noall_load
+@opindex multiply_defined_unused
+@opindex noall_load
@opindex nofixprebinding
-@opindex nomultidefs
+@opindex nomultidefs
@opindex noprebind
-@opindex noseglinkedit
+@opindex noseglinkedit
@opindex pagezero_size
@opindex prebind
@opindex prebind_all_twolevel_modules
-@opindex private_bundle
+@opindex private_bundle
@opindex read_only_relocs
-@opindex sectalign
-@opindex sectobjectsymbols
-@opindex whyload
+@opindex sectalign
+@opindex sectobjectsymbols
+@opindex whyload
@opindex seg1addr
-@opindex sectcreate
-@opindex sectobjectsymbols
-@opindex sectorder
+@opindex sectcreate
+@opindex sectobjectsymbols
+@opindex sectorder
@opindex seg_addr_table
@opindex seg_addr_table_filename
@opindex seglinkedit
@end table
-@node RT Options
-@subsection IBM RT Options
-@cindex RT options
-@cindex IBM RT options
-
-These @samp{-m} options are defined for the IBM RT PC:
-
-@table @gcctabopt
-@item -min-line-mul
-@opindex min-line-mul
-Use an in-line code sequence for integer multiplies. This is the
-default.
-
-@item -mcall-lib-mul
-@opindex mcall-lib-mul
-Call @code{lmul$$} for integer multiples.
-
-@item -mfull-fp-blocks
-@opindex mfull-fp-blocks
-Generate full-size floating point data blocks, including the minimum
-amount of scratch space recommended by IBM@. This is the default.
-
-@item -mminimum-fp-blocks
-@opindex mminimum-fp-blocks
-Do not include extra scratch space in floating point data blocks. This
-results in smaller code, but slower execution, since scratch space must
-be allocated dynamically.
-
-@cindex @file{stdarg.h} and RT PC
-@item -mfp-arg-in-fpregs
-@opindex mfp-arg-in-fpregs
-Use a calling sequence incompatible with the IBM calling convention in
-which floating point arguments are passed in floating point registers.
-Note that @code{stdarg.h} will not work with floating point operands
-if this option is specified.
-
-@item -mfp-arg-in-gregs
-@opindex mfp-arg-in-gregs
-Use the normal calling convention for floating point arguments. This is
-the default.
-
-@item -mhc-struct-return
-@opindex mhc-struct-return
-Return structures of more than one word in memory, rather than in a
-register. This provides compatibility with the MetaWare HighC (hc)
-compiler. Use the option @option{-fpcc-struct-return} for compatibility
-with the Portable C Compiler (pcc).
-
-@item -mnohc-struct-return
-@opindex mnohc-struct-return
-Return some structures of more than one word in registers, when
-convenient. This is the default. For compatibility with the
-IBM-supplied compilers, use the option @option{-fpcc-struct-return} or the
-option @option{-mhc-struct-return}.
-@end table
-
@node MIPS Options
@subsection MIPS Options
@cindex MIPS options
@opindex msplit-addresses
@opindex mno-split-addresses
Enable (disable) use of the @code{%hi()} and @code{%lo()} assembler
-relocation operators.
+relocation operators. This option has been superceded by
+@option{-mexplicit-relocs} but is retained for backwards compatibility.
+
+@item -mexplicit-relocs
+@itemx -mno-explicit-relocs
+@opindex mexplicit-relocs
+@opindex mno-explicit-relocs
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by @option{-mno-explicit-relocs},
+is to use assembler macros instead.
+
+@option{-mexplicit-relocs} is usually the default if GCC was configured
+to use an assembler that supports relocation operators. However, the
+combination of @option{-mabicalls} and @option{-fno-unit-at-a-time}
+implies @option{-mno-explicit-relocs} unless explicitly overridden.
+This is because, when generating abicalls, the choice of relocation
+depends on whether a symbol is local or global. In some rare cases,
+GCC will not be able to decide this until the whole compilation unit
+has been read.
@item -mrnames
@itemx -mno-rnames
Tell the MIPS assembler to not run its preprocessor over user
assembler files (with a @samp{.s} suffix) when assembling them.
+@item -mfix-r4000
+@itemx -mno-fix-r4000
+@opindex mfix-r4000
+@opindex mno-fix-r4000
+Work around certain R4000 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@item
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+@item
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+@end itemize
+
+@item -mfix-r4400
+@itemx -mno-fix-r4400
+@opindex mfix-r4400
+@opindex mno-fix-r4400
+Work around certain R4400 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@end itemize
+
@item -mfix-sb1
@itemx -mno-fix-sb1
@opindex mfix-sb1
@opindex mtune
Tune to @var{cpu-type} everything applicable about the generated code, except
for the ABI and the set of available instructions. The choices for
-@var{cpu-type} are @samp{i386}, @samp{i486}, @samp{i586}, @samp{i686},
-@samp{pentium}, @samp{pentium-mmx}, @samp{pentiumpro}, @samp{pentium2},
-@samp{pentium3}, @samp{pentium4}, @samp{k6}, @samp{k6-2}, @samp{k6-3},
-@samp{athlon}, @samp{athlon-tbird}, @samp{athlon-4}, @samp{athlon-xp},
-@samp{athlon-mp}, @samp{winchip-c6}, @samp{winchip2}, @samp{k8}, @samp{c3}
-and @samp{c3-2}.
+@var{cpu-type} are:
+@table @emph
+@item i386
+Original Intel's i386 CPU.
+@item i486
+Intel's i486 CPU. (No scheduling is implemented for this chip.)
+@item i586, pentium
+Intel Pentium CPU with no MMX support.
+@item pentium-mmx
+Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
+@item i686, pentiumpro
+Intel PentiumPro CPU.
+@item pentium2
+Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
+@item pentium3, pentium3m
+Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set
+support.
+@item pentium-m
+Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set
+support. Used by Centrino notebooks.
+@item pentium4, pentium4m
+Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
+@item prescott
+Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction
+set support.
+@item nocona
+Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
+SSE2 and SSE3 instruction set support.
+@item k6
+AMD K6 CPU with MMX instruction set support.
+@item k6-2, k6-3
+Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support.
+@item athlon, athlon-tbird
+AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions
+support.
+@item athlon-4, athlon-xp, athlon-mp
+Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE
+instruction set support.
+@item k8, opteron, athlon64, athlon-fx
+AMD K8 core based CPUs with x86-64 instruction set support. (This supersets
+MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
+@item winchip-c6
+IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
+set support.
+@item winchip2
+IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW!
+instruction set support.
+@item c3
+Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is
+implemented for this chip.)
+@item c3-2
+Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling is
+implemented for this chip.)
+@end table
While picking a specific @var{cpu-type} will schedule things appropriately
for that particular chip, the compiler will not generate any code that
does not run on the i386 without the @option{-march=@var{cpu-type}} option
-being used. @samp{i586} is equivalent to @samp{pentium} and @samp{i686}
-is equivalent to @samp{pentiumpro}. @samp{k6} and @samp{athlon} are the
-AMD chips as opposed to the Intel ones.
+being used.
@item -march=@var{cpu-type}
@opindex march
@item -mfpmath=@var{unit}
@opindex march
-generate floating point arithmetics for selected unit @var{unit}. the choices
+Generate floating point arithmetics for selected unit @var{unit}. The choices
for @var{unit} are:
@table @samp
@option{-msse2} switches to enable SSE extensions and make this option
effective. For x86-64 compiler, these extensions are enabled by default.
-The resulting code should be considerably faster in majority of cases and avoid
+The resulting code should be considerably faster in the majority of cases and avoid
the numerical instability problems of 387 code, but may break some existing
code that expects temporaries to be 80bit.
-This is the default choice for x86-64 compiler.
-
-@item pni
-Use all SSE extensions enabled by @option{-msse2} as well as the new
-SSE extensions in Prescott New Instructions. @option{-mpni} also
-enables 2 builtin functions, @code{__builtin_ia32_monitor} and
-@code{__builtin_ia32_mwait}, for new instructions @code{monitor} and
-@code{mwait}.
+This is the default choice for the x86-64 compiler.
@item sse,387
Attempt to utilize both instruction sets at once. This effectively double the
amount of available registers and on chips with separate execution units for
387 and SSE the execution resources too. Use this option with care, as it is
-still experimental, because gcc register allocator does not model separate
+still experimental, because the gcc register allocator does not model separate
functional units well resulting in instable performance.
@end table
@itemx -m128bit-long-double
@opindex m96bit-long-double
@opindex m128bit-long-double
-These switches control the size of @code{long double} type. The i386
-application binary interface specifies the size to be 96 bits,
+These switches control the size of @code{long double} type. The i386
+application binary interface specifies the size to be 96 bits,
so @option{-m96bit-long-double} is the default in 32 bit mode.
Modern architectures (Pentium and newer) would prefer @code{long double}
-to be aligned to an 8 or 16 byte boundary. In arrays or structures
-conforming to the ABI, this would not be possible. So specifying a
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the ABI, this would not be possible. So specifying a
@option{-m128bit-long-double} will align @code{long double}
to a 16 byte boundary by padding the @code{long double} with an additional
-32 bit zero.
+32 bit zero.
In the x86-64 compiler, @option{-m128bit-long-double} is the default choice as
its ABI specifies that @code{long double} is to be aligned on 16 byte boundary.
-
+
Notice that neither of these options enable any extra precision over the x87
-standard of 80 bits for a @code{long double}.
+standard of 80 bits for a @code{long double}.
@strong{Warning:} if you override the default value for your target ABI, the
-structures and arrays containing @code{long double} will change their size as
-well as function calling convention for function taking @code{long double}
-will be modified. Hence they will not be binary compatible with arrays or
-structures in code compiled without that switch.
+structures and arrays containing @code{long double} variables will change
+their size as well as function calling convention for function taking
+@code{long double} will be modified. Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
@item -msvr3-shlib
@itemx -mno-sse
@item -msse2
@itemx -mno-sse2
-@item -mpni
-@itemx -mno-pni
+@item -msse3
+@itemx -mno-sse3
@item -m3dnow
@itemx -mno-3dnow
@opindex mmmx
@opindex m3dnow
@opindex mno-3dnow
These switches enable or disable the use of built-in functions that allow
-direct access to the MMX, SSE and 3Dnow extensions of the instruction set.
+direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
+instruction set.
@xref{X86 Built-in Functions}, for details of the functions enabled
and disabled by these switches.
@env{PATH}. The linker used by GCC can be printed using @samp{which
`gcc -print-prog-name=ld`}.
+@item -mfdpic
+@opindex mfdpic
+
+Select the FDPIC ABI, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE-related options, it
+implies @option{-fPIE}. With @option{-fpic} or @option{-fpie}, it
+assumes GOT entries and small data are within a 12-bit range from the
+GOT base address; with @option{-fPIC} or @option{-fPIE}, GOT offsets
+are computed with 32 bits.
+
+@item -minline-plt
+@opindex minline-plt
+
+Enable inlining of PLT entries in function calls to functions that are
+not known to bind locally. It has no effect without @option{-mfdpic}.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., @option{-fPIC} or @option{-fpic}), or when an
+optimization option such as @option{-O3} or above is present in the
+command line.
+
+@item -mgprel-ro
+@opindex mgprel-ro
+
+Enable the use of @code{GPREL} relocations in the FDPIC ABI for data
+that is known to be in read-only sections. It's enabled by default,
+except for @option{-fpic} or @option{-fpie}: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With @option{-fPIC} or @option{-fPIE}, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a GOT entry for the referenced symbol, so it's more likely to be a
+win. If it is not, @option{-mno-gprel-ro} can be used to disable it.
+
+@item -multilib-library-pic
+@opindex multilib-library-pic
+
+Link with the (library, not FD) pic libraries. It's implied by
+@option{-mlibrary-pic}, as well as by @option{-fPIC} and
+@option{-fpic} without @option{-mfdpic}. You should never have to use
+it explicitly.
+
+@item -mlinked-fp
+@opindex mlinked-fp
+
+Follow the EABI requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with @option{-mno-linked-fp}.
+
@item -mlong-calls
@opindex mno-long-calls
Generate code that uses long call sequences. This ensures that a call
linker.
@end table
-@node Intel 960 Options
-@subsection Intel 960 Options
-
-These @samp{-m} options are defined for the Intel 960 implementations:
-
-@table @gcctabopt
-@item -m@var{cpu-type}
-@opindex mka
-@opindex mkb
-@opindex mmc
-@opindex mca
-@opindex mcf
-@opindex msa
-@opindex msb
-Assume the defaults for the machine type @var{cpu-type} for some of
-the other options, including instruction scheduling, floating point
-support, and addressing modes. The choices for @var{cpu-type} are
-@samp{ka}, @samp{kb}, @samp{mc}, @samp{ca}, @samp{cf},
-@samp{sa}, and @samp{sb}.
-The default is
-@samp{kb}.
-
-@item -mnumerics
-@itemx -msoft-float
-@opindex mnumerics
-@opindex msoft-float
-The @option{-mnumerics} option indicates that the processor does support
-floating-point instructions. The @option{-msoft-float} option indicates
-that floating-point support should not be assumed.
-
-@item -mleaf-procedures
-@itemx -mno-leaf-procedures
-@opindex mleaf-procedures
-@opindex mno-leaf-procedures
-Do (or do not) attempt to alter leaf procedures to be callable with the
-@code{bal} instruction as well as @code{call}. This will result in more
-efficient code for explicit calls when the @code{bal} instruction can be
-substituted by the assembler or linker, but less efficient code in other
-cases, such as calls via function pointers, or using a linker that doesn't
-support this optimization.
-
-@item -mtail-call
-@itemx -mno-tail-call
-@opindex mtail-call
-@opindex mno-tail-call
-Do (or do not) make additional attempts (beyond those of the
-machine-independent portions of the compiler) to optimize tail-recursive
-calls into branches. You may not want to do this because the detection of
-cases where this is not valid is not totally complete. The default is
-@option{-mno-tail-call}.
-
-@item -mcomplex-addr
-@itemx -mno-complex-addr
-@opindex mcomplex-addr
-@opindex mno-complex-addr
-Assume (or do not assume) that the use of a complex addressing mode is a
-win on this implementation of the i960. Complex addressing modes may not
-be worthwhile on the K-series, but they definitely are on the C-series.
-The default is currently @option{-mcomplex-addr} for all processors except
-the CB and CC@.
-
-@item -mcode-align
-@itemx -mno-code-align
-@opindex mcode-align
-@opindex mno-code-align
-Align code to 8-byte boundaries for faster fetching (or don't bother).
-Currently turned on by default for C-series implementations only.
-
-@ignore
-@item -mclean-linkage
-@itemx -mno-clean-linkage
-@opindex mclean-linkage
-@opindex mno-clean-linkage
-These options are not fully implemented.
-@end ignore
-
-@item -mic-compat
-@itemx -mic2.0-compat
-@itemx -mic3.0-compat
-@opindex mic-compat
-@opindex mic2.0-compat
-@opindex mic3.0-compat
-Enable compatibility with iC960 v2.0 or v3.0.
-
-@item -masm-compat
-@itemx -mintel-asm
-@opindex masm-compat
-@opindex mintel-asm
-Enable compatibility with the iC960 assembler.
-
-@item -mstrict-align
-@itemx -mno-strict-align
-@opindex mstrict-align
-@opindex mno-strict-align
-Do not permit (do permit) unaligned accesses.
-
-@item -mold-align
-@opindex mold-align
-Enable structure-alignment compatibility with Intel's gcc release version
-1.3 (based on gcc 1.37). This option implies @option{-mstrict-align}.
-
-@item -mlong-double-64
-@opindex mlong-double-64
-Implement type @samp{long double} as 64-bit floating point numbers.
-Without the option @samp{long double} is implemented by 80-bit
-floating point numbers. The only reason we have it because there is
-no 128-bit @samp{long double} support in @samp{fp-bit.c} yet. So it
-is only useful for people using soft-float targets. Otherwise, we
-should recommend against use of it.
-
-@end table
-
@node DEC Alpha Options
@subsection DEC Alpha Options
@item -mno-app-regs
@opindex mno-app-regs
This option will cause r2 and r5 to be treated as fixed registers.
-
+
@item -mv850e1
@opindex mv850e1
Specify that the target processor is the V850E1. The preprocessor
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a little endian target. This is the default for AIX5
-and Linux.
+and GNU/Linux.
@item -mgnu-as
@itemx -mno-gnu-as
scheduling, but does not always do so.
@end table
-@node D30V Options
-@subsection D30V Options
-@cindex D30V Options
-
-These @samp{-m} options are defined for D30V implementations:
-
-@table @gcctabopt
-@item -mextmem
-@opindex mextmem
-Link the @samp{.text}, @samp{.data}, @samp{.bss}, @samp{.strings},
-@samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections into external
-memory, which starts at location @code{0x80000000}.
-
-@item -mextmemory
-@opindex mextmemory
-Same as the @option{-mextmem} switch.
-
-@item -monchip
-@opindex monchip
-Link the @samp{.text} section into onchip text memory, which starts at
-location @code{0x0}. Also link @samp{.data}, @samp{.bss},
-@samp{.strings}, @samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections
-into onchip data memory, which starts at location @code{0x20000000}.
-
-@item -mno-asm-optimize
-@itemx -masm-optimize
-@opindex mno-asm-optimize
-@opindex masm-optimize
-Disable (enable) passing @option{-O} to the assembler when optimizing.
-The assembler uses the @option{-O} option to automatically parallelize
-adjacent short instructions where possible.
-
-@item -mbranch-cost=@var{n}
-@opindex mbranch-cost
-Increase the internal costs of branches to @var{n}. Higher costs means
-that the compiler will issue more instructions to avoid doing a branch.
-The default is 2.
-
-@item -mcond-exec=@var{n}
-@opindex mcond-exec
-Specify the maximum number of conditionally executed instructions that
-replace a branch. The default is 4.
-@end table
-
@node S/390 and zSeries Options
@subsection S/390 and zSeries Options
@cindex S/390 and zSeries Options
@opindex mno-backchain
Generate (or do not generate) code which maintains an explicit
backchain within the stack frame that points to the caller's frame.
-This is currently needed to allow debugging. The default is to
-generate the backchain.
+This may be needed to allow debugging using tools that do not understand
+DWARF-2 call frame information. The default is not to generate the
+backchain.
@item -msmall-exec
@itemx -mno-small-exec
@opindex m64
@opindex m31
When @option{-m31} is specified, generate code compliant to the
-Linux for S/390 ABI@. When @option{-m64} is specified, generate
-code compliant to the Linux for zSeries ABI@. This allows GCC in
+GNU/Linux for S/390 ABI@. When @option{-m64} is specified, generate
+code compliant to the GNU/Linux for zSeries ABI@. This allows GCC in
particular to generate 64-bit instructions. For the @samp{s390}
targets, the default is @option{-m31}, while the @samp{s390x}
targets default to @option{-m64}.
@itemx -mesa
@opindex mzarch
@opindex mesa
-When @option{-mzarch} is specified, generate code using the
-instructions available on z/Architecture.
-When @option{-mesa} is specified, generate code using the
+When @option{-mzarch} is specified, generate code using the
+instructions available on z/Architecture.
+When @option{-mesa} is specified, generate code using the
instructions available on ESA/390. Note that @option{-mesa} is
not possible with @option{-m64}.
-When generating code compliant to the Linux for S/390 ABI,
+When generating code compliant to the GNU/Linux for S/390 ABI,
the default is @option{-mesa}. When generating code compliant
-to the Linux for zSeries ABI, the default is @option{-mzarch}.
+to the GNU/Linux for zSeries ABI, the default is @option{-mzarch}.
@item -mmvcle
@itemx -mno-mvcle
@item -mlibrary-pic
@opindex mlibrary-pic
-Enable PIC support for building libraries
+Generate position-independent EABI code.
@item -macc-4
@opindex macc-4
the GOT size for the linked executable exceeds a machine-specific
maximum size, you get an error message from the linker indicating that
@option{-fpic} does not work; in that case, recompile with @option{-fPIC}
-instead. (These maximums are 16k on the m88k, 8k on the SPARC, and 32k
+instead. (These maximums are 8k on the SPARC and 32k
on the m68k and RS/6000. The 386 has no such limit.)
Position-independent code requires special support, and therefore works
@opindex fPIC
If supported for the target machine, emit position-independent code,
suitable for dynamic linking and avoiding any limit on the size of the
-global offset table. This option makes a difference on the m68k, m88k,
+global offset table. This option makes a difference on the m68k
and the SPARC.
Position-independent code requires special support, and therefore works
function, so the call site information may not be available to the
profiling functions otherwise.)
-@example
+@smallexample
void __cyg_profile_func_enter (void *this_fn,
void *call_site);
void __cyg_profile_func_exit (void *this_fn,
void *call_site);
-@end example
+@end smallexample
The first argument is the address of the start of the current function,
which may be looked up exactly in the symbol table.
the existing @samp{.X} file because it is newer than the source file.
For example:
-@example
+@smallexample
gcc -Dfoo=bar file1.c -aux-info file1.X
protoize *.c
-@end example
+@end smallexample
@noindent
You need to include the special files along with the rest in the
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