-fno-elide-constructors @gol
-fno-enforce-eh-specs -fexternal-templates @gol
-falt-external-templates @gol
--ffor-scope -fno-for-scope -fno-gnu-keywords -fno-honor-std @gol
+-ffor-scope -fno-for-scope -fno-gnu-keywords @gol
-fno-implicit-templates @gol
-fno-implicit-inline-templates @gol
-fno-implement-inlines -fms-extensions @gol
@xref{Debugging Options,,Options for Debugging Your Program or GCC}.
@gccoptlist{
-a -ax -d@var{letters} -dumpspecs -dumpmachine -dumpversion @gol
--fdump-unnumbered -fdump-translation-unit@r{[}-@var{n}@r{]} -fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol
--fdump-ast-original@r{[}-@var{n}@r{]} -fdump-ast-optimized@r{[}-@var{n}@r{]} @gol
+-fdump-unnumbered -fdump-translation-unit@r{[}-@var{n}@r{]} @gol
+-fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol
+-fdump-tree-original@r{[}-@var{n}@r{]} -fdump-tree-optimized@r{[}-@var{n}@r{]} @gol
+-fdump-tree-inlined@r{[}-@var{n}@r{]} @gol
-fmem-report -fpretend-float @gol
-fprofile-arcs -ftest-coverage -ftime-report @gol
-g -g@var{level} -gcoff -gdwarf -gdwarf-1 -gdwarf-1+ -gdwarf-2 @gol
-fforce-addr -fforce-mem -ffunction-sections @gol
-fgcse -fgcse-lm -fgcse-sm @gol
-finline-functions -finline-limit=@var{n} -fkeep-inline-functions @gol
--fkeep-static-consts -fmove-all-movables @gol
--fno-default-inline -fno-defer-pop @gol
+-fkeep-static-consts -fmerge-constants -fmerge-all-constants @gol
+-fmove-all-movables -fno-default-inline -fno-defer-pop @gol
-fno-function-cse -fno-guess-branch-probability @gol
-fno-inline -fno-math-errno -fno-peephole -fno-peephole2 @gol
-funsafe-math-optimizations -fno-trapping-math @gol
-fregmove -frename-registers @gol
-frerun-cse-after-loop -frerun-loop-opt @gol
-fschedule-insns -fschedule-insns2 @gol
--fsingle-precision-constant -fssa -fssa-dce @gol
+-fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol
-fstrength-reduce -fstrict-aliasing -fthread-jumps -ftrapv @gol
-funroll-all-loops -funroll-loops @gol
--param @var{name}=@var{value}
-iprefix @var{file} -iwithprefix @var{dir} @gol
-iwithprefixbefore @var{dir} -isystem @var{dir} @gol
-M -MM -MF -MG -MP -MQ -MT -nostdinc -P -remap @gol
--trigraphs -undef -U@var{macro} -Wp\,@var{option}}
+-trigraphs -undef -U@var{macro} -Wp,@var{option}}
@item Assembler Option
@xref{Assembler Options,,Passing Options to the Assembler}.
@gccoptlist{
--Wa\,@var{option}}
+-Wa,@var{option}}
@item Linker Options
@xref{Link Options,,Options for Linking}.
@var{object-file-name} -l@var{library} @gol
-nostartfiles -nodefaultlibs -nostdlib @gol
-s -static -static-libgcc -shared -shared-libgcc -symbolic @gol
--Wl\,@var{option} -Xlinker @var{option} @gol
+-Wl,@var{option} -Xlinker @var{option} @gol
-u @var{symbol}}
@item Directory Options
-mstrict-align -mno-strict-align -mrelocatable @gol
-mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol
-mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol
--mcall-aix -mcall-sysv -mprototype -mno-prototype @gol
+-mcall-aix -mcall-sysv -mcall-netbsd @gol
+-mprototype -mno-prototype @gol
-msim -mmvme -mads -myellowknife -memb -msdata @gol
-msdata=@var{opt} -mvxworks -G @var{num}}
@emph{MIPS Options}
@gccoptlist{
--mabicalls -mcpu=@var{cpu-type} @gol
--membedded-data -muninit-const-in-rodata @gol
--membedded-pic -mfp32 -mfp64 -mgas -mgp32 -mgp64 @gol
+-mabicalls -march=@var{cpu-type} -mtune=@var{cpu=type} @gol
+-mcpu=@var{cpu-type} -membedded-data -muninit-const-in-rodata @gol
+-membedded-pic -mfp32 -mfp64 -mfused-madd -mno-fused-madd @gol
+-mgas -mgp32 -mgp64 @gol
-mgpopt -mhalf-pic -mhard-float -mint64 -mips1 @gol
-mips2 -mips3 -mips4 -mlong64 -mlong32 -mlong-calls -mmemcpy @gol
-mmips-as -mmips-tfile -mno-abicalls @gol
-mabi=32 -mabi=n32 -mabi=64 -mabi=eabi @gol
-mfix7000 -mno-crt0}
-@emph{i386 Options}
+@emph{i386 and x86-64 Options}
@gccoptlist{
-mcpu=@var{cpu-type} -march=@var{cpu-type} @gol
-mintel-syntax -mieee-fp -mno-fancy-math-387 @gol
-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
-mno-wide-multiply -mrtd -malign-double @gol
-mpreferred-stack-boundary=@var{num} @gol
+-mmmx -msse -m3dnow @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
--m96bit-long-double -mregparm=@var{num} -momit-leaf-frame-pointer}
+-m96bit-long-double -mregparm=@var{num} -momit-leaf-frame-pointer @gol
+-mno-red-zone@gol
+-m32 -m64}
@emph{HPPA Options}
@gccoptlist{
@emph{System V Options}
@gccoptlist{
--Qy -Qn -YP\,@var{paths} -Ym\,@var{dir}}
+-Qy -Qn -YP,@var{paths} -Ym,@var{dir}}
@emph{ARC Options}
@gccoptlist{
-minline-divide-max-throughput -mno-dwarf2-asm @gol
-mfixed-range=@var{register-range}}
+@emph{S/390 and zSeries Options}
+@gccoptlist{
+-mhard-float -msoft-float -mbackchain -mno-backchain @gol
+-msmall-exec -mno-small-exec -mmvcle -mno-mvcle @gol
+-m64 -m31 -mdebug -mno-debug}
+
@item Code Generation Options
@xref{Code Gen Options,,Options for Code Generation Conventions}.
@gccoptlist{
remove GNU extensions that conflict with ISO C++.
This turns off certain features of GCC that are incompatible with ISO
-C (when compiling C code), or of standard C++ (when compiling C++ code),
+C89 (when compiling C code), or of standard C++ (when compiling C++ code),
such as the @code{asm} and @code{typeof} keywords, and
predefined macros such as @code{unix} and @code{vax} that identify the
type of system you are using. It also enables the undesirable and
@item -std=
@opindex std
-Determine the language standard. A value for this option must be provided;
+Determine the language standard. This option is currently only
+supported when compiling C@. A value for this option must be provided;
possible values are
@table @samp
-@item iso9899:1990
-Same as @option{-ansi}
+@item c89
+@itemx iso9899:1990
+ISO C89 (same as @option{-ansi}).
@item iso9899:199409
-ISO C as modified in amendment 1
-
-@item iso9899:1999
-ISO C99. Note that this standard is not yet fully supported; see
-@w{@uref{http://gcc.gnu.org/c99status.html}} for more information.
-
-@item c89
-same as @option{-std=iso9899:1990}
+ISO C89 as modified in amendment 1.
@item c99
-same as @option{-std=iso9899:1999}
+@itemx c9x
+@itemx iso9899:1999
+@itemx iso9899:199x
+ISO C99. Note that this standard is not yet fully supported; see
+@w{@uref{http://gcc.gnu.org/c99status.html}} for more information. The
+names @samp{c9x} and @samp{iso9899:199x} are deprecated.
@item gnu89
-default, iso9899:1990 + gnu extensions
+Default, ISO C89 plus GNU extensions (including some C99 features).
@item gnu99
-iso9899:1999 + gnu extensions
-
-@item iso9899:199x
-same as @option{-std=iso9899:1999}, deprecated
-
-@item c9x
-same as @option{-std=iso9899:1999}, deprecated
-
@item gnu9x
-same as @option{-std=gnu99}, deprecated
+ISO C99 plus GNU extensions. When ISO C99 is fully implemented in GCC,
+this will become the default. The name @samp{gnu9x} is deprecated.
@end table
ISO C header files and you cannot use @option{-traditional} on such
systems to compile files that include any system headers.
-The @option{-traditional} option also enables @option{-traditional-cpp},
-which is described next.
+The @option{-traditional} option also enables @option{-traditional-cpp}.
@item -traditional-cpp
@opindex traditional-cpp
Attempt to support some aspects of traditional C preprocessors.
-Specifically:
-
-@itemize @bullet
-@item
-Comments convert to nothing at all, rather than to a space. This allows
-traditional token concatenation.
-
-@item
-In a preprocessing directive, the @samp{#} symbol must appear as the first
-character of a line.
-
-@item
-Macro arguments are recognized within string constants in a macro
-definition (and their values are stringified, though without additional
-quote marks, when they appear in such a context). The preprocessor
-always considers a string constant to end at a newline.
-
-@item
-@cindex detecting @w{@option{-traditional}}
-The predefined macro @code{__STDC__} is not defined when you use
-@option{-traditional}, but @code{__GNUC__} is (since the GNU extensions
-which @code{__GNUC__} indicates are not affected by
-@option{-traditional}). If you need to write header files that work
-differently depending on whether @option{-traditional} is in use, by
-testing both of these predefined macros you can distinguish four
-situations: GNU C, traditional GNU C, other ISO C compilers, and other
-old C compilers. The predefined macro @code{__STDC_VERSION__} is also
-not defined when you use @option{-traditional}. @xref{Standard
-Predefined,,Standard Predefined Macros,cpp.info,The C Preprocessor},
-for more discussion of these and other predefined macros.
-
-@item
-@cindex string constants vs newline
-@cindex newline vs string constants
-The preprocessor considers a string constant to end at a newline (unless
-the newline is escaped with @samp{\}). (Without @w{@option{-traditional}},
-string constants can contain the newline character as typed.)
-@end itemize
+See the GNU CPP manual for details.
@item -fcond-mismatch
@opindex fcond-mismatch
An alternative to using this option is to specify that your
@code{operator new} does not throw any exceptions; if you declare it
-@samp{throw()}, g++ will check the return value. See also @samp{new
+@samp{throw()}, G++ will check the return value. See also @samp{new
(nothrow)}.
@item -fconserve-space
@opindex fno-elide-constructors
The C++ standard allows an implementation to omit creating a temporary
which is only used to initialize another object of the same type.
-Specifying this option disables that optimization, and forces g++ to
+Specifying this option disables that optimization, and forces G++ to
call the copy constructor in all cases.
@item -fno-enforce-eh-specs
@item -fexternal-templates
@opindex fexternal-templates
-Cause template instantiations to obey @samp{#pragma interface} and
-@samp{implementation}; template instances are emitted or not according
+
+Cause @samp{#pragma interface} and @samp{implementation} to apply to
+template instantiation; template instances are emitted or not according
to the location of the template definition. @xref{Template
Instantiation}, for more information.
@item -falt-external-templates
@opindex falt-external-templates
-Similar to @option{-fexternal-templates}, but template instances are emitted or
-not according to the place where they are first instantiated.
+Similar to @option{-fexternal-templates}, but template instances are
+emitted or not according to the place where they are first instantiated.
@xref{Template Instantiation}, for more information.
This option is deprecated.
as specified by the C++ standard.
If @option{-fno-for-scope} is specified, the scope of variables declared in
a @i{for-init-statement} extends to the end of the enclosing scope,
-as was the case in old versions of gcc, and other (traditional)
+as was the case in old versions of G++, and other (traditional)
implementations of C++.
The default if neither flag is given to follow the standard,
word as an identifier. You can use the keyword @code{__typeof__} instead.
@option{-ansi} implies @option{-fno-gnu-keywords}.
-@item -fno-honor-std
-@opindex fno-honor-std
-Ignore @code{namespace std}, instead of treating it as a real namespace.
-With this switch, the compiler will ignore
-@code{namespace-declarations}, @code{using-declarations},
-@code{using-directives}, and @code{namespace-names}, if they involve
-@code{std}.
-
-This option is only useful if you have manually compiled the C++
-run-time library with the same switch. Otherwise, your programs will
-not link. The use of this option is not recommended, and the option may
-be removed from a future version of G++.
-
@item -fno-implicit-templates
@opindex fno-implicit-templates
Never emit code for non-inline templates which are instantiated
@item -fno-optional-diags
@opindex fno-optional-diags
Disable diagnostics that the standard says a compiler does not need to
-issue. Currently, the only such diagnostic issued by g++ is the one for
+issue. Currently, the only such diagnostic issued by G++ is the one for
a name having multiple meanings within a class.
@item -fpermissive
@opindex fpermissive
Downgrade messages about nonconformant code from errors to warnings. By
-default, g++ effectively sets @option{-pedantic-errors} without
+default, G++ effectively sets @option{-pedantic-errors} without
@option{-pedantic}; this option reverses that. This behavior and this
option are superseded by @option{-pedantic}, which works as it does for GNU C@.
@item -frepo
@opindex frepo
-Enable automatic template instantiation. This option also implies
-@option{-fno-implicit-templates}. @xref{Template Instantiation}, for more
-information.
+Enable automatic template instantiation at link time. This option also
+implies @option{-fno-implicit-templates}. @xref{Template
+Instantiation}, for more information.
@item -fno-rtti
@opindex fno-rtti
functions will have linkage like inline functions; they just won't be
inlined by default.
-@item -Wctor-dtor-privacy (C++ only)
+@item -Wctor-dtor-privacy @r{(C++ only)}
@opindex Wctor-dtor-privacy
Warn when a class seems unusable, because all the constructors or
destructors in a class are private and the class has no friends or
public static member functions.
-@item -Wnon-virtual-dtor (C++ only)
+@item -Wnon-virtual-dtor @r{(C++ only)}
@opindex Wnon-virtual-dtor
Warn when a class declares a non-virtual destructor that should probably
be virtual, because it looks like the class will be used polymorphically.
-@item -Wreorder (C++ only)
+@item -Wreorder @r{(C++ only)}
@opindex Wreorder
@cindex reordering, warning
@cindex warning for reordering of member initializers
The following @option{-W@dots{}} options are not affected by @option{-Wall}.
@table @gcctabopt
-@item -Weffc++ (C++ only)
+@item -Weffc++ @r{(C++ only)}
@opindex Weffc++
Warn about violations of various style guidelines from Scott Meyers'
@cite{Effective C++} books. If you use this option, you should be aware
that the standard library headers do not obey all of these guidelines;
you can use @samp{grep -v} to filter out those warnings.
-@item -Wno-deprecated (C++ only)
+@item -Wno-deprecated @r{(C++ only)}
@opindex Wno-deprecated
Do not warn about usage of deprecated features. @xref{Deprecated Features}.
-@item -Wno-non-template-friend (C++ only)
+@item -Wno-non-template-friend @r{(C++ only)}
@opindex Wno-non-template-friend
Disable warnings when non-templatized friend functions are declared
within a template. With the advent of explicit template specification
-support in g++, if the name of the friend is an unqualified-id (i.e.,
+support in G++, if the name of the friend is an unqualified-id (i.e.,
@samp{friend foo(int)}), the C++ language specification demands that the
friend declare or define an ordinary, nontemplate function. (Section
-14.5.3). Before g++ implemented explicit specification, unqualified-ids
+14.5.3). Before G++ implemented explicit specification, unqualified-ids
could be interpreted as a particular specialization of a templatized
function. Because this non-conforming behavior is no longer the default
-behavior for g++, @option{-Wnon-template-friend} allows the compiler to
+behavior for G++, @option{-Wnon-template-friend} allows the compiler to
check existing code for potential trouble spots, and is on by default.
This new compiler behavior can be turned off with
@option{-Wno-non-template-friend} which keeps the conformant compiler code
but disables the helpful warning.
-@item -Wold-style-cast (C++ only)
+@item -Wold-style-cast @r{(C++ only)}
@opindex Wold-style-cast
Warn if an old-style (C-style) cast is used within a C++ program. The
new-style casts (@samp{static_cast}, @samp{reinterpret_cast}, and
@samp{const_cast}) are less vulnerable to unintended effects, and much
easier to grep for.
-@item -Woverloaded-virtual (C++ only)
+@item -Woverloaded-virtual @r{(C++ only)}
@opindex Woverloaded-virtual
@cindex overloaded virtual fn, warning
@cindex warning for overloaded virtual fn
will fail to compile.
-@item -Wno-pmf-conversions (C++ only)
+@item -Wno-pmf-conversions @r{(C++ only)}
@opindex Wno-pmf-conversions
Disable the diagnostic for converting a bound pointer to member function
to a plain pointer.
-@item -Wsign-promo (C++ only)
+@item -Wsign-promo @r{(C++ only)}
@opindex Wsign-promo
Warn when overload resolution chooses a promotion from unsigned or
enumeral type to a signed type over a conversion to an unsigned type of
-the same size. Previous versions of g++ would try to preserve
+the same size. Previous versions of G++ would try to preserve
unsignedness, but the standard mandates the current behavior.
-@item -Wsynth (C++ only)
+@item -Wsynth @r{(C++ only)}
@opindex Wsynth
@cindex warning for synthesized methods
@cindex synthesized methods, warning
-Warn when g++'s synthesis behavior does not match that of cfront. For
+Warn when G++'s synthesis behavior does not match that of cfront. For
instance:
@smallexample
@}
@end smallexample
-In this example, g++ will synthesize a default @samp{A& operator =
+In this example, G++ will synthesize a default @samp{A& operator =
(const A&);}, while cfront will use the user-defined @samp{operator =}.
@end table
@item -fmessage-length=@var{n}
@opindex fmessage-length
Try to format error messages so that they fit on lines of about @var{n}
-characters. The default is 72 characters for g++ and 0 for the rest of
+characters. The default is 72 characters for @command{g++} and 0 for the rest of
the front ends supported by GCC@. If @var{n} is zero, then no
line-wrapping will be done; each error message will appear on a single
line.
such a case:
@smallexample
+@group
@{
if (a)
if (b)
else
bar ();
@}
+@end group
@end smallexample
In C, every @code{else} branch belongs to the innermost possible @code{if}
the enclosing @code{if}. The resulting code would look like this:
@smallexample
+@group
@{
if (a)
@{
bar ();
@}
@}
+@end group
@end smallexample
@item -Wsequence-point
The present implementation of this option only works for C programs. A
future implementation may also work for C++ programs.
-There is some controversy over the precise meaning of the sequence point
-rules in subtle cases. Links to papers with alternative formal definitions
-and other related discussions may be found on our readings page
+The C standard is worded confusingly, therefore there is some debate
+over the precise meaning of the sequence point rules in subtle cases.
+Links to discussions of the problem, including proposed formal
+definitions, may be found on our readings page, at
@w{@uref{http://gcc.gnu.org/readings.html}}.
@item -Wreturn-type
this can happen:
@smallexample
+@group
@{
int x;
switch (y)
@}
foo (x);
@}
+@end group
@end smallexample
@noindent
you use that never return as @code{noreturn}. @xref{Function
Attributes}.
-@item -Wreorder (C++ only)
+@item -Wreorder @r{(C++ only)}
@opindex Wreorder
@cindex reordering, warning
@cindex warning for reordering of member initializers
this is done with the relational operators, so equality comparisons are
probably mistaken.
-@item -Wtraditional (C only)
+@item -Wtraditional @r{(C only)}
@opindex Wtraditional
Warn about certain constructs that behave differently in traditional and
ISO C@. Also warn about ISO C constructs that have no traditional C
convenience in calculations with @code{void *} pointers and pointers
to functions.
-@item -Wbad-function-cast (C only)
+@item -Wbad-function-cast @r{(C only)}
@opindex Wbad-function-cast
Warn whenever a function call is cast to a non-matching type.
For example, warn if @code{int malloc()} is cast to @code{anything *}.
@item -Wwrite-strings
@opindex Wwrite-strings
-Give string constants the type @code{const char[@var{length}]} so that
+When compiling C, give string constants the type @code{const
+char[@var{length}]} so that
copying the address of one into a non-@code{const} @code{char *}
-pointer will get a warning. These warnings will help you find at
+pointer will get a warning; when compiling C++, warn about the
+deprecated conversion from string constants to @code{char *}.
+These warnings will help you find at
compile time code that can try to write into a string constant, but
only if you have been very careful about using @code{const} in
declarations and prototypes. Otherwise, it will just be a nuisance;
called. (In languages where you can return an array, this also elicits
a warning.)
-@item -Wstrict-prototypes (C only)
+@item -Wstrict-prototypes @r{(C only)}
@opindex Wstrict-prototypes
Warn if a function is declared or defined without specifying the
argument types. (An old-style function definition is permitted without
a warning if preceded by a declaration which specifies the argument
types.)
-@item -Wmissing-prototypes (C only)
+@item -Wmissing-prototypes @r{(C only)}
@opindex Wmissing-prototypes
Warn if a global function is defined without a previous prototype
declaration. This warning is issued even if the definition itself
Warn if anything is declared more than once in the same scope, even in
cases where multiple declaration is valid and changes nothing.
-@item -Wnested-externs (C only)
+@item -Wnested-externs @r{(C only)}
@opindex Wnested-externs
Warn if an @code{extern} declaration is encountered within a function.
@item -fprofile-arcs
@opindex fprofile-arcs
-Instrument @dfn{arcs} during compilation. For each function of your
-program, GCC creates a program flow graph, then finds a spanning tree
-for the graph. Only arcs that are not on the spanning tree have to be
-instrumented: the compiler adds code to count the number of times that these
-arcs are executed. When an arc is the only exit or only entrance to a
-block, the instrumentation code can be added to the block; otherwise, a
-new basic block must be created to hold the instrumentation code.
-
-Since not every arc in the program must be instrumented, programs
-compiled with this option run faster than programs compiled with
-@option{-a}, which adds instrumentation code to every basic block in the
-program. The tradeoff: since @code{gcov} does not have
-execution counts for all branches, it must start with the execution
-counts for the instrumented branches, and then iterate over the program
-flow graph until the entire graph has been solved. Hence, @code{gcov}
-runs a little more slowly than a program which uses information from
-@option{-a}.
-
-@option{-fprofile-arcs} also makes it possible to estimate branch
-probabilities, and to calculate basic block execution counts. In
-general, basic block execution counts do not give enough information to
-estimate all branch probabilities. When the compiled program exits, it
-saves the arc execution counts to a file called
-@file{@var{sourcename}.da}. Use the compiler option
+Instrument @dfn{arcs} during compilation to generate coverage data
+or for profile-directed block ordering. During execution the program
+records how many times each branch is executed and how many times it is
+taken. When the compiled program exits it saves this data to a file
+called @file{@var{sourcename}.da} for each source file.
+
+For profile-directed block ordering, compile the program with
+@option{-fprofile-arcs} plus optimization and code generation options,
+generate the arc profile information by running the program on a
+selected workload, and then compile the program again with the same
+optimization and code generation options plus
@option{-fbranch-probabilities} (@pxref{Optimize Options,,Options that
-Control Optimization}) when recompiling, to optimize using estimated
-branch probabilities.
+Control Optimization}).
+
+The other use of @option{-fprofile-arcs} is for use with @code{gcov},
+when it is used with the @option{-ftest-coverage} option. GCC
+supports two methods of determining code coverage: the options that
+support @code{gcov}, and options @option{-a} and @option{-ax}, which
+write information to text files. The options that support @code{gcov}
+do not need to instrument every arc in the program, so a program compiled
+with them runs faster than a program compiled with @option{-a}, which
+adds instrumentation code to every basic block in the program. The
+tradeoff: since @code{gcov} does not have execution counts for all
+branches, it must start with the execution counts for the instrumented
+branches, and then iterate over the program flow graph until the entire
+graph has been solved. Hence, @code{gcov} runs a little more slowly than
+a program which uses information from @option{-a} and @option{-ax}.
+
+With @option{-fprofile-arcs}, for each function of your program GCC
+creates a program flow graph, then finds a spanning tree for the graph.
+Only arcs that are not on the spanning tree have to be instrumented: the
+compiler adds code to count the number of times that these arcs are
+executed. When an arc is the only exit or only entrance to a block, the
+instrumentation code can be added to the block; otherwise, a new basic
+block must be created to hold the instrumentation code.
+
+This option makes it possible to estimate branch probabilities and to
+calculate basic block execution counts. In general, basic block
+execution counts as provided by @option{-a} do not give enough
+information to estimate all branch probabilities.
@need 2000
@item -ftest-coverage
A list of all arcs in the program flow graph. This allows @code{gcov}
to reconstruct the program flow graph, so that it can compute all basic
block and arc execution counts from the information in the
-@code{@var{sourcename}.da} file (this last file is the output from
-@option{-fprofile-arcs}).
+@code{@var{sourcename}.da} file.
+@end table
+
+Use @option{-ftest-coverage} with @option{-fprofile-arcs}; the latter
+option adds instrumentation to the program, which then writes
+execution counts to another data file:
+
+@table @gcctabopt
+@item @var{sourcename}.da
+Runtime arc execution counts, used in conjunction with the arc
+information in the file @code{@var{sourcename}.bbg}.
@end table
+Coverage data will map better to the source files if
+@option{-ftest-coverage} is used without optimization.
+
@item -d@var{letters}
@opindex d
Says to make debugging dumps during compilation at times specified by
Annotate the assembler output with miscellaneous debugging information.
@item b
@opindex db
-Dump after computing branch probabilities, to @file{@var{file}.11.bp}.
+Dump after computing branch probabilities, to @file{@var{file}.14.bp}.
@item B
@opindex dB
-Dump after block reordering, to @file{@var{file}.26.bbro}.
+Dump after block reordering, to @file{@var{file}.28.bbro}.
@item c
@opindex dc
-Dump after instruction combination, to the file @file{@var{file}.14.combine}.
+Dump after instruction combination, to the file @file{@var{file}.16.combine}.
@item C
@opindex dC
-Dump after the first if conversion, to the file @file{@var{file}.15.ce}.
+Dump after the first if conversion, to the file @file{@var{file}.17.ce}.
@item d
@opindex dd
-Dump after delayed branch scheduling, to @file{@var{file}.29.dbr}.
+Dump after delayed branch scheduling, to @file{@var{file}.31.dbr}.
@item D
@opindex dD
Dump all macro definitions, at the end of preprocessing, in addition to
normal output.
@item e
@opindex de
-Dump after SSA optimizations, to @file{@var{file}.05.ssa} and
-@file{@var{file}.06.ussa}.
+Dump after SSA optimizations, to @file{@var{file}.04.ssa} and
+@file{@var{file}.07.ussa}.
@item E
@opindex dE
-Dump after the second if conversion, to @file{@var{file}.24.ce2}.
+Dump after the second if conversion, to @file{@var{file}.26.ce2}.
@item f
@opindex df
-Dump after life analysis, to @file{@var{file}.13.life}.
+Dump after life analysis, to @file{@var{file}.15.life}.
@item F
@opindex dF
-Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.04.addressof}.
+Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.09.addressof}.
@item g
@opindex dg
-Dump after global register allocation, to @file{@var{file}.19.greg}.
+Dump after global register allocation, to @file{@var{file}.21.greg}.
+@item h
+@opindex dh
+Dump after finalization of EH handling code, to @file{@var{file}.02.eh}.
@item o
@opindex do
-Dump after post-reload CSE and other optimizations, to @file{@var{file}.20.postreload}.
+Dump after post-reload optimizations, to @file{@var{file}.22.postreload}.
@item G
@opindex dG
-Dump after GCSE, to @file{@var{file}.08.gcse}.
+Dump after GCSE, to @file{@var{file}.10.gcse}.
@item i
@opindex di
Dump after sibling call optimizations, to @file{@var{file}.01.sibling}.
@item j
@opindex dj
-Dump after the first jump optimization, to @file{@var{file}.02.jump}.
-@item J
-@opindex dJ
-Dump after the last jump optimization, to @file{@var{file}.27.jump2}.
+Dump after the first jump optimization, to @file{@var{file}.03.jump}.
@item k
@opindex dk
-Dump after conversion from registers to stack, to @file{@var{file}.29.stack}.
+Dump after conversion from registers to stack, to @file{@var{file}.32.stack}.
@item l
@opindex dl
-Dump after local register allocation, to @file{@var{file}.18.lreg}.
+Dump after local register allocation, to @file{@var{file}.20.lreg}.
@item L
@opindex dL
-Dump after loop optimization, to @file{@var{file}.09.loop}.
+Dump after loop optimization, to @file{@var{file}.11.loop}.
@item M
@opindex dM
Dump after performing the machine dependent reorganisation pass, to
-@file{@var{file}.28.mach}.
+@file{@var{file}.30.mach}.
@item n
@opindex dn
-Dump after register renumbering, to @file{@var{file}.23.rnreg}.
+Dump after register renumbering, to @file{@var{file}.25.rnreg}.
@item N
@opindex dN
-Dump after the register move pass, to @file{@var{file}.16.regmove}.
+Dump after the register move pass, to @file{@var{file}.18.regmove}.
@item r
@opindex dr
Dump after RTL generation, to @file{@var{file}.00.rtl}.
@item R
@opindex dR
-Dump after the second instruction scheduling pass, to
-@file{@var{file}.25.sched2}.
+Dump after the second scheduling pass, to @file{@var{file}.27.sched2}.
@item s
@opindex ds
Dump after CSE (including the jump optimization that sometimes follows
-CSE), to @file{@var{file}.03.cse}.
+CSE), to @file{@var{file}.08.cse}.
@item S
@opindex dS
-Dump after the first instruction scheduling pass, to
-@file{@var{file}.17.sched}.
+Dump after the first scheduling pass, to @file{@var{file}.19.sched}.
@item t
@opindex dt
Dump after the second CSE pass (including the jump optimization that
-sometimes follows CSE), to @file{@var{file}.10.cse2}.
+sometimes follows CSE), to @file{@var{file}.12.cse2}.
@item w
@opindex dw
-Dump after the second flow pass, to @file{@var{file}.21.flow2}.
+Dump after the second flow pass, to @file{@var{file}.23.flow2}.
@item X
@opindex dX
-Dump after SSA aggressive dead code elimination, to @file{@var{file}.06.ssadce}.
+Dump after SSA dead code elimination, to @file{@var{file}.06.ssadce}.
@item z
@opindex dz
-Dump after the peephole pass, to @file{@var{file}.22.peephole2}.
+Dump after the peephole pass, to @file{@var{file}.24.peephole2}.
@item a
@opindex da
Produce all the dumps listed above.
use diff on debugging dumps for compiler invocations with different
options, in particular with and without @option{-g}.
-@item -fdump-translation-unit (C and C++ only)
-@item -fdump-translation-unit-@var{number} (C and C++ only)
+@item -fdump-translation-unit @r{(C and C++ only)}
+@itemx -fdump-translation-unit-@var{options} @r{(C and C++ only)}
@opindex fdump-translation-unit
Dump a representation of the tree structure for the entire translation
unit to a file. The file name is made by appending @file{.tu} to the
-source file name. If the @samp{-@var{number}} form is used, @var{number}
-controls the details of the dump as described for the @option{-fdump-tree} options.
+source file name. If the @samp{-@var{options}} form is used, @var{options}
+controls the details of the dump as described for the
+@option{-fdump-tree} options.
-@item -fdump-class-hierarchy (C++ only)
-@item -fdump-class-hierarchy-@var{number} (C++ only)
+@item -fdump-class-hierarchy @r{(C++ only)}
+@itemx -fdump-class-hierarchy-@var{options} @r{(C++ only)}
@opindex fdump-class-hierarchy
Dump a representation of each class's hierarchy and virtual function
table layout to a file. The file name is made by appending @file{.class}
-to the source file name. If the @samp{-@var{number}} form is used, @var{number}
-controls the details of the dump as described for the @option{-fdump-tree}
-options.
-
-@item -fdump-ast-@var{switch} (C++ only)
-@item -fdump-ast-@var{switch}-@var{number} (C++ only)
-@opindex fdump-ast
-Control the dumping at various stages of processing the abstract syntax
-tree to a file. The file name is generated by appending a switch
-specific suffix to the source file name. If the @samp{-@var{number}} form is
-used, @var{number} is a bit mask which controls the details of the
-dump. The following bits are meaningful (these are not set symbolically,
-as the primary function of these dumps is for debugging gcc itself):
+to the source file name. If the @samp{-@var{options}} form is used,
+@var{options} controls the details of the dump as described for the
+@option{-fdump-tree} options.
+
+@item -fdump-tree-@var{switch} @r{(C++ only)}
+@itemx -fdump-tree-@var{switch}-@var{options} @r{(C++ only)}
+@opindex fdump-tree
+Control the dumping at various stages of processing the intermediate
+language tree to a file. The file name is generated by appending a switch
+specific suffix to the source file name. If the @samp{-@var{options}}
+form is used, @var{options} is a list of @samp{-} separated options that
+control the details of the dump. Not all options are applicable to all
+dumps, those which are not meaningful will be ignored. The following
+options are available
@table @samp
-@item bit0 (1)
+@item address
Print the address of each node. Usually this is not meaningful as it
-changes according to the environment and source file.
-@item bit1 (2)
-Inhibit dumping of members of a scope or body of a function, unless they
-are reachable by some other path.
+changes according to the environment and source file. Its primary use
+is for tying up a dump file with a debug environment.
+@item slim
+Inhibit dumping of members of a scope or body of a function merely
+because that scope has been reached. Only dump such items when they
+are directly reachable by some other path.
+@item all
+Turn on all options.
@end table
The following tree dumps are possible:
Dump before any tree based optimization, to @file{@var{file}.original}.
@item optimized
Dump after all tree based optimization, to @file{@var{file}.optimized}.
+@item inlined
+Dump after function inlining, to @file{@var{file}.inlined}.
@end table
@item -fpretend-float
change the program counter to any other statement in the function and
get exactly the results you would expect from the source code.
-Without @option{-O}, the compiler only allocates variables declared
-@code{register} in registers. The resulting compiled code is a little
-worse than produced by PCC without @option{-O}.
-
With @option{-O}, the compiler tries to reduce code size and execution
-time.
-
-When you specify @option{-O}, the compiler turns on @option{-fthread-jumps}
-and @option{-fdefer-pop} on all machines. The compiler turns on
-@option{-fdelayed-branch} on machines that have delay slots, and
-@option{-fomit-frame-pointer} on machines that can support debugging even
-without a frame pointer. On some machines the compiler also turns
-on other flags.
+time, without performing any optimizations that take a great deal of
+compilation time.
@item -O2
@opindex O2
@option{-fforce-mem} option on all machines and frame pointer elimination
on machines where doing so does not interfere with debugging.
+Please note the warning under @option{-fgcse} about
+invoking @option{-O2} on programs that use computed gotos.
+
@item -O3
@opindex O3
Optimize yet more. @option{-O3} turns on all optimizations specified by
some machines.}
@ifset INTERNALS
-On some machines, such as the Vax, this flag has no effect, because
+On some machines, such as the VAX, this flag has no effect, because
the standard calling sequence automatically handles the frame pointer
and nothing is saved by pretending it doesn't exist. The
machine-description macro @code{FRAME_POINTER_REQUIRED} controls
whether a target machine supports this flag. @xref{Registers}.
@end ifset
@ifclear INTERNALS
-On some machines, such as the Vax, this flag has no effect, because
+On some machines, such as the VAX, this flag has no effect, because
the standard calling sequence automatically handles the frame pointer
and nothing is saved by pretending it doesn't exist. The
machine-description macro @code{FRAME_POINTER_REQUIRED} controls
inline (ie marked with the inline keyword or defined within the class
definition in c++). @var{n} is the size of functions that can be inlined in
number of pseudo instructions (not counting parameter handling). The default
-value of n is 10000. Increasing this value can result in more inlined code at
+value of @var{n} is 600.
+Increasing this value can result in more inlined code at
the cost of compilation time and memory consumption. Decreasing usually makes
the compilation faster and less code will be inlined (which presumably
means slower programs). This option is particularly useful for programs that
-use inlining heavily such as those based on recursive templates with c++.
+use inlining heavily such as those based on recursive templates with C++.
@emph{Note:} pseudo instruction represents, in this particular context, an
abstract measurement of function's size. In no way, it represents a count
check if the variable was referenced, regardless of whether or not
optimization is turned on, use the @option{-fno-keep-static-consts} option.
+@item -fmerge-constants
+Attempt to merge identical constants (string constants and floating point
+constants) accross compilation units.
+
+This option is default for optimized compilation if assembler and linker
+support it. Use @option{-fno-merge-constants} to inhibit this behaviour.
+
+@item -fmerge-all-constants
+Attempt to merge identical constants and identical variables.
+
+This option implies @option{-fmerge-constants}. In addition to
+@option{-fmerge-constants} this considers e.g. even constant initialized
+arrays or initialized constant variables with integral or floating point
+types. Languages like C or C++ require each non-automatic variable to
+have distinct location, so using this option will result in non-conforming
+behaviour.
+
@item -fno-function-cse
@opindex fno-function-cse
Do not put function addresses in registers; make each instruction that
@item -ffast-math
@opindex ffast-math
-Sets @option{-fno-math-errno}, @option{-funsafe-math-optimizations},
-and @option{-fno-trapping-math}.
+Sets @option{-fno-math-errno}, @option{-funsafe-math-optimizations}, and @*
+@option{-fno-trapping-math}.
This option causes the preprocessor macro @code{__FAST_MATH__} to be defined.
an exact implementation of IEEE or ISO rules/specifications for
math functions.
-The default is @option{-fmath-errno}. The @option{-ffast-math} option
-sets @option{-fno-math-errno}.
+The default is @option{-fmath-errno}.
@item -funsafe-math-optimizations
@opindex funsafe-math-optimizations
an exact implementation of IEEE or ISO rules/specifications for
math functions.
-The default is @option{-fno-unsafe-math-optimizations}. The
-@option{-ffast-math} option sets @option{-funsafe-math-optimizations}.
+The default is @option{-fno-unsafe-math-optimizations}.
@item -fno-trapping-math
@opindex fno-trapping-math
an exact implementation of IEEE or ISO rules/specifications for
math functions.
-The default is @option{-ftrapping-math}. The @option{-ffast-math}
-option sets @option{-fno-trapping-math}.
+The default is @option{-ftrapping-math}.
@end table
-@c following causes underfulls.. they don't look great, but we deal.
-@c --mew 26jan93
The following options control specific optimizations. The @option{-O2}
option turns on all of these optimizations except @option{-funroll-loops}
and @option{-funroll-all-loops}. On most machines, the @option{-O} option
You can use the following flags in the rare cases when ``fine-tuning''
of optimizations to be performed is desired.
+Not all of the optimizations performed by GCC have @option{-f} options
+to control them.
+
@table @gcctabopt
@item -fstrength-reduce
@opindex fstrength-reduce
Perform a global common subexpression elimination pass.
This pass also performs global constant and copy propagation.
+@emph{Note:} When compiling a program using computed gotos, a GCC
+extension, you may get better runtime performance if you disable
+the global common subexpression elmination pass by adding
+@option{-fno-gcse} to the command line.
+
@item -fgcse-lm
@opindex fgcse-lm
When @option{-fgcse-lm} is enabled, global common subexpression elimination will
@item -fdelete-null-pointer-checks
@opindex fdelete-null-pointer-checks
-Use global dataflow analysis to identify and eliminate useless null
-pointer checks. Programs which rely on NULL pointer dereferences @emph{not}
-halting the program may not work properly with this option. Use
--fno-delete-null-pointer-checks to disable this optimizing for programs
-which depend on that behavior.
+Use global dataflow analysis to identify and eliminate useless checks
+for null pointers. The compiler assumes that dereferencing a null
+pointer would have halted the program. If a pointer is checked after
+it has already been dereferenced, it cannot be null.
+
+In some environments, this assumption is not true, and programs can
+safely dereference null pointers. Use
+@option{-fno-delete-null-pointer-checks} to disable this optimization
+for programs which depend on that behavior.
@item -fexpensive-optimizations
@opindex fexpensive-optimizations
@item -funroll-loops
@opindex funroll-loops
-Perform the optimization of loop unrolling. This is only done for loops
-whose number of iterations can be determined at compile time or run time.
-@option{-funroll-loops} implies both @option{-fstrength-reduce} and
-@option{-frerun-cse-after-loop}.
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop. @option{-funroll-loops} implies both
+@option{-fstrength-reduce} and @option{-frerun-cse-after-loop}. This
+option makes code larger, and may or may not make it run faster.
@item -funroll-all-loops
@opindex funroll-all-loops
-Perform the optimization of loop unrolling. This is done for all loops
-and usually makes programs run more slowly. @option{-funroll-all-loops}
-implies @option{-fstrength-reduce} as well as @option{-frerun-cse-after-loop}.
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+@option{-funroll-all-loops} implies the same options as
+@option{-funroll-loops},
+
@item -fmove-all-movables
@opindex fmove-all-movables
(@pxref{Debugging Options,, Options for Debugging Your Program or
@command{gcc}}), you can compile it a second time using
@option{-fbranch-probabilities}, to improve optimizations based on
-guessing the path a branch might take.
+the number of times each branch was taken. When the program
+compiled with @option{-fprofile-arcs} exits it saves arc execution
+counts to a file called @file{@var{sourcename}.da} for each source
+file The information in this data file is very dependent on the
+structure of the generated code, so you must use the same source code
+and the same optimization options for both compilations.
@ifset INTERNALS
With @option{-fbranch-probabilities}, GCC puts a @samp{REG_EXEC_COUNT}
@item -fno-guess-branch-probability
@opindex fno-guess-branch-probability
-Sometimes gcc will opt to guess branch probabilities when none are
-available from either profile directed feedback (@option{-fprofile-arcs})
-or @samp{__builtin_expect}. In a hard real-time system, people don't
-want different runs of the compiler to produce code that has different
-behavior; minimizing non-determinism is of paramount import. This
-switch allows users to reduce non-determinism, possibly at the expense
-of inferior optimization.
+Do not guess branch probabilities using a randomized model.
+
+Sometimes gcc will opt to use a randomized model to guess branch
+probabilities, when none are available from either profiling feedback
+(@option{-fprofile-arcs}) or @samp{__builtin_expect}. This means that
+different runs of the compiler on the same program may produce different
+object code.
+
+In a hard real-time system, people don't want different runs of the
+compiler to produce code that has different behavior; minimizing
+non-determinism is of paramount import. This switch allows users to
+reduce non-determinism, possibly at the expense of inferior
+optimization.
@item -fstrict-aliasing
@opindex fstrict-aliasing
the flow graph is translated back from SSA form. Users should not
specify this option, since it is not yet ready for production use.
+@item -fssa-ccp
+@opindex fssa-ccp
+Perform Sparse Conditional Constant Propagation in SSA form. Requires
+@option{-fssa}. Like @option{-fssa}, this is an experimental feature.
+
@item -fssa-dce
@opindex fssa-dce
Perform aggressive dead-code elimination in SSA form. Requires @option{-fssa}.
optimization will not be done.
@item max-gcse-passes
-The maximum number of passes of GCSE to run.
+The maximum number of passes of GCSE to run.
+
+@item max-pending-list-length
+The maximum number of pending dependancies scheduling will allow
+before flushing the current state and starting over. Large functions
+with few branches or calls can create excessively large lists which
+needlessly consume memory and resources.
@item max-inline-insns
If an function contains more than this many instructions, it
The nine trigraph sequences are
@table @samp
@item ??(
--> @samp{[}
+@expansion{} @samp{[}
@item ??)
--> @samp{]}
+@expansion{} @samp{]}
@item ??<
--> @samp{@{}
+@expansion{} @samp{@{}
@item ??>
--> @samp{@}}
+@expansion{} @samp{@}}
@item ??=
--> @samp{#}
+@expansion{} @samp{#}
@item ??/
--> @samp{\}
+@expansion{} @samp{\}
@item ??'
--> @samp{^}
+@expansion{} @samp{^}
@item ??!
--> @samp{|}
+@expansion{} @samp{|}
@item ??-
--> @samp{~}
+@expansion{} @samp{~}
@end table
properly. Portable code should not rely on trigraphs being either
converted or ignored.
-@item -Wp\,@var{option}
+@item -Wp,@var{option}
@opindex Wp
Pass @var{option} as an option to the preprocessor. If @var{option}
contains commas, it is split into multiple options at the commas.
You can pass options to the assembler.
@table @gcctabopt
-@item -Wa\,@var{option}
+@item -Wa,@var{option}
@opindex Wa
Pass @var{option} as an option to the assembler. If @var{option}
contains commas, it is split into multiple options at the commas.
@option{-Xlinker "-assert definitions"}, because this passes the entire
string as a single argument, which is not what the linker expects.
-@item -Wl\,@var{option}
+@item -Wl,@var{option}
@opindex Wl
Pass @var{option} as an option to the linker. If @var{option} contains
commas, it is split into multiple options at the commas.
one @option{-I} option, the directories are scanned in left-to-right
order; the standard system directories come after.
+If a standard system include directory, or a directory specified with
+@option{-isystem}, is also specified with @option{-I}, it will be
+searched only in the position requested by @option{-I}. Also, it will
+not be considered a system include directory. If that directory really
+does contain system headers, there is a good chance that they will
+break. For instance, if GCC's installation procedure edited the headers
+in @file{/usr/include} to fix bugs, @samp{-I/usr/include} will cause the
+original, buggy headers to be found instead of the corrected ones. GCC
+will issue a warning when a system include directory is hidden in this
+way.
+
@item -I-
@opindex I-
Any directories you specify with @option{-I} options before the @option{-I-}
name is searched for using the directories specified in your
@env{PATH} environment variable.
+The compiler will check to see if the path provided by the @option{-B}
+refers to a directory, and if necessary it will add a directory
+separator character at the end of the path.
+
@option{-B} prefixes that effectively specify directory names also apply
to libraries in the linker, because the compiler translates these
options into @option{-L} options for the linker. They also apply to
the environment variable @env{GCC_EXEC_PREFIX}. @xref{Environment
Variables}.
+As a special kludge, if the path provided by @option{-B} is
+@file{[dir/]stage@var{N}/}, where @var{N} is a number in the range 0 to
+9, then it will be replaced by @file{[dir/]include}. This is to help
+with boot-strapping the compiler.
+
@item -specs=@var{file}
@opindex specs
Process @var{file} after the compiler reads in the standard @file{specs}
without regard to any appended suffix.
@item %j@var{SUFFIX}
-Substitutes the name of the HOST_BIT_BUCKET, if any, and if it is
+Substitutes the name of the @code{HOST_BIT_BUCKET}, if any, and if it is
writable, and if save-temps is off; otherwise, substitute the name
of a temporary file, just like @samp{%u}. This temporary file is not
meant for communication between processes, but rather as a junk
C@.
@item %I
-Substitute a @option{-iprefix} option made from GCC_EXEC_PREFIX@.
+Substitute a @option{-iprefix} option made from @env{GCC_EXEC_PREFIX}.
@item %s
Current argument is the name of a library or startup file of some sort.
Earlier we discussed the standard option @option{-b} which chooses among
different installed compilers for completely different target
-machines, such as Vax vs.@: 68000 vs.@: 80386.
+machines, such as VAX vs.@: 68000 vs.@: 80386.
In addition, each of these target machine types can have its own
special options, starting with @samp{-m}, to choose among various
* RS/6000 and PowerPC Options::
* RT Options::
* MIPS Options::
-* i386 Options::
+* i386 and x86-64 Options::
* HPPA Options::
* Intel 960 Options::
* DEC Alpha Options::
* MCore Options::
* IA-64 Options::
* D30V Options::
+* S/390 and zSeries Options::
@end menu
@node M680x0 Options
@subsection VAX Options
@cindex VAX options
-These @samp{-m} options are defined for the Vax:
+These @samp{-m} options are defined for the VAX:
@table @gcctabopt
@item -munix
@opindex munix
Do not output certain jump instructions (@code{aobleq} and so on)
-that the Unix assembler for the Vax cannot handle across long
+that the Unix assembler for the VAX cannot handle across long
ranges.
@item -mgnu
and will use a ``flat'' or single register window calling convention.
This model uses %i7 as the frame pointer and is compatible with the normal
register window model. Code from either may be intermixed.
-The local registers and the input registers (0-5) are still treated as
+The local registers and the input registers (0--5) are still treated as
``call saved'' registers and will be saved on the stack as necessary.
With @option{-mno-flat} (the default), the compiler emits save/restore
@var{cpu_type}, but do not set the instruction set or register set that the
option @option{-mcpu=@var{cpu_type}} would.
-The same values for @option{-mcpu=@var{cpu_type}} are used for
-@option{-mtune=@var{cpu_type}}, though the only useful values are those that
-select a particular cpu implementation: @samp{cypress}, @samp{supersparc},
-@samp{hypersparc}, @samp{f930}, @samp{f934}, @samp{sparclite86x},
-@samp{tsc701}, @samp{ultrasparc}.
+The same values for @option{-mcpu=@var{cpu_type}} can be used for
+@option{-mtune=@var{cpu_type}}, but the only useful values are those
+that select a particular cpu implementation. Those are @samp{cypress},
+@samp{supersparc}, @samp{hypersparc}, @samp{f930}, @samp{f934},
+@samp{sparclite86x}, @samp{tsc701}, and @samp{ultrasparc}.
@end table
@opindex mcpu
This specifies the name of the target ARM processor. GCC uses this name
to determine what kind of instructions it can emit when generating
-assembly code. Permissible names are: arm2, arm250, arm3, arm6, arm60,
-arm600, arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi,
-arm70, arm700, arm700i, arm710, arm710c, arm7100, arm7500, arm7500fe,
-arm7tdmi, arm8, strongarm, strongarm110, strongarm1100, arm8, arm810,
-arm9, arm9e, arm920, arm920t, arm940t, arm9tdmi, arm10tdmi, arm1020t,
-xscale.
+assembly code. Permissible names are: @samp{arm2}, @samp{arm250},
+@samp{arm3}, @samp{arm6}, @samp{arm60}, @samp{arm600}, @samp{arm610},
+@samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
+@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
+@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
+@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm8},
+@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
+@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
+@samp{arm920t}, @samp{arm940t}, @samp{arm9tdmi}, @samp{arm10tdmi},
+@samp{arm1020t}, @samp{xscale}.
@itemx -mtune=@var{name}
@opindex mtune
This specifies the name of the target ARM architecture. GCC uses this
name to determine what kind of instructions it can emit when generating
assembly code. This option can be used in conjunction with or instead
-of the @option{-mcpu=} option. Permissible names are: armv2, armv2a,
-armv3, armv3m, armv4, armv4t, armv5, armv5t, armv5te.
+of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
+@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
+@samp{armv5}, @samp{armv5t}, @samp{armv5te}.
@item -mfpe=@var{number}
@itemx -mfp=@var{number}
@item -mnop-fun-dllimport
@opindex mnop-fun-dllimport
-Disable support for the @emph{dllimport} attribute.
+Disable support for the @code{dllimport} attribute.
@item -msingle-pic-base
@opindex msingle-pic-base
-g switch.
@item -moptimize-arg-area
-@itemx -mno-optimize-arg-area
@opindex moptimize-arg-area
-@opindex mno-optimize-arg-area
@cindex arguments in frame (88k)
-Control how function arguments are stored in stack frames.
-@option{-moptimize-arg-area} saves space by optimizing them, but this
-conflicts with the 88open specifications. The opposite alternative,
-@option{-mno-optimize-arg-area}, agrees with 88open standards. By default
-GCC does not optimize the argument area.
+Save space by reorganizing the stack frame. This option generates code
+that does not agree with the 88open specifications, but uses less
+memory.
+
+@itemx -mno-optimize-arg-area
+@opindex mno-optimize-arg-area
+Do not reorganize the stack frame to save space. This is the default.
+The generated conforms to the specification, but uses more memory.
@item -mshort-data-@var{num}
@opindex mshort-data
compiling code that might be run on such a processor, GCC
generates code that explicitly checks for zero-valued divisors
and traps with exception number 503 when one is detected. Use of
-mno-check-zero-division suppresses such checking for code
+@option{-mno-check-zero-division} suppresses such checking for code
generated to run on an MC88100 processor.
-GCC assumes that the MC88110 processor correctly detects all
-instances of integer division by zero. When @option{-m88110} is
-specified, both @option{-mcheck-zero-division} and
-@option{-mno-check-zero-division} are ignored, and no explicit checks for
-zero-valued divisors are generated.
+GCC assumes that the MC88110 processor correctly detects all instances
+of integer division by zero. When @option{-m88110} is specified, no
+explicit checks for zero-valued divisors are generated, and both
+@option{-mcheck-zero-division} and @option{-mno-check-zero-division} are
+ignored.
@item -muse-div-instruction
@opindex muse-div-instruction
GCC issues no such warning.
@end table
+@c break page here to avoid unsightly interparagraph stretch.
+@c -zw, 2001-8-17
+@page
+
@node RS/6000 and PowerPC Options
@subsection IBM RS/6000 and PowerPC Options
@cindex RS/6000 and PowerPC Options
@itemx -mold-mnemonics
@opindex mnew-mnemonics
@opindex mold-mnemonics
-Select which mnemonics to use in the generated assembler code.
-@option{-mnew-mnemonics} requests output that uses the assembler mnemonics
-defined for the PowerPC architecture, while @option{-mold-mnemonics}
-requests the assembler mnemonics defined for the POWER architecture.
-Instructions defined in only one architecture have only one mnemonic;
-GCC uses that mnemonic irrespective of which of these options is
-specified.
+Select which mnemonics to use in the generated assembler code. With
+@option{-mnew-mnemonics}, GCC uses the assembler mnemonics defined for
+the PowerPC architecture. With @option{-mold-mnemonics} it uses the
+assembler mnemonics defined for the POWER architecture. Instructions
+defined in only one architecture have only one mnemonic; GCC uses that
+mnemonic irrespective of which of these options is specified.
GCC defaults to the mnemonics appropriate for the architecture in
use. Specifying @option{-mcpu=@var{cpu_type}} sometimes overrides the
Supported values for @var{cpu_type} are @samp{rios}, @samp{rios1},
@samp{rsc}, @samp{rios2}, @samp{rs64a}, @samp{601}, @samp{602},
@samp{603}, @samp{603e}, @samp{604}, @samp{604e}, @samp{620},
-@samp{630}, @samp{740}, @samp{750}, @samp{power}, @samp{power2},
-@samp{powerpc}, @samp{403}, @samp{505}, @samp{801}, @samp{821},
-@samp{823}, and @samp{860} and @samp{common}. @option{-mcpu=power},
-@option{-mcpu=power2}, @option{-mcpu=powerpc}, and @option{-mcpu=powerpc64}
-specify generic POWER, POWER2, pure 32-bit PowerPC (i.e., not MPC601),
-and 64-bit PowerPC architecture machine types, with an appropriate,
-generic processor model assumed for scheduling purposes.
-
-Specifying any of the following options:
-@option{-mcpu=rios1}, @option{-mcpu=rios2}, @option{-mcpu=rsc},
-@option{-mcpu=power}, or @option{-mcpu=power2}
-enables the @option{-mpower} option and disables the @option{-mpowerpc} option;
-@option{-mcpu=601} enables both the @option{-mpower} and @option{-mpowerpc} options.
-All of @option{-mcpu=rs64a}, @option{-mcpu=602}, @option{-mcpu=603},
-@option{-mcpu=603e}, @option{-mcpu=604}, @option{-mcpu=620}, @option{-mcpu=630},
-@option{-mcpu=740}, and @option{-mcpu=750}
-enable the @option{-mpowerpc} option and disable the @option{-mpower} option.
-Exactly similarly, all of @option{-mcpu=403},
-@option{-mcpu=505}, @option{-mcpu=821}, @option{-mcpu=860} and @option{-mcpu=powerpc}
-enable the @option{-mpowerpc} option and disable the @option{-mpower} option.
-@option{-mcpu=common} disables both the
-@option{-mpower} and @option{-mpowerpc} options.
-
-AIX versions 4 or greater selects @option{-mcpu=common} by default, so
-that code will operate on all members of the RS/6000 POWER and PowerPC
-families. In that case, GCC will use only the instructions in the
-common subset of both architectures plus some special AIX common-mode
-calls, and will not use the MQ register. GCC assumes a generic
+@samp{630}, @samp{740}, @samp{7400}, @samp{7450}, @samp{750},
+@samp{power}, @samp{power2}, @samp{powerpc}, @samp{403}, @samp{505},
+@samp{801}, @samp{821}, @samp{823}, and @samp{860} and @samp{common}.
+
+@option{-mcpu=common} selects a completely generic processor. Code
+generated under this option will run on any POWER or PowerPC processor.
+GCC will use only the instructions in the common subset of both
+architectures, and will not use the MQ register. GCC assumes a generic
processor model for scheduling purposes.
-Specifying any of the options @option{-mcpu=rios1}, @option{-mcpu=rios2},
-@option{-mcpu=rsc}, @option{-mcpu=power}, or @option{-mcpu=power2} also
-disables the @samp{new-mnemonics} option. Specifying @option{-mcpu=601},
-@option{-mcpu=602}, @option{-mcpu=603}, @option{-mcpu=603e}, @option{-mcpu=604},
-@option{-mcpu=620}, @option{-mcpu=630}, @option{-mcpu=403}, @option{-mcpu=505},
-@option{-mcpu=821}, @option{-mcpu=860} or @option{-mcpu=powerpc} also enables
-the @samp{new-mnemonics} option.
+@option{-mcpu=power}, @option{-mcpu=power2}, @option{-mcpu=powerpc}, and
+@option{-mcpu=powerpc64} specify generic POWER, POWER2, pure 32-bit
+PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
-Specifying @option{-mcpu=403}, @option{-mcpu=821}, or @option{-mcpu=860} also
-enables the @option{-msoft-float} option.
+The other options specify a specific processor. Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+
+The @option{-mcpu} options automatically enable or disable other
+@option{-m} options as follows:
+
+@table @samp
+@item common
+@option{-mno-power}, @option{-mno-powerc}
+
+@item power
+@itemx power2
+@itemx rios1
+@itemx rios2
+@itemx rsc
+@option{-mpower}, @option{-mno-powerpc}, @option{-mno-new-mnemonics}
+
+@item powerpc
+@itemx rs64a
+@itemx 602
+@itemx 603
+@itemx 603e
+@itemx 604
+@itemx 620
+@itemx 630
+@itemx 740
+@itemx 7400
+@itemx 7450
+@itemx 750
+@itemx 505
+@option{-mno-power}, @option{-mpowerpc}, @option{-mnew-mnemonics}
+
+@item 601
+@option{-mpower}, @option{-mpowerpc}, @option{-mnew-mnemonics}
+
+@item 403
+@itemx 821
+@itemx 860
+@option{-mno-power}, @option{-mpowerpc}, @option{-mnew-mnemonics}, @option{-msoft-float}
+@end table
@item -mtune=@var{cpu_type}
@opindex mtune
Set the instruction scheduling parameters for machine type
-@var{cpu_type}, but do not set the architecture type, register usage,
-choice of mnemonics like @option{-mcpu=@var{cpu_type}} would. The same
-values for @var{cpu_type} are used for @option{-mtune=@var{cpu_type}} as
-for @option{-mcpu=@var{cpu_type}}. The @option{-mtune=@var{cpu_type}}
-option overrides the @option{-mcpu=@var{cpu_type}} option in terms of
-instruction scheduling parameters.
+@var{cpu_type}, but do not set the architecture type, register usage, or
+choice of mnemonics, as @option{-mcpu=@var{cpu_type}} would. The same
+values for @var{cpu_type} are used for @option{-mtune} as for
+@option{-mcpu}. If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by @option{-mcpu}, but the
+scheduling parameters set by @option{-mtune}.
@item -mfull-toc
@itemx -mno-fp-in-toc
On System V.4 and embedded PowerPC systems compile code for the
Linux-based GNU system.
+@item -mcall-netbsd
+@opindex mcall-netbsd
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+
@item -mprototype
@itemx -mno-prototype
@opindex mprototype
These @samp{-m} options are defined for the MIPS family of computers:
@table @gcctabopt
-@item -mcpu=@var{cpu-type}
-@opindex mcpu
+
+@item -march=@var{cpu-type}
+@opindex march
+Assume the defaults for the machine type @var{cpu-type} when generating
+instructions. The choices for @var{cpu-type} are @samp{r2000}, @samp{r3000},
+@samp{r3900}, @samp{r4000}, @samp{r4100}, @samp{r4300}, @samp{r4400},
+@samp{r4600}, @samp{r4650}, @samp{r5000}, @samp{r6000}, @samp{r8000},
+and @samp{orion}. Additionally, the @samp{r2000}, @samp{r3000},
+@samp{r4000}, @samp{r5000}, and @samp{r6000} can be abbreviated as
+@samp{r2k} (or @samp{r2K}), @samp{r3k}, etc.
+
+@item -mtune=@var{cpu-type}
+@opindex mtune
Assume the defaults for the machine type @var{cpu-type} when scheduling
instructions. The choices for @var{cpu-type} are @samp{r2000}, @samp{r3000},
@samp{r3900}, @samp{r4000}, @samp{r4100}, @samp{r4300}, @samp{r4400},
of the MIPS ISA (instruction set architecture) without a @option{-mipsX}
or @option{-mabi} switch being used.
+@item -mcpu=@var{cpu-type}
+@opindex mcpu
+This is identical to specifying both @option{-march} and @option{-mtune}.
+
@item -mips1
@opindex mips1
Issue instructions from level 1 of the MIPS ISA@. This is the default.
Assume that 32 64-bit floating point registers are available. This is
the default when the @option{-mips3} option is used.
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions, when they are available. These instructions
+are generated by default if they are available, but this may be
+undesirable if the extra precision causes problems or on certain chips
+in the mode where denormals are rounded to zero where denormals
+generated by multiply and accumulate instructions cause exceptions
+anyway.
+
@item -mgp32
@opindex mgp32
Assume that 32 32-bit general purpose registers are available. This is
@opindex msplit-addresses
@opindex mno-split-addresses
Generate code to load the high and low parts of address constants separately.
-This allows @code{gcc} to optimize away redundant loads of the high order
+This allows GCC to optimize away redundant loads of the high order
bits of addresses. This optimization requires GNU as and GNU ld.
This optimization is enabled by default for some embedded targets where
GNU as and GNU ld are standard.
defaults.
@end ifset
-@node i386 Options
-@subsection Intel 386 Options
+@node i386 and x86-64 Options
+@subsection Intel 386 and AMD x86-64 Options
@cindex i386 Options
+@cindex x86-64 Options
@cindex Intel 386 Options
+@cindex AMD x86-64 Options
-These @samp{-m} options are defined for the i386 family of computers:
+These @samp{-m} options are defined for the i386 and x86-64 family of
+computers:
@table @gcctabopt
@item -mcpu=@var{cpu-type}
@opindex m486
@opindex mpentium
@opindex mpentiumpro
-Synonyms for @option{-mcpu=i386}, @option{-mcpu=i486}, @option{-mcpu=pentium}, and @option{-mcpu=pentiumpro}
-respectively. These synonyms are deprecated.
+These options are synonyms for @option{-mcpu=i386}, @option{-mcpu=i486},
+@option{-mcpu=pentium}, and @option{-mcpu=pentiumpro} respectively.
+These synonyms are deprecated.
@item -mintel-syntax
@opindex mintel-syntax
expense of more memory.
@item -m128bit-long-double
-@itemx -m128bit-long-double
-@opindex m128bit-long-double
@opindex m128bit-long-double
Control the size of @code{long double} type. i386 application binary interface
specify the size to be 12 bytes, while modern architectures (Pentium and newer)
will be modified.
@item -m96bit-long-double
-@itemx -m96bit-long-double
-@opindex m96bit-long-double
@opindex m96bit-long-double
Set the size of @code{long double} to 96 bits as required by the i386
application binary interface. This is the default.
@itemx -mno-svr3-shlib
@opindex msvr3-shlib
@opindex mno-svr3-shlib
-Control whether GCC places uninitialized locals into @code{bss} or
-@code{data}. @option{-msvr3-shlib} places these locals into @code{bss}.
-These options are meaningful only on System V Release 3.
-
-@item -mno-wide-multiply
-@itemx -mwide-multiply
-@opindex mno-wide-multiply
-@opindex mwide-multiply
-Control whether GCC uses the @code{mul} and @code{imul} that produce
-64-bit results in @code{eax:edx} from 32-bit operands to do @code{long
-long} multiplies and 32-bit division by constants.
+Control whether GCC places uninitialized local variables into the
+@code{bss} or @code{data} segments. @option{-msvr3-shlib} places them
+into @code{bss}. These options are meaningful only on System V Release 3.
@item -mrtd
@opindex mrtd
may want to reduce the preferred alignment to
@option{-mpreferred-stack-boundary=2}.
+@item -mmmx
+@itemx -mno-mmx
+@item -msse
+@itemx -mno-sse
+@item -m3dnow
+@itemx -mno-3dnow
+@opindex mmmx
+@opindex mno-mmx
+@opindex msse
+@opindex mno-sse
+@opindex m3dnow
+@opindex mno-3dnow
+These switches enable or disable the use of built-in functions that allow
+direct access to the MMX, SSE and 3Dnow extensions of the instruction set.
+
+The following machine modes are available for use with MMX built-in functions
+(@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32 bit integers,
+@code{V4HI} for a vector of four 16 bit integers, and @code{V8QI} for a
+vector of eight 8 bit integers. Some of the built-in functions operate on
+MMX registers as a whole 64 bit entity, these use @code{DI} as their mode.
+
+If 3Dnow extensions are enabled, @code{V2SF} is used as a mode for a vector
+of two 32 bit floating point values.
+
+If SSE extensions are enabled, @code{V4SF} is used for a vector of four 32 bit
+floating point values. Some instructions use a vector of four 32 bit
+integers, these use @code{V4SI}. Finally, some instructions operate on an
+entire vector register, interpreting it as a 128 bit integer, these use mode
+@code{TI}.
+
+The following built-in functions are made available by @option{-mmmx}:
+@table @code
+@item v8qi __builtin_ia32_paddb (v8qi, v8qi)
+Generates the @code{paddb} machine instruction.
+@item v4hi __builtin_ia32_paddw (v4hi, v4hi)
+Generates the @code{paddw} machine instruction.
+@item v2si __builtin_ia32_paddd (v2si, v2si)
+Generates the @code{paddd} machine instruction.
+@item v8qi __builtin_ia32_psubb (v8qi, v8qi)
+Generates the @code{psubb} machine instruction.
+@item v4hi __builtin_ia32_psubw (v4hi, v4hi)
+Generates the @code{psubw} machine instruction.
+@item v2si __builtin_ia32_psubd (v2si, v2si)
+Generates the @code{psubd} machine instruction.
+
+@item v8qi __builtin_ia32_paddsb (v8qi, v8qi)
+Generates the @code{paddsb} machine instruction.
+@item v4hi __builtin_ia32_paddsw (v4hi, v4hi)
+Generates the @code{paddsw} machine instruction.
+@item v8qi __builtin_ia32_psubsb (v8qi, v8qi)
+Generates the @code{psubsb} machine instruction.
+@item v4hi __builtin_ia32_psubsw (v4hi, v4hi)
+Generates the @code{psubsw} machine instruction.
+
+@item v8qi __builtin_ia32_paddusb (v8qi, v8qi)
+Generates the @code{paddusb} machine instruction.
+@item v4hi __builtin_ia32_paddusw (v4hi, v4hi)
+Generates the @code{paddusw} machine instruction.
+@item v8qi __builtin_ia32_psubusb (v8qi, v8qi)
+Generates the @code{psubusb} machine instruction.
+@item v4hi __builtin_ia32_psubusw (v4hi, v4hi)
+Generates the @code{psubusw} machine instruction.
+
+@item v4hi __builtin_ia32_pmullw (v4hi, v4hi)
+Generates the @code{pmullw} machine instruction.
+@item v4hi __builtin_ia32_pmulhw (v4hi, v4hi)
+Generates the @code{pmulhw} machine instruction.
+
+@item di __builtin_ia32_pand (di, di)
+Generates the @code{pand} machine instruction.
+@item di __builtin_ia32_pandn (di,di)
+Generates the @code{pandn} machine instruction.
+@item di __builtin_ia32_por (di, di)
+Generates the @code{por} machine instruction.
+@item di __builtin_ia32_pxor (di, di)
+Generates the @code{pxor} machine instruction.
+
+@item v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi)
+Generates the @code{pcmpeqb} machine instruction.
+@item v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi)
+Generates the @code{pcmpeqw} machine instruction.
+@item v2si __builtin_ia32_pcmpeqd (v2si, v2si)
+Generates the @code{pcmpeqd} machine instruction.
+@item v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi)
+Generates the @code{pcmpgtb} machine instruction.
+@item v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi)
+Generates the @code{pcmpgtw} machine instruction.
+@item v2si __builtin_ia32_pcmpgtd (v2si, v2si)
+Generates the @code{pcmpgtd} machine instruction.
+
+@item v8qi __builtin_ia32_punpckhbw (v8qi, v8qi)
+Generates the @code{punpckhbw} machine instruction.
+@item v4hi __builtin_ia32_punpckhwd (v4hi, v4hi)
+Generates the @code{punpckhwd} machine instruction.
+@item v2si __builtin_ia32_punpckhdq (v2si, v2si)
+Generates the @code{punpckhdq} machine instruction.
+@item v8qi __builtin_ia32_punpcklbw (v8qi, v8qi)
+Generates the @code{punpcklbw} machine instruction.
+@item v4hi __builtin_ia32_punpcklwd (v4hi, v4hi)
+Generates the @code{punpcklwd} machine instruction.
+@item v2si __builtin_ia32_punpckldq (v2si, v2si)
+Generates the @code{punpckldq} machine instruction.
+
+@item v8qi __builtin_ia32_packsswb (v4hi, v4hi)
+Generates the @code{packsswb} machine instruction.
+@item v4hi __builtin_ia32_packssdw (v2si, v2si)
+Generates the @code{packssdw} machine instruction.
+@item v8qi __builtin_ia32_packuswb (v4hi, v4hi)
+Generates the @code{packuswb} machine instruction.
+
+@end table
+
+The following built-in functions are made available either with @option{-msse}, or
+with a combination of @option{-m3dnow} and @option{-march=athlon}.
+@table @code
+
+@item v4hi __builtin_ia32_pmulhuw (v4hi, v4hi)
+Generates the @code{pmulhuw} machine instruction.
+
+@item v8qi __builtin_ia32_pavgb (v8qi, v8qi)
+Generates the @code{pavgb} machine instruction.
+@item v4hi __builtin_ia32_pavgw (v4hi, v4hi)
+Generates the @code{pavgw} machine instruction.
+@item v4hi __builtin_ia32_psadbw (v8qi, v8qi)
+Generates the @code{psadbw} machine instruction.
+
+@item v8qi __builtin_ia32_pmaxub (v8qi, v8qi)
+Generates the @code{pmaxub} machine instruction.
+@item v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
+Generates the @code{pmaxsw} machine instruction.
+@item v8qi __builtin_ia32_pminub (v8qi, v8qi)
+Generates the @code{pminub} machine instruction.
+@item v4hi __builtin_ia32_pminsw (v4hi, v4hi)
+Generates the @code{pminsw} machine instruction.
+
+@item int __builtin_ia32_pextrw (v4hi, int)
+Generates the @code{pextrw} machine instruction.
+@item v4hi __builtin_ia32_pinsrw (v4hi, int, int)
+Generates the @code{pinsrw} machine instruction.
+
+@item int __builtin_ia32_pmovmskb (v8qi)
+Generates the @code{pmovmskb} machine instruction.
+@item void __builtin_ia32_maskmovq (v8qi, v8qi, char *)
+Generates the @code{maskmovq} machine instruction.
+@item void __buitlin_ia32_movntq (di *, di)
+Generates the @code{movntq} machine instruction.
+@item void __buitlin_ia32_sfence (void)
+Generates the @code{sfence} machine instruction.
+@item void __builtin_ia32_prefetch (char *, int selector)
+Generates a prefetch machine instruction, depending on the value of
+selector. If @code{selector} is 0, it generates @code{prefetchnta}; for
+a value of 1, it generates @code{prefetcht0}; for a value of 2, it generates
+@code{prefetcht1}; and for a value of 3 it generates @code{prefetcht2}.
+
+@end table
+
+The following built-in functions are available when @option{-msse} is used.
+
+@table @code
+@item int __buitlin_ia32_comieq (v4sf, v4sf)
+Generates the @code{comiss} machine instruction and performs an equality
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_comineq (v4sf, v4sf)
+Generates the @code{comiss} machine instruction and performs an inequality
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_comilt (v4sf, v4sf)
+Generates the @code{comiss} machine instruction and performs a ``less than''
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_comile (v4sf, v4sf)
+Generates the @code{comiss} machine instruction and performs a ``less or
+equal'' comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_comigt (v4sf, v4sf)
+Generates the @code{comiss} machine instruction and performs a ``greater than''
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_comige (v4sf, v4sf)
+Generates the @code{comiss} machine instruction and performs a ``greater or
+equal'' comparison. The return value is the truth value of that comparison.
+
+@item int __buitlin_ia32_ucomieq (v4sf, v4sf)
+Generates the @code{ucomiss} machine instruction and performs an equality
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_ucomineq (v4sf, v4sf)
+Generates the @code{ucomiss} machine instruction and performs an inequality
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_ucomilt (v4sf, v4sf)
+Generates the @code{ucomiss} machine instruction and performs a ``less than''
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_ucomile (v4sf, v4sf)
+Generates the @code{ucomiss} machine instruction and performs a ``less or
+equal'' comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_ucomigt (v4sf, v4sf)
+Generates the @code{ucomiss} machine instruction and performs a ``greater than''
+comparison. The return value is the truth value of that comparison.
+@item int __buitlin_ia32_ucomige (v4sf, v4sf)
+Generates the @code{ucomiss} machine instruction and performs a ``greater or
+equal'' comparison. The return value is the truth value of that comparison.
+
+@item v4sf __buitlin_ia32_addps (v4sf, v4sf)
+Generates the @code{addps} machine instruction.
+@item v4sf __buitlin_ia32_addss (v4sf, v4sf)
+Generates the @code{addss} machine instruction.
+@item v4sf __buitlin_ia32_subps (v4sf, v4sf)
+Generates the @code{subps} machine instruction.
+@item v4sf __buitlin_ia32_subss (v4sf, v4sf)
+Generates the @code{subss} machine instruction.
+@item v4sf __buitlin_ia32_mulps (v4sf, v4sf)
+Generates the @code{mulps} machine instruction.
+@item v4sf __buitlin_ia32_mulss (v4sf, v4sf)
+Generates the @code{mulss} machine instruction.
+@item v4sf __buitlin_ia32_divps (v4sf, v4sf)
+Generates the @code{divps} machine instruction.
+@item v4sf __buitlin_ia32_divss (v4sf, v4sf)
+Generates the @code{divss} machine instruction.
+
+@item v4si __buitlin_ia32_cmpeqps (v4sf, v4sf)
+Generates the @code{cmpeqps} machine instruction.
+@item v4si __buitlin_ia32_cmplts (v4sf, v4sf)
+Generates the @code{cmpltps} machine instruction.
+@item v4si __buitlin_ia32_cmpleps (v4sf, v4sf)
+Generates the @code{cmpleps} machine instruction.
+@item v4si __buitlin_ia32_cmpgtps (v4sf, v4sf)
+Generates the @code{cmpgtps} machine instruction.
+@item v4si __buitlin_ia32_cmpgeps (v4sf, v4sf)
+Generates the @code{cmpgeps} machine instruction.
+@item v4si __buitlin_ia32_cmpunordps (v4sf, v4sf)
+Generates the @code{cmpunodps} machine instruction.
+@item v4si __buitlin_ia32_cmpneqps (v4sf, v4sf)
+Generates the @code{cmpeqps} machine instruction.
+@item v4si __buitlin_ia32_cmpnltps (v4sf, v4sf)
+Generates the @code{cmpltps} machine instruction.
+@item v4si __buitlin_ia32_cmpnleps (v4sf, v4sf)
+Generates the @code{cmpleps} machine instruction.
+@item v4si __buitlin_ia32_cmpngtps (v4sf, v4sf)
+Generates the @code{cmpgtps} machine instruction.
+@item v4si __buitlin_ia32_cmpngeps (v4sf, v4sf)
+Generates the @code{cmpgeps} machine instruction.
+@item v4si __buitlin_ia32_cmpordps (v4sf, v4sf)
+Generates the @code{cmpunodps} machine instruction.
+
+@item v4si __buitlin_ia32_cmpeqss (v4sf, v4sf)
+Generates the @code{cmpeqss} machine instruction.
+@item v4si __buitlin_ia32_cmpltss (v4sf, v4sf)
+Generates the @code{cmpltss} machine instruction.
+@item v4si __buitlin_ia32_cmpless (v4sf, v4sf)
+Generates the @code{cmpless} machine instruction.
+@item v4si __buitlin_ia32_cmpgtss (v4sf, v4sf)
+Generates the @code{cmpgtss} machine instruction.
+@item v4si __buitlin_ia32_cmpgess (v4sf, v4sf)
+Generates the @code{cmpgess} machine instruction.
+@item v4si __buitlin_ia32_cmpunordss (v4sf, v4sf)
+Generates the @code{cmpunodss} machine instruction.
+@item v4si __buitlin_ia32_cmpneqss (v4sf, v4sf)
+Generates the @code{cmpeqss} machine instruction.
+@item v4si __buitlin_ia32_cmpnlts (v4sf, v4sf)
+Generates the @code{cmpltss} machine instruction.
+@item v4si __buitlin_ia32_cmpnless (v4sf, v4sf)
+Generates the @code{cmpless} machine instruction.
+@item v4si __buitlin_ia32_cmpngtss (v4sf, v4sf)
+Generates the @code{cmpgtss} machine instruction.
+@item v4si __buitlin_ia32_cmpngess (v4sf, v4sf)
+Generates the @code{cmpgess} machine instruction.
+@item v4si __buitlin_ia32_cmpordss (v4sf, v4sf)
+Generates the @code{cmpunodss} machine instruction.
+
+@item v4sf __buitlin_ia32_maxps (v4sf, v4sf)
+Generates the @code{maxps} machine instruction.
+@item v4sf __buitlin_ia32_maxsss (v4sf, v4sf)
+Generates the @code{maxss} machine instruction.
+@item v4sf __buitlin_ia32_minps (v4sf, v4sf)
+Generates the @code{minps} machine instruction.
+@item v4sf __buitlin_ia32_minsss (v4sf, v4sf)
+Generates the @code{minss} machine instruction.
+
+@item ti __buitlin_ia32_andps (ti, ti)
+Generates the @code{andps} machine instruction.
+@item ti __buitlin_ia32_andnps (ti, ti)
+Generates the @code{andnps} machine instruction.
+@item ti __buitlin_ia32_orps (ti, ti)
+Generates the @code{orps} machine instruction.
+@item ti __buitlin_ia32_xorps (ti, ti)
+Generates the @code{xorps} machine instruction.
+
+@item v4sf __buitlin_ia32_movps (v4sf, v4sf)
+Generates the @code{movps} machine instruction.
+@item v4sf __buitlin_ia32_movhlps (v4sf, v4sf)
+Generates the @code{movhlps} machine instruction.
+@item v4sf __buitlin_ia32_movlhps (v4sf, v4sf)
+Generates the @code{movlhps} machine instruction.
+@item v4sf __buitlin_ia32_unpckhps (v4sf, v4sf)
+Generates the @code{unpckhps} machine instruction.
+@item v4sf __buitlin_ia32_unpcklps (v4sf, v4sf)
+Generates the @code{unpcklps} machine instruction.
+
+@item v4sf __buitlin_ia32_cvtpi2ps (v4sf, v2si)
+Generates the @code{cvtpi2ps} machine instruction.
+@item v2si __buitlin_ia32_cvtps2pi (v4sf)
+Generates the @code{cvtps2pi} machine instruction.
+@item v4sf __buitlin_ia32_cvtsi2ss (v4sf, int)
+Generates the @code{cvtsi2ss} machine instruction.
+@item int __buitlin_ia32_cvtss2si (v4sf)
+Generates the @code{cvtsi2ss} machine instruction.
+@item v2si __buitlin_ia32_cvttps2pi (v4sf)
+Generates the @code{cvttps2pi} machine instruction.
+@item int __buitlin_ia32_cvttss2si (v4sf)
+Generates the @code{cvttsi2ss} machine instruction.
+
+@item v4sf __buitlin_ia32_rcpps (v4sf)
+Generates the @code{rcpps} machine instruction.
+@item v4sf __buitlin_ia32_rsqrtps (v4sf)
+Generates the @code{rsqrtps} machine instruction.
+@item v4sf __buitlin_ia32_sqrtps (v4sf)
+Generates the @code{sqrtps} machine instruction.
+@item v4sf __buitlin_ia32_rcpss (v4sf)
+Generates the @code{rcpss} machine instruction.
+@item v4sf __buitlin_ia32_rsqrtss (v4sf)
+Generates the @code{rsqrtss} machine instruction.
+@item v4sf __buitlin_ia32_sqrtss (v4sf)
+Generates the @code{sqrtss} machine instruction.
+
+@item v4sf __buitlin_ia32_shufps (v4sf, v4sf, int)
+Generates the @code{shufps} machine instruction.
+
+@item v4sf __buitlin_ia32_loadaps (float *)
+Generates the @code{movaps} machine instruction as a load from memory.
+@item void __buitlin_ia32_storeaps (float *, v4sf)
+Generates the @code{movaps} machine instruction as a store to memory.
+@item v4sf __buitlin_ia32_loadups (float *)
+Generates the @code{movups} machine instruction as a load from memory.
+@item void __buitlin_ia32_storeups (float *, v4sf)
+Generates the @code{movups} machine instruction as a store to memory.
+@item v4sf __buitlin_ia32_loadsss (float *)
+Generates the @code{movss} machine instruction as a load from memory.
+@item void __buitlin_ia32_storess (float *, v4sf)
+Generates the @code{movss} machine instruction as a store to memory.
+
+@item v4sf __buitlin_ia32_loadhps (v4sf, v2si *)
+Generates the @code{movhps} machine instruction as a load from memory.
+@item v4sf __buitlin_ia32_loadlps (v4sf, v2si *)
+Generates the @code{movlps} machine instruction as a load from memory
+@item void __buitlin_ia32_storehps (v4sf, v2si *)
+Generates the @code{movhps} machine instruction as a store to memory.
+@item void __buitlin_ia32_storelps (v4sf, v2si *)
+Generates the @code{movlps} machine instruction as a store to memory.
+
+@item void __buitlin_ia32_movntps (float *, v4sf)
+Generates the @code{movntps} machine instruction.
+@item int __buitlin_ia32_movmskps (v4sf)
+Generates the @code{movntps} machine instruction.
+
+@item void __buitlin_ia32_storeps1 (float *, v4sf)
+Generates the @code{movaps} machine instruction as a store to memory.
+Before storing, the value is modified with a @code{shufps} instruction
+so that the lowest of the four floating point elements is replicated
+across the entire vector that is stored.
+@item void __buitlin_ia32_storerps (float *, v4sf)
+Generates the @code{movaps} machine instruction as a store to memory.
+Before storing, the value is modified with a @code{shufps} instruction
+so that the order of the four floating point elements in the vector is
+reversed.
+@item v4sf __buitlin_ia32_loadps1 (float *)
+Generates a @code{movss} machine instruction to load a floating point
+value from memory, and a @code{shufps} instruction to replicate the
+loaded value across all four elements of the result vector.
+@item v4sf __buitlin_ia32_loadrps (float *)
+Generates a @code{movaps} machine instruction to load a vector from
+memory, and a @code{shufps} instruction to reverse the order of the
+four floating point elements in the result vector.
+@item v4sf __builtin_ia32_setps (float, float, float, float)
+Constructs a vector from four single floating point values. The return
+value is equal to the value that would result from storing the four
+arguments into consecutive memory locations and then executing a
+@code{movaps} to load the vector from memory.
+@item v4sf __builtin_ia32_setps1 (float)
+Constructs a vector from a single floating point value by replicating
+it across all four elements of the result vector.
+@end table
+
@item -mpush-args
+@itemx -mno-push-args
@opindex mpush-args
+@opindex mno-push-args
Use PUSH operations to store outgoing parameters. This method is shorter
and usually equally fast as method using SUB/MOV operations and is enabled
by default. In some cases disabling it may improve performance because of
@item -maccumulate-outgoing-args
@opindex maccumulate-outgoing-args
If enabled, the maximum amount of space required for outgoing arguments will be
-computed in the function prologue. This in faster on most modern CPUs
+computed in the function prologue. This is faster on most modern CPUs
because of reduced dependencies, improved scheduling and reduced stack usage
when preferred stack boundary is not equal to 2. The drawback is a notable
increase in code size. This switch implies @option{-mno-push-args}.
which might make debugging harder.
@end table
+These @samp{-m} switches are supported in addition to the above
+on AMD x86-64 processors in 64-bit environments.
+
+@table @gcctabopt
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for a 32-bit or 64-bit environment.
+The 32-bit environment sets int, long and pointer to 32 bits and
+generates code that runs on any i386 system.
+The 64-bit environment sets int to 32 bits and long and pointer
+to 64 bits and generates code for AMD's x86-64 architecture.
+
+@item -mno-red-zone
+@opindex no-red-zone
+Do not use a so called red zone for x86-64 code. The red zone is mandated
+by the x86-64 ABI, it is a 128-byte area beyond the location of the
+stack pointer that will not be modified by signal or interrupt handlers
+and therefore can be used for temporary data without adjusting the stack
+pointer. The flag @option{-mno-red-zone} disables this red zone.
+@end table
+
@node HPPA Options
@subsection HPPA Options
@cindex HPPA Options
point standard. However, for full compliance, software assistance is
required. This option generates code fully IEEE compliant code
@emph{except} that the @var{inexact-flag} is not maintained (see below).
-If this option is turned on, the CPP macro @code{_IEEE_FP} is defined
-during compilation. The option is a shorthand for: @option{-D_IEEE_FP
--mfp-trap-mode=su -mtrap-precision=i -mieee-conformant}. The resulting
-code is less efficient but is able to correctly support denormalized
-numbers and exceptional IEEE values such as not-a-number and plus/minus
-infinity. Other Alpha compilers call this option
-@option{-ieee_with_no_inexact}.
+If this option is turned on, the preprocessor macro @code{_IEEE_FP} is
+defined during compilation. The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional IEEE
+values such as not-a-number and plus/minus infinity. Other Alpha
+compilers call this option @option{-ieee_with_no_inexact}.
@item -mieee-with-inexact
@opindex mieee-with-inexact
-@c overfull hbox here --bob 22 jul96
-@c original text between ignore ... end ignore
-@ignore
-This is like @option{-mieee} except the generated code also maintains the
-IEEE @var{inexact-flag}. Turning on this option causes the generated
-code to implement fully-compliant IEEE math. The option is a shorthand
-for @option{-D_IEEE_FP -D_IEEE_FP_INEXACT} plus @option{-mieee-conformant},
-@option{-mfp-trap-mode=sui}, and @option{-mtrap-precision=i}. On some Alpha
-implementations the resulting code may execute significantly slower than
-the code generated by default. Since there is very little code that
-depends on the @var{inexact-flag}, you should normally not specify this
-option. Other Alpha compilers call this option
-@option{-ieee_with_inexact}.
-@end ignore
-@c changed paragraph
-This is like @option{-mieee} except the generated code also maintains the
-IEEE @var{inexact-flag}. Turning on this option causes the generated
-code to implement fully-compliant IEEE math. The option is a shorthand
-for @option{-D_IEEE_FP -D_IEEE_FP_INEXACT} plus the three following:
-@option{-mieee-conformant},
-@option{-mfp-trap-mode=sui},
-and @option{-mtrap-precision=i}.
-On some Alpha implementations the resulting code may execute
-significantly slower than the code generated by default. Since there
-is very little code that depends on the @var{inexact-flag}, you should
+This is like @option{-mieee} except the generated code also maintains
+the IEEE @var{inexact-flag}. Turning on this option causes the
+generated code to implement fully-compliant IEEE math. In addition to
+@code{_IEEE_FP}, @code{_IEEE_FP_EXACT} is defined as a preprocessor
+macro. On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default. Since there is
+very little code that depends on the @var{inexact-flag}, you should
normally not specify this option. Other Alpha compilers call this
option @option{-ieee_with_inexact}.
-@c end changes to prevent overfull hboxes
@item -mfp-trap-mode=@var{trap-mode}
@opindex mfp-trap-mode
@item -mc400
@opindex mc400
-Produce code for a C400 Clipper processor i.e.@: use floating point
-registers f8---f15.
+Produce code for a C400 Clipper processor, i.e.@: use floating point
+registers f8--f15.
@end table
@node H8/300 Options
Refrain from adding @code{.ident} directives to the output file (this is
the default).
-@item -YP\,@var{dirs}
+@item -YP,@var{dirs}
@opindex YP
Search the directories @var{dirs}, and no others, for libraries
specified with @option{-l}.
-@item -Ym\,@var{dir}
+@item -Ym,@var{dir}
@opindex Ym
Look in the directory @var{dir} to find the M4 preprocessor.
The assembler uses this option.
Enable (disable) generation of code using decrement and branch,
DBcond(D), instructions. This is enabled by default for the C4x. To be
on the safe side, this is disabled for the C3x, since the maximum
-iteration count on the C3x is 2^23 + 1 (but who iterates loops more than
-2^23 times on the C3x?). Note that GCC will try to reverse a loop so
+iteration count on the C3x is @math{2^23 + 1} (but who iterates loops more than
+@math{2^23} times on the C3x?). Note that GCC will try to reverse a loop so
that it can utilise the decrement and branch instruction, but will give
up if there is more than one memory reference in the loop. Thus a loop
where the loop counter is decremented can generate slightly more
@opindex mloop-unsigned
@opindex mno-loop-unsigned
The maximum iteration count when using RPTS and RPTB (and DB on the C40)
-is 2^31 + 1 since these instructions test if the iteration count is
+is @math{2^31 + 1} since these instructions test if the iteration count is
negative to terminate the loop. If the iteration count is unsigned
-there is a possibility than the 2^31 + 1 maximum iteration count may be
+there is a possibility than the @math{2^31 + 1} maximum iteration count may be
exceeded. This switch allows an unsigned iteration count.
@item -mti
@item -minit-stack=@var{N}
@opindex minit-stack
Specify the initial stack address, which may be a symbol or numeric value,
-__stack is the default.
+@samp{__stack} is the default.
@item -mno-interrupts
@opindex mno-interrupts
replace a branch. The default is 4.
@end table
+@node S/390 and zSeries Options
+@subsection S/390 and zSeries Options
+@cindex S/390 and zSeries Options
+
+These are the @samp{-m} options defined for the S/390 and zSeries architecture.
+
+@table @gcctabopt
+@item -mhard-float
+@itemx -msoft-float
+@opindex mhard-float
+@opindex msoft-float
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations. When @option{-msoft-float} is specified,
+functions in @file{libgcc.a} will be used to perform floating-point
+operations. When @option{-mhard-float} is specified, the compiler
+generates IEEE floating-point instructions. This is the default.
+
+@item -mbackchain
+@itemx -mno-backchain
+@opindex mbackchain
+@opindex mno-backchain
+Generate (or do not generate) code which maintains an explicit
+backchain within the stack frame that points to the caller's frame.
+This is currently needed to allow debugging. The default is to
+generate the backchain.
+
+@item -msmall-exec
+@itemx -mno-small-exec
+@opindex msmall-exec
+@opindex mno-small-exec
+Generate (or do not generate) code using the @code{bras} instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k. The default is to use the @code{basr} instruction instead,
+which does not have this limitation.
+
+@item -m64
+@itemx -m31
+@opindex m64
+@opindex m31
+When @option{-m31} is specified, generate code compliant to the
+Linux for S/390 ABI@. When @option{-m64} is specified, generate
+code compliant to the Linux for zSeries ABI@. This allows GCC in
+particular to generate 64-bit instructions. For the @samp{s390}
+targets, the default is @option{-m31}, while the @samp{s390x}
+targets default to @option{-m64}.
+
+@item -mmvcle
+@itemx -mno-mvcle
+@opindex mmvcle
+@opindex mno-mvcle
+Generate (or do not generate) code using the @code{mvcle} instruction
+to perform block moves. When @option{-mno-mvcle} is specifed,
+use a @code{mvc} loop instead. This is the default.
+
+@item -mdebug
+@itemx -mno-debug
+@opindex mdebug
+@opindex mno-debug
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+
+@end table
+
+
@node Code Gen Options
@section Options for Code Generation Conventions
@cindex code generation conventions
@item -freg-struct-return
@opindex freg-struct-return
-Use the convention that @code{struct} and @code{union} values are
-returned in registers when possible. This is more efficient for small
-structures than @option{-fpcc-struct-return}.
+Return @code{struct} and @code{union} values in registers when possible.
+This is more efficient for small structures than
+@option{-fpcc-struct-return}.
-If you specify neither @option{-fpcc-struct-return} nor its contrary
+If you specify neither @option{-fpcc-struct-return} nor
@option{-freg-struct-return}, GCC defaults to whichever convention is
standard for the target. If there is no standard convention, GCC
-defaults to @option{-fpcc-struct-return}, except on targets where GCC
-is the principal compiler. In those cases, we can choose the standard,
-and we chose the more efficient register return alternative.
+defaults to @option{-fpcc-struct-return}, except on targets where GCC is
+the principal compiler. In those cases, we can choose the standard, and
+we chose the more efficient register return alternative.
@item -fshort-enums
@opindex fshort-enums
the signal is raised before the stack overruns the boundary, so
it is possible to catch the signal without taking special precautions.
-For instance, if the stack starts at address @samp{0x80000000} and grows
-downwards you can use the flags
-@samp{-fstack-limit-symbol=__stack_limit
--Wl,--defsym,__stack_limit=0x7ffe0000} which will enforce a stack
-limit of 128K@.
+For instance, if the stack starts at absolute address @samp{0x80000000}
+and grows downwards, you can use the flags
+@option{-fstack-limit-symbol=__stack_limit} and
+@option{-Wl,--defsym,__stack_limit=0x7ffe0000} to enforce a stack limit
+of 128KB@. Note that this may only work with the GNU linker.
@cindex aliasing of parameters
@cindex parameters, aliased
parameters and global data.
@option{-fargument-alias} specifies that arguments (parameters) may
-alias each other and may alias global storage.
+alias each other and may alias global storage.@*
@option{-fargument-noalias} specifies that arguments do not alias
-each other, but may alias global storage.
+each other, but may alias global storage.@*
@option{-fargument-noalias-global} specifies that arguments do not
alias each other and do not alias global storage.
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