Support expansion of reserved locations wrapped in virtual locations

[pf3gnuchains/gcc-fork.git] / gcc / cse.c

diff --git a/gcc/cse.c b/gcc/cse.c
index da4b1e1..ae67685 100644 (file)
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -475,8 +475,8 @@ struct table_elt
    || (HARD_REGISTER_NUM_P (N)                                         \
        && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
 
-#define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
-#define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
+#define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
+#define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
 
 /* Get the number of times this register has been updated in this
    basic block.  */
@@ -552,7 +552,7 @@ static bitmap cse_ebb_live_in, cse_ebb_live_out;
 static sbitmap cse_visited_basic_blocks;
 
 static bool fixed_base_plus_p (rtx x);
-static int notreg_cost (rtx, enum rtx_code);
+static int notreg_cost (rtx, enum rtx_code, int);
 static int approx_reg_cost_1 (rtx *, void *);
 static int approx_reg_cost (rtx);
 static int preferable (int, int, int, int);
@@ -752,7 +752,7 @@ preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
    from COST macro to keep it simple.  */
 
 static int
-notreg_cost (rtx x, enum rtx_code outer)
+notreg_cost (rtx x, enum rtx_code outer, int opno)
 {
   return ((GET_CODE (x) == SUBREG
           && REG_P (SUBREG_REG (x))
@@ -764,7 +764,7 @@ notreg_cost (rtx x, enum rtx_code outer)
           && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x),
                                             GET_MODE (SUBREG_REG (x))))
          ? 0
-         : rtx_cost (x, outer, optimize_this_for_speed_p) * 2);
+         : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2);
 }
 
 \f
@@ -1637,8 +1637,10 @@ insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
          /* Put it after the last element cheaper than X.  */
          struct table_elt *p, *next;
 
-         for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
-              p = next);
+         for (p = classp;
+              (next = p->next_same_value) && CHEAPER (next, elt);
+              p = next)
+           ;
 
          /* Put it after P and before NEXT.  */
          elt->next_same_value = next;
@@ -3294,7 +3296,7 @@ fold_rtx (rtx x, rtx insn)
           argument.  */
        if (const_arg != 0
            && const_arg != folded_arg
-           && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
+           && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i)
 
            /* It's not safe to substitute the operand of a conversion
               operator with a constant, as the conversion's identity
@@ -3650,7 +3652,7 @@ fold_rtx (rtx x, rtx insn)
              enum rtx_code associate_code;
 
              if (is_shift
-                 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
+                 && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode)
                      || INTVAL (const_arg1) < 0))
                {
                  if (SHIFT_COUNT_TRUNCATED)
@@ -3699,7 +3701,7 @@ fold_rtx (rtx x, rtx insn)
                 break;
 
              if (is_shift
-                 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
+                 && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode)
                      || INTVAL (inner_const) < 0))
                {
                  if (SHIFT_COUNT_TRUNCATED)
@@ -3729,7 +3731,7 @@ fold_rtx (rtx x, rtx insn)
 
              if (is_shift
                  && CONST_INT_P (new_const)
-                 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
+                 && INTVAL (new_const) >= GET_MODE_PRECISION (mode))
                {
                  /* As an exception, we can turn an ASHIFTRT of this
                     form into a shift of the number of bits - 1.  */
@@ -4672,13 +4674,13 @@ cse_insn (rtx insn)
 
       if (src_const && src_related == 0 && CONST_INT_P (src_const)
          && GET_MODE_CLASS (mode) == MODE_INT
-         && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
+         && GET_MODE_PRECISION (mode) < BITS_PER_WORD)
        {
          enum machine_mode wider_mode;
 
          for (wider_mode = GET_MODE_WIDER_MODE (mode);
               wider_mode != VOIDmode
-              && GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
+              && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD
               && src_related == 0;
               wider_mode = GET_MODE_WIDER_MODE (wider_mode))
            {
@@ -5031,7 +5033,7 @@ cse_insn (rtx insn)
              && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
              && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
              && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
-             && (GET_MODE_BITSIZE (GET_MODE (SET_DEST (sets[i].rtl)))
+             && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl)))
                  >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))
              && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
                  + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
@@ -5058,7 +5060,7 @@ cse_insn (rtx insn)
                  HOST_WIDE_INT mask;
                  unsigned int shift;
                  if (BITS_BIG_ENDIAN)
-                   shift = GET_MODE_BITSIZE (GET_MODE (dest_reg))
+                   shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
                            - INTVAL (pos) - INTVAL (width);
                  else
                    shift = INTVAL (pos);