Patch from Nick Clifton.

[pf3gnuchains/gcc-fork.git] / gcc / config / sh / sh.h

diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index d83996f..32cbb2c 100644 (file)
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -1,23 +1,23 @@
-/* Definitions of target machine for GNU compiler for Hitachi / SuperH SH.
+/* Definitions of target machine for GNU compiler for Renesas / SuperH SH.

    Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
    Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,

-   2003 Free Software Foundation, Inc.
+   2003, 2004 Free Software Foundation, Inc.

    Contributed by Steve Chamberlain (sac@cygnus.com).
    Improved by Jim Wilson (wilson@cygnus.com).
 
    Contributed by Steve Chamberlain (sac@cygnus.com).
    Improved by Jim Wilson (wilson@cygnus.com).
 

-This file is part of GNU CC.
+This file is part of GCC.

 
 

-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify

 it under the terms of the GNU General Public License as published by
 the Free Software Foundation; either version 2, or (at your option)
 any later version.
 
 it under the terms of the GNU General Public License as published by
 the Free Software Foundation; either version 2, or (at your option)
 any later version.
 

-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,

 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License

-along with GNU CC; see the file COPYING.  If not, write to
+along with GCC; see the file COPYING.  If not, write to

 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 


@@ -102,7 +102,7 @@ do { \
     }                                                                  \
   if (flag_pic)                                                                \
     fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;                           \
     }                                                                  \
   if (flag_pic)                                                                \
     fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;                           \

-  /* Hitachi saves and restores mac registers on call.  */             \
+  /* Renesas saves and restores mac registers on call.  */             \

   if (TARGET_HITACHI && ! TARGET_NOMACSAVE)                            \
     {                                                                  \
       call_used_regs[MACH_REG] = 0;                                    \
   if (TARGET_HITACHI && ! TARGET_NOMACSAVE)                            \
     {                                                                  \
       call_used_regs[MACH_REG] = 0;                                    \


@@ -150,6 +150,10 @@ extern int target_flags;
 #define PADSTRUCT_BIT  (1<<28)
 #define LITTLE_ENDIAN_BIT (1<<29)
 #define IEEE_BIT (1<<30)
 #define PADSTRUCT_BIT  (1<<28)
 #define LITTLE_ENDIAN_BIT (1<<29)
 #define IEEE_BIT (1<<30)

+#define SAVE_ALL_TR_BIT (1<<2)
+
+/* Nonzero if this is an ELF target - compile time only */
+#define TARGET_ELF 0

 
 /* Nonzero if we should dump out instruction size info.  */
 #define TARGET_DUMPISIZE  (target_flags & ISIZE_BIT)
 
 /* Nonzero if we should dump out instruction size info.  */
 #define TARGET_DUMPISIZE  (target_flags & ISIZE_BIT)


@@ -235,14 +239,14 @@ extern int target_flags;
    to do function call relaxing.  */
 #define TARGET_RELAX (target_flags & RELAX_BIT)
 
    to do function call relaxing.  */
 #define TARGET_RELAX (target_flags & RELAX_BIT)
 

-/* Nonzero if using Hitachi's calling convention.  */
+/* Nonzero if using Renesas's calling convention.  */

 #define TARGET_HITACHI                 (target_flags & HITACHI_BIT)
 
 /* Nonzero if not saving macl/mach when using -mhitachi */
 #define TARGET_NOMACSAVE       (target_flags & NOMACSAVE_BIT)
 
 /* Nonzero if padding structures to a multiple of 4 bytes.  This is
 #define TARGET_HITACHI                 (target_flags & HITACHI_BIT)
 
 /* Nonzero if not saving macl/mach when using -mhitachi */
 #define TARGET_NOMACSAVE       (target_flags & NOMACSAVE_BIT)
 
 /* Nonzero if padding structures to a multiple of 4 bytes.  This is

-   incompatible with Hitachi's compiler, and gives unusual structure layouts
+   incompatible with Renesas's compiler, and gives unusual structure layouts

    which confuse programmers.
    ??? This option is not useful, but is retained in case there are people
    who are still relying on it.  It may be deleted in the future.  */
    which confuse programmers.
    ??? This option is not useful, but is retained in case there are people
    who are still relying on it.  It may be deleted in the future.  */


@@ -257,6 +261,8 @@ extern int target_flags;
 /* Nonzero if we should prefer @GOT calls when generating PIC.  */
 #define TARGET_PREFERGOT       (target_flags & PREFERGOT_BIT)
 
 /* Nonzero if we should prefer @GOT calls when generating PIC.  */
 #define TARGET_PREFERGOT       (target_flags & PREFERGOT_BIT)
 

+#define TARGET_SAVE_ALL_TARGET_REGS (target_flags & SAVE_ALL_TR_BIT)
+

 #define SELECT_SH1               (SH1_BIT)
 #define SELECT_SH2               (SH2_BIT | SELECT_SH1)
 #define SELECT_SH2E              (SH_E_BIT | SH2_BIT | SH1_BIT | FPU_SINGLE_BIT)
 #define SELECT_SH1               (SH1_BIT)
 #define SELECT_SH2               (SH2_BIT | SELECT_SH1)
 #define SELECT_SH2E              (SH_E_BIT | SH2_BIT | SH1_BIT | FPU_SINGLE_BIT)


@@ -313,6 +319,7 @@ extern int target_flags;
   {"dalign",   DALIGN_BIT, "Aligns doubles at 64-bit boundaries" },            \
   {"fmovd",    FMOVD_BIT, "" },                \
   {"hitachi",  HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" },                \
   {"dalign",   DALIGN_BIT, "Aligns doubles at 64-bit boundaries" },            \
   {"fmovd",    FMOVD_BIT, "" },                \
   {"hitachi",  HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" },                \

+  {"renesas",  HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" },                \

   {"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" },                \
   {"ieee",     IEEE_BIT, "Increase the IEEE compliance for floating-point code" },                     \
   {"isize",    ISIZE_BIT, "" },                \
   {"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" },                \
   {"ieee",     IEEE_BIT, "Increase the IEEE compliance for floating-point code" },                     \
   {"isize",    ISIZE_BIT, "" },                \


@@ -417,6 +424,12 @@ do {                                                                       \
     flag_omit_frame_pointer = -1;                                      \
   if (SIZE)                                                            \
     target_flags |= SPACE_BIT;                                         \
     flag_omit_frame_pointer = -1;                                      \
   if (SIZE)                                                            \
     target_flags |= SPACE_BIT;                                         \

+  if (TARGET_SHMEDIA && LEVEL > 1)                                     \
+    {                                                                  \
+      flag_branch_target_load_optimize = 1;                            \
+      if (! (SIZE))                                                    \
+       target_flags |= SAVE_ALL_TR_BIT;                                \
+    }                                                                  \

 } while (0)
 
 #define ASSEMBLER_DIALECT assembler_dialect
 } while (0)
 
 #define ASSEMBLER_DIALECT assembler_dialect


@@ -503,7 +516,11 @@ do {                                                                       \
       /* Never run scheduling before reload, since that can            \
         break global alloc, and generates slower code anyway due       \
         to the pressure on R0.  */                                     \
       /* Never run scheduling before reload, since that can            \
         break global alloc, and generates slower code anyway due       \
         to the pressure on R0.  */                                     \

-      flag_schedule_insns = 0;                                         \
+      /* Enable sched1 for SH4; ready queue will be reordered by       \
+        the target hooks when pressure is high. We can not do this for \
+        SH3 and lower as they give spill failures for R0.  */          \
+      if (!TARGET_HARD_SH4)                                            \
+        flag_schedule_insns = 0;                                       \

     }                                                                  \
                                                                        \
   if (align_loops == 0)                                                        \
     }                                                                  \
                                                                        \
   if (align_loops == 0)                                                        \


@@ -560,10 +577,8 @@ do {                                                                       \
 
 #define MAX_BITS_PER_WORD 64
 
 
 #define MAX_BITS_PER_WORD 64
 

-#define MAX_LONG_TYPE_SIZE MAX_BITS_PER_WORD
-

 /* Width in bits of an `int'.  We want just 32-bits, even if words are
 /* Width in bits of an `int'.  We want just 32-bits, even if words are

-   longer. */
+   longer.  */

 #define INT_TYPE_SIZE 32
 
 /* Width in bits of a `long'.  */
 #define INT_TYPE_SIZE 32
 
 /* Width in bits of a `long'.  */


@@ -579,6 +594,13 @@ do {                                                                       \
 #define UNITS_PER_WORD (TARGET_SHMEDIA ? 8 : 4)
 #define MIN_UNITS_PER_WORD 4
 
 #define UNITS_PER_WORD (TARGET_SHMEDIA ? 8 : 4)
 #define MIN_UNITS_PER_WORD 4
 

+/* Scaling factor for Dwarf data offsets for CFI information.
+   The dwarf2out.c default would use -UNITS_PER_WORD, which is -8 for
+   SHmedia; however, since we do partial register saves for the registers
+   visible to SHcompact, and for target registers for SHMEDIA32, we have
+   to allow saves that are only 4-byte aligned.  */
+#define DWARF_CIE_DATA_ALIGNMENT -4
+

 /* Width in bits of a pointer.
    See also the macro `Pmode' defined below.  */
 #define POINTER_SIZE  (TARGET_SHMEDIA64 ? 64 : 32)
 /* Width in bits of a pointer.
    See also the macro `Pmode' defined below.  */
 #define POINTER_SIZE  (TARGET_SHMEDIA64 ? 64 : 32)


@@ -622,19 +644,13 @@ do {                                                                      \
 /* get_mode_alignment assumes complex values are always held in multiple
    registers, but that is not the case on the SH; CQImode and CHImode are
    held in a single integer register.  SH5 also holds CSImode and SCmode
 /* get_mode_alignment assumes complex values are always held in multiple
    registers, but that is not the case on the SH; CQImode and CHImode are
    held in a single integer register.  SH5 also holds CSImode and SCmode

-   values in integer regsters.  Thus the alignment needs to be bumped up
-   to match the size of the mode.  */
-#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \
-  (MAX ((GET_MODE_CLASS (TYPE_MODE (STRUCT)) == MODE_COMPLEX_INT \
-        || GET_MODE_CLASS (TYPE_MODE (STRUCT)) == MODE_COMPLEX_FLOAT) \
-       ? MIN (BIGGEST_ALIGNMENT, GET_MODE_BITSIZE (TYPE_MODE (STRUCT))) \
-       : (COMPUTED), \
-       (SPECIFIED)))
+   values in integer registers.  This is relevant for argument passing on
+   SHcompact as we use a stack temp in order to pass CSImode by reference.  */

 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
   ((GET_MODE_CLASS (TYPE_MODE (TYPE)) == MODE_COMPLEX_INT \
     || GET_MODE_CLASS (TYPE_MODE (TYPE)) == MODE_COMPLEX_FLOAT) \
 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
   ((GET_MODE_CLASS (TYPE_MODE (TYPE)) == MODE_COMPLEX_INT \
     || GET_MODE_CLASS (TYPE_MODE (TYPE)) == MODE_COMPLEX_FLOAT) \

-   ? MIN (BIGGEST_ALIGNMENT, GET_MODE_BITSIZE (TYPE_MODE (TYPE))) \
-   : ALIGN)
+   ? (unsigned) MIN (BIGGEST_ALIGNMENT, GET_MODE_BITSIZE (TYPE_MODE (TYPE))) \
+   : (unsigned) ALIGN)

 
 /* Make arrays of chars word-aligned for the same reasons.  */
 #define DATA_ALIGNMENT(TYPE, ALIGN)            \
 
 /* Make arrays of chars word-aligned for the same reasons.  */
 #define DATA_ALIGNMENT(TYPE, ALIGN)            \


@@ -682,7 +698,7 @@ do {                                                                        \
 \f
 /* Standard register usage.  */
 
 \f
 /* Standard register usage.  */
 

-/* Register allocation for the Hitachi calling convention:
+/* Register allocation for the Renesas calling convention:

 
         r0             arg return
        r1..r3          scratch
 
         r0             arg return
        r1..r3          scratch


@@ -729,8 +745,6 @@ extern char sh_register_names[][MAX_REGISTER_NAME_LENGTH + 1];
   "rap"                                                                        \
 }
 
   "rap"                                                                        \
 }
 

-#define DEBUG_REGISTER_NAMES SH_REGISTER_NAMES_INITIALIZER
-

 #define REGNAMES_ARR_INDEX_1(index) \
   (sh_register_names[index])
 #define REGNAMES_ARR_INDEX_2(index) \
 #define REGNAMES_ARR_INDEX_1(index) \
   (sh_register_names[index])
 #define REGNAMES_ARR_INDEX_2(index) \


@@ -810,16 +824,18 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 #define LAST_TARGET_REG  (FIRST_TARGET_REG + (TARGET_SHMEDIA ? 7 : -1))
 
 #define GENERAL_REGISTER_P(REGNO) \
 #define LAST_TARGET_REG  (FIRST_TARGET_REG + (TARGET_SHMEDIA ? 7 : -1))
 
 #define GENERAL_REGISTER_P(REGNO) \

-  IN_RANGE ((REGNO), FIRST_GENERAL_REG, LAST_GENERAL_REG)
+  IN_RANGE ((REGNO), \
+           (unsigned HOST_WIDE_INT) FIRST_GENERAL_REG, \
+           (unsigned HOST_WIDE_INT) LAST_GENERAL_REG)

 
 #define GENERAL_OR_AP_REGISTER_P(REGNO) \
   (GENERAL_REGISTER_P (REGNO) || ((REGNO) == AP_REG))
 
 #define FP_REGISTER_P(REGNO) \
 
 #define GENERAL_OR_AP_REGISTER_P(REGNO) \
   (GENERAL_REGISTER_P (REGNO) || ((REGNO) == AP_REG))
 
 #define FP_REGISTER_P(REGNO) \

-  ((REGNO) >= FIRST_FP_REG && (REGNO) <= LAST_FP_REG)
+  ((int) (REGNO) >= FIRST_FP_REG && (int) (REGNO) <= LAST_FP_REG)

 
 #define XD_REGISTER_P(REGNO) \
 
 #define XD_REGISTER_P(REGNO) \

-  ((REGNO) >= FIRST_XD_REG && (REGNO) <= LAST_XD_REG)
+  ((int) (REGNO) >= FIRST_XD_REG && (int) (REGNO) <= LAST_XD_REG)

 
 #define FP_OR_XD_REGISTER_P(REGNO) \
   (FP_REGISTER_P (REGNO) || XD_REGISTER_P (REGNO))
 
 #define FP_OR_XD_REGISTER_P(REGNO) \
   (FP_REGISTER_P (REGNO) || XD_REGISTER_P (REGNO))


@@ -832,7 +848,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
    || (REGNO) == MACH_REG || (REGNO) == MACL_REG)
 
 #define TARGET_REGISTER_P(REGNO) \
    || (REGNO) == MACH_REG || (REGNO) == MACL_REG)
 
 #define TARGET_REGISTER_P(REGNO) \

-  ((REGNO) >= FIRST_TARGET_REG && (REGNO) <= LAST_TARGET_REG)
+  ((int) (REGNO) >= FIRST_TARGET_REG && (int) (REGNO) <= LAST_TARGET_REG)

 
 #define SHMEDIA_REGISTER_P(REGNO) \
   (GENERAL_REGISTER_P (REGNO) || FP_REGISTER_P (REGNO) \
 
 #define SHMEDIA_REGISTER_P(REGNO) \
   (GENERAL_REGISTER_P (REGNO) || FP_REGISTER_P (REGNO) \


@@ -911,7 +927,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
      Only the lower 32bits of R10-R14 are guaranteed to be preserved   \
      across SH5 function calls.  */                                    \
   0,      0,      0,      0,      0,      0,      0,      1,           \
      Only the lower 32bits of R10-R14 are guaranteed to be preserved   \
      across SH5 function calls.  */                                    \
   0,      0,      0,      0,      0,      0,      0,      1,           \

-  1,      1,      0,      1,      1,      1,      1,      1,           \
+  1,      1,      1,      1,      1,      1,      1,      1,           \

   1,      1,      1,      1,      0,      0,      0,      0,           \
   0,      0,      0,      0,      1,      1,      1,      1,           \
   1,      1,      1,      1,      0,      0,      0,      0,           \
   1,      1,      1,      1,      0,      0,      0,      0,           \
   0,      0,      0,      0,      1,      1,      1,      1,           \
   1,      1,      1,      1,      0,      0,      0,      0,           \


@@ -931,7 +947,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 /* XD registers.  */                                                   \
   1,      1,      1,      1,      1,      1,      0,      0,           \
 /*"gbr",  "ap",          "pr",   "t",    "mach", "macl", "fpul", "fpscr", */   \
 /* XD registers.  */                                                   \
   1,      1,      1,      1,      1,      1,      0,      0,           \
 /*"gbr",  "ap",          "pr",   "t",    "mach", "macl", "fpul", "fpscr", */   \

-  1,      1,      0,      1,      1,      1,      1,      1,           \
+  1,      1,      1,      1,      1,      1,      1,      1,           \

 /*"rap" */                                                             \
   1,                                                                   \
 }
 /*"rap" */                                                             \
   1,                                                                   \
 }


@@ -945,7 +961,8 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
   (TARGET_SHMEDIA32 \
    && GET_MODE_SIZE (MODE) > 4 \
    && (((REGNO) >= FIRST_GENERAL_REG + 10 \
   (TARGET_SHMEDIA32 \
    && GET_MODE_SIZE (MODE) > 4 \
    && (((REGNO) >= FIRST_GENERAL_REG + 10 \

-        && (REGNO) <= FIRST_GENERAL_REG + 14) \
+        && (REGNO) <= FIRST_GENERAL_REG + 15) \
+       || TARGET_REGISTER_P (REGNO) \

        || (REGNO) == PR_MEDIA_REG))
 
 /* Return number of consecutive hard regs needed starting at reg REGNO
        || (REGNO) == PR_MEDIA_REG))
 
 /* Return number of consecutive hard regs needed starting at reg REGNO


@@ -1002,7 +1019,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
    ? (MODE) == DFmode \
    : TARGET_REGISTER_P (REGNO) \
    ? ((MODE) == DImode || (MODE) == SImode) \
    ? (MODE) == DFmode \
    : TARGET_REGISTER_P (REGNO) \
    ? ((MODE) == DImode || (MODE) == SImode) \

-   : (REGNO) == PR_REG ? 0                     \
+   : (REGNO) == PR_REG ? (MODE) == SImode \

    : (REGNO) == FPSCR_REG ? (MODE) == PSImode \
    : 1)
 
    : (REGNO) == FPSCR_REG ? (MODE) == PSImode \
    : 1)
 


@@ -1110,31 +1127,9 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 /* Register in which the static-chain is passed to a function.  */
 #define STATIC_CHAIN_REGNUM    (TARGET_SH5 ? 1 : 3)
 
 /* Register in which the static-chain is passed to a function.  */
 #define STATIC_CHAIN_REGNUM    (TARGET_SH5 ? 1 : 3)
 

-/* The register in which a struct value address is passed.  */
-
-#define STRUCT_VALUE_REGNUM 2
-
-/* If the structure value address is not passed in a register, define
-   `STRUCT_VALUE' as an expression returning an RTX for the place
-   where the address is passed.  If it returns 0, the address is
-   passed as an "invisible" first argument.  */
-
-/* The Hitachi calling convention doesn't quite fit into this scheme since
-   the address is passed like an invisible argument, but one that is always
-   passed in memory.  */
-#define STRUCT_VALUE \
-  (TARGET_HITACHI ? 0 : gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM))
-
-#define RETURN_IN_MEMORY(TYPE) \
-  (TARGET_SH5 \
-   ? ((TYPE_MODE (TYPE) == BLKmode \
-       ? (unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) \
-       : GET_MODE_SIZE (TYPE_MODE (TYPE))) > 8) \
-   : (TYPE_MODE (TYPE) == BLKmode \
-      || TARGET_HITACHI && TREE_CODE (TYPE) == RECORD_TYPE))
-

 /* Don't default to pcc-struct-return, because we have already specified
 /* Don't default to pcc-struct-return, because we have already specified

-   exactly how to return structures in the RETURN_IN_MEMORY macro.  */
+   exactly how to return structures in the TARGET_RETURN_IN_MEMORY
+   target hook.  */

 
 #define DEFAULT_PCC_STRUCT_RETURN 0
 
 
 #define DEFAULT_PCC_STRUCT_RETURN 0
 


@@ -1260,14 +1255,14 @@ enum reg_class
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff },      \
 /* ALL_REGS:  */                                                       \
   { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x01ffffff },      \
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff },      \
 /* ALL_REGS:  */                                                       \
   { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x01ffffff },      \

-}                                                                       
+}

 
 /* The same information, inverted:
    Return the class number of the smallest class containing
    reg number REGNO.  This could be a conditional expression
    or could index an array.  */
 
 
 /* The same information, inverted:
    Return the class number of the smallest class containing
    reg number REGNO.  This could be a conditional expression
    or could index an array.  */
 

-extern int regno_reg_class[FIRST_PSEUDO_REGISTER];
+extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];

 #define REGNO_REG_CLASS(REGNO) regno_reg_class[(REGNO)]
 
 /* When defined, the compiler allows registers explicitly used in the
 #define REGNO_REG_CLASS(REGNO) regno_reg_class[(REGNO)]
 
 /* When defined, the compiler allows registers explicitly used in the


@@ -1353,11 +1348,13 @@ extern enum reg_class reg_class_from_letter[];
    unused CONST_INT constraint letters: LO
    unused EXTRA_CONSTRAINT letters: D T U Y */
 
    unused CONST_INT constraint letters: LO
    unused EXTRA_CONSTRAINT letters: D T U Y */
 

-#if 1 /* check that the transistion went well.  */
+#if 1 /* check that the transition went well.  */

 #define CONSTRAINT_LEN(C,STR) \
   (((C) == 'L' || (C) == 'O' || (C) == 'D' || (C) == 'T' || (C) == 'U' \
     || (C) == 'Y' \
 #define CONSTRAINT_LEN(C,STR) \
   (((C) == 'L' || (C) == 'O' || (C) == 'D' || (C) == 'T' || (C) == 'U' \
     || (C) == 'Y' \

-    || ((C) == 'I' && (((STR)[1] != '0' && (STR)[1] != '1') || ! isdigit ((STR)[2]))) \
+    || ((C) == 'I' \
+        && (((STR)[1] != '0' && (STR)[1] != '1') \
+           || (STR)[2] < '0' || (STR)[2] > '9')) \

     || ((C) == 'B' && ((STR)[1] != 's' || (STR)[2] != 'c')) \
     || ((C) == 'J' && ((STR)[1] != '1' || (STR)[2] != '6')) \
     || ((C) == 'K' && ((STR)[1] != '0' || (STR)[2] != '8')) \
     || ((C) == 'B' && ((STR)[1] != 's' || (STR)[2] != 'c')) \
     || ((C) == 'J' && ((STR)[1] != '1' || (STR)[2] != '6')) \
     || ((C) == 'K' && ((STR)[1] != '0' || (STR)[2] != '8')) \


@@ -1638,7 +1635,7 @@ extern enum reg_class reg_class_from_letter[];
    tested here has to be kept in sync with the one in explow.c:promote_mode.  */
 
 #define FUNCTION_VALUE(VALTYPE, FUNC)                                  \
    tested here has to be kept in sync with the one in explow.c:promote_mode.  */
 
 #define FUNCTION_VALUE(VALTYPE, FUNC)                                  \

-  gen_rtx (REG,                                                                \
+  gen_rtx_REG (                                                                \

           ((GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_INT           \
             && GET_MODE_SIZE (TYPE_MODE (VALTYPE)) < UNITS_PER_WORD    \
             && (TREE_CODE (VALTYPE) == INTEGER_TYPE                    \
           ((GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_INT           \
             && GET_MODE_SIZE (TYPE_MODE (VALTYPE)) < UNITS_PER_WORD    \
             && (TREE_CODE (VALTYPE) == INTEGER_TYPE                    \


@@ -1647,9 +1644,10 @@ extern enum reg_class reg_class_from_letter[];
                 || TREE_CODE (VALTYPE) == CHAR_TYPE                    \
                 || TREE_CODE (VALTYPE) == REAL_TYPE                    \
                 || TREE_CODE (VALTYPE) == OFFSET_TYPE))                \
                 || TREE_CODE (VALTYPE) == CHAR_TYPE                    \
                 || TREE_CODE (VALTYPE) == REAL_TYPE                    \
                 || TREE_CODE (VALTYPE) == OFFSET_TYPE))                \

+             && sh_promote_prototypes (VALTYPE)                                \

            ? (TARGET_SHMEDIA ? DImode : SImode) : TYPE_MODE (VALTYPE)), \
           BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))
            ? (TARGET_SHMEDIA ? DImode : SImode) : TYPE_MODE (VALTYPE)), \
           BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))

-     
+

 /* Define how to find the value returned by a library function
    assuming the value has mode MODE.  */
 #define LIBCALL_VALUE(MODE) \
 /* Define how to find the value returned by a library function
    assuming the value has mode MODE.  */
 #define LIBCALL_VALUE(MODE) \


@@ -1661,12 +1659,15 @@ extern enum reg_class reg_class_from_letter[];
    || (TARGET_SHMEDIA_FPU && (REGNO) == FIRST_FP_RET_REG))
 
 /* 1 if N is a possible register number for function argument passing.  */
    || (TARGET_SHMEDIA_FPU && (REGNO) == FIRST_FP_RET_REG))
 
 /* 1 if N is a possible register number for function argument passing.  */

+/* ??? There are some callers that pass REGNO as int, and others that pass
+   it as unsigned.  We get warnings unless we do casts everywhere.  */

 #define FUNCTION_ARG_REGNO_P(REGNO) \
 #define FUNCTION_ARG_REGNO_P(REGNO) \

-  (((REGNO) >= FIRST_PARM_REG && (REGNO) < (FIRST_PARM_REG             \
-                                           + NPARM_REGS (SImode)))     \
+  (((unsigned) (REGNO) >= (unsigned) FIRST_PARM_REG                    \
+    && (unsigned) (REGNO) < (unsigned) (FIRST_PARM_REG + NPARM_REGS (SImode)))\

    || (TARGET_FPU_ANY                                                   \
    || (TARGET_FPU_ANY                                                   \

-       && (REGNO) >= FIRST_FP_PARM_REG && (REGNO) < (FIRST_FP_PARM_REG \
-                                                    + NPARM_REGS (SFmode))))
+       && (unsigned) (REGNO) >= (unsigned) FIRST_FP_PARM_REG           \
+       && (unsigned) (REGNO) < (unsigned) (FIRST_FP_PARM_REG           \
+                                          + NPARM_REGS (SFmode))))

 \f
 /* Define a data type for recording info about an argument list
    during the scan of that argument list.  This data type should
 \f
 /* Define a data type for recording info about an argument list
    during the scan of that argument list.  This data type should


@@ -1776,6 +1777,10 @@ struct sh_args {
 #define CALL_COOKIE_INT_REG_GET(COOKIE, REG) \
   (((COOKIE) >> CALL_COOKIE_INT_REG_SHIFT (REG)) & ((REG) < 4 ? 7 : 15))
     long call_cookie;
 #define CALL_COOKIE_INT_REG_GET(COOKIE, REG) \
   (((COOKIE) >> CALL_COOKIE_INT_REG_SHIFT (REG)) & ((REG) < 4 ? 7 : 15))
     long call_cookie;

+
+  /* This is set to nonzero when the call in question must use the Renesas ABI,
+     even without the -mrenesas option.  */
+    int renesas_abi;

 };
 
 #define CUMULATIVE_ARGS  struct sh_args
 };
 
 #define CUMULATIVE_ARGS  struct sh_args


@@ -1818,17 +1823,18 @@ struct sh_args {
 
    For TARGET_HITACHI, the structure value pointer is passed in memory.  */
 
 
    For TARGET_HITACHI, the structure value pointer is passed in memory.  */
 

-#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \

   do {                                                         \
     (CUM).arg_count[(int) SH_ARG_INT] = 0;                     \
     (CUM).arg_count[(int) SH_ARG_FLOAT] = 0;                   \
   do {                                                         \
     (CUM).arg_count[(int) SH_ARG_INT] = 0;                     \
     (CUM).arg_count[(int) SH_ARG_FLOAT] = 0;                   \

+    (CUM).renesas_abi = sh_attr_renesas_p (FNTYPE) ? 1 : 0;    \

     (CUM).force_mem                                            \
     (CUM).force_mem                                            \

-      = (TARGET_HITACHI && FNTYPE                              \
-        && aggregate_value_p (TREE_TYPE (FNTYPE)));            \
+      = ((TARGET_HITACHI || (CUM).renesas_abi) && (FNTYPE)     \
+        && aggregate_value_p (TREE_TYPE (FNTYPE), (FNDECL)));  \

     (CUM).prototype_p = (FNTYPE) && TYPE_ARG_TYPES (FNTYPE);   \
     (CUM).arg_count[(int) SH_ARG_INT]                          \
       = (TARGET_SH5 && (FNTYPE)                                        \
     (CUM).prototype_p = (FNTYPE) && TYPE_ARG_TYPES (FNTYPE);   \
     (CUM).arg_count[(int) SH_ARG_INT]                          \
       = (TARGET_SH5 && (FNTYPE)                                        \

-        && aggregate_value_p (TREE_TYPE (FNTYPE)));            \
+        && aggregate_value_p (TREE_TYPE (FNTYPE), (FNDECL)));  \

     (CUM).free_single_fp_reg = 0;                              \
     (CUM).outgoing = 1;                                                \
     (CUM).stack_regs = 0;                                      \
     (CUM).free_single_fp_reg = 0;                              \
     (CUM).outgoing = 1;                                                \
     (CUM).stack_regs = 0;                                      \


@@ -1848,7 +1854,7 @@ struct sh_args {
 
 #define INIT_CUMULATIVE_LIBCALL_ARGS(CUM, MODE, LIBNAME) \
   do {                                                         \
 
 #define INIT_CUMULATIVE_LIBCALL_ARGS(CUM, MODE, LIBNAME) \
   do {                                                         \

-    INIT_CUMULATIVE_ARGS ((CUM), NULL_TREE, (LIBNAME), 0);     \
+    INIT_CUMULATIVE_ARGS ((CUM), NULL_TREE, (LIBNAME), 0, 0);  \

     (CUM).call_cookie                                          \
       = (CALL_COOKIE_RET_TRAMP                                 \
         (TARGET_SHCOMPACT && GET_MODE_SIZE (MODE) > 4          \
     (CUM).call_cookie                                          \
       = (CALL_COOKIE_RET_TRAMP                                 \
         (TARGET_SHCOMPACT && GET_MODE_SIZE (MODE) > 4          \


@@ -1857,140 +1863,14 @@ struct sh_args {
 
 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
   do {                                                         \
 
 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
   do {                                                         \

-    INIT_CUMULATIVE_ARGS ((CUM), (FNTYPE), (LIBNAME), 0);      \
+    INIT_CUMULATIVE_ARGS ((CUM), (FNTYPE), (LIBNAME), 0, 0);   \

     (CUM).outgoing = 0;                                                \
   } while (0)
     (CUM).outgoing = 0;                                                \
   } while (0)

- 
-#define OLD_ARG_MODE(MODE, TYPE) \
-  (((TYPE) \
-    && (TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE (TYPE) == UNION_TYPE) \
-    && (MODE) != BLKmode && GET_MODE_CLASS (MODE) != MODE_INT) \
-   ? int_mode_for_mode (MODE) : (MODE))
-
-/* Update the data in CUM to advance over an argument
-   of mode MODE and data type TYPE.
-   (TYPE is null for libcalls where that information may not be
-   available.)  */

 
 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   \
 
 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   \

-do {                                                   \
- enum machine_mode MODE_ = OLD_ARG_MODE ((MODE), (TYPE));\
- if ((CUM).force_mem)                                  \
-   (CUM).force_mem = 0;                                        \
- else if (TARGET_SH5)                                  \
-   {                                                   \
-     tree TYPE_ = ((CUM).byref && (TYPE)               \
-                  ? TREE_TYPE (TYPE)                   \
-                  : (TYPE));                           \
-     int dwords, numregs;                              \
-                                                       \
-     MODE_ = ((CUM).byref && (TYPE)                    \
-             ? TYPE_MODE (TYPE_) : (MODE_));           \
-     dwords = (((CUM).byref                            \
-               ? (CUM).byref                           \
-               : (MODE_) == BLKmode                    \
-               ? int_size_in_bytes (TYPE_)             \
-               : GET_MODE_SIZE (MODE_)) + 7) / 8;      \
-     numregs = MIN (dwords, NPARM_REGS (SImode)                \
-                   - (CUM).arg_count[(int) SH_ARG_INT]); \
-     if (numregs)                                      \
-       {                                               \
-        (CUM).arg_count[(int) SH_ARG_INT] += numregs;  \
-        if (TARGET_SHCOMPACT                           \
-            && SHCOMPACT_FORCE_ON_STACK (MODE_, TYPE_)) \
-          {                                            \
-            (CUM).call_cookie                          \
-              |= CALL_COOKIE_INT_REG (((CUM).arg_count[(int) SH_ARG_INT] \
-                                       - numregs), 1); \
-            /* N.B. We want this also for outgoing.   */\
-            (CUM).stack_regs += numregs;               \
-          }                                            \
-        else if ((CUM).byref)                          \
-          {                                            \
-            if (! (CUM).outgoing)                      \
-              (CUM).stack_regs += numregs;             \
-            (CUM).byref_regs += numregs;               \
-            (CUM).byref = 0;                           \
-            do                                         \
-              (CUM).call_cookie                        \
-                |= CALL_COOKIE_INT_REG (((CUM).arg_count[(int) SH_ARG_INT] \
-                                         - numregs), 2); \
-            while (--numregs);                         \
-            (CUM).call_cookie                          \
-              |= CALL_COOKIE_INT_REG (((CUM).arg_count[(int) SH_ARG_INT] \
-                                       - 1), 1); \
-          }                                            \
-        else if (dwords > numregs)                     \
-          {                                            \
-            int pushregs = numregs;                    \
-                                                       \
-            if (TARGET_SHCOMPACT)                      \
-              (CUM).stack_regs += numregs;             \
-            while (pushregs < NPARM_REGS (SImode) - 1  \
-                   && (CALL_COOKIE_INT_REG_GET         \
-                       ((CUM).call_cookie,             \
-                       NPARM_REGS (SImode) - pushregs) \
-                       == 1))                          \
-              {                                        \
-                (CUM).call_cookie                      \
-                  &= ~ CALL_COOKIE_INT_REG (NPARM_REGS (SImode) \
-                                            - pushregs, 1); \
-                pushregs++;                            \
-              }                                        \
-            if (numregs == NPARM_REGS (SImode))        \
-              (CUM).call_cookie                        \
-                |= CALL_COOKIE_INT_REG (0, 1)          \
-                   | CALL_COOKIE_STACKSEQ (numregs - 1); \
-            else                                       \
-              (CUM).call_cookie                        \
-                |= CALL_COOKIE_STACKSEQ (numregs);     \
-          }                                            \
-       }                                               \
-     if (GET_SH_ARG_CLASS (MODE_) == SH_ARG_FLOAT      \
-        && ((NAMED) || ! (CUM).prototype_p))           \
-       {                                               \
-        if ((MODE_) == SFmode && (CUM).free_single_fp_reg) \
-          (CUM).free_single_fp_reg = 0;                \
-        else if ((CUM).arg_count[(int) SH_ARG_FLOAT]   \
-                 < NPARM_REGS (SFmode))                \
-          {                                            \
-            int numfpregs                              \
-              = MIN ((GET_MODE_SIZE (MODE_) + 7) / 8 * 2, \
-                     NPARM_REGS (SFmode)               \
-                     - (CUM).arg_count[(int) SH_ARG_FLOAT]); \
-                                                       \
-            (CUM).arg_count[(int) SH_ARG_FLOAT] += numfpregs; \
-                                                       \
-            if (TARGET_SHCOMPACT && ! (CUM).prototype_p) \
-              {                                        \
-                if ((CUM).outgoing && numregs > 0)     \
-                  do                                   \
-                    {                                  \
-                      (CUM).call_cookie                \
-                        |= (CALL_COOKIE_INT_REG        \
-                            ((CUM).arg_count[(int) SH_ARG_INT] \
-                             - numregs + ((numfpregs - 2) / 2), \
-                             4 + ((CUM).arg_count[(int) SH_ARG_FLOAT] \
-                                  - numfpregs) / 2));  \
-                    }                                  \
-                  while (numfpregs -= 2);              \
-              }                                        \
-            else if ((MODE_) == SFmode && (NAMED)      \
-                     && ((CUM).arg_count[(int) SH_ARG_FLOAT] \
-                         < NPARM_REGS (SFmode)))       \
-              (CUM).free_single_fp_reg                 \
-                = FIRST_FP_PARM_REG - numfpregs        \
-                + (CUM).arg_count[(int) SH_ARG_FLOAT] + 1; \
-          }                                            \
-       }                                               \
-   }                                                   \
- else if (! TARGET_SH4 || PASS_IN_REG_P ((CUM), (MODE_), (TYPE))) \
-   ((CUM).arg_count[(int) GET_SH_ARG_CLASS (MODE_)]    \
-    = (ROUND_REG ((CUM), (MODE_))                      \
-       + ((MODE_) == BLKmode                           \
-         ? ROUND_ADVANCE (int_size_in_bytes (TYPE))    \
-         : ROUND_ADVANCE (GET_MODE_SIZE (MODE_)))));   \
-} while (0)
+       sh_function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
+#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
+       sh_function_arg (&(CUM), (MODE), (TYPE), (NAMED))

 
 /* Return boolean indicating arg of mode MODE will be passed in a reg.
    This macro is only used in this file.  */
 
 /* Return boolean indicating arg of mode MODE will be passed in a reg.
    This macro is only used in this file.  */


@@ -1998,7 +1878,11 @@ do {                                                     \
 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
   (((TYPE) == 0 \
     || (! TREE_ADDRESSABLE ((tree)(TYPE)) \
 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
   (((TYPE) == 0 \
     || (! TREE_ADDRESSABLE ((tree)(TYPE)) \

-       && (! TARGET_HITACHI || ! AGGREGATE_TYPE_P (TYPE)))) \
+       && (! (TARGET_HITACHI || (CUM).renesas_abi) \
+           || ! (AGGREGATE_TYPE_P (TYPE) \
+                 || (!TARGET_FPU_ANY \
+                     && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
+                         && GET_MODE_SIZE (MODE) > GET_MODE_SIZE (SFmode))))))) \

    && ! (CUM).force_mem \
    && (TARGET_SH2E \
        ? ((MODE) == BLKmode \
    && ! (CUM).force_mem \
    && (TARGET_SH2E \
        ? ((MODE) == BLKmode \


@@ -2010,59 +1894,23 @@ do {                                                    \
             <= NPARM_REGS (MODE))) \
        : ROUND_REG ((CUM), (MODE)) < NPARM_REGS (MODE)))
 
             <= NPARM_REGS (MODE))) \
        : ROUND_REG ((CUM), (MODE)) < NPARM_REGS (MODE)))
 

-/* Define where to put the arguments to a function.
-   Value is zero to push the argument on the stack,
-   or a hard register in which to store the argument.
-
-   MODE is the argument's machine mode.
-   TYPE is the data type of the argument (as a tree).
-    This is null for libcalls where that information may
-    not be available.
-   CUM is a variable of type CUMULATIVE_ARGS which gives info about
-    the preceding args and about the function being called.
-   NAMED is nonzero if this argument is a named parameter
-    (otherwise it is an extra parameter matching an ellipsis).
-
-   On SH the first args are normally in registers
-   and the rest are pushed.  Any arg that starts within the first
-   NPARM_REGS words is at least partially passed in a register unless
-   its data type forbids.  */
-
-#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
-  FUNCTION_ARG_1 ((CUM), OLD_ARG_MODE ((MODE), (TYPE)), (MODE), (TYPE), (NAMED))
-
-#define FUNCTION_ARG_1(CUM, MODE, NEW_MODE, TYPE, NAMED) \
-  ((! TARGET_SH5 \
-    && PASS_IN_REG_P ((CUM), (MODE), (TYPE))                           \
-    && ((NAMED) || !TARGET_HITACHI))                                   \
-   ? gen_rtx_REG ((NEW_MODE),                                          \
-                 ((BASE_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE)))    \
-                  ^ ((MODE) == SFmode && TARGET_SH4                    \
-                     && TARGET_LITTLE_ENDIAN != 0)))                   \
-   : TARGET_SH5                                                                \
-   ? ((MODE) == VOIDmode && TARGET_SHCOMPACT                           \
-      ? GEN_INT ((CUM).call_cookie)                                    \
-      /* The following test assumes unnamed arguments are promoted to  \
-        DFmode.  */                                                    \
-      : (MODE) == SFmode && (CUM).free_single_fp_reg                   \
-      ? SH5_PROTOTYPED_FLOAT_ARG ((CUM), (NEW_MODE), (CUM).free_single_fp_reg) \
-      : (GET_SH_ARG_CLASS (MODE) == SH_ARG_FLOAT                       \
-         && ((NAMED) || ! (CUM).prototype_p)                           \
-         && (CUM).arg_count[(int) SH_ARG_FLOAT] < NPARM_REGS (SFmode)) \
-      ? ((! (CUM).prototype_p && TARGET_SHMEDIA)                       \
-        ? SH5_PROTOTYPELESS_FLOAT_ARG ((CUM), (NEW_MODE))              \
-        : SH5_PROTOTYPED_FLOAT_ARG ((CUM), (NEW_MODE),                 \
-                                    FIRST_FP_PARM_REG                  \
-                                    + (CUM).arg_count[(int) SH_ARG_FLOAT])) \
-      : ((CUM).arg_count[(int) SH_ARG_INT] < NPARM_REGS (SImode)       \
-        && (! TARGET_SHCOMPACT                                         \
-            || (! SHCOMPACT_FORCE_ON_STACK ((MODE), (TYPE))            \
-                && ! SH5_WOULD_BE_PARTIAL_NREGS ((CUM), (MODE),        \
-                                                 (TYPE), (NAMED)))))   \
-      ? gen_rtx_REG ((NEW_MODE), (FIRST_PARM_REG                       \
-                             + (CUM).arg_count[(int) SH_ARG_INT]))     \
-      : 0)                                                             \
-   : 0)
+/* By accident we got stuck with passing SCmode on SH4 little endian
+   in two registers that are nominally successive - which is different from
+   two single SFmode values, where we take endianness translation into
+   account.  That does not work at all if an odd number of registers is
+   already in use, so that got fixed, but library functions are still more
+   likely to use complex numbers without mixing them with SFmode arguments
+   (which in C would have to be structures), so for the sake of ABI
+   compatibility the way SCmode values are passed when an even number of
+   FP registers is in use remains different from a pair of SFmode values for
+   now.
+   I.e.:
+   foo (double); a: fr5,fr4
+   foo (float a, float b); a: fr5 b: fr4
+   foo (__complex float a); a.real fr4 a.imag: fr5 - for consistency,
+                            this should be the other way round...
+   foo (float a, __complex float b); a: fr5 b.real: fr4 b.imag: fr7  */
+#define FUNCTION_ARG_SCmode_WART 1

 
 /* Whether an argument must be passed by reference.  On SHcompact, we
    pretend arguments wider than 32-bits that would have been passed in
 
 /* Whether an argument must be passed by reference.  On SHcompact, we
    pretend arguments wider than 32-bits that would have been passed in


@@ -2070,7 +1918,7 @@ do {                                                      \
    loads them into the full 64-bits registers.  */
 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM,MODE,TYPE,NAMED) \
   (MUST_PASS_IN_STACK ((MODE), (TYPE)) \
    loads them into the full 64-bits registers.  */
 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM,MODE,TYPE,NAMED) \
   (MUST_PASS_IN_STACK ((MODE), (TYPE)) \

-   || SHCOMPACT_BYREF ((CUM), OLD_ARG_MODE ((MODE), (TYPE)), (TYPE), (NAMED)))
+   || SHCOMPACT_BYREF ((CUM), (MODE), (TYPE), (NAMED)))

 
 #define SHCOMPACT_BYREF(CUM, MODE, TYPE, NAMED) \
   ((CUM).byref                                                         \
 
 #define SHCOMPACT_BYREF(CUM, MODE, TYPE, NAMED) \
   ((CUM).byref                                                         \


@@ -2158,10 +2006,6 @@ do {                                                     \
                                                          (REG)),       \
                                   const0_rtx))))
 
                                                          (REG)),       \
                                   const0_rtx))))
 

-#define STRICT_ARGUMENT_NAMING TARGET_SH5
-
-#define PRETEND_OUTGOING_VARARGS_NAMED (! TARGET_HITACHI && ! TARGET_SH5)
-

 /* For an arg passed partly in registers and partly in memory,
    this is the number of registers used.
    For args passed entirely in registers or entirely in memory, zero.
 /* For an arg passed partly in registers and partly in memory,
    this is the number of registers used.
    For args passed entirely in registers or entirely in memory, zero.


@@ -2193,20 +2037,6 @@ do {                                                     \
 /* Perform any needed actions needed for a function that is receiving a
    variable number of arguments.  */
 
 /* Perform any needed actions needed for a function that is receiving a
    variable number of arguments.  */
 

-/* We actually emit the code in sh_expand_prologue.  We used to use
-   a static variable to flag that we need to emit this code, but that
-   doesn't when inlining, when functions are deferred and then emitted
-   later.  Fortunately, we already have two flags that are part of struct
-   function that tell if a function uses varargs or stdarg.  */
-#define SETUP_INCOMING_VARARGS(ASF, MODE, TYPE, PAS, ST)  do \
-  if (! current_function_stdarg) \
-    abort (); \
-while (0)
-
-/* Define the `__builtin_va_list' type for the ABI.  */
-#define BUILD_VA_LIST_TYPE(VALIST) \
-  (VALIST) = sh_build_va_list ()
-

 /* Implement `va_start' for varargs and stdarg.  */
 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
   sh_va_start (valist, nextarg)
 /* Implement `va_start' for varargs and stdarg.  */
 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
   sh_va_start (valist, nextarg)


@@ -2241,7 +2071,7 @@ while (0)
 
 #define EXIT_IGNORE_STACK 1
 
 
 #define EXIT_IGNORE_STACK 1
 

-/* 
+/*

    On the SH, the trampoline looks like
    2 0002 D202                 mov.l   l2,r2
    1 0000 D301                 mov.l   l1,r3
    On the SH, the trampoline looks like
    2 0002 D202                 mov.l   l2,r2
    1 0000 D301                 mov.l   l1,r3


@@ -2270,7 +2100,7 @@ while (0)
 #define TRAMPOLINE_ADJUST_ADDRESS(TRAMP) do                            \
 {                                                                      \
   if (TARGET_SHMEDIA)                                                  \
 #define TRAMPOLINE_ADJUST_ADDRESS(TRAMP) do                            \
 {                                                                      \
   if (TARGET_SHMEDIA)                                                  \

-    (TRAMP) = expand_simple_binop (Pmode, PLUS, (TRAMP), GEN_INT (1),  \
+    (TRAMP) = expand_simple_binop (Pmode, PLUS, (TRAMP), const1_rtx,   \

                                   gen_reg_rtx (Pmode), 0,              \
                                   OPTAB_LIB_WIDEN);                    \
 } while (0)
                                   gen_reg_rtx (Pmode), 0,              \
                                   OPTAB_LIB_WIDEN);                    \
 } while (0)


@@ -2281,9 +2111,7 @@ while (0)
    can ignore COUNT.  */
 
 #define RETURN_ADDR_RTX(COUNT, FRAME)  \
    can ignore COUNT.  */
 
 #define RETURN_ADDR_RTX(COUNT, FRAME)  \

-  (((COUNT) == 0)                              \
-   ? get_hard_reg_initial_val (Pmode, TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG) \
-   : (rtx) 0)
+  (((COUNT) == 0) ? sh_get_pr_initial_val () : (rtx) 0)

 
 /* A C expression whose value is RTL representing the location of the
    incoming return address at the beginning of any function, before the
 
 /* A C expression whose value is RTL representing the location of the
    incoming return address at the beginning of any function, before the


@@ -2293,9 +2121,6 @@ while (0)
 #define INCOMING_RETURN_ADDR_RTX \
   gen_rtx_REG (Pmode, TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG)
 \f
 #define INCOMING_RETURN_ADDR_RTX \
   gen_rtx_REG (Pmode, TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG)
 \f

-/* Generate necessary RTL for __builtin_saveregs().  */
-#define EXPAND_BUILTIN_SAVEREGS() sh_builtin_saveregs ()
-\f

 /* Addressing modes, and classification of registers for them.  */
 #define HAVE_POST_INCREMENT  TARGET_SH1
 #define HAVE_PRE_DECREMENT   TARGET_SH1
 /* Addressing modes, and classification of registers for them.  */
 #define HAVE_POST_INCREMENT  TARGET_SH1
 #define HAVE_PRE_DECREMENT   TARGET_SH1


@@ -2739,9 +2564,9 @@ while (0)
         prevalent.  */                                                 \
       if (GET_MODE_SIZE (MODE) + offset - offset_base <= 64)           \
        {                                                               \
         prevalent.  */                                                 \
       if (GET_MODE_SIZE (MODE) + offset - offset_base <= 64)           \
        {                                                               \

-         sum = gen_rtx (PLUS, Pmode, XEXP (X, 0),                      \
+         sum = gen_rtx_PLUS (Pmode, XEXP (X, 0),                       \

                         GEN_INT (offset_base));                        \
                         GEN_INT (offset_base));                        \

-         X = gen_rtx (PLUS, Pmode, sum, GEN_INT (offset - offset_base));\
+         X = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base));\

          push_reload (sum, NULL_RTX, &XEXP (X, 0), NULL,               \
                       BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, (OPNUM),  \
                       (TYPE));                                         \
          push_reload (sum, NULL_RTX, &XEXP (X, 0), NULL,               \
                       BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, (OPNUM),  \
                       (TYPE));                                         \


@@ -2876,9 +2701,6 @@ while (0)
    but a CALL with constant address is cheap.  */
 /*#define NO_FUNCTION_CSE 1*/
 
    but a CALL with constant address is cheap.  */
 /*#define NO_FUNCTION_CSE 1*/
 

-/* Chars and shorts should be passed as ints.  */
-#define PROMOTE_PROTOTYPES 1
-

 /* The machine modes of pointers and functions.  */
 #define Pmode  (TARGET_SHMEDIA64 ? DImode : SImode)
 #define FUNCTION_MODE  Pmode
 /* The machine modes of pointers and functions.  */
 #define Pmode  (TARGET_SHMEDIA64 ? DImode : SImode)
 #define FUNCTION_MODE  Pmode


@@ -2963,10 +2785,6 @@ while (0)
    the end of the line.  */
 #define ASM_COMMENT_START "!"
 
    the end of the line.  */
 #define ASM_COMMENT_START "!"
 

-/* The text to go at the start of the assembler file.  */
-#define ASM_FILE_START(STREAM) \
-  output_file_start (STREAM)
-

 #define ASM_APP_ON             ""
 #define ASM_APP_OFF            ""
 #define FILE_ASM_OP            "\t.file\n"
 #define ASM_APP_ON             ""
 #define ASM_APP_OFF            ""
 #define FILE_ASM_OP            "\t.file\n"


@@ -3057,20 +2875,32 @@ while (0)
    register exists, so we should return -1 for invalid register numbers.  */
 #define DBX_REGISTER_NUMBER(REGNO) SH_DBX_REGISTER_NUMBER (REGNO)
 
    register exists, so we should return -1 for invalid register numbers.  */
 #define DBX_REGISTER_NUMBER(REGNO) SH_DBX_REGISTER_NUMBER (REGNO)
 

+/* SHcompact PR_REG used to use the encoding 241, and SHcompact FP registers
+   used to use the encodings 245..260, but that doesn't make sense:
+   PR_REG and PR_MEDIA_REG are actually the same register, and likewise
+   the FP registers stay the same when switching between compact and media
+   mode.  Hence, we also need to use the same dwarf frame columns.
+   Likewise, we need to support unwind information for SHmedia registers
+   even in compact code.  */

 #define SH_DBX_REGISTER_NUMBER(REGNO) \
 #define SH_DBX_REGISTER_NUMBER(REGNO) \

-  (GENERAL_REGISTER_P (REGNO) \
-   ? ((REGNO) - FIRST_GENERAL_REG) \
-   : FP_REGISTER_P (REGNO) \
-   ? ((REGNO) - FIRST_FP_REG + (TARGET_SH5 ? (TARGET_SHCOMPACT ? 245 \
-                                             : 77) : 25)) \
+  (IN_RANGE ((REGNO), \
+            (unsigned HOST_WIDE_INT) FIRST_GENERAL_REG, \
+            FIRST_GENERAL_REG + (TARGET_SH5 ? 63U :15U)) \
+   ? ((unsigned) (REGNO) - FIRST_GENERAL_REG) \
+  : ((int) (REGNO) >= FIRST_FP_REG \
+     && ((int) (REGNO) \
+        <= (FIRST_FP_REG + \
+            ((TARGET_SH5 && TARGET_FPU_ANY) ? 63 : TARGET_SH2E ? 15 : -1)))) \
+   ? ((unsigned) (REGNO) - FIRST_FP_REG \
+      + (TARGET_SH5 ? 77 : 25)) \

    : XD_REGISTER_P (REGNO) \
    : XD_REGISTER_P (REGNO) \

-   ? ((REGNO) - FIRST_XD_REG + (TARGET_SH5 ? 289 : 87)) \
+   ? ((unsigned) (REGNO) - FIRST_XD_REG + (TARGET_SH5 ? 289 : 87)) \

    : TARGET_REGISTER_P (REGNO) \
    : TARGET_REGISTER_P (REGNO) \

-   ? ((REGNO) - FIRST_TARGET_REG + 68) \
+   ? ((unsigned) (REGNO) - FIRST_TARGET_REG + 68) \

    : (REGNO) == PR_REG \
    : (REGNO) == PR_REG \

-   ? (TARGET_SH5 ? 241 : 17) \
+   ? (TARGET_SH5 ? 18 : 17) \

    : (REGNO) == PR_MEDIA_REG \
    : (REGNO) == PR_MEDIA_REG \

-   ? (TARGET_SH5 ? 18 : -1) \
+   ? (TARGET_SH5 ? 18 : (unsigned) -1) \

    : (REGNO) == T_REG \
    ? (TARGET_SH5 ? 242 : 18) \
    : (REGNO) == GBR_REG \
    : (REGNO) == T_REG \
    ? (TARGET_SH5 ? 242 : 18) \
    : (REGNO) == GBR_REG \


@@ -3081,7 +2911,7 @@ while (0)
    ? (TARGET_SH5 ? 240 : 21) \
    : (REGNO) == FPUL_REG \
    ? (TARGET_SH5 ? 244 : 23) \
    ? (TARGET_SH5 ? 240 : 21) \
    : (REGNO) == FPUL_REG \
    ? (TARGET_SH5 ? 244 : 23) \

-   : -1)
+   : (unsigned) -1)

 
 /* This is how to output a reference to a symbol_ref.  On SH5,
    references to non-code symbols must be preceded by `datalabel'.  */
 
 /* This is how to output a reference to a symbol_ref.  On SH5,
    references to non-code symbols must be preceded by `datalabel'.  */


@@ -3280,7 +3110,7 @@ extern enum mdep_reorg_phase_e mdep_reorg_phase;
 
 #define TARGET_MEM_FUNCTIONS
 
 
 #define TARGET_MEM_FUNCTIONS
 

-/* Handle Hitachi compiler's pragmas.  */
+/* Handle Renesas compiler's pragmas.  */

 #define REGISTER_TARGET_PRAGMAS() do {                                 \
   c_register_pragma (0, "interrupt", sh_pr_interrupt);                 \
   c_register_pragma (0, "trapa", sh_pr_trapa);                         \
 #define REGISTER_TARGET_PRAGMAS() do {                                 \
   c_register_pragma (0, "interrupt", sh_pr_interrupt);                 \
   c_register_pragma (0, "trapa", sh_pr_trapa);                         \


@@ -3319,6 +3149,7 @@ extern int rtx_equal_function_value_matters;
   {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}},  \
   {"binary_float_operator", {PLUS, MINUS, MULT, DIV}},                 \
   {"binary_logical_operator", {AND, IOR, XOR}},                                \
   {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}},  \
   {"binary_float_operator", {PLUS, MINUS, MULT, DIV}},                 \
   {"binary_logical_operator", {AND, IOR, XOR}},                                \

+  {"cmpsi_operand", {SUBREG, REG, CONST_INT}},                         \

   {"commutative_float_operator", {PLUS, MULT}},                                \
   {"equality_comparison_operator", {EQ,NE}},                           \
   {"extend_reg_operand", {SUBREG, REG, TRUNCATE}},                     \
   {"commutative_float_operator", {PLUS, MULT}},                                \
   {"equality_comparison_operator", {EQ,NE}},                           \
   {"extend_reg_operand", {SUBREG, REG, TRUNCATE}},                     \


@@ -3357,7 +3188,7 @@ extern int rtx_equal_function_value_matters;
 #define any_register_operand register_operand
 
 /* Define this macro if it is advisable to hold scalars in registers
 #define any_register_operand register_operand
 
 /* Define this macro if it is advisable to hold scalars in registers

-   in a wider mode than that declared by the program.  In such cases, 
+   in a wider mode than that declared by the program.  In such cases,

    the value is constrained to be within the bounds of the declared
    type, but kept valid in the wider mode.  The signedness of the
    extension may differ from that of the type.
    the value is constrained to be within the bounds of the declared
    type, but kept valid in the wider mode.  The signedness of the
    extension may differ from that of the type.


@@ -3371,17 +3202,10 @@ extern int rtx_equal_function_value_matters;
     (UNSIGNEDP) = ((MODE) == SImode ? 0 : (UNSIGNEDP)),        \
     (MODE) = (TARGET_SH1 ? SImode : DImode);
 
     (UNSIGNEDP) = ((MODE) == SImode ? 0 : (UNSIGNEDP)),        \
     (MODE) = (TARGET_SH1 ? SImode : DImode);
 

-/* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
-   extensions applied to char/short functions arguments.  Defining
-   PROMOTE_FUNCTION_RETURN does the same for function returns.  */
-
-#define PROMOTE_FUNCTION_ARGS
-#define PROMOTE_FUNCTION_RETURN
-

 #define MAX_FIXED_MODE_SIZE (TARGET_SH5 ? 128 : 64)
 
 /* ??? Define ACCUMULATE_OUTGOING_ARGS?  This is more efficient than pushing
 #define MAX_FIXED_MODE_SIZE (TARGET_SH5 ? 128 : 64)
 
 /* ??? Define ACCUMULATE_OUTGOING_ARGS?  This is more efficient than pushing

-   and poping arguments.  However, we do have push/pop instructions, and
+   and popping arguments.  However, we do have push/pop instructions, and

    rather limited offsets (4 bits) in load/store instructions, so it isn't
    clear if this would give better code.  If implemented, should check for
    compatibility problems.  */
    rather limited offsets (4 bits) in load/store instructions, so it isn't
    clear if this would give better code.  If implemented, should check for
    compatibility problems.  */


@@ -3402,6 +3226,11 @@ extern int rtx_equal_function_value_matters;
    ? (TARGET_FMOVD ? FP_MODE_DOUBLE : FP_MODE_NONE) \
    : ACTUAL_NORMAL_MODE (ENTITY))
 
    ? (TARGET_FMOVD ? FP_MODE_DOUBLE : FP_MODE_NONE) \
    : ACTUAL_NORMAL_MODE (ENTITY))
 

+#define MODE_ENTRY(ENTITY) NORMAL_MODE (ENTITY)
+
+#define MODE_EXIT(ENTITY) \
+  (sh_cfun_attr_renesas_p () ? FP_MODE_NONE : NORMAL_MODE (ENTITY))
+

 #define EPILOGUE_USES(REGNO)       ((TARGET_SH2E || TARGET_SH4)                \
                                    && (REGNO) == FPSCR_REG)
 
 #define EPILOGUE_USES(REGNO)       ((TARGET_SH2E || TARGET_SH4)                \
                                    && (REGNO) == FPSCR_REG)
 


@@ -3410,6 +3239,13 @@ extern int rtx_equal_function_value_matters;
    ? get_attr_fp_mode (INSN)                                           \
    : FP_MODE_NONE)
 
    ? get_attr_fp_mode (INSN)                                           \
    : FP_MODE_NONE)
 

+#define MODE_AFTER(MODE, INSN)                  \
+     (TARGET_HITACHI                           \
+      && recog_memoized (INSN) >= 0            \
+      && get_attr_fp_set (INSN) != FP_SET_NONE  \
+      ? get_attr_fp_set (INSN)                  \
+      : (MODE))
+

 #define MODE_PRIORITY_TO_MODE(ENTITY, N) \
   ((TARGET_FPU_SINGLE != 0) ^ (N) ? FP_MODE_SINGLE : FP_MODE_DOUBLE)
 
 #define MODE_PRIORITY_TO_MODE(ENTITY, N) \
   ((TARGET_FPU_SINGLE != 0) ^ (N) ? FP_MODE_SINGLE : FP_MODE_DOUBLE)
 


@@ -3423,9 +3259,31 @@ extern int rtx_equal_function_value_matters;
   (TARGET_SH5 ? DWARF_FRAME_REGNUM (PR_MEDIA_REG) : DWARF_FRAME_REGNUM (PR_REG))
 
 #define EH_RETURN_DATA_REGNO(N)        \
   (TARGET_SH5 ? DWARF_FRAME_REGNUM (PR_MEDIA_REG) : DWARF_FRAME_REGNUM (PR_REG))
 
 #define EH_RETURN_DATA_REGNO(N)        \

-  ((N) < 4 ? (N) + (TARGET_SH5 ? 2 : 4) : INVALID_REGNUM)
-
-#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM)
+  ((N) < 4 ? (N) + (TARGET_SH5 ? 2U : 4U) : INVALID_REGNUM)
+
+#define EH_RETURN_STACKADJ_REGNO STATIC_CHAIN_REGNUM
+#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_RETURN_STACKADJ_REGNO)
+
+/* We have to distinguish between code and data, so that we apply
+   datalabel where and only where appropriate.  Use textrel for code.  */
+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
+ ((flag_pic && (GLOBAL) ? DW_EH_PE_indirect : 0) \
+  | ((CODE) ? DW_EH_PE_textrel : flag_pic ? DW_EH_PE_pcrel : DW_EH_PE_absptr))
+
+/* Handle special EH pointer encodings.  Absolute, pc-relative, and
+   indirect are handled automatically.  */
+#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
+  do { \
+    if (((ENCODING) & 0x70) == DW_EH_PE_textrel) \
+      { \
+       encoding &= ~DW_EH_PE_textrel; \
+       encoding |= flag_pic ? DW_EH_PE_pcrel : DW_EH_PE_absptr; \
+       if (GET_CODE (ADDR) != SYMBOL_REF) \
+         abort (); \
+       SYMBOL_REF_FLAGS (ADDR) |= SYMBOL_FLAG_FUNCTION; \
+       if (0) goto DONE; \
+      } \
+  } while (0)

 
 #if (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__
 /* SH constant pool breaks the devices in crtstuff.c to control section
 
 #if (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__
 /* SH constant pool breaks the devices in crtstuff.c to control section


@@ -3442,8 +3300,13 @@ extern int rtx_equal_function_value_matters;
 #endif /* (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__ */
 
 #define ALLOCATE_INITIAL_VALUE(hard_reg) \
 #endif /* (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__ */
 
 #define ALLOCATE_INITIAL_VALUE(hard_reg) \

-  (REGNO (hard_reg) == (TARGET_SH5 ? PR_MEDIA_REG : PR_REG) \
-   ? (current_function_is_leaf && ! sh_pr_n_sets () \
+  (REGNO (hard_reg) == (TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG) \
+   ? (current_function_is_leaf \
+      && ! sh_pr_n_sets () \
+      && ! (TARGET_SHCOMPACT \
+           && ((current_function_args_info.call_cookie \
+                & ~ CALL_COOKIE_RET_TRAMP (1)) \
+               || current_function_has_nonlocal_label)) \

       ? (hard_reg) \
       : gen_rtx_MEM (Pmode, TARGET_SH5 \
                            ? (plus_constant (arg_pointer_rtx, \
       ? (hard_reg) \
       : gen_rtx_MEM (Pmode, TARGET_SH5 \
                            ? (plus_constant (arg_pointer_rtx, \