/* Definitions of target machine for GNU compiler, for the pdp-11
- Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
+ Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002
+ Free Software Foundation, Inc.
Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 1, or (at your option)
+the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
Boston, MA 02111-1307, USA. */
-/* declarations */
-char *output_jump();
-char *output_move_double();
-char *output_move_quad();
-char *output_block_move();
-
/* check whether load_fpu_reg or not */
#define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
#define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
extern int target_flags;
/* Macro to define tables used to set the flags.
- This is a list in braces of pairs in braces,
- each pair being { "NAME", VALUE }
- where VALUE is the bits to set or minus the bits to clear.
+ This is a list in braces of triplets in braces,
+ each triplet being { "NAME", VALUE, DOC }
+ where VALUE is the bits to set or minus the bits to clear and DOC
+ is the documentation for --help (NULL if intentionally undocumented).
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
-{ { "fpu", 1}, \
- { "soft-float", -1}, \
-/* return float result in ac0 */\
- { "ac0", 2}, \
- { "no-ac0", -2}, \
-/* is 11/40 */ \
- { "40", 4}, \
- { "no-40", -4}, \
-/* is 11/45 */ \
- { "45", 8}, \
- { "no-45", -8}, \
-/* is 11/10 */ \
- { "10", -12}, \
-/* use movstrhi for bcopy */ \
- { "bcopy", 16}, \
- { "bcopy-builtin", -16}, \
-/* use 32 bit for int */ \
- { "int32", 32}, \
- { "no-int16", 32}, \
- { "int16", -32}, \
- { "no-int32", -32}, \
-/* use 32 bit for float */ \
- { "float32", 64}, \
- { "no-float64", 64}, \
- { "float64", -64}, \
- { "no-float32", -64}, \
+{ { "fpu", 1, N_("Use hardware floating point") }, \
+ { "soft-float", -1, N_("Do not use hardware floating point") }, \
+/* return float result in ac0 */ \
+ { "ac0", 2, N_("Return floating point results in ac0") }, \
+ { "no-ac0", -2, N_("Return floating point results in memory") }, \
+/* is 11/40 */ \
+ { "40", 4, N_("Generate code for an 11/40") }, \
+ { "no-40", -4, "" }, \
+/* is 11/45 */ \
+ { "45", 8, N_("Generate code for an 11/45") }, \
+ { "no-45", -8, "" }, \
+/* is 11/10 */ \
+ { "10", -12, N_("Generate code for an 11/10") }, \
+/* use movstrhi for bcopy */ \
+ { "bcopy", 16, NULL }, \
+ { "bcopy-builtin", -16, NULL }, \
+/* use 32 bit for int */ \
+ { "int32", 32, N_("Use 32 bit int") }, \
+ { "no-int16", 32, N_("Use 32 bit int") }, \
+ { "int16", -32, N_("Use 16 bit int") }, \
+ { "no-int32", -32, N_("Use 16 bit int") }, \
+/* use 32 bit for float */ \
+ { "float32", 64, N_("Use 32 bit float") }, \
+ { "no-float64", 64, N_("Use 32 bit float") }, \
+ { "float64", -64, N_("Use 64 bit float") }, \
+ { "no-float32", -64, N_("Use 64 bit float") }, \
/* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
- { "abshi", 128}, \
- { "no-abshi", -128}, \
+ { "abshi", 128, NULL }, \
+ { "no-abshi", -128, NULL }, \
/* is branching expensive - on a PDP, it's actually really cheap */ \
/* this is just to play around and check what code gcc generates */ \
- { "branch-expensive", 256}, \
- { "branch-cheap", -256}, \
-/* optimize for space instead of time - just in a couple of places */ \
- { "space", 512 }, \
- { "time", -512 }, \
-/* split instruction and data memory? */ \
- { "split", 1024 }, \
- { "no-split", -1024 }, \
+ { "branch-expensive", 256, NULL }, \
+ { "branch-cheap", -256, NULL }, \
+/* split instruction and data memory? */ \
+ { "split", 1024, N_("Target has split I&D") }, \
+ { "no-split", -1024, N_("Target does not have split I&D") }, \
+/* UNIX assembler syntax? */ \
+ { "unix-asm", 2048, N_("Use UNIX assembler syntax") }, \
+ { "dec-asm", -2048, N_("Use DEC assembler syntax") }, \
/* default */ \
- { "", TARGET_DEFAULT} \
+ { "", TARGET_DEFAULT, NULL} \
}
-#define TARGET_DEFAULT (1 | 8 | 128)
+#define TARGET_DEFAULT (1 | 8 | 128 | TARGET_UNIX_ASM_DEFAULT)
#define TARGET_FPU (target_flags & 1)
#define TARGET_SOFT_FLOAT (!TARGET_FPU)
#define TARGET_NO_AC0 (! TARGET_AC0)
#define TARGET_45 (target_flags & 8)
-#define TARGET_40_PLUS ((target_flags & 4) || (target_flags))
+#define TARGET_40_PLUS ((target_flags & 4) || (target_flags & 8))
#define TARGET_10 (! TARGET_40_PLUS)
#define TARGET_BCOPY_BUILTIN (! (target_flags & 16))
#define TARGET_BRANCH_EXPENSIVE (target_flags & 256)
#define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE)
-#define TARGET_SPACE (target_flags & 512)
-#define TARGET_TIME (! TARGET_SPACE)
-
#define TARGET_SPLIT (target_flags & 1024)
#define TARGET_NOSPLIT (! TARGET_SPLIT)
+
+#define TARGET_UNIX_ASM (target_flags & 2048)
+#define TARGET_UNIX_ASM_DEFAULT 0
+
+#define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
+
\f
/* TYPE SIZES */
-#define CHAR_TYPE_SIZE 8
#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
#define LONG_TYPE_SIZE 32
/* machine types from ansi */
#define SIZE_TYPE "unsigned int" /* definition of size_t */
-
-/* is used in cexp.y - we don't have target_flags there,
- so just give default definition
-
- hope it does not come back to haunt us! */
#define WCHAR_TYPE "int" /* or long int???? */
#define WCHAR_TYPE_SIZE 16
/* Define this if most significant word of a multiword number is numbered. */
#define WORDS_BIG_ENDIAN 1
-/* number of bits in an addressable storage unit */
-#define BITS_PER_UNIT 8
-
-/* Width in bits of a "word", which is the contents of a machine register.
- Note that this is not necessarily the width of data type `int';
- if using 16-bit ints on a 68000, this would still be 32.
- But on a machine with 16-bit registers, this would be 16. */
-/* This is a machine with 16-bit registers */
-#define BITS_PER_WORD 16
-
/* Width of a word, in units (bytes).
UNITS OR BYTES - seems like units */
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY 16
+/* Boundary (in *bits*) on which stack pointer should be aligned. */
+#define STACK_BOUNDARY 16
+
/* Allocation boundary (in *bits*) for the code of a function. */
#define FUNCTION_BOUNDARY 16
/* Make sure everything's fine if we *don't* have an FPU.
This assumes that putting a register in fixed_regs will keep the
compiler's mitts completely off it. We don't bother to zero it out
- of register classes.
+ of register classes. Also fix incompatible register naming with
+ the UNIX assembler.
*/
#define CONDITIONAL_REGISTER_USAGE \
{ \
\
if (TARGET_AC0) \
call_used_regs[8] = 1; \
+ if (TARGET_UNIX_ASM) \
+ { \
+ /* Change names of FPU registers for the UNIX assembler. */ \
+ reg_names[8] = "fr0"; \
+ reg_names[9] = "fr1"; \
+ reg_names[10] = "fr2"; \
+ reg_names[11] = "fr3"; \
+ reg_names[12] = "fr4"; \
+ reg_names[13] = "fr5"; \
+ } \
}
/* Return number of consecutive hard regs needed starting at reg REGNO
FPU can only hold DF - simplifies life!
*/
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
-((REGNO < 8)? \
+(((REGNO) < 8)? \
((GET_MODE_BITSIZE(MODE) <= 16) \
- || (GET_MODE_BITSIZE(MODE) == 32 && !(REGNO & 1))) \
+ || (GET_MODE_BITSIZE(MODE) == 32 && !((REGNO) & 1))) \
:(MODE) == DFmode)
This is an initializer for a vector of HARD_REG_SET
of length N_REG_CLASSES. */
-#define REG_CLASS_CONTENTS {0, 0x00aa, 0x00ff, 0x0f00, 0x3000, 0x3f00, 0x3fff}
+#define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0x00ff}, {0x0f00}, {0x3000}, {0x3f00}, {0x3fff}}
/* The same information, inverted:
Return the class number of the smallest class containing
or could index an array. */
#define REGNO_REG_CLASS(REGNO) \
-((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):((REGNO&1)?MUL_REGS:GENERAL_REGS))
+((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
/* The class value for index registers, and the one for base regs. */
not without FPU!!!! ) */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
+ gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
/* and the called function leaves it in the first register.
Difference only on machines with register windows. */
#define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
+ gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG(MODE))
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE))
/* 1 if N is a possible register number for a function value
as seen by the caller.
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
-/* This macro generates the assembly code for function entry. */
-#define FUNCTION_PROLOGUE(FILE, SIZE) \
- output_function_prologue(FILE, SIZE);
-
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
No definition is equivalent to always zero. */
extern int may_call_alloca;
-extern int current_function_pretend_args_size;
#define EXIT_IGNORE_STACK 1
-/* This macro generates the assembly code for function exit,
- on machines that need it. If FUNCTION_EPILOGUE is not defined
- then individual return instructions are generated for each
- return statement. Args are same as for FUNCTION_PROLOGUE.
-*/
-
-#define FUNCTION_EPILOGUE(FILE, SIZE) \
- output_function_epilogue(FILE, SIZE);
-
#define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \
{ \
int offset, regno; \
\f
/* Addressing modes, and classification of registers for them. */
-#define HAVE_POST_INCREMENT
-/* #define HAVE_POST_DECREMENT */
+#define HAVE_POST_INCREMENT 1
+/* #define HAVE_POST_DECREMENT 0 */
-#define HAVE_PRE_DECREMENT
-/* #define HAVE_PRE_INCREMENT */
+#define HAVE_PRE_DECREMENT 1
+/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */
/* Go to LABEL if ADDR (a legitimate address expression)
has an effect that depends on the machine mode it is used for.
- On the the pdp this is for predec/postinc */
+ On the pdp this is for predec/postinc */
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
{ if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE 1 */
-/* Specify the tree operation to be used to convert reals to integers. */
-#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
-
-/* This is the kind of divide that is easiest to do in the general case. */
-#define EASY_DIV_EXPR TRUNC_DIV_EXPR
-
/* Define this as 1 if `char' should by default be signed; else as 0. */
#define DEFAULT_SIGNED_CHAR 1
#define MOVE_MAX 2
-/* Zero extension is faster if the target is known to be zero */
-/* #define SLOW_ZERO_EXTEND */
-
/* Nonzero if access to memory by byte is slow and undesirable. -
*/
#define SLOW_BYTE_ACCESS 0
/* Add any extra modes needed to represent the condition code.
CCFPmode is used for FPU, but should we use a separate reg? */
-#define EXTRA_CC_MODES CCFPmode
-
-/* the name for the mode above */
-#define EXTRA_CC_NAMES "CCFPmode"
+#define EXTRA_CC_MODES CC(CCFPmode, "CCFP")
/* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
return the mode to be used for the comparison. For floating-point, CCFPmode
return 4;
\f
/* cost of moving one register class to another */
-#define REGISTER_MOVE_COST(CLASS1, CLASS2) register_move_cost(CLASS1, CLASS2)
+#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
+ register_move_cost (CLASS1, CLASS2)
/* Tell emit-rtl.c how to initialize special values on a per-function base. */
extern int optimize;
{ /* all bets are off */ CC_STATUS_INIT; } \
if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
&& cc_status.value2 \
- && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
- printf ("here!\n", cc_status.value2 = 0); \
+ && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
+ { \
+ printf ("here!\n"); \
+ cc_status.value2 = 0; \
+ } \
}
\f
/* Control the assembler format that we output. */
/* do we need reg def's R0 = %0 etc ??? */ \
)
#else
-#define ASM_FILE_START(FILE) (0)
+#define ASM_FILE_START(FILE)
#endif
This sequence is indexed by compiler's hard-register-number (see above). */
#define REGISTER_NAMES \
-{"r0", "r1", "r2", "r3", "r4", "fp", "sp", "pc", \
+{"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
"ac0", "ac1", "ac2", "ac3", "ac4", "ac5" }
-/* How to renumber registers for dbx and gdb. */
-
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
-
/* This is how to output the definition of a user-level label named NAME,
such as the label on a static function or variable NAME. */
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf (LABEL, "*%s_%d", PREFIX, NUM)
-/* This is how to output an assembler line defining a `double' constant. */
-
-#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
- fprintf (FILE, "\tdouble %.20e\n", (VALUE))
-
-/* This is how to output an assembler line defining a `float' constant. */
-
-#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
- fprintf (FILE, "\tfloat %.12e\n", (VALUE))
-
-/* This is how to output an assembler line defining an `int' constant. */
-
-#define ASM_OUTPUT_INT(FILE,VALUE) \
-( fprintf (FILE, "\t.word "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-/* Likewise for `short' and `char' constants. */
-
-#define ASM_OUTPUT_SHORT(FILE,VALUE) \
-( fprintf (FILE, "\t.word "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, " /*short*/\n"))
-
-#define ASM_OUTPUT_CHAR(FILE,VALUE) \
-( fprintf (FILE, "\t.byte "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, " /* char */\n"))
-
-/* This is how to output an assembler line for a numeric constant byte.-
-
- do we really NEED it ? let's output it with a comment and grep the
- assembly source ;-)
-*/
-
-#define ASM_OUTPUT_BYTE(FILE,VALUE) \
- fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
-
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
output_ascii (FILE, P, SIZE)
-#define ASM_OUTPUT_ADDR_VEC_PROLOGUE(FILE, MODE, LEN) \
- fprintf (FILE, "\t/* HELP! */\n");
-
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
- fprintf (FILE, "\t.word L_%d\n", VALUE)
+ fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
/* This is how to output an element of a case-vector that is relative.
Don't define this if it is not supported. */
*/
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
- if ((LOG) != 0) \
- fprintf (FILE, "\t.align %d\n", 1<<(LOG))
+ switch (LOG) \
+ { \
+ case 0: \
+ break; \
+ case 1: \
+ fprintf (FILE, "\t.even\n"); \
+ break; \
+ default: \
+ abort (); \
+ }
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
- fprintf (FILE, "\t.=.+ %d\n", (SIZE))
+ fprintf (FILE, "\t.=.+ %o\n", (SIZE))
/* This says how to output an assembler line
to define a global common symbol. */
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), "\n"), \
assemble_name ((FILE), (NAME)), \
- fprintf ((FILE), ": .=.+ %d\n", (ROUNDED)) \
+ fprintf ((FILE), ": .=.+ %o\n", (ROUNDED)) \
)
/* This says how to output an assembler line
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( assemble_name ((FILE), (NAME)), \
- fprintf ((FILE), ":\t.=.+ %d\n", (ROUNDED)))
+ fprintf ((FILE), ":\t.=.+ %o\n", (ROUNDED)))
/* Store in OUTPUT a string (made with alloca) containing
an assembler-name for a local static variable named NAME.
( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
-/* Define the parentheses used to group arithmetic operations
- in assembler code. */
-
-#define ASM_OPEN_PAREN "("
-#define ASM_CLOSE_PAREN ")"
-
-/* Define results of standard character escape sequences. */
-#define TARGET_BELL 007
-#define TARGET_BS 010
-#define TARGET_TAB 011
-#define TARGET_NEWLINE 012
-#define TARGET_VT 013
-#define TARGET_FF 014
-#define TARGET_CR 015
-
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
For `%' followed by punctuation, CODE is the punctuation and X is null.
{ union { double d; int i[2]; } u; \
u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
fprintf (FILE, "#%.20e", u.d); } \
- else { putc ('$', FILE); output_addr_const (FILE, X); }}
+ else { putc ('$', FILE); output_addr_const_pdp11 (FILE, X); }}
\f
/* Print a memory address as an operand to reference that memory location. */
fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
)
-
-#define ASM_IDENTIFY_GCC(FILE) \
- fprintf(FILE, "gcc_compiled:\n")
-
-#define ASM_OUTPUT_DOUBLE_INT(a,b) fprintf(a,"%d", b)
-
/* trampoline - how should i do it in separate i+d ?
have some allocate_trampoline magic???
if (TARGET_SPLIT) \
abort(); \
\
- ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x9400+STATIC_CHAIN_REGNUM)); \
- ASM_OUTPUT_INT (FILE, const0_rtx); \
- ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x0058)); \
- ASM_OUTPUT_INT (FILE, const0_rtx); \
+ assemble_aligned_integer (2, GEN_INT (0x9400+STATIC_CHAIN_REGNUM)); \
+ assemble_aligned_integer (2, const0_rtx); \
+ assemble_aligned_integer (2, GEN_INT(0x0058)); \
+ assemble_aligned_integer (2, const0_rtx); \
}
#define TRAMPOLINE_SIZE 8
-#define TRAMPOLINE_ALIGN 16
+#define TRAMPOLINE_ALIGNMENT 16
/* Emit RTL insns to initialize the variable parts of a trampoline.
FNADDR is an RTX for the address of the function's pure code.
if (TARGET_SPLIT) \
abort(); \
\
- emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 2)), CXT); \
- emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), FNADDR); \
+ emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 2)), CXT); \
+ emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), FNADDR); \
}
LEVEL is the optimization level specified; 2 if -O2 is
specified, 1 if -O is specified, and 0 if neither is specified. */
-#define OPTIMIZATION_OPTIONS(LEVEL) \
+#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
{ \
if (LEVEL >= 3) \
{ \
- flag_inline_functions = 1; \
+ if (! SIZE) \
+ flag_inline_functions = 1; \
flag_omit_frame_pointer = 1; \
/* flag_unroll_loops = 1; */ \
} \
there is something wrong in MULT because MULT is not
as cheap as total = 2 even if we can shift!
- if TARGET_SPACE make mult etc cheap, but not 1, so when
+ if optimizing for size make mult etc cheap, but not 1, so when
in doubt the faster insn is chosen.
*/
#define RTX_COSTS(X,CODE,OUTER_CODE) \
case MULT: \
- if (TARGET_SPACE) \
+ if (optimize_size) \
total = COSTS_N_INSNS(2); \
else \
total = COSTS_N_INSNS (11); \
break; \
case DIV: \
- if (TARGET_SPACE) \
+ if (optimize_size) \
total = COSTS_N_INSNS(2); \
else \
total = COSTS_N_INSNS (25); \
break; \
case MOD: \
- if (TARGET_SPACE) \
+ if (optimize_size) \
total = COSTS_N_INSNS(2); \
else \
total = COSTS_N_INSNS (26); \
break; \
case ABS: \
- /* equivalent to length, so same for TARGET_SPACE */ \
+ /* equivalent to length, so same for optimize_size */ \
total = COSTS_N_INSNS (3); \
break; \
case ZERO_EXTEND: \
case ASHIFT: \
case LSHIFTRT: \
case ASHIFTRT: \
- if (TARGET_SPACE) \
+ if (optimize_size) \
total = COSTS_N_INSNS(1); \
else if (GET_MODE(X) == QImode) \
{ \
#define COMPARE_FLAG_MODE HImode
-
OSDN Git Service
