/* Definitions of target machine for GNU compiler.
Matsushita MN10300 series
- Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
- Free Software Foundation, Inc.
+ Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
+the Free Software Foundation; either version 3, or (at your option)
any later version.
-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
-#include "svr4.h"
#undef ASM_SPEC
-#undef ASM_FINAL_SPEC
#undef LIB_SPEC
#undef ENDFILE_SPEC
#undef LINK_SPEC
/* Names to predefine in the preprocessor for this target machine. */
-#define CPP_PREDEFINES "-D__mn10300__ -D__MN10300__"
-
-#define CPP_SPEC "%{mam33:-D__AM33__}"
-
-/* Run-time compilation parameters selecting different hardware subsets. */
-
-extern int target_flags;
+#define TARGET_CPU_CPP_BUILTINS() \
+ do \
+ { \
+ builtin_define ("__mn10300__"); \
+ builtin_define ("__MN10300__"); \
+ builtin_assert ("cpu=mn10300"); \
+ builtin_assert ("machine=mn10300"); \
+ } \
+ while (0)
-/* Macros used in the machine description to test the flags. */
+#define CPP_SPEC "%{mam33:-D__AM33__} %{mam33-2:-D__AM33__=2 -D__AM33_2__}"
-/* Macro to define tables used to set the flags.
- This is a list in braces of pairs in braces,
- each pair being { "NAME", VALUE }
- where VALUE is the bits to set or minus the bits to clear.
- An empty string NAME is used to identify the default VALUE. */
+extern GTY(()) int mn10300_unspec_int_label_counter;
-/* Generate code to work around mul/mulq bugs on the mn10300. */
-#define TARGET_MULT_BUG (target_flags & 0x1)
+enum processor_type {
+ PROCESSOR_MN10300,
+ PROCESSOR_AM33,
+ PROCESSOR_AM33_2
+};
-/* Generate code for the AM33 processor. */
-#define TARGET_AM33 (target_flags & 0x2)
+extern enum processor_type mn10300_processor;
-#define TARGET_SWITCHES \
- {{ "mult-bug", 0x1, N_("Work around hardware multiply bug")}, \
- { "no-mult-bug", -0x1, N_("Do not work around hardware multiply bug")},\
- { "am33", 0x2, N_("Target the AM33 processor")}, \
- { "am33", -(0x1), ""},\
- { "no-am33", -0x2, ""}, \
- { "no-crt0", 0, N_("No default crt0.o") }, \
- { "relax", 0, N_("Enable linker relaxations") }, \
- { "", TARGET_DEFAULT, NULL}}
+#define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33)
+#define TARGET_AM33_2 (mn10300_processor == PROCESSOR_AM33_2)
-#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT 0x1
+#ifndef PROCESSOR_DEFAULT
+#define PROCESSOR_DEFAULT PROCESSOR_MN10300
#endif
/* Print subsidiary information on the compiler version in use. */
This is not true on the Matsushita MN10300. */
#define WORDS_BIG_ENDIAN 0
-/* Number of bits in an addressable storage unit */
-#define BITS_PER_UNIT 8
-
-/* Width in bits of a "word", which is the contents of a machine register.
- Note that this is not necessarily the width of data type `int';
- if using 16-bit ints on a 68000, this would still be 32.
- But on a machine with 16-bit registers, this would be 16. */
-#define BITS_PER_WORD 32
-
/* Width of a word, in units (bytes). */
#define UNITS_PER_WORD 4
-/* Width in bits of a pointer.
- See also the macro `Pmode' defined below. */
-#define POINTER_SIZE 32
-
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY 32
-/* The stack goes in 32 bit lumps. */
+/* The stack goes in 32-bit lumps. */
#define STACK_BOUNDARY 32
/* Allocation boundary (in *bits*) for the code of a function.
would improve performance. */
#define FUNCTION_BOUNDARY 8
-/* No data type wants to be aligned rounder than this. */
+/* No data type wants to be aligned rounder than this. */
#define BIGGEST_ALIGNMENT 32
/* Alignment of field after `int : 0' in a structure. */
All registers that the compiler knows about must be given numbers,
even those that are not normally considered general registers. */
-#define FIRST_PSEUDO_REGISTER 18
+#define FIRST_PSEUDO_REGISTER 50
/* Specify machine-specific register numbers. */
#define FIRST_DATA_REGNUM 0
#define LAST_ADDRESS_REGNUM 8
#define FIRST_EXTENDED_REGNUM 10
#define LAST_EXTENDED_REGNUM 17
+#define FIRST_FP_REGNUM 18
+#define LAST_FP_REGNUM 49
+#define FIRST_ARGUMENT_REGNUM 0
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
and are not available for the register allocator. */
#define FIXED_REGISTERS \
- { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
+ { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \
+ , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
+ , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
+ }
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
like. */
#define CALL_USED_REGISTERS \
- { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0}
+ { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \
+ , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
+ , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
+ }
+
+/* Note: The definition of CALL_REALLY_USED_REGISTERS is not
+ redundant. It is needed when compiling in PIC mode because
+ the a2 register becomes fixed (and hence must be marked as
+ call_used) but in order to preserve the ABI it is not marked
+ as call_really_used. */
+#define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
#define REG_ALLOC_ORDER \
- { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9}
+ { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
+ , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
+ , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33 \
+ }
#define CONDITIONAL_REGISTER_USAGE \
{ \
+ unsigned int i; \
+ \
if (!TARGET_AM33) \
{ \
for (i = FIRST_EXTENDED_REGNUM; \
i <= LAST_EXTENDED_REGNUM; i++) \
fixed_regs[i] = call_used_regs[i] = 1; \
} \
+ if (!TARGET_AM33_2) \
+ { \
+ for (i = FIRST_FP_REGNUM; \
+ i <= LAST_FP_REGNUM; \
+ i++) \
+ fixed_regs[i] = call_used_regs[i] = 1; \
+ } \
+ if (flag_pic) \
+ fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
+ call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;\
}
/* Return number of consecutive hard regs needed starting at reg REGNO
/* 4 data, and effectively 3 address registers is small as far as I'm
concerned. */
-#define SMALL_REGISTER_CLASSES 1
+#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
\f
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
For any two classes, it is very desirable that there be another
class that represents their union. */
-
+
enum reg_class {
NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
- DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
+ DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
- SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
+ SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
+ FP_REGS, FP_ACC_REGS,
GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
};
#define N_REG_CLASSES (int) LIM_REG_CLASSES
-/* Give names of register classes as strings for dump file. */
+/* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \
{ "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
"EXTENDED_REGS", \
"DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \
"SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \
+ "FP_REGS", "FP_ACC_REGS", \
"GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
/* Define which registers fit in which classes.
of length N_REG_CLASSES. */
#define REG_CLASS_CONTENTS \
-{ {0}, /* No regs */ \
- {0x0000f}, /* DATA_REGS */ \
- {0x001f0}, /* ADDRESS_REGS */ \
- {0x00200}, /* SP_REGS */ \
- {0x001ff}, /* DATA_OR_ADDRESS_REGS */\
- {0x003f0}, /* SP_OR_ADDRESS_REGS */\
- {0x3fc00}, /* EXTENDED_REGS */ \
- {0x3fc0f}, /* DATA_OR_EXTENDED_REGS */ \
- {0x3fdf0}, /* ADDRESS_OR_EXTENDED_REGS */ \
- {0x3fe00}, /* SP_OR_EXTENDED_REGS */ \
- {0x3fff0}, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \
- {0x3fdff}, /* GENERAL_REGS */ \
- {0x3ffff}, /* ALL_REGS */ \
+{ { 0, 0 }, /* No regs */ \
+ { 0x0000f, 0 }, /* DATA_REGS */ \
+ { 0x001f0, 0 }, /* ADDRESS_REGS */ \
+ { 0x00200, 0 }, /* SP_REGS */ \
+ { 0x001ff, 0 }, /* DATA_OR_ADDRESS_REGS */\
+ { 0x003f0, 0 }, /* SP_OR_ADDRESS_REGS */\
+ { 0x3fc00, 0 }, /* EXTENDED_REGS */ \
+ { 0x3fc0f, 0 }, /* DATA_OR_EXTENDED_REGS */ \
+ { 0x3fdf0, 0 }, /* ADDRESS_OR_EXTENDED_REGS */ \
+ { 0x3fe00, 0 }, /* SP_OR_EXTENDED_REGS */ \
+ { 0x3fff0, 0 }, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \
+ { 0xfffc0000, 0x3ffff }, /* FP_REGS */ \
+ { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \
+ { 0x3fdff, 0 }, /* GENERAL_REGS */ \
+ { 0xffffffff, 0x3ffff } /* ALL_REGS */ \
+}
+
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ GENERAL_REGS, FP_REGS, LIM_REG_CLASSES \
}
/* The same information, inverted:
(REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \
(REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \
(REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
+ (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \
NO_REGS)
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
#define BASE_REG_CLASS SP_OR_ADDRESS_REGS
-/* Get reg_class from a letter such as appears in the machine description. */
-
-#define REG_CLASS_FROM_LETTER(C) \
- ((C) == 'd' ? DATA_REGS : \
- (C) == 'a' ? ADDRESS_REGS : \
- (C) == 'y' ? SP_REGS : \
- ! TARGET_AM33 ? NO_REGS : \
- (C) == 'x' ? EXTENDED_REGS : \
- NO_REGS)
-
/* Macros to check register numbers against specific register classes. */
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
has been allocated, which happens in local-alloc.c. */
#ifndef REG_OK_STRICT
-# define REGNO_IN_RANGE_P(regno,min,max) \
- (((regno) >= (min) && (regno) <= (max)) || (regno) >= FIRST_PSEUDO_REGISTER)
+# define REG_STRICT 0
#else
-# define REGNO_IN_RANGE_P(regno,min,max) \
- (((regno) >= (min) && (regno) <= (max)) \
- || (reg_renumber \
- && reg_renumber[(regno)] >= (min) && reg_renumber[(regno)] <= (max)))
+# define REG_STRICT 1
#endif
-#define REGNO_DATA_P(regno) \
- REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM)
-#define REGNO_ADDRESS_P(regno) \
- REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM)
-#define REGNO_SP_P(regno) \
- REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM)
-#define REGNO_EXTENDED_P(regno) \
- REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM)
-#define REGNO_AM33_P(regno) \
- (REGNO_DATA_P ((regno)) || REGNO_ADDRESS_P ((regno)) \
- || REGNO_EXTENDED_P ((regno)))
-
+# define REGNO_IN_RANGE_P(regno,min,max,strict) \
+ (IN_RANGE ((regno), (min), (max)) \
+ || ((strict) \
+ ? (reg_renumber \
+ && reg_renumber[(regno)] >= (min) \
+ && reg_renumber[(regno)] <= (max)) \
+ : (regno) >= FIRST_PSEUDO_REGISTER))
+
+#define REGNO_DATA_P(regno, strict) \
+ (REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM, \
+ (strict)))
+#define REGNO_ADDRESS_P(regno, strict) \
+ (REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM, \
+ (strict)))
+#define REGNO_SP_P(regno, strict) \
+ (REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM, \
+ (strict)))
+#define REGNO_EXTENDED_P(regno, strict) \
+ (REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM, \
+ (strict)))
+#define REGNO_AM33_P(regno, strict) \
+ (REGNO_DATA_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)) \
+ || REGNO_EXTENDED_P ((regno), (strict)))
+#define REGNO_FP_P(regno, strict) \
+ (REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM, (strict)))
+
+#define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \
+ (REGNO_SP_P ((regno), (strict)) \
+ || REGNO_ADDRESS_P ((regno), (strict)) \
+ || REGNO_EXTENDED_P ((regno), (strict)))
#define REGNO_OK_FOR_BASE_P(regno) \
- (REGNO_SP_P ((regno)) \
- || REGNO_ADDRESS_P ((regno)) || REGNO_EXTENDED_P ((regno)))
-#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
+ (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT))
+#define REG_OK_FOR_BASE_P(X) \
+ (REGNO_OK_FOR_BASE_P (REGNO (X)))
+#define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \
+ (REGNO_SP_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)))
#define REGNO_OK_FOR_BIT_BASE_P(regno) \
- (REGNO_SP_P ((regno)) || REGNO_ADDRESS_P ((regno)))
-#define REG_OK_FOR_BIT_BASE_P(X) REGNO_OK_FOR_BIT_BASE_P (REGNO (X))
+ (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT))
+#define REG_OK_FOR_BIT_BASE_P(X) \
+ (REGNO_OK_FOR_BIT_BASE_P (REGNO (X)))
+#define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \
+ (REGNO_DATA_P ((regno), (strict)) || REGNO_EXTENDED_P ((regno), (strict)))
#define REGNO_OK_FOR_INDEX_P(regno) \
- (REGNO_DATA_P ((regno)) || REGNO_EXTENDED_P ((regno)))
-#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
+ (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT))
+#define REG_OK_FOR_INDEX_P(X) \
+ (REGNO_OK_FOR_INDEX_P (REGNO (X)))
/* Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.
(!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
- secondary_reload_class(CLASS,MODE,IN)
+ mn10300_secondary_reload_class(CLASS,MODE,IN)
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-/* The letters I, J, K, L, M, N, O, P in a register constraint string
- can be used to stand for particular ranges of immediate operands.
- This macro defines what the ranges are.
- C is the letter, and VALUE is a constant value.
- Return 1 if VALUE is in the range specified by C. */
+/* A class that contains registers which the compiler must always
+ access in a mode that is the same size as the mode in which it
+ loaded the register. */
+#define CLASS_CANNOT_CHANGE_SIZE FP_REGS
+
+/* Return 1 if VALUE is in the range specified. */
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
-#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
-#define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
-#define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
-#define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
-#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
-#define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
-
-#define CONST_OK_FOR_LETTER_P(VALUE, C) \
- ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
- (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
- (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
- (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
- (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
- (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
-
-
-/* Similar, but for floating constants, and defining letters G and H.
- Here VALUE is the CONST_DOUBLE rtx itself.
-
- `G' is a floating-point zero. */
-
-#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
- ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
- && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
-
\f
/* Stack layout; function entry, exit and calling. */
#define STACK_GROWS_DOWNWARD
-/* Define this if the nominal address of the stack frame
+/* Define this to nonzero if the nominal address of the stack frame
is at the high-address end of the local variables;
that is, each additional local variable allocated
goes at a more negative offset in the frame. */
-#define FRAME_GROWS_DOWNWARD
+#define FRAME_GROWS_DOWNWARD 1
/* Offset within stack frame to start allocating local variables at.
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
-#define CAN_ELIMINATE(FROM, TO) 1
-
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
OFFSET = initial_offset (FROM, TO)
/* We can debug without frame pointers on the mn10300, so eliminate
them whenever possible. */
-#define FRAME_POINTER_REQUIRED 0
#define CAN_DEBUG_WITHOUT_FP
-/* A guess for the MN10300. */
-#define PROMOTE_PROTOTYPES 1
-
-/* Value is the number of bytes of arguments automatically
- popped when returning from a subroutine call.
- FUNDECL is the declaration node of the function (as a tree),
- FUNTYPE is the data type of the function (as a tree),
- or for a library call it is an identifier node for the subroutine name.
- SIZE is the number of bytes of arguments passed on the stack. */
-
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
-
/* We use d0/d1 for passing parameters, so allocate 8 bytes of space
for a register flushback area. */
#define REG_PARM_STACK_SPACE(DECL) 8
-#define OUTGOING_REG_PARM_STACK_SPACE
+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
#define ACCUMULATE_OUTGOING_ARGS 1
/* So we can allocate space for return pointers once for the function
#define STACK_POINTER_OFFSET 4
/* 1 if N is a possible register number for function argument passing.
- On the MN10300, no registers are used in this way. */
+ On the MN10300, d0 and d1 are used in this way. */
#define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
On the MN10300, the offset starts at 0. */
-#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
((CUM).nbytes = 0)
/* Update the data in CUM to advance over an argument
NAMED is nonzero if this argument is a named parameter
(otherwise it is an extra parameter matching an ellipsis). */
-/* On the MN10300 all args are pushed. */
-
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (&CUM, MODE, TYPE, NAMED)
-#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
- function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
-\f
-#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
- ((TYPE) && int_size_in_bytes (TYPE) > 8)
-
-#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
- ((TYPE) && int_size_in_bytes (TYPE) > 8)
-
-/* Define how to find the value returned by a function.
- VALTYPE is the data type of the value (as a tree).
- If the precise function being called is known, FUNC is its FUNCTION_DECL;
- otherwise, FUNC is 0. */
-
-#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) \
- ? FIRST_ADDRESS_REGNUM : FIRST_DATA_REGNUM)
-
-/* Define how to find the value returned by a library function
- assuming the value has mode MODE. */
+#define FUNCTION_VALUE_REGNO_P(N) mn10300_function_value_regno_p (N)
-#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM)
-
-/* 1 if N is a possible register number for a function value. */
-
-#define FUNCTION_VALUE_REGNO_P(N) \
- ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM)
-
-/* Return values > 8 bytes in length in memory. */
#define DEFAULT_PCC_STRUCT_RETURN 0
-#define RETURN_IN_MEMORY(TYPE) \
- (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode)
-
-/* Register in which address to store a structure value
- is passed to a function. On the MN10300 it's passed as
- the first parameter. */
-
-#define STRUCT_VALUE FIRST_DATA_REGNUM
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
#define FUNCTION_PROFILER(FILE, LABELNO) ;
-#define TRAMPOLINE_TEMPLATE(FILE) \
- do { \
- fprintf (FILE, "\tadd -4,sp\n"); \
- fprintf (FILE, "\t.long 0x0004fffa\n"); \
- fprintf (FILE, "\tmov (0,sp),a0\n"); \
- fprintf (FILE, "\tadd 4,sp\n"); \
- fprintf (FILE, "\tmov (13,a0),a1\n"); \
- fprintf (FILE, "\tmov (17,a0),a0\n"); \
- fprintf (FILE, "\tjmp (a0)\n"); \
- fprintf (FILE, "\t.long 0\n"); \
- fprintf (FILE, "\t.long 0\n"); \
- } while (0)
-
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 0x1b
#define TRAMPOLINE_ALIGNMENT 32
-/* Emit RTL insns to initialize the variable parts of a trampoline.
- FNADDR is an RTX for the address of the function's pure code.
- CXT is an RTX for the static chain value for the function. */
-
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \
- (CXT)); \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \
- (FNADDR)); \
-}
/* A C expression whose value is RTL representing the value of the return
address for the frame COUNT steps up from the current frame.
((COUNT == 0) \
? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
: (rtx) 0)
-
-/* Emit code for a call to builtin_saveregs. We must emit USE insns which
- reference the 2 integer arg registers.
- Ordinarily they are not call used registers, but they are for
- _builtin_saveregs, so we must make this explicit. */
-
-#define EXPAND_BUILTIN_SAVEREGS() mn10300_builtin_saveregs ()
-
-/* Implement `va_start' for varargs and stdarg. */
-#define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
- mn10300_va_start (stdarg, valist, nextarg)
-
-/* Implement `va_arg'. */
-#define EXPAND_BUILTIN_VA_ARG(valist, type) \
- mn10300_va_arg (valist, type)
-
-/* Addressing modes, and classification of registers for them. */
-
\f
-/* 1 if X is an rtx for a constant that is a valid address. */
-
-#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
-
-/* Extra constraints. */
-
-#define OK_FOR_R(OP) \
- (GET_CODE (OP) == MEM \
- && GET_MODE (OP) == QImode \
- && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
- || (GET_CODE (XEXP (OP, 0)) == REG \
- && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
- && XEXP (OP, 0) != stack_pointer_rtx) \
- || (GET_CODE (XEXP (OP, 0)) == PLUS \
- && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
- && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \
- && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
- && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
- && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
-
-#define EXTRA_CONSTRAINT(OP, C) \
- ((C) == 'R' ? OK_FOR_R (OP) \
- : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \
- : 0)
-
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
\f
#define HAVE_POST_INCREMENT (TARGET_AM33)
-/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
- that is a valid memory address for an instruction.
- The MODE argument is the machine mode for the MEM expression
- that wants to use this address.
-
- The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
- except for CONSTANT_ADDRESS_P which is actually
- machine-independent.
-
- On the mn10300, the value in the address register must be
- in the same memory space/segment as the effective address.
-
- This is problematical for reload since it does not understand
- that base+index != index+base in a memory reference.
-
- Note it is still possible to use reg+reg addressing modes,
- it's just much more difficult. For a discussion of a possible
- workaround and solution, see the comments in pa.c before the
- function record_unscaled_index_insn_codes. */
-
/* Accept either REG or SUBREG where a register is valid. */
-
-#define RTX_OK_FOR_BASE_P(X) \
- ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
+
+#define RTX_OK_FOR_BASE_P(X, strict) \
+ ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \
+ (strict))) \
|| (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
- && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
-
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
-{ \
- if (CONSTANT_ADDRESS_P (X)) \
- goto ADDR; \
- if (RTX_OK_FOR_BASE_P (X)) \
- goto ADDR; \
- if (TARGET_AM33 \
- && GET_CODE (X) == POST_INC \
- && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
- && (MODE == SImode || MODE == SFmode || MODE == HImode))\
- goto ADDR; \
- if (GET_CODE (X) == PLUS) \
- { \
- rtx base = 0, index = 0; \
- if (REG_P (XEXP (X, 0)) \
- && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
- base = XEXP (X, 0), index = XEXP (X, 1); \
- if (REG_P (XEXP (X, 1)) \
- && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
- base = XEXP (X, 1), index = XEXP (X, 0); \
- if (base != 0 && index != 0) \
- { \
- if (GET_CODE (index) == CONST_INT) \
- goto ADDR; \
- } \
- } \
-}
+ && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \
+ (strict))))
\f
-/* Try machine-dependent ways of modifying an illegitimate address
- to be legitimate. If we find one, return the new, valid address.
- This macro is used in only one place: `memory_address' in explow.c.
-
- OLDX is the address as it was before break_out_memory_refs was called.
- In some cases it is useful to look at this to decide what needs to be done.
-
- MODE and WIN are passed so that this macro can use
- GO_IF_LEGITIMATE_ADDRESS.
-
- It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output. */
-
-#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
-{ rtx orig_x = (X); \
- (X) = legitimize_address (X, OLDX, MODE); \
- if ((X) != orig_x && memory_address_p (MODE, X)) \
- goto WIN; }
-
-/* Go to LABEL if ADDR (a legitimate address expression)
- has an effect that depends on the machine mode it is used for. */
-
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
- if (GET_CODE (ADDR) == POST_INC) \
- goto LABEL
/* Nonzero if the constant value X is a legitimate general operand.
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
#define LEGITIMATE_CONSTANT_P(X) 1
+/* Zero if this needs fixing up to become PIC. */
+
+#define LEGITIMATE_PIC_OPERAND_P(X) (legitimate_pic_operand_p (X))
+
+/* Register to hold the addressing base for
+ position independent code access to data items. */
+#define PIC_OFFSET_TABLE_REGNUM PIC_REG
+
+/* The name of the pseudo-symbol representing the Global Offset Table. */
+#define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
+
+#define SYMBOLIC_CONST_P(X) \
+((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \
+ && ! LEGITIMATE_PIC_OPERAND_P (X))
+
+/* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */
+#define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
+
+/* Recognize machine-specific patterns that may appear within
+ constants. Used for PIC-specific UNSPECs. */
+#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
+ do \
+ if (GET_CODE (X) == UNSPEC) \
+ { \
+ switch (XINT ((X), 1)) \
+ { \
+ case UNSPEC_INT_LABEL: \
+ asm_fprintf ((STREAM), ".%LLIL" HOST_WIDE_INT_PRINT_DEC, \
+ INTVAL (XVECEXP ((X), 0, 0))); \
+ break; \
+ case UNSPEC_PIC: \
+ /* GLOBAL_OFFSET_TABLE or local symbols, no suffix. */ \
+ output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
+ break; \
+ case UNSPEC_GOT: \
+ output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
+ fputs ("@GOT", (STREAM)); \
+ break; \
+ case UNSPEC_GOTOFF: \
+ output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
+ fputs ("@GOTOFF", (STREAM)); \
+ break; \
+ case UNSPEC_PLT: \
+ output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
+ fputs ("@PLT", (STREAM)); \
+ break; \
+ case UNSPEC_GOTSYM_OFF: \
+ assemble_name (STREAM, GOT_SYMBOL_NAME); \
+ fputs ("-(", STREAM); \
+ output_addr_const (STREAM, XVECEXP (X, 0, 0)); \
+ fputs ("-.)", STREAM); \
+ break; \
+ default: \
+ goto FAIL; \
+ } \
+ break; \
+ } \
+ else \
+ goto FAIL; \
+ while (0)
\f
/* Tell final.c how to eliminate redundant test instructions. */
/* Here we define machine-dependent flags and fields in cc_status
- (see `conditions.h'). No extra ones are needed for the vax. */
+ (see `conditions.h'). No extra ones are needed for the VAX. */
/* Store in cc_status the expressions
that the condition codes will describe
#define CC_NO_CARRY CC_NO_OVERFLOW
#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
-/* Compute the cost of computing a constant rtl expression RTX
- whose rtx-code is CODE. The body of this macro is a portion
- of a switch statement. If the code is computed here,
- return it with a return statement. Otherwise, break from the switch. */
-
-#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
- case CONST_INT: \
- /* Zeros are extremely cheap. */ \
- if (INTVAL (RTX) == 0 && OUTER_CODE == SET) \
- return 0; \
- /* If it fits in 8 bits, then it's still relatively cheap. */ \
- if (INT_8_BITS (INTVAL (RTX))) \
- return 1; \
- /* This is the "base" cost, includes constants where either the \
- upper or lower 16bits are all zeros. */ \
- if (INT_16_BITS (INTVAL (RTX)) \
- || (INTVAL (RTX) & 0xffff) == 0 \
- || (INTVAL (RTX) & 0xffff0000) == 0) \
- return 2; \
- return 4; \
- /* These are more costly than a CONST_INT, but we can relax them, \
- so they're less costly than a CONST_DOUBLE. */ \
- case CONST: \
- case LABEL_REF: \
- case SYMBOL_REF: \
- return 6; \
- /* We don't optimize CONST_DOUBLEs well nor do we relax them well, \
- so their cost is very high. */ \
- case CONST_DOUBLE: \
- return 8;
-
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
! TARGET_AM33 ? 6 : \
(CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
(CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
+ (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \
(CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
4)
-#define ADDRESS_COST(X) mn10300_address_cost((X), 0)
-
-/* A crude cut at RTX_COSTS for the MN10300. */
-
-/* Provide the costs of a rtl expression. This is in the body of a
- switch on CODE. */
-#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
- case UMOD: \
- case UDIV: \
- case MOD: \
- case DIV: \
- return 8; \
- case MULT: \
- return 8;
-
/* Nonzero if access to memory by bytes or half words is no faster
than accessing full words. */
#define SLOW_BYTE_ACCESS 1
-/* Dispatch tables on the mn10300 are extremely expensive in terms of code
- and readonly data size. So we crank up the case threshold value to
- encourage a series of if/else comparisons to implement many small switch
- statements. In theory, this value could be increased much more if we
- were solely optimizing for space, but we keep it "reasonable" to avoid
- serious code efficiency lossage. */
-#define CASE_VALUES_THRESHOLD 6
-
#define NO_FUNCTION_CSE
/* According expr.c, a value of around 6 should minimize code size, and
for the MN10300 series, that's our primary concern. */
-#define MOVE_RATIO 6
+#define MOVE_RATIO(speed) 6
#define TEXT_SECTION_ASM_OP "\t.section .text"
#define DATA_SECTION_ASM_OP "\t.section .data"
#define BSS_SECTION_ASM_OP "\t.section .bss"
-/* Output at beginning/end of assembler file. */
-#undef ASM_FILE_START
-#define ASM_FILE_START(FILE) asm_file_start(FILE)
-
#define ASM_COMMENT_START "#"
/* Output to assembler file text saying following lines
#define ASM_APP_OFF "#NO_APP\n"
-/* This is how to output an assembler line defining a `double' constant.
- It is .dfloat or .gfloat, depending. */
-
-#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
-do { char dstr[30]; \
- REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
- fprintf (FILE, "\t.double %s\n", dstr); \
- } while (0)
-
-
-/* This is how to output an assembler line defining a `float' constant. */
-#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
-do { char dstr[30]; \
- REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
- fprintf (FILE, "\t.float %s\n", dstr); \
- } while (0)
-
-/* This is how to output an assembler line defining an `int' constant. */
-
-#define ASM_OUTPUT_INT(FILE, VALUE) \
-( fprintf (FILE, "\t.long "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-/* Likewise for `char' and `short' constants. */
-
-#define ASM_OUTPUT_SHORT(FILE, VALUE) \
-( fprintf (FILE, "\t.hword "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-#define ASM_OUTPUT_CHAR(FILE, VALUE) \
-( fprintf (FILE, "\t.byte "), \
- output_addr_const (FILE, (VALUE)), \
- fprintf (FILE, "\n"))
-
-/* This is how to output an assembler line for a numeric constant byte. */
-#define ASM_OUTPUT_BYTE(FILE, VALUE) \
- fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
+#undef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX "_"
/* This says how to output the assembler to define a global
uninitialized but not common symbol.
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
-/* This is how to output the definition of a user-level label named NAME,
- such as the label on a static function or variable NAME. */
-
-#define ASM_OUTPUT_LABEL(FILE, NAME) \
- do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
-
-/* This is how to output a command to make the user-level label named NAME
- defined for reference from other files. */
-
-#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
- do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
+/* Globalizing directive for a label. */
+#define GLOBAL_ASM_OP "\t.global "
/* This is how to output a reference to a user-level label named NAME.
`assemble_name' uses this. */
#undef ASM_OUTPUT_LABELREF
-#define ASM_OUTPUT_LABELREF(FILE, NAME) \
- do { \
- const char* real_name; \
- STRIP_NAME_ENCODING (real_name, (NAME)); \
- fprintf (FILE, "_%s", real_name); \
- } while (0)
+#define ASM_OUTPUT_LABELREF(FILE, NAME) \
+ asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME))
-/* Store in OUTPUT a string (made with alloca) containing
- an assembler-name for a local static variable named NAME.
- LABELNO is an integer which is different for each call. */
-
-#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
-( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
- sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
+#define ASM_PN_FORMAT "%s___%lu"
/* This is how we tell the assembler that two symbols have the same value. */
#define REGISTER_NAMES \
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \
+, "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \
+, "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \
+, "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \
+, "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \
}
#define ADDITIONAL_REGISTER_NAMES \
{"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \
{"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \
{"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \
+, {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \
+, {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \
+, {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \
+, {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \
}
/* Print an instruction operand X on file FILE.
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
- asm_fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
+ fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
/* This is how to output an element of a case-vector that is relative. */
#define DWARF2_ASM_LINE_DEBUG_INFO 1
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
-
/* GDB always assumes the current function's frame begins at the value
of the stack pointer upon entry to the current function. Accessing
local variables and parameters passed on the stack is done using the
+ (frame_pointer_needed \
? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM)))
-/* Define to use software floating point emulator for REAL_ARITHMETIC and
- decimal <-> binary conversion. */
-#define REAL_ARITHMETIC
-
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE Pmode
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
-/* Specify the tree operation to be used to convert reals to integers. */
-#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
-
/* This flag, if defined, says the same insns that convert to a signed fixnum
also convert validly to an unsigned one. */
#define FIXUNS_TRUNC_LIKE_FIX_TRUNC
-/* This is the kind of divide that is easiest to do in the general case. */
-#define EASY_DIV_EXPR TRUNC_DIV_EXPR
-
/* Max number of bytes we can move from memory to memory
in one reasonably fast instruction. */
#define MOVE_MAX 4
#define FILE_ASM_OP "\t.file\n"
+typedef struct mn10300_cc_status_mdep
+ {
+ int fpCC;
+ }
+cc_status_mdep;
+
+#define CC_STATUS_MDEP cc_status_mdep
+
+#define CC_STATUS_MDEP_INIT (cc_status.mdep.fpCC = 0)
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