/* Subroutines for insn-output.c for Motorola 88000.
- Copyright (C) 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+ Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002, 2003 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@mcc.com)
- Enhanced by Michael Meissner (meissner@osf.org)
- Currently supported by Tom Wood (wood@dg-rtp.dg.com)
+ Currently maintained by (gcc@dg-rtp.dg.com)
This file is part of GNU CC.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
-
-#include <stdio.h>
-#include <assert.h>
-#include <sys/types.h>
-#include <time.h>
-#include <ctype.h>
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "real.h"
#include "insn-config.h"
#include "conditions.h"
-#include "insn-flags.h"
#include "output.h"
#include "insn-attr.h"
#include "tree.h"
-#include "c-tree.h"
+#include "function.h"
#include "expr.h"
+#include "libfuncs.h"
+#include "c-tree.h"
#include "flags.h"
+#include "recog.h"
+#include "toplev.h"
+#include "tm_p.h"
+#include "target.h"
+#include "target-def.h"
-extern char *version_string;
-extern time_t time ();
-extern char *ctime ();
-extern int flag_traditional;
extern FILE *asm_out_file;
-static char out_sccs_id[] = "@(#)m88k.c 2.2.13.1 10/07/92 06:31:13";
-static char tm_sccs_id [] = TM_SCCS_ID;
-
-char *m88k_pound_sign = ""; /* Either # for SVR4 or empty for SVR3 */
-char *m88k_short_data;
-char *m88k_version;
+const char *m88k_pound_sign = ""; /* Either # for SVR4 or empty for SVR3 */
+const char *m88k_short_data;
+const char *m88k_version;
char m88k_volatile_code;
-int m88k_gp_threshold;
+unsigned m88k_gp_threshold = 0;
int m88k_prologue_done = 0; /* Ln directives can now be emitted */
int m88k_function_number = 0; /* Counter unique to each function */
int m88k_fp_offset = 0; /* offset of frame pointer if used */
int m88k_stack_size = 0; /* size of allocated stack (including frame) */
int m88k_case_index;
-int m88k_version_0300; /* Version is at least 03.00 */
rtx m88k_compare_reg; /* cmp output pseudo register */
rtx m88k_compare_op0; /* cmpsi operand 0 */
rtx m88k_compare_op1; /* cmpsi operand 1 */
-enum attr_cpu m88k_cpu; /* target cpu */
+enum processor_type m88k_cpu; /* target cpu */
+
+static void m88k_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
+static void m88k_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
+static void m88k_output_function_end_prologue PARAMS ((FILE *));
+static void m88k_output_function_begin_epilogue PARAMS ((FILE *));
+#if defined (CTOR_LIST_BEGIN) && !defined (OBJECT_FORMAT_ELF)
+static void m88k_svr3_asm_out_constructor PARAMS ((rtx, int));
+static void m88k_svr3_asm_out_destructor PARAMS ((rtx, int));
+#endif
+static void m88k_select_section PARAMS ((tree, int, unsigned HOST_WIDE_INT));
+static int m88k_adjust_cost PARAMS ((rtx, rtx, rtx, int));
+static void m88k_encode_section_info PARAMS ((tree, rtx, int));
+#ifdef AS_BUG_DOT_LABELS
+static void m88k_internal_label PARAMS ((FILE *, const char *, unsigned long));
+#endif
+static bool m88k_rtx_costs PARAMS ((rtx, int, int, int *));
+static int m88k_address_cost PARAMS ((rtx));
+\f
+/* Initialize the GCC target structure. */
+#undef TARGET_ASM_BYTE_OP
+#define TARGET_ASM_BYTE_OP "\tbyte\t"
+#undef TARGET_ASM_ALIGNED_HI_OP
+#define TARGET_ASM_ALIGNED_HI_OP "\thalf\t"
+#undef TARGET_ASM_ALIGNED_SI_OP
+#define TARGET_ASM_ALIGNED_SI_OP "\tword\t"
+#undef TARGET_ASM_UNALIGNED_HI_OP
+#define TARGET_ASM_UNALIGNED_HI_OP "\tuahalf\t"
+#undef TARGET_ASM_UNALIGNED_SI_OP
+#define TARGET_ASM_UNALIGNED_SI_OP "\tuaword\t"
+
+#undef TARGET_ASM_FUNCTION_PROLOGUE
+#define TARGET_ASM_FUNCTION_PROLOGUE m88k_output_function_prologue
+#undef TARGET_ASM_FUNCTION_END_PROLOGUE
+#define TARGET_ASM_FUNCTION_END_PROLOGUE m88k_output_function_end_prologue
+#undef TARGET_ASM_FUNCTION_BEGIN_EPILOGUE
+#define TARGET_ASM_FUNCTION_BEGIN_EPILOGUE m88k_output_function_begin_epilogue
+#undef TARGET_ASM_FUNCTION_EPILOGUE
+#define TARGET_ASM_FUNCTION_EPILOGUE m88k_output_function_epilogue
+
+#undef TARGET_SCHED_ADJUST_COST
+#define TARGET_SCHED_ADJUST_COST m88k_adjust_cost
+
+#undef TARGET_ENCODE_SECTION_INFO
+#define TARGET_ENCODE_SECTION_INFO m88k_encode_section_info
+#ifdef AS_BUG_DOT_LABELS
+#undef TARGET_ASM_INTERNAL_LABEL
+#define TARGET_ASM_INTERNAL_LABEL m88k_internal_label
+#endif
+
+#undef TARGET_RTX_COSTS
+#define TARGET_RTX_COSTS m88k_rtx_costs
+#undef TARGET_ADDRESS_COST
+#define TARGET_ADDRESS_COST m88k_address_cost
+
+struct gcc_target targetm = TARGET_INITIALIZER;
\f
/* Determine what instructions are needed to manufacture the integer VALUE
in the given MODE. */
enum machine_mode mode;
register int value;
{
- register int mask;
-
if (value == 0)
return m88k_zero;
else if (SMALL_INTVAL (value))
return (value && POWER_OF_2_or_0 (mask + 1));
}
-char *
+const char *
output_load_const_int (mode, operands)
enum machine_mode mode;
rtx *operands;
{
- static char *patterns[] =
+ static const char *const patterns[] =
{ "or %0,%#r0,0",
"or %0,%#r0,%1",
"subu %0,%#r0,%n1",
/* These next two routines assume that floating point numbers are represented
in a manner which is consistent between host and target machines. */
-char *
+const char *
output_load_const_float (operands)
rtx *operands;
{
return output_load_const_int (SImode, operands);
}
-char *
+const char *
output_load_const_double (operands)
rtx *operands;
{
return output_load_const_int (SImode, operands);
}
-char *
+const char *
output_load_const_dimode (operands)
rtx *operands;
{
Return 1 if we have written out everything that needs to be done to
do the move. Otherwise, return 0 and the caller will emit the move
- normally. */
+ normally.
+
+ SCRATCH if nonzero can be used as a scratch register for the move
+ operation. It is provided by a SECONDARY_RELOAD_* macro if needed. */
int
-emit_move_sequence (operands, mode)
+emit_move_sequence (operands, mode, scratch)
rtx *operands;
enum machine_mode mode;
+ rtx scratch;
{
register rtx operand0 = operands[0];
register rtx operand1 = operands[1];
+ if (CONSTANT_P (operand1) && flag_pic
+ && pic_address_needs_scratch (operand1))
+ operands[1] = operand1 = legitimize_address (1, operand1, 0, 0);
+
/* Handle most common case first: storing into a register. */
if (register_operand (operand0, mode))
{
|| GET_CODE (operand1) == MEM)
{
/* Run this case quickly. */
- emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1));
+ emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
return 1;
}
}
|| (operand1 == const0_rtx && GET_MODE_SIZE (mode) <= UNITS_PER_WORD))
{
/* Run this case quickly. */
- emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1));
+ emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
return 1;
}
if (! reload_in_progress && ! reload_completed)
/* Simplify the source if we need to. */
if (GET_CODE (operand1) != HIGH && immediate_operand (operand1, mode))
{
- if (GET_CODE (operand1) != CONST_INT
- && GET_CODE (operand1) != CONST_DOUBLE)
- {
- rtx temp = ((reload_in_progress || reload_completed)
- ? operand0 : gen_reg_rtx (Pmode));
- operands[1] = legitimize_address (flag_pic
- && symbolic_address_p (operand1),
- operand1, temp);
- if (mode != SImode)
- operands[1] = gen_rtx (SUBREG, mode, operands[1], 0);
- }
+ if (GET_CODE (operand1) != CONST_INT
+ && GET_CODE (operand1) != CONST_DOUBLE)
+ {
+ rtx temp = ((reload_in_progress || reload_completed)
+ ? operand0 : 0);
+ operands[1] = legitimize_address (flag_pic
+ && symbolic_address_p (operand1),
+ operand1, temp, scratch);
+ if (mode != SImode)
+ operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
+ }
}
/* Now have insn-emit do whatever it normally does. */
return 0;
}
-/* Return a legitimate reference for ORIG (either an address or a MEM) using
- the register REG. If PIC and the address is already position-independent,
- use ORIG. */
+/* Return a legitimate reference for ORIG (either an address or a MEM)
+ using the register REG. If PIC and the address is already
+ position-independent, use ORIG. Newly generated position-independent
+ addresses go into a reg. This is REG if nonzero, otherwise we
+ allocate register(s) as necessary. If this is called during reload,
+ and we need a second temp register, then we use SCRATCH, which is
+ provided via the SECONDARY_INPUT_RELOAD_CLASS mechanism. */
struct rtx_def *
-legitimize_address (pic, orig, reg)
+legitimize_address (pic, orig, reg, scratch)
int pic;
rtx orig;
rtx reg;
+ rtx scratch;
{
rtx addr = (GET_CODE (orig) == MEM ? XEXP (orig, 0) : orig);
rtx new = orig;
- rtx temp;
+ rtx temp, insn;
if (pic)
{
- if (GET_CODE (addr) == SYMBOL_REF
- || GET_CODE (addr) == LABEL_REF)
+ if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
{
- if (reg == 0) abort ();
+ if (reg == 0)
+ {
+ if (reload_in_progress || reload_completed)
+ abort ();
+ else
+ reg = gen_reg_rtx (Pmode);
+ }
if (flag_pic == 2)
{
- emit_insn (gen_rtx (SET, VOIDmode,
- reg, gen_rtx (HIGH, SImode, addr)));
- emit_insn (gen_rtx (SET, VOIDmode,
- reg, gen_rtx (LO_SUM, SImode, reg, addr)));
- addr = reg;
+ /* If not during reload, allocate another temp reg here for
+ loading in the address, so that these instructions can be
+ optimized properly. */
+ temp = ((reload_in_progress || reload_completed)
+ ? reg : gen_reg_rtx (Pmode));
+
+ emit_insn (gen_rtx_SET
+ (VOIDmode, temp,
+ gen_rtx_HIGH (SImode,
+ gen_rtx_UNSPEC (SImode,
+ gen_rtvec (1, addr),
+ 0))));
+
+ emit_insn (gen_rtx_SET
+ (VOIDmode, temp,
+ gen_rtx_LO_SUM (SImode, temp,
+ gen_rtx_UNSPEC (SImode,
+ gen_rtvec (1, addr),
+ 0))));
+ addr = temp;
}
- new = gen_rtx (MEM, Pmode,
- gen_rtx (PLUS, SImode,
- pic_offset_table_rtx, addr));
+
+ new = gen_rtx_MEM (Pmode,
+ gen_rtx_PLUS (SImode,
+ pic_offset_table_rtx, addr));
+
current_function_uses_pic_offset_table = 1;
RTX_UNCHANGING_P (new) = 1;
- {
- rtx insn = emit_move_insn (reg, new);
- /* Put a REG_EQUAL note on this insn, so that it can be optimized
- by loop. */
- REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig,
- REG_NOTES (insn));
- }
+ insn = emit_move_insn (reg, new);
+ /* Put a REG_EQUAL note on this insn, so that it can be optimized
+ by loop. */
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
+ REG_NOTES (insn));
new = reg;
}
else if (GET_CODE (addr) == CONST)
{
- rtx base, offset;
+ rtx base;
if (GET_CODE (XEXP (addr, 0)) == PLUS
&& XEXP (XEXP (addr, 0), 0) == pic_offset_table_rtx)
return orig;
if (reg == 0)
- abort ();
+ {
+ if (reload_in_progress || reload_completed)
+ abort ();
+ else
+ reg = gen_reg_rtx (Pmode);
+ }
if (GET_CODE (XEXP (addr, 0)) != PLUS) abort ();
- base = legitimize_address (1, XEXP (XEXP (addr, 0), 0), reg);
+ base = legitimize_address (1, XEXP (XEXP (addr, 0), 0), reg, 0);
addr = legitimize_address (1, XEXP (XEXP (addr, 0), 1),
- base == reg ? 0 : reg);
+ base == reg ? 0 : reg, 0);
if (GET_CODE (addr) == CONST_INT)
- new = plus_constant_for_output (base, INTVAL (addr));
- else
- new = gen_rtx (PLUS, SImode, base, addr);
+ {
+ if (ADD_INT (addr))
+ return plus_constant (base, INTVAL (addr));
+ else if (! reload_in_progress && ! reload_completed)
+ addr = force_reg (Pmode, addr);
+ /* We can't create any new registers during reload, so use the
+ SCRATCH reg provided by the reload_insi pattern. */
+ else if (scratch)
+ {
+ emit_move_insn (scratch, addr);
+ addr = scratch;
+ }
+ else
+ /* If we reach here, then the SECONDARY_INPUT_RELOAD_CLASS
+ macro needs to be adjusted so that a scratch reg is provided
+ for this address. */
+ abort ();
+ }
+ new = gen_rtx_PLUS (SImode, base, addr);
/* Should we set special REG_NOTEs here? */
}
}
else if (! SHORT_ADDRESS_P (addr, temp))
{
- emit_insn (gen_rtx (SET, VOIDmode,
- reg, gen_rtx (HIGH, SImode, addr)));
- new = gen_rtx (LO_SUM, SImode, reg, addr);
+ if (reg == 0)
+ {
+ if (reload_in_progress || reload_completed)
+ abort ();
+ else
+ reg = gen_reg_rtx (Pmode);
+ }
+
+ emit_insn (gen_rtx_SET (VOIDmode,
+ reg, gen_rtx_HIGH (SImode, addr)));
+ new = gen_rtx_LO_SUM (SImode, reg, addr);
}
if (new != orig
&& GET_CODE (orig) == MEM)
{
- new = gen_rtx (MEM, GET_MODE (orig), new);
- RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (orig);
- MEM_VOLATILE_P (new) = MEM_VOLATILE_P (orig);
- MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (orig);
+ new = gen_rtx_MEM (GET_MODE (orig), new);
+ MEM_COPY_ATTRIBUTES (new, orig);
}
return new;
}
#define MOVSTR_SI_LIMIT_88110 72
#define MOVSTR_DI_LIMIT_88110 72
-static enum machine_mode mode_from_align[] =
+static const enum machine_mode mode_from_align[] =
{VOIDmode, QImode, HImode, VOIDmode, SImode,
VOIDmode, VOIDmode, VOIDmode, DImode};
-static int max_from_align[] = {0, MOVSTR_QI, MOVSTR_HI, 0, MOVSTR_SI,
- 0, 0, 0, MOVSTR_DI};
-static int all_from_align[] = {0, MOVSTR_QI, MOVSTR_ODD_HI, 0, MOVSTR_ODD_SI,
- 0, 0, 0, MOVSTR_ODD_DI};
-
-static int best_from_align[3][9] =
- {0, MOVSTR_QI_LIMIT_88100, MOVSTR_HI_LIMIT_88100, 0, MOVSTR_SI_LIMIT_88100,
- 0, 0, 0, MOVSTR_DI_LIMIT_88100,
- 0, MOVSTR_QI_LIMIT_88110, MOVSTR_HI_LIMIT_88110, 0, MOVSTR_SI_LIMIT_88110,
- 0, 0, 0, MOVSTR_DI_LIMIT_88110,
- 0, MOVSTR_QI_LIMIT_88000, MOVSTR_HI_LIMIT_88000, 0, MOVSTR_SI_LIMIT_88000,
- 0, 0, 0, MOVSTR_DI_LIMIT_88000};
-
-static void block_move_loop ();
-static void block_move_no_loop ();
-static void block_move_sequence ();
+static const int max_from_align[] = {0, MOVSTR_QI, MOVSTR_HI, 0, MOVSTR_SI,
+ 0, 0, 0, MOVSTR_DI};
+static const int all_from_align[] = {0, MOVSTR_QI, MOVSTR_ODD_HI, 0,
+ MOVSTR_ODD_SI, 0, 0, 0, MOVSTR_ODD_DI};
+
+static const int best_from_align[3][9] = {
+ {0, MOVSTR_QI_LIMIT_88100, MOVSTR_HI_LIMIT_88100, 0, MOVSTR_SI_LIMIT_88100,
+ 0, 0, 0, MOVSTR_DI_LIMIT_88100},
+ {0, MOVSTR_QI_LIMIT_88110, MOVSTR_HI_LIMIT_88110, 0, MOVSTR_SI_LIMIT_88110,
+ 0, 0, 0, MOVSTR_DI_LIMIT_88110},
+ {0, MOVSTR_QI_LIMIT_88000, MOVSTR_HI_LIMIT_88000, 0, MOVSTR_SI_LIMIT_88000,
+ 0, 0, 0, MOVSTR_DI_LIMIT_88000}
+};
+
+static void block_move_loop PARAMS ((rtx, rtx, rtx, rtx, int, int));
+static void block_move_no_loop PARAMS ((rtx, rtx, rtx, rtx, int, int));
+static void block_move_sequence PARAMS ((rtx, rtx, rtx, rtx, int, int, int));
+static void output_short_branch_defs PARAMS ((FILE *));
+static int output_option PARAMS ((FILE *, const char *, const char *,
+ const char *, const char *, int, int));
/* Emit code to perform a block move. Choose the best method.
int bytes = (constp ? INTVAL (operands[2]) : 0);
int target = (int) m88k_cpu;
- assert (CPU_M88100 == 0);
- assert (CPU_M88110 == 1);
- assert (CPU_M88000 == 2);
+ if (! (PROCESSOR_M88100 == 0
+ && PROCESSOR_M88110 == 1
+ && PROCESSOR_M88000 == 2))
+ abort ();
if (constp && bytes <= 0)
return;
else
{
#ifdef TARGET_MEM_FUNCTIONS
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
VOIDmode, 3,
operands[0], Pmode,
operands[1], Pmode,
- operands[2], SImode);
+ convert_to_mode (TYPE_MODE (sizetype), operands[2],
+ TREE_UNSIGNED (sizetype)),
+ TYPE_MODE (sizetype));
#else
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0,
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0,
VOIDmode, 3,
operands[1], Pmode,
operands[0], Pmode,
- operands[2], SImode);
+ convert_to_mode (TYPE_MODE (integer_type_node),
+ operands[2],
+ TREE_UNSIGNED (integer_type_node)),
+ TYPE_MODE (integer_type_node));
#endif
}
}
GET_MODE_NAME (mode), MOVSTR_LOOP, units * align);
entry_name = get_identifier (entry);
- offset_rtx = gen_rtx (CONST_INT, VOIDmode,
- MOVSTR_LOOP + (1 - units) * align);
+ offset_rtx = GEN_INT (MOVSTR_LOOP + (1 - units) * align);
- value_rtx = gen_rtx (MEM, mode,
- gen_rtx (PLUS, Pmode,
- gen_rtx (REG, Pmode, 3),
- offset_rtx));
- RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem);
- MEM_VOLATILE_P (value_rtx) = MEM_VOLATILE_P (src_mem);
- MEM_IN_STRUCT_P (value_rtx) = MEM_IN_STRUCT_P (src_mem);
+ value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
+ gen_rtx_PLUS (Pmode,
+ gen_rtx_REG (Pmode, 3),
+ offset_rtx));
+ MEM_COPY_ATTRIBUTES (value_rtx, src_mem);
emit_insn (gen_call_movstrsi_loop
- (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)),
+ (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)),
dest, src, offset_rtx, value_rtx,
- gen_rtx (REG, GET_MODE (value_rtx), ((units & 1) ? 4 : 5)),
- gen_rtx (CONST_INT, VOIDmode, count)));
+ gen_rtx_REG (mode, ((units & 1) ? 4 : 5)),
+ GEN_INT (count)));
if (remainder)
- block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem,
- gen_rtx (REG, Pmode, 3), src_mem,
+ block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem,
+ gen_rtx_REG (Pmode, 3), src_mem,
remainder, align, MOVSTR_LOOP + align);
}
GET_MODE_NAME (mode), most, size - remainder);
entry_name = get_identifier (entry);
- offset_rtx = gen_rtx (CONST_INT, VOIDmode, most - (size - remainder));
+ offset_rtx = GEN_INT (most - (size - remainder));
- value_rtx = gen_rtx (MEM, mode,
- gen_rtx (PLUS, Pmode,
- gen_rtx (REG, Pmode, 3),
- offset_rtx));
- RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem);
- MEM_VOLATILE_P (value_rtx) = MEM_VOLATILE_P (src_mem);
- MEM_IN_STRUCT_P (value_rtx) = MEM_IN_STRUCT_P (src_mem);
+ value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
+ gen_rtx_PLUS (Pmode,
+ gen_rtx_REG (Pmode, 3),
+ offset_rtx));
+
+ MEM_COPY_ATTRIBUTES (value_rtx, src_mem);
value_reg = ((((most - (size - remainder)) / align) & 1) == 0
? (align == 8 ? 6 : 5) : 4);
emit_insn (gen_call_block_move
- (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)),
+ (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)),
dest, src, offset_rtx, value_rtx,
- gen_rtx (REG, GET_MODE (value_rtx), value_reg)));
+ gen_rtx_REG (mode, value_reg)));
if (remainder)
- block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem,
- gen_rtx (REG, Pmode, 3), src_mem,
+ block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem,
+ gen_rtx_REG (Pmode, 3), src_mem,
remainder, align, most);
}
temp[next] = gen_reg_rtx (mode[next]);
}
size -= amount[next];
- srcp = gen_rtx (MEM, mode[next],
- gen_rtx (PLUS, Pmode, src,
- gen_rtx (CONST_INT, SImode, offset_ld)));
- RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem);
- MEM_VOLATILE_P (srcp) = MEM_VOLATILE_P (src_mem);
- MEM_IN_STRUCT_P (srcp) = MEM_IN_STRUCT_P (src_mem);
- emit_move_insn (temp[next], srcp);
+ srcp = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode,
+ plus_constant (src, offset_ld));
+
+ MEM_COPY_ATTRIBUTES (srcp, src_mem);
+ emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp));
offset_ld += amount[next];
active[next] = TRUE;
}
if (active[phase])
{
active[phase] = FALSE;
- dstp = gen_rtx (MEM, mode[phase],
- gen_rtx (PLUS, Pmode, dest,
- gen_rtx (CONST_INT, SImode, offset_st)));
- RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dest_mem);
- MEM_VOLATILE_P (dstp) = MEM_VOLATILE_P (dest_mem);
- MEM_IN_STRUCT_P (dstp) = MEM_IN_STRUCT_P (dest_mem);
- emit_move_insn (dstp, temp[phase]);
+ dstp
+ = gen_rtx_MEM (MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode,
+ plus_constant (dest, offset_st));
+
+ MEM_COPY_ATTRIBUTES (dstp, dest_mem);
+ emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase]));
offset_st += amount[phase];
}
}
\f
/* Emit the code to do an AND operation. */
-char *
+const char *
output_and (operands)
rtx operands[];
{
/* Emit the code to do an inclusive OR operation. */
-char *
+const char *
output_ior (operands)
rtx operands[];
{
/* Emit the instructions for doing an XOR. */
-char *
+const char *
output_xor (operands)
rtx operands[];
{
static rtx sb_high = 0;
static rtx sb_low = 0;
-char *
+const char *
output_call (operands, addr)
rtx operands[];
rtx addr;
jump = XVECEXP (final_sequence, 0, 1);
if (GET_CODE (jump) == JUMP_INSN)
{
+#ifndef USE_GAS
rtx low, high;
- char *last;
+#endif
+ const char *last;
rtx dest = XEXP (SET_SRC (PATTERN (jump)), 0);
- int delta = 4 * (insn_addresses[INSN_UID (dest)]
- - insn_addresses[INSN_UID (seq_insn)]
+ int delta = 4 * (INSN_ADDRESSES (INSN_UID (dest))
+ - INSN_ADDRESSES (INSN_UID (seq_insn))
- 2);
#if (MONITOR_GCC & 0x2) /* How often do long branches happen? */
if ((unsigned) (delta + 0x8000) >= 0x10000)
- warning ("Internal gcc monitor: short-branch(%x)", delta);
+ warning ("internal gcc monitor: short-branch(%x)", delta);
#endif
/* Delete the jump. */
NOTE_LINE_NUMBER (jump) = NOTE_INSN_DELETED;
NOTE_SOURCE_FILE (jump) = 0;
- /* If we loose, we must use the non-delay form. This is unlikely
+ /* We only do this optimization if -O2, modifying the value of
+ r1 in the delay slot confuses debuggers and profilers on some
+ systems.
+
+ If we loose, we must use the non-delay form. This is unlikely
to ever happen. If it becomes a problem, claim that a call
has two delay slots and only the second can be filled with
- a jump. */
+ a jump.
+
+ The 88110 can lose when a jsr.n r1 is issued and a page fault
+ occurs accessing the delay slot. So don't use jsr.n form when
+ jumping thru r1.
+ */
#ifdef AS_BUG_IMMEDIATE_LABEL /* The assembler restricts immediate values. */
- if (! ADD_INTVAL (delta * 2))
+ if (optimize < 2
+ || ! ADD_INTVAL (delta * 2)
#else
- if (! ADD_INTVAL (delta))
+ if (optimize < 2
+ || ! ADD_INTVAL (delta)
#endif
+ || (REG_P (addr) && REGNO (addr) == 1))
{
operands[1] = dest;
return (REG_P (addr)
}
/* Record the values to be computed later as "def name,high-low". */
- sb_name = gen_rtx (EXPR_LIST, VOIDmode, operands[0], sb_name);
- sb_high = gen_rtx (EXPR_LIST, VOIDmode, high, sb_high);
- sb_low = gen_rtx (EXPR_LIST, VOIDmode, low, sb_low);
+ sb_name = gen_rtx_EXPR_LIST (VOIDmode, operands[0], sb_name);
+ sb_high = gen_rtx_EXPR_LIST (VOIDmode, high, sb_high);
+ sb_low = gen_rtx_EXPR_LIST (VOIDmode, low, sb_low);
#endif /* Don't USE_GAS */
return last;
ASM_GENERATE_INTERNAL_LABEL
(low, "L", CODE_LABEL_NUMBER (XEXP (sb_low, 0)));
/* This will change as the assembler requirements become known. */
- fprintf (stream, "\t%s\t %s,%s-%s\n",
+ fprintf (stream, "%s%s,%s-%s\n",
SET_ASM_OP, &name[1], &high[1], &low[1]);
}
if (sb_name || sb_high || sb_low)
{
if (GET_CODE (insnt) == JUMP_INSN)
break;
- else if (GET_CODE (insnt) == SEQUENCE
- && GET_CODE (XVECEXP (insnt, 0, 0)) == JUMP_INSN)
+ else if (GET_CODE (insnt) == INSN
+ && GET_CODE (PATTERN (insnt)) == SEQUENCE
+ && GET_CODE (XVECEXP (PATTERN (insnt), 0, 0)) == JUMP_INSN)
{
- insnt = XVECEXP (insnt, 0, 0);
+ insnt = XVECEXP (PATTERN (insnt), 0, 0);
break;
}
}
{
if (GET_CODE (insnj) == JUMP_INSN)
break;
- else if (GET_CODE (insnj) == SEQUENCE
- && GET_CODE (XVECEXP (insnj, 0, 0)) == JUMP_INSN)
+ else if (GET_CODE (insnj) == INSN
+ && GET_CODE (PATTERN (insnj)) == SEQUENCE
+ && GET_CODE (XVECEXP (PATTERN (insnj), 0, 0)) == JUMP_INSN)
{
- insnj = XVECEXP (insnj, 0, 0);
+ insnj = XVECEXP (PATTERN (insnj), 0, 0);
break;
}
}
|| (GET_CODE (PATTERN (insnj)) == SET
&& GET_CODE (SET_SRC (PATTERN (insnj))) == REG
&& REGNO (SET_SRC (PATTERN (insnj))) == 1)))
- insnt = 0;
+ insnj = 0;
/* Predict to not return. */
if ((insnt == 0) != (insnj == 0))
insnj = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
else
insnj = jump_insn;
- if (insn_addresses[INSN_UID (insnj)]
- > insn_addresses[INSN_UID (target_label)])
+ if (INSN_ADDRESSES (INSN_UID (insnj))
+ > INSN_ADDRESSES (INSN_UID (target_label)))
return 0;
/* EQ tests are usually false and NE tests are usually true. Also,
if (XEXP (condition, 1) == const0_rtx)
return 0;
break;
+ default:
+ break;
}
return 0;
int
real_power_of_2_operand (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
+ REAL_VALUE_TYPE d;
union {
- REAL_VALUE_TYPE d;
- int i[sizeof (REAL_VALUE_TYPE) / sizeof (int)];
+ long l[2];
struct { /* IEEE double precision format */
unsigned sign : 1;
unsigned exponent : 11;
if (GET_CODE (op) != CONST_DOUBLE)
return 0;
- u.i[0] = CONST_DOUBLE_LOW (op);
- u.i[1] = CONST_DOUBLE_HIGH (op);
+ REAL_VALUE_FROM_CONST_DOUBLE (d, op);
+ REAL_VALUE_TO_TARGET_DOUBLE (d, u.l);
if (u.s.mantissa1 != 0 || u.s.mantissa2 != 0 /* not a power of two */
|| u.s.exponent == 0 /* constant 0.0 */
enum machine_mode mode;
{
rtx temp;
+ REAL_VALUE_TYPE r;
union {
- union real_extract r;
+ long l[2];
struct { /* IEEE double precision format */
unsigned sign : 1;
unsigned exponent : 11;
if (GET_CODE (op) == CONST_DOUBLE)
{
- bcopy (&CONST_DOUBLE_LOW (op), &u.r, sizeof u);
+ REAL_VALUE_FROM_CONST_DOUBLE (r, op);
+ REAL_VALUE_TO_TARGET_DOUBLE (r, u.l);
if (u.d.exponent != 0x7ff /* NaN */
&& u.d.mantissa2 == 0 /* Mantissa fits */
&& (u.s.exponent1 == 0x8 || u.s.exponent1 == 0x7) /* Exponent fits */
&& (temp = simplify_unary_operation (FLOAT_TRUNCATE, SFmode,
op, mode)) != 0)
- return gen_rtx (FLOAT_EXTEND, mode, force_reg (SFmode, temp));
+ return gen_rtx_FLOAT_EXTEND (mode, force_reg (SFmode, temp));
}
else if (register_operand (op, mode))
return op;
int
call_address_operand (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (REG_P (op) || symbolic_address_p (op));
}
{
return (register_operand (op, mode)
|| GET_CODE (op) == CONST_INT
- || (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == DImode));
+ || (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode));
}
int
int5_operand (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 32);
}
int
int32_operand (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == CONST_INT);
}
&& op == CONST0_RTX (mode)));
}
+/* Return true if OP is valid to use in the context of logic arithmetic
+ on condition codes. */
+
+int
+partial_ccmode_register_operand (op, mode)
+ rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+ return register_operand (op, CCmode) || register_operand (op, CCEVENmode);
+}
+
/* Return true if OP is a relational operator. */
int
relop (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
switch (GET_CODE (op))
{
}
}
+int
+even_relop (op, mode)
+ rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+ switch (GET_CODE (op))
+ {
+ case EQ:
+ case LT:
+ case GT:
+ case LTU:
+ case GTU:
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+int
+odd_relop (op, mode)
+ rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+ switch (GET_CODE (op))
+ {
+ case NE:
+ case LE:
+ case GE:
+ case LEU:
+ case GEU:
+ return 1;
+ default:
+ return 0;
+ }
+}
+
/* Return true if OP is a relational operator, and is not an unsigned
relational operator. */
int
relop_no_unsigned (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
switch (GET_CODE (op))
{
int
equality_op (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == EQ || GET_CODE (op) == NE);
}
int
pc_or_label_ref (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == PC || GET_CODE (op) == LABEL_REF);
}
\f
/* Output to FILE the start of the assembler file. */
-struct option
+/* This definition must match lang_independent_options from toplev.c. */
+struct m88k_lang_independent_options
{
- char *string;
- int *variable;
- int on_value;
+ const char *const string;
+ int *const variable;
+ const int on_value;
+ const char *const description;
};
+static void output_options PARAMS ((FILE *,
+ const struct m88k_lang_independent_options *,
+ int,
+ const struct m88k_lang_independent_options *,
+ int, int, int, const char *, const char *,
+ const char *));
+
static int
output_option (file, sep, type, name, indent, pos, max)
FILE *file;
- char *sep;
- char *type;
- char *name;
- char *indent;
+ const char *sep;
+ const char *type;
+ const char *name;
+ const char *indent;
int pos;
int max;
{
- if (strlen (sep) + strlen (type) + strlen (name) + pos > max)
+ if ((long)(strlen (sep) + strlen (type) + strlen (name) + pos) > max)
{
fprintf (file, indent);
return fprintf (file, "%s%s", type, name);
return pos + fprintf (file, "%s%s%s", sep, type, name);
}
-static struct { char *name; int value; } m_options[] = TARGET_SWITCHES;
+static const struct { const char *const name; const int value; } m_options[] =
+TARGET_SWITCHES;
static void
output_options (file, f_options, f_len, W_options, W_len,
pos, max, sep, indent, term)
FILE *file;
- struct option *f_options;
- struct option *W_options;
+ const struct m88k_lang_independent_options *f_options;
+ const struct m88k_lang_independent_options *W_options;
int f_len, W_len;
int pos;
int max;
- char *indent;
- char *term;
+ const char *sep;
+ const char *indent;
+ const char *term;
{
register int j;
pos = output_option (file, sep, "-O", "", indent, pos, max);
if (write_symbols != NO_DEBUG)
pos = output_option (file, sep, "-g", "", indent, pos, max);
- if (flag_traditional)
- pos = output_option (file, sep, "-traditional", "", indent, pos, max);
if (profile_flag)
pos = output_option (file, sep, "-p", "", indent, pos, max);
- if (profile_block_flag)
- pos = output_option (file, sep, "-a", "", indent, pos, max);
-
for (j = 0; j < f_len; j++)
if (*f_options[j].variable == f_options[j].on_value)
pos = output_option (file, sep, "-f", f_options[j].string,
pos = output_option (file, sep, "-W", W_options[j].string,
indent, pos, max);
- for (j = 0; j < sizeof m_options / sizeof m_options[0]; j++)
+ for (j = 0; j < (long) ARRAY_SIZE (m_options); j++)
if (m_options[j].name[0] != '\0'
&& m_options[j].value > 0
&& ((m_options[j].value & target_flags)
void
output_file_start (file, f_options, f_len, W_options, W_len)
FILE *file;
- struct option *f_options;
- struct option *W_options;
+ const struct m88k_lang_independent_options *f_options;
+ const struct m88k_lang_independent_options *W_options;
int f_len, W_len;
{
register int pos;
ASM_FIRST_LINE (file);
+ if (TARGET_88110
+ && TARGET_SVR4)
+ fprintf (file, "%s\n", REQUIRES_88110_ASM_OP);
output_file_directive (file, main_input_filename);
- /* Switch to the data section so that the coffsem symbol and the
- gcc2_compiled. symbol aren't in the text section. */
- data_section ();
+ /* Switch to the data section so that the coffsem symbol
+ isn't in the text section. */
ASM_COFFSEM (file);
- pos = fprintf (file, "\n; cc1 (%s) arguments:", VERSION_STRING);
- output_options (file, f_options, f_len, W_options, W_len,
- pos, 75, " ", "\n; ", "\n\n");
-
if (TARGET_IDENTIFY_REVISION)
{
char indent[256];
time_t now = time ((time_t *)0);
- sprintf (indent, "]\"\n\t%s\t \"@(#)%s [", IDENT_ASM_OP, main_input_filename);
+ sprintf (indent, "]\"\n%s\"@(#)%s [", IDENT_ASM_OP, main_input_filename);
fprintf (file, indent+3);
- pos = fprintf (file, "gcc %s, %.24s,", VERSION_STRING, ctime (&now));
+ pos = fprintf (file, "gcc %s, %.24s,", version_string, ctime (&now));
+#if 1
+ /* ??? It would be nice to call print_switch_values here (and thereby
+ let us delete output_options) but this is kept in until it is known
+ whether the change in content format matters. */
output_options (file, f_options, f_len, W_options, W_len,
pos, 150 - strlen (indent), " ", indent, "]\"\n\n");
+#else
+ fprintf (file, "]\"\n");
+ print_switch_values (file, 0, 150 - strlen (indent),
+ indent + 3, " ", "]\"\n");
+#endif
}
}
\f
void
output_ascii (file, opcode, max, p, size)
FILE *file;
- char *opcode;
+ const char *opcode;
int max;
- unsigned char *p;
+ const char *p;
int size;
{
int i;
register int num = 0;
- fprintf (file, "\t%s\t \"", opcode);
+ fprintf (file, "%s\"", opcode);
for (i = 0; i < size; i++)
{
- register int c = p[i];
+ register int c = (unsigned char) p[i];
if (num > max)
{
- fprintf (file, "\"\n\t%s\t \"", opcode);
+ fprintf (file, "\"\n%s\"", opcode);
num = 0;
}
num += 2;
in_escape = 0;
}
- else if (in_escape && c >= '0' && c <= '9')
+ else if (in_escape && ISDIGIT (c))
{
- /* If a digit follows an octal-escape, the Vax assembler fails
+ /* If a digit follows an octal-escape, the VAX assembler fails
to stop reading the escape after three digits. Continue to
output the values as an octal-escape until a non-digit is
found. */
fprintf (file, "\\%03o", c);
num += 4;
}
- else if (c >= ' ' && c < 0177)
+ else if ((c >= ' ' && c < 0177) || (c == '\t'))
{
putc (c, file);
num++;
switch (c)
{
/* Some assemblers can't handle \a, \v, or \?. */
- case '\t': c = 't'; goto escape;
case '\f': c = 'f'; goto escape;
case '\b': c = 'b'; goto escape;
case '\r': c = 'r'; goto escape;
output_label (label_number)
int label_number;
{
- ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", label_number);
+ (*targetm.asm_out.internal_label) (asm_out_file, "L", label_number);
}
\f
/* Generate the assembly code for function entry.
variable space.
*/
-static void emit_add ();
-static void preserve_registers ();
-static void emit_ldst ();
-static void output_tdesc ();
+static void emit_add PARAMS ((rtx, rtx, int));
+static void preserve_registers PARAMS ((int, int));
+static void emit_ldst PARAMS ((int, int, enum machine_mode, int));
+static void output_tdesc PARAMS ((FILE *, int));
+static int uses_arg_area_p PARAMS ((void));
static int nregs;
static int nxregs;
static int frame_size;
static int variable_args_p;
static int epilogue_marked;
-
-extern char call_used_regs[];
-extern int current_function_pretend_args_size;
-extern int current_function_outgoing_args_size;
-extern int frame_pointer_needed;
+static int prologue_marked;
#define FIRST_OCS_PRESERVE_REGISTER 14
#define LAST_OCS_PRESERVE_REGISTER 30
(((BYTES) + (STACK_UNIT_BOUNDARY - 1)) & ~(STACK_UNIT_BOUNDARY - 1))
\f
/* Establish the position of the FP relative to the SP. This is done
- either during FUNCTION_PROLOGUE or by INITIAL_ELIMINATION_OFFSET. */
+ either during output_function_prologue() or by
+ INITIAL_ELIMINATION_OFFSET. */
void
m88k_layout_frame ()
frame_laid_out++;
- bzero ((char *) &save_regs[0], sizeof (save_regs));
+ memset ((char *) &save_regs[0], 0, sizeof (save_regs));
sp_size = nregs = nxregs = 0;
frame_size = get_frame_size ();
/* Since profiling requires a call, make sure r1 is saved. */
- if (profile_flag || profile_block_flag)
+ if (current_function_profile)
save_regs[1] = 1;
/* If we are producing debug information, store r1 and r30 where the
m88k_stack_size = m88k_fp_offset + STARTING_FRAME_OFFSET;
/* First, combine m88k_stack_size and size. If m88k_stack_size is
- non-zero, align the frame size to 8 mod 16; otherwise align the
+ nonzero, align the frame size to 8 mod 16; otherwise align the
frame size to 0 mod 16. (If stacks are 8 byte aligned, this ends
up as a NOP. */
{
int need
= ((m88k_stack_size ? STACK_UNIT_BOUNDARY - STARTING_FRAME_OFFSET : 0)
- (frame_size % STACK_UNIT_BOUNDARY));
- if (need)
- {
- if (need < 0)
- need += STACK_UNIT_BOUNDARY;
- (void) assign_stack_local (BLKmode, need, BITS_PER_UNIT);
- frame_size = get_frame_size ();
- }
+ if (need < 0)
+ need += STACK_UNIT_BOUNDARY;
m88k_stack_size
- = ROUND_CALL_BLOCK_SIZE (m88k_stack_size + frame_size
+ = ROUND_CALL_BLOCK_SIZE (m88k_stack_size + frame_size + need
+ current_function_pretend_args_size);
}
}
register tree parm;
if (current_function_decl == 0
- || current_function_varargs
|| variable_args_p)
return 1;
return 0;
}
\f
-void
-m88k_begin_prologue (stream, size)
- FILE *stream;
- int size;
+static void
+m88k_output_function_prologue (stream, size)
+ FILE *stream ATTRIBUTE_UNUSED;
+ HOST_WIDE_INT size ATTRIBUTE_UNUSED;
{
- epilogue_marked = 0;
+ if (TARGET_OMIT_LEAF_FRAME_POINTER && ! quiet_flag && leaf_function_p ())
+ fprintf (stderr, "$");
+
m88k_prologue_done = 1; /* it's ok now to put out ln directives */
}
-void
-m88k_end_prologue (stream)
+static void
+m88k_output_function_end_prologue (stream)
FILE *stream;
{
- if (TARGET_OCS_DEBUG_INFO)
- PUT_OCS_FUNCTION_START (stream);
- if (epilogue_marked)
- abort ();
- frame_laid_out = 0;
+ if (TARGET_OCS_DEBUG_INFO && !prologue_marked)
+ {
+ PUT_OCS_FUNCTION_START (stream);
+ prologue_marked = 1;
+
+ /* If we've already passed the start of the epilogue, say that
+ it starts here. This marks the function as having a null body,
+ but at a point where the return address is in a known location.
+
+ Originally, I thought this couldn't happen, but the pic prologue
+ for leaf functions ends with the instruction that restores the
+ return address from the temporary register. If the temporary
+ register is never used, that instruction can float all the way
+ to the end of the function. */
+ if (epilogue_marked)
+ PUT_OCS_FUNCTION_END (stream);
+ }
}
void
if (flag_pic && save_regs[PIC_OFFSET_TABLE_REGNUM])
{
- rtx return_reg = gen_rtx (REG, SImode, 1);
+ rtx return_reg = gen_rtx_REG (SImode, 1);
rtx label = gen_label_rtx ();
- rtx temp_reg;
+ rtx temp_reg = NULL_RTX;
if (! save_regs[1])
{
- temp_reg = gen_rtx (REG, SImode, TEMP_REGNUM);
+ temp_reg = gen_rtx_REG (SImode, TEMP_REGNUM);
emit_move_insn (temp_reg, return_reg);
}
emit_insn (gen_locate1 (pic_offset_table_rtx, label));
if (! save_regs[1])
emit_move_insn (return_reg, temp_reg);
}
- if (profile_flag || profile_block_flag)
+ if (current_function_profile)
emit_insn (gen_blockage ());
}
\f
/* This function generates the assembly code for function exit,
- on machines that need it. Args are same as for FUNCTION_PROLOGUE.
+ on machines that need it.
The function epilogue should not depend on the current stack pointer!
It should use the frame pointer only, if there is a frame pointer.
This is mandatory because of alloca; we also take advantage of it to
omit stack adjustments before returning. */
-void
-m88k_begin_epilogue (stream)
+static void
+m88k_output_function_begin_epilogue (stream)
FILE *stream;
{
- if (TARGET_OCS_DEBUG_INFO)
- PUT_OCS_FUNCTION_END (stream);
+ if (TARGET_OCS_DEBUG_INFO && !epilogue_marked && prologue_marked)
+ {
+ PUT_OCS_FUNCTION_END (stream);
+ }
epilogue_marked = 1;
}
-void
-m88k_end_epilogue (stream, size)
+static void
+m88k_output_function_epilogue (stream, size)
FILE *stream;
- int size;
+ HOST_WIDE_INT size ATTRIBUTE_UNUSED;
{
rtx insn = get_last_insn ();
PUT_OCS_FUNCTION_END (stream);
/* If the last insn isn't a BARRIER, we must write a return insn. This
- should only happen if the function has no prologe and no body. */
+ should only happen if the function has no prologue and no body. */
if (GET_CODE (insn) == NOTE)
insn = prev_nonnote_insn (insn);
if (insn == 0 || GET_CODE (insn) != BARRIER)
fprintf (stream, "\tjmp\t %s\n", reg_names[1]);
+ /* If the last insn is a barrier, and the insn before that is a call,
+ then add a nop instruction so that tdesc can walk the stack correctly
+ even though there is no epilogue. (Otherwise, the label for the
+ end of the tdesc region ends up at the start of the next function. */
+ if (insn && GET_CODE (insn) == BARRIER)
+ {
+ insn = prev_nonnote_insn (insn);
+ if (insn && GET_CODE (insn) == CALL_INSN)
+ fprintf (stream, "\tor\t %s,%s,%s\n",reg_names[0],reg_names[0],reg_names[0]);
+ }
+
output_short_branch_defs (stream);
fprintf (stream, "\n");
m88k_function_number++;
m88k_prologue_done = 0; /* don't put out ln directives */
variable_args_p = 0; /* has variable args */
+ frame_laid_out = 0;
+ epilogue_marked = 0;
+ prologue_marked = 0;
}
void
rtx srcreg;
int amount;
{
- rtx incr = gen_rtx (CONST_INT, VOIDmode, abs (amount));
+ rtx incr = GEN_INT (abs (amount));
+
if (! ADD_INTVAL (amount))
{
- rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM);
+ rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM);
emit_move_insn (temp, incr);
incr = temp;
}
enum machine_mode mode;
int offset;
{
- rtx reg = gen_rtx (REG, mode, regno);
- rtx mem = gen_rtx (MEM, mode, plus_constant (stack_pointer_rtx, offset));
+ rtx reg = gen_rtx_REG (mode, regno);
+ rtx mem;
+
+ if (SMALL_INTVAL (offset))
+ {
+ mem = gen_rtx_MEM (mode, plus_constant (stack_pointer_rtx, offset));
+ }
+ else
+ {
+ /* offset is too large for immediate index must use register */
+
+ rtx disp = GEN_INT (offset);
+ rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM);
+ rtx regi = gen_rtx_PLUS (SImode, stack_pointer_rtx, temp);
+
+ emit_move_insn (temp, disp);
+ mem = gen_rtx_MEM (mode, regi);
+ }
if (store_p)
emit_move_insn (mem, reg);
#if (MONITOR_GCC & 0x10) /* Watch for suspicious symbolic locations. */
if (! (GET_CODE (reg) == REG
&& REGNO (reg) >= FIRST_PSEUDO_REGISTER))
- warning ("Internal gcc error: Can't express symbolic location");
+ warning ("internal gcc error: Can't express symbolic location");
#endif
return 0;
}
tdesc_section ();
- fprintf (file, "\t%s\t %d,%d", INT_ASM_OP, /* 8:0,22:(20 or 16),2:2 */
+ /* 8:0,22:(20 or 16),2:2 */
+ fprintf (file, "%s%d,%d", integer_asm_op (4, TRUE),
(((xmask != 0) ? 20 : 16) << 2) | 2,
flag_pic ? 2 : 1);
ASM_GENERATE_INTERNAL_LABEL (buf, OCS_END_PREFIX, m88k_function_number);
fprintf (file, ",%s%s", buf+1, flag_pic ? "#rel" : "");
- fprintf (file, ",0x%x,0x%x,0x%x,0x%x",
+ fprintf (file, ",0x%x,0x%x,0x%lx,0x%lx",
/* 8:1,17:0x%.3x,1:0,1:%d,5:%d */
- (((xmask ? 3 : 1) << (17+1+1+5))
+ (int)(((xmask ? 3 : 1) << (17+1+1+5))
| (mask << (1+1+5))
| ((!!save_regs[1]) << 5)
| (frame_pointer_needed
return_address_info,
register_save_offset);
if (xmask)
- fprintf (file, ",0x%x%04x", xmask, (0xffff & xregister_save_offset));
+ fprintf (file, ",0x%lx%04lx", xmask, (0xffff & xregister_save_offset));
fputc ('\n', file);
text_section ();
output_function_profiler (file, labelno, name, savep)
FILE *file;
int labelno;
- char *name;
+ const char *name;
int savep;
{
char label[256];
char dbi[256];
- char *temp = (savep ? reg_names[2] : reg_names[10]);
+ const char *const temp = (savep ? reg_names[2] : reg_names[10]);
+
+ /* Remember to update FUNCTION_PROFILER_LENGTH. */
if (savep)
{
fprintf (file, "\taddu\t %s,%s,64\n", reg_names[31], reg_names[31]);
}
}
-
-/* Output assembler code to FILE to initialize basic-block profiling for
- the current module. LABELNO is unique to each instance. */
-
-void
-output_function_block_profiler (file, labelno)
- FILE *file;
- int labelno;
-{
- char block[256];
- char label[256];
-
- ASM_GENERATE_INTERNAL_LABEL (block, "LPBX", 0);
- ASM_GENERATE_INTERNAL_LABEL (label, "LPY", labelno);
-
- /* @@ Need to deal with PIC. I'm not sure what the requirements are on
- register usage, so I used r26/r27 to be safe. */
- fprintf (file, "\tor.u\t %s,%s,%shi16(%s)\n", reg_names[27], reg_names[0],
- m88k_pound_sign, &block[1]);
- fprintf (file, "\tld\t %s,%s,%slo16(%s)\n", reg_names[26], reg_names[27],
- m88k_pound_sign, &block[1]);
- fprintf (file, "\tbcnd\t %sne0,%s,%s\n",
- m88k_pound_sign, reg_names[26], &label[1]);
- fprintf (file, "\tsubu\t %s,%s,64\n", reg_names[31], reg_names[31]);
- fprintf (file, "\tst.d\t %s,%s,32\n", reg_names[2], reg_names[31]);
- fprintf (file, "\tst.d\t %s,%s,40\n", reg_names[4], reg_names[31]);
- fprintf (file, "\tst.d\t %s,%s,48\n", reg_names[6], reg_names[31]);
- fprintf (file, "\tst.d\t %s,%s,56\n", reg_names[8], reg_names[31]);
- fputs ("\tbsr.n\t ", file);
- ASM_OUTPUT_LABELREF (file, "__bb_init_func");
- putc ('\n', file);
- fprintf (file, "\tor\t %s,%s,%slo16(%s)\n", reg_names[2], reg_names[27],
- m88k_pound_sign, &block[1]);
- fprintf (file, "\tld.d\t %s,%s,32\n", reg_names[2], reg_names[31]);
- fprintf (file, "\tld.d\t %s,%s,40\n", reg_names[4], reg_names[31]);
- fprintf (file, "\tld.d\t %s,%s,48\n", reg_names[6], reg_names[31]);
- fprintf (file, "\tld.d\t %s,%s,56\n", reg_names[8], reg_names[31]);
- fprintf (file, "\taddu\t %s,%s,64\n", reg_names[31], reg_names[31]);
- ASM_OUTPUT_INTERNAL_LABEL (file, "LPY", labelno);
-}
-
-/* Output assembler code to FILE to increment the count associated with
- the basic block number BLOCKNO. */
-
-void
-output_block_profiler (file, blockno)
- FILE *file;
- int blockno;
-{
- char block[256];
-
- ASM_GENERATE_INTERNAL_LABEL (block, "LPBX", 2);
-
- /* @@ Need to deal with PIC. I'm not sure what the requirements are on
- register usage, so I used r26/r27 to be safe. */
- fprintf (file, "\tor.u\t %s,%s,%shi16(%s+%d)\n", reg_names[27], reg_names[0],
- m88k_pound_sign, &block[1], 4 * blockno);
- fprintf (file, "\tld\t %s,%s,%slo16(%s+%d)\n", reg_names[26], reg_names[27],
- m88k_pound_sign, &block[1], 4 * blockno);
- fprintf (file, "\taddu\t %s,%s,1\n", reg_names[26], reg_names[26]);
- fprintf (file, "\tst\t %s,%s,%slo16(%s+%d)\n", reg_names[26], reg_names[27],
- m88k_pound_sign, &block[1], 4 * blockno);
-}
\f
/* Determine whether a function argument is passed in a register, and
which register.
CUMULATIVE_ARGS args_so_far;
enum machine_mode mode;
tree type;
- int named;
+ int named ATTRIBUTE_UNUSED;
{
int bytes, words;
|| bytes != UNITS_PER_WORD))
return (rtx) 0;
- return gen_rtx (REG,
- ((mode == BLKmode) ? TYPE_MODE (type) : mode),
- 2 + args_so_far);
+ return gen_rtx_REG (((mode == BLKmode) ? TYPE_MODE (type) : mode),
+ 2 + args_so_far);
}
\f
-/* Do what is necessary for `va_start'. The argument is ignored;
- We look at the current function to determine if stdargs or varargs
- is used and fill in an initial va_list. A pointer to this constructor
- is returned. */
+/* Do what is necessary for `va_start'. We look at the current function
+ to determine if stdargs or varargs is used and spill as necessary.
+ We return a pointer to the spill area. */
struct rtx_def *
-m88k_builtin_saveregs (arglist)
- tree arglist;
+m88k_builtin_saveregs ()
{
- rtx block, addr, argsize;
+ rtx addr;
tree fntype = TREE_TYPE (current_function_decl);
int argadj = ((!(TYPE_ARG_TYPES (fntype) != 0
&& (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
!= void_type_node)))
? -UNITS_PER_WORD : 0) + UNITS_PER_WORD - 1;
int fixed;
- variable_args_p = 1;
-
- if (CONSTANT_P (current_function_arg_offset_rtx))
- {
- fixed = (XINT (current_function_arg_offset_rtx, 0)
- + argadj) / UNITS_PER_WORD;
- argsize = gen_rtx (CONST_INT, VOIDmode, fixed);
- }
- else
- {
- fixed = 0;
- argsize = plus_constant (current_function_arg_offset_rtx, argadj);
- argsize = expand_shift (RSHIFT_EXPR, Pmode, argsize,
- build_int_2 (2, 0), argsize, 0);
- }
-
- /* Allocate the va_list constructor */
- block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD);
- RTX_UNCHANGING_P (block) = 1;
- RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
- /* Store the argsize as the __va_arg member. */
- emit_move_insn (change_address (block, SImode, XEXP (block, 0)),
- argsize);
+ variable_args_p = 1;
- /* Store the arg pointer in the __va_stk member. */
- emit_move_insn (change_address (block, Pmode,
- plus_constant (XEXP (block, 0),
- UNITS_PER_WORD)),
- copy_to_reg (virtual_incoming_args_rtx));
+ fixed = 0;
+ if (GET_CODE (current_function_arg_offset_rtx) == CONST_INT)
+ fixed = ((INTVAL (current_function_arg_offset_rtx) + argadj)
+ / UNITS_PER_WORD);
/* Allocate the register space, and store it as the __va_reg member. */
addr = assign_stack_local (BLKmode, 8 * UNITS_PER_WORD, -1);
- MEM_IN_STRUCT_P (addr) = 1;
+ set_mem_alias_set (addr, get_varargs_alias_set ());
RTX_UNCHANGING_P (addr) = 1;
RTX_UNCHANGING_P (XEXP (addr, 0)) = 1;
- emit_move_insn (change_address (block, Pmode,
- plus_constant (XEXP (block, 0),
- 2 * UNITS_PER_WORD)),
- copy_to_reg (XEXP (addr, 0)));
/* Now store the incoming registers. */
if (fixed < 8)
- move_block_from_reg
- (2 + fixed,
- change_address (addr, Pmode,
- plus_constant (XEXP (addr, 0),
- fixed * UNITS_PER_WORD)),
- 8 - fixed);
-
- /* Return the address of the va_list constructor, but don't put it in a
- register. This fails when not optimizing and produces worse code when
- optimizing. */
- return XEXP (block, 0);
+ move_block_from_reg (2 + fixed,
+ adjust_address (addr, Pmode, fixed * UNITS_PER_WORD),
+ 8 - fixed);
+
+ /* Return the address of the save area, but don't put it in a
+ register. This fails when not optimizing and produces worse code
+ when optimizing. */
+ return XEXP (addr, 0);
+}
+
+/* Define the `__builtin_va_list' type for the ABI. */
+
+tree
+m88k_build_va_list ()
+{
+ tree field_reg, field_stk, field_arg, int_ptr_type_node, record;
+
+ int_ptr_type_node = build_pointer_type (integer_type_node);
+
+ record = make_node (RECORD_TYPE);
+
+ field_arg = build_decl (FIELD_DECL, get_identifier ("__va_arg"),
+ integer_type_node);
+ field_stk = build_decl (FIELD_DECL, get_identifier ("__va_stk"),
+ int_ptr_type_node);
+ field_reg = build_decl (FIELD_DECL, get_identifier ("__va_reg"),
+ int_ptr_type_node);
+
+ DECL_FIELD_CONTEXT (field_arg) = record;
+ DECL_FIELD_CONTEXT (field_stk) = record;
+ DECL_FIELD_CONTEXT (field_reg) = record;
+
+ TYPE_FIELDS (record) = field_arg;
+ TREE_CHAIN (field_arg) = field_stk;
+ TREE_CHAIN (field_stk) = field_reg;
+
+ layout_type (record);
+ return record;
+}
+
+/* Implement `va_start' for varargs and stdarg. */
+
+void
+m88k_va_start (valist, nextarg)
+ tree valist;
+ rtx nextarg ATTRIBUTE_UNUSED;
+{
+ tree field_reg, field_stk, field_arg;
+ tree reg, stk, arg, t;
+
+ field_arg = TYPE_FIELDS (va_list_type_node);
+ field_stk = TREE_CHAIN (field_arg);
+ field_reg = TREE_CHAIN (field_stk);
+
+ arg = build (COMPONENT_REF, TREE_TYPE (field_arg), valist, field_arg);
+ stk = build (COMPONENT_REF, TREE_TYPE (field_stk), valist, field_stk);
+ reg = build (COMPONENT_REF, TREE_TYPE (field_reg), valist, field_reg);
+
+ /* Fill in the ARG member. */
+ {
+ tree fntype = TREE_TYPE (current_function_decl);
+ int argadj = ((!(TYPE_ARG_TYPES (fntype) != 0
+ && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
+ != void_type_node)))
+ ? -UNITS_PER_WORD : 0) + UNITS_PER_WORD - 1;
+ tree argsize;
+
+ if (CONSTANT_P (current_function_arg_offset_rtx))
+ {
+ int fixed = (INTVAL (current_function_arg_offset_rtx)
+ + argadj) / UNITS_PER_WORD;
+
+ argsize = build_int_2 (fixed, 0);
+ }
+ else
+ {
+ argsize = make_tree (integer_type_node,
+ current_function_arg_offset_rtx);
+ argsize = fold (build (PLUS_EXPR, integer_type_node, argsize,
+ build_int_2 (argadj, 0)));
+ argsize = fold (build (RSHIFT_EXPR, integer_type_node, argsize,
+ build_int_2 (2, 0)));
+ }
+
+ t = build (MODIFY_EXPR, TREE_TYPE (arg), arg, argsize);
+ TREE_SIDE_EFFECTS (t) = 1;
+ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
+ }
+
+ /* Store the arg pointer in the __va_stk member. */
+ t = make_tree (TREE_TYPE (stk), virtual_incoming_args_rtx);
+ t = build (MODIFY_EXPR, TREE_TYPE (stk), stk, t);
+ TREE_SIDE_EFFECTS (t) = 1;
+ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
+
+ /* Tuck the return value from __builtin_saveregs into __va_reg. */
+ t = make_tree (TREE_TYPE (reg), expand_builtin_saveregs ());
+ t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, t);
+ TREE_SIDE_EFFECTS (t) = 1;
+ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
+}
+
+/* Implement `va_arg'. */
+
+rtx
+m88k_va_arg (valist, type)
+ tree valist, type;
+{
+ tree field_reg, field_stk, field_arg;
+ tree reg, stk, arg, arg_align, base, t;
+ int size, wsize, align, reg_p;
+ rtx addr_rtx;
+
+ field_arg = TYPE_FIELDS (va_list_type_node);
+ field_stk = TREE_CHAIN (field_arg);
+ field_reg = TREE_CHAIN (field_stk);
+
+ arg = build (COMPONENT_REF, TREE_TYPE (field_arg), valist, field_arg);
+ stk = build (COMPONENT_REF, TREE_TYPE (field_stk), valist, field_stk);
+ reg = build (COMPONENT_REF, TREE_TYPE (field_reg), valist, field_reg);
+
+ size = int_size_in_bytes (type);
+ wsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+ align = 1 << ((TYPE_ALIGN (type) / BITS_PER_UNIT) >> 3);
+ reg_p = (AGGREGATE_TYPE_P (type)
+ ? size == UNITS_PER_WORD && TYPE_ALIGN (type) == BITS_PER_WORD
+ : size <= 2*UNITS_PER_WORD);
+
+ /* Align __va_arg to the (doubleword?) boundary above. */
+ t = build (PLUS_EXPR, TREE_TYPE (arg), arg, build_int_2 (align - 1, 0));
+ arg_align = build (BIT_AND_EXPR, TREE_TYPE (t), t, build_int_2 (-align, -1));
+ arg_align = save_expr (arg_align);
+
+ /* Decide if we should read from stack or regs. */
+ t = build (LT_EXPR, integer_type_node, arg_align, build_int_2 (8, 0));
+ base = build (COND_EXPR, TREE_TYPE (reg), t, reg, stk);
+
+ /* Find the final address. */
+ t = build (PLUS_EXPR, TREE_TYPE (base), base, arg_align);
+ addr_rtx = expand_expr (t, NULL_RTX, Pmode, EXPAND_NORMAL);
+ addr_rtx = copy_to_reg (addr_rtx);
+
+ /* Increment __va_arg. */
+ t = build (PLUS_EXPR, TREE_TYPE (arg), arg_align, build_int_2 (wsize, 0));
+ t = build (MODIFY_EXPR, TREE_TYPE (arg), arg, t);
+ TREE_SIDE_EFFECTS (t) = 1;
+ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
+
+ return addr_rtx;
}
\f
/* If cmpsi has not been generated, emit code to do the test. Return the
rtx label;
{
if (m88k_compare_op1 == const0_rtx)
- emit_jump_insn (optimize
- ? gen_bxx (emit_test (op, VOIDmode), label)
- : gen_bcnd (gen_rtx (op, VOIDmode,
- m88k_compare_op0, const0_rtx),
- label));
+ emit_jump_insn (gen_bcnd
+ (gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx),
+ label));
else if (m88k_compare_op0 == const0_rtx)
- emit_jump_insn (optimize
- ? gen_bxx (emit_test (op, VOIDmode), label)
- : gen_bcnd (gen_rtx (swap_condition (op), VOIDmode,
- m88k_compare_op1, const0_rtx),
- label));
+ emit_jump_insn (gen_bcnd
+ (gen_rtx (swap_condition (op),
+ VOIDmode, m88k_compare_op1, const0_rtx),
+ label));
else if (op != EQ && op != NE)
emit_jump_insn (gen_bxx (emit_test (op, VOIDmode), label));
else
{
if (SMALL_INTVAL (-value))
emit_insn (gen_addsi3 (zero, reg,
- gen_rtx (CONST_INT, VOIDmode, -value)));
+ GEN_INT (-value)));
else
emit_insn (gen_xorsi3 (zero, reg, constant));
print_operand (file, x, code)
FILE *file;
rtx x;
- char code;
+ int code;
{
enum rtx_code xc = (x ? GET_CODE (x) : UNKNOWN);
register int value = (xc == CONST_INT ? INTVAL (x) : 0);
if (sequencep)
{
if (code < 'B' || code > 'E')
- output_operand_lossage ("%R not followed by %B/C/D/E");
+ output_operand_lossage ("%%R not followed by %%B/C/D/E");
if (reversep)
xc = reverse_condition (xc);
sequencep = 0;
The mechanism below is completed by having CC_STATUS_INIT set
the code to the unknown value. */
+ /*
+ hassey 6/30/93
+ A problem with 88110 4.1 & 4.2 makes the use of fldcr for
+ this purpose undesirable. Instead we will use tb1, this will
+ cause serialization on the 88100 but such is life.
+ */
+
static rtx last_addr = 0;
if (code == 'V' /* Only need to serialize before a load. */
&& m88k_volatile_code != 'V' /* Loads complete in FIFO order. */
&& !(m88k_volatile_code == 'v'
&& GET_CODE (XEXP (x, 0)) == LO_SUM
&& rtx_equal_p (XEXP (XEXP (x, 0), 1), last_addr)))
- fprintf (file, "fldcr\t %s,%sfcr63\n\t",
+ fprintf (file,
+#if 0
+#ifdef AS_BUG_FLDCR
+ "fldcr\t %s,%scr63\n\t",
+#else
+ "fldcr\t %s,%sfcr63\n\t",
+#endif
reg_names[0], m88k_pound_sign);
+#else /* 0 */
+ "tb1\t 1,%s,0xff\n\t", reg_names[0]);
+#endif /* 0 */
m88k_volatile_code = code;
last_addr = (GET_CODE (XEXP (x, 0)) == LO_SUM
? XEXP (XEXP (x, 0), 1) : 0);
value >>= 16;
case 'x': /* print the lower 16 bits of the integer constant in hex */
if (xc != CONST_INT)
- output_operand_lossage ("invalid %x/X value");
+ output_operand_lossage ("invalid %%x/X value");
fprintf (file, "0x%x", value & 0xffff); return;
case 'H': /* print the low 16 bits of the negated integer constant */
if (xc != CONST_INT)
- output_operand_lossage ("invalid %H value");
+ output_operand_lossage ("invalid %%H value");
value = -value;
case 'h': /* print the register or low 16 bits of the integer constant */
if (xc == REG)
goto reg;
if (xc != CONST_INT)
- output_operand_lossage ("invalid %h value");
+ output_operand_lossage ("invalid %%h value");
fprintf (file, "%d", value & 0xffff);
return;
case 'Q': /* print the low 8 bits of the negated integer constant */
if (xc != CONST_INT)
- output_operand_lossage ("invalid %Q value");
+ output_operand_lossage ("invalid %%Q value");
value = -value;
case 'q': /* print the register or low 8 bits of the integer constant */
if (xc == REG)
goto reg;
if (xc != CONST_INT)
- output_operand_lossage ("invalid %q value");
+ output_operand_lossage ("invalid %%q value");
fprintf (file, "%d", value & 0xff);
return;
case 'w': /* print the integer constant (X == 32 ? 0 : 32 - X) */
if (xc != CONST_INT)
- output_operand_lossage ("invalid %o value");
+ output_operand_lossage ("invalid %%o value");
fprintf (file, "%d", value == 32 ? 0 : 32 - value);
return;
case 'p': /* print the logarithm of the integer constant */
if (xc != CONST_INT
|| (value = exact_log2 (value)) < 0)
- output_operand_lossage ("invalid %p value");
+ output_operand_lossage ("invalid %%p value");
fprintf (file, "%d", value);
return;
- case 'S': /* compliment the value and then... */
+ case 'S': /* complement the value and then... */
value = ~value;
case 's': /* print the width and offset values forming the integer
constant with a SET instruction. See integer_ok_for_set. */
register int top, bottom;
if (xc != CONST_INT)
- output_operand_lossage ("invalid %s/S value");
+ output_operand_lossage ("invalid %%s/S value");
/* All the "one" bits must be contiguous. If so, MASK will be
a power of two or zero. */
mask = (uval | (uval - 1)) + 1;
if (!(uval && POWER_OF_2_or_0 (mask)))
- output_operand_lossage ("invalid %s/S value");
+ output_operand_lossage ("invalid %%s/S value");
top = mask ? exact_log2 (mask) : 32;
bottom = exact_log2 (uval & ~(uval - 1));
fprintf (file,"%d<%d>", top - bottom, bottom);
if (xc == LABEL_REF)
output_addr_const (file, x);
else if (xc != PC)
- output_operand_lossage ("invalid %P operand");
+ output_operand_lossage ("invalid %%P operand");
return;
case 'L': /* print 0 or 1 if operand is label_ref and then... */
? ".n\t" : "\t", file);
return;
+ case '!': /* Reverse the following condition. */
+ sequencep++;
+ reversep = 1;
+ return;
case 'R': /* reverse the condition of the next print_operand
if operand is a label_ref. */
sequencep++;
case LE: fputs ("le0", file); return;
case LT: fputs ("lt0", file); return;
case GE: fputs ("ge0", file); return;
- default: output_operand_lossage ("invalid %B value");
+ default: output_operand_lossage ("invalid %%B value");
}
case 'C': /* bb0/bb1 branch values for comparisons */
case LEU: fputs ("ls", file); return;
case LTU: fputs ("lo", file); return;
case GEU: fputs ("hs", file); return;
- default: output_operand_lossage ("invalid %C value");
+ default: output_operand_lossage ("invalid %%C value");
}
case 'D': /* bcnd branch values for float comparisons */
case LE: fputs ("0xe", file); return;
case LT: fputs ("0x4", file); return;
case GE: fputs ("0xb", file); return;
- default: output_operand_lossage ("invalid %D value");
+ default: output_operand_lossage ("invalid %%D value");
}
case 'E': /* bcnd branch values for special integers */
{
case EQ: fputs ("0x8", file); return;
case NE: fputs ("0x7", file); return;
- default: output_operand_lossage ("invalid %E value");
+ default: output_operand_lossage ("invalid %%E value");
}
case 'd': /* second register of a two register pair */
if (xc != REG)
- output_operand_lossage ("`%d' operand isn't a register");
+ output_operand_lossage ("`%%d' operand isn't a register");
fputs (reg_names[REGNO (x) + 1], file);
return;
return;
}
else if (xc != REG)
- output_operand_lossage ("invalid %r value");
+ output_operand_lossage ("invalid %%r value");
case 0:
name:
if (xc == REG)
output_address (x);
else if (xc == MEM)
output_address (XEXP (x, 0));
+ else if (flag_pic && xc == UNSPEC)
+ {
+ output_addr_const (file, XVECEXP (x, 0, 0));
+ fputs ("#got_rel", file);
+ }
else if (xc == CONST_DOUBLE)
output_operand_lossage ("operand is const_double");
else
reg_names[0], reg_names[REGNO (XEXP (addr, 0))]);
break;
- case LSHIFT:
- fprintf (file, "%s,%shi16(", reg_names[0], m88k_pound_sign);
- output_addr_const (file, XEXP (addr, 0));
- fputc (')', file);
- break;
-
case CONST_INT:
fprintf (file, "%s,%d", reg_names[0], INTVAL (addr));
break;
output_addr_const (file, addr);
}
}
+
+/* Return true if X is an address which needs a temporary register when
+ reloaded while generating PIC code. */
+
+int
+pic_address_needs_scratch (x)
+ rtx x;
+{
+ /* An address which is a symbolic plus a non SMALL_INT needs a temp reg. */
+ if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
+ && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
+ && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
+ && ! ADD_INT (XEXP (XEXP (x, 0), 1)))
+ return 1;
+
+ return 0;
+}
+
+/* Returns 1 if OP is either a symbol reference or a sum of a symbol
+ reference and a constant. */
+
+int
+symbolic_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+{
+ switch (GET_CODE (op))
+ {
+ case SYMBOL_REF:
+ case LABEL_REF:
+ return 1;
+
+ case CONST:
+ op = XEXP (op, 0);
+ return ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
+ || GET_CODE (XEXP (op, 0)) == LABEL_REF)
+ && GET_CODE (XEXP (op, 1)) == CONST_INT);
+
+ /* ??? This clause seems to be irrelevant. */
+ case CONST_DOUBLE:
+ return GET_MODE (op) == mode;
+
+ default:
+ return 0;
+ }
+}
+
+#if defined (CTOR_LIST_BEGIN) && !defined (OBJECT_FORMAT_ELF)
+static void
+m88k_svr3_asm_out_constructor (symbol, priority)
+ rtx symbol;
+ int priority ATTRIBUTE_UNUSED;
+{
+ const char *name = XSTR (symbol, 0);
+
+ init_section ();
+ fprintf (asm_out_file, "\tor.u\t r13,r0,hi16(");
+ assemble_name (asm_out_file, name);
+ fprintf (asm_out_file, ")\n\tor\t r13,r13,lo16(");
+ assemble_name (asm_out_file, name);
+ fprintf (asm_out_file, ")\n\tsubu\t r31,r31,%d\n\tst\t r13,r31,%d\n",
+ STACK_BOUNDARY / BITS_PER_UNIT, REG_PARM_STACK_SPACE (0));
+}
+
+static void
+m88k_svr3_asm_out_destructor (symbol, priority)
+ rtx symbol;
+ int priority ATTRIBUTE_UNUSED;
+{
+ int i;
+
+ fini_section ();
+ assemble_integer (symbol, UNITS_PER_WORD, BITS_PER_WORD, 1);
+ for (i = 1; i < 4; i++)
+ assemble_integer (constm1_rtx, UNITS_PER_WORD, BITS_PER_WORD, 1);
+}
+#endif /* INIT_SECTION_ASM_OP && ! OBJECT_FORMAT_ELF */
+
+static void
+m88k_select_section (decl, reloc, align)
+ tree decl;
+ int reloc;
+ unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED;
+{
+ if (TREE_CODE (decl) == STRING_CST)
+ {
+ if (! flag_writable_strings)
+ readonly_data_section ();
+ else if (TREE_STRING_LENGTH (decl) <= m88k_gp_threshold)
+ sdata_section ();
+ else
+ data_section ();
+ }
+ else if (TREE_CODE (decl) == VAR_DECL)
+ {
+ if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)))
+ sdata_section ();
+ else if ((flag_pic && reloc)
+ || !TREE_READONLY (decl) || TREE_SIDE_EFFECTS (decl)
+ || !DECL_INITIAL (decl)
+ || (DECL_INITIAL (decl) != error_mark_node
+ && !TREE_CONSTANT (DECL_INITIAL (decl))))
+ data_section ();
+ else
+ readonly_data_section ();
+ }
+ else
+ readonly_data_section ();
+}
+
+/* Adjust the cost of INSN based on the relationship between INSN that
+ is dependent on DEP_INSN through the dependence LINK. The default
+ is to make no adjustment to COST.
+
+ On the m88k, ignore the cost of anti- and output-dependencies. On
+ the m88100, a store can issue two cycles before the value (not the
+ address) has finished computing. */
+
+static int
+m88k_adjust_cost (insn, link, dep, cost)
+ rtx insn;
+ rtx link;
+ rtx dep;
+ int cost;
+{
+ if (REG_NOTE_KIND (link) != 0)
+ return 0; /* Anti or output dependence. */
+
+ if (! TARGET_88100
+ && recog_memoized (insn) >= 0
+ && get_attr_type (insn) == TYPE_STORE
+ && SET_SRC (PATTERN (insn)) == SET_DEST (PATTERN (dep)))
+ return cost - 4; /* 88110 store reservation station. */
+
+ return cost;
+}
+
+/* For the m88k, determine if the item should go in the global pool. */
+
+static void
+m88k_encode_section_info (decl, rtl, first)
+ tree decl;
+ rtx rtl;
+ int first ATTRIBUTE_UNUSED;
+{
+ if (m88k_gp_threshold > 0)
+ {
+ if (TREE_CODE (decl) == VAR_DECL)
+ {
+ if (!TREE_READONLY (decl) || TREE_SIDE_EFFECTS (decl))
+ {
+ int size = int_size_in_bytes (TREE_TYPE (decl));
+
+ if (size > 0 && size <= m88k_gp_threshold)
+ SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
+ }
+ }
+ else if (TREE_CODE (decl) == STRING_CST
+ && flag_writable_strings
+ && TREE_STRING_LENGTH (decl) <= m88k_gp_threshold)
+ SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
+ }
+}
+
+#ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
+static void
+m88k_internal_label (stream, prefix, labelno)
+ FILE *stream;
+ const char *prefix;
+ unsigned long labelno;
+{
+ fprintf (stream, TARGET_SVR4 ? ".%s%lu:\n%s.%s%lu\n" : "@%s%ld:\n",
+ prefix, labelno, INTERNAL_ASM_OP, prefix, labelno);
+}
+#endif
+
+static bool
+m88k_rtx_costs (x, code, outer_code, total)
+ rtx x;
+ int code, outer_code;
+ int *total;
+{
+ switch (code)
+ {
+ /* We assume that any 16 bit integer can easily be recreated, so we
+ indicate 0 cost, in an attempt to get GCC not to optimize things
+ like comparison against a constant. */
+ case CONST_INT:
+ if (SMALL_INT (x))
+ *total = 0;
+ else if (SMALL_INTVAL (- INTVAL (x)))
+ *total = 2;
+ else if (classify_integer (SImode, INTVAL (x)) != m88k_oru_or)
+ *total = 4;
+ else
+ *total = 7;
+ return true;
+
+ case HIGH:
+ *total = 2;
+ return true;
+
+ case CONST:
+ case LABEL_REF:
+ case SYMBOL_REF:
+ if (flag_pic)
+ *total = (flag_pic == 2) ? 11 : 8;
+ else
+ *total = 5;
+ return true;
+
+ /* The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
+ is as good as a register; since it can't be placed in any insn, it
+ won't do anything in cse, but it will cause expand_binop to pass the
+ constant to the define_expands). */
+ case CONST_DOUBLE:
+ *total = 0;
+ return true;
+
+ case MEM:
+ *total = COSTS_N_INSNS (2);
+ return true;
+
+ case MULT:
+ *total = COSTS_N_INSNS (3);
+ return true;
+
+ case DIV:
+ case UDIV:
+ case MOD:
+ case UMOD:
+ *total = COSTS_N_INSNS (38);
+ return true;
+
+ default:
+ return false;
+ }
+}
+
+/* Provide the costs of an addressing mode that contains ADDR.
+ If ADDR is not a valid address, its cost is irrelevant.
+ REG+REG is made slightly more expensive because it might keep
+ a register live for longer than we might like. */
+static int
+m88k_address_cost (x)
+ rtx x;
+{
+ switch (GET_CODE (x))
+ {
+ case REG:
+ case LO_SUM:
+ case MULT:
+ return 1;
+ case HIGH:
+ return 2;
+ case PLUS:
+ return (REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1))) ? 2 : 1;
+ default:
+ return 4;
+ }
+}
OSDN Git Service
