-/* Run-time compilation parameters selecting different hardware subsets. */
-
-extern int target_flags;
-
-/* Macros used in the machine description to test the flags. */
-
-/* Compile for a 68020 (not a 68000 or 68010). */
-#define MASK_68020 (1<<0)
-#define TARGET_68020 (target_flags & MASK_68020)
-
-/* Compile for a 68030. This does not really make a difference in GCC,
- it just enables the __mc68030__ predefine. */
-#define MASK_68030 (1<<1)
-#define TARGET_68030 (target_flags & MASK_68030)
-
-/* Optimize for 68040, but still allow execution on 68020
- (-m68020-40 or -m68040).
- The 68040 will execute all 68030 and 68881/2 instructions, but some
- of them must be emulated in software by the OS. When TARGET_68040 is
- turned on, these instructions won't be used. This code will still
- run on a 68030 and 68881/2. */
-#define MASK_68040 (1<<2)
-#define TARGET_68040 (target_flags & MASK_68040)
-
-/* Use the 68040-only fp instructions (-m68040 or -m68060). */
-#define MASK_68040_ONLY (1<<3)
-#define TARGET_68040_ONLY (target_flags & MASK_68040_ONLY)
-
-/* Optimize for 68060, but still allow execution on 68020
- (-m68020-60 or -m68060).
- The 68060 will execute all 68030 and 68881/2 instructions, but some
- of them must be emulated in software by the OS. When TARGET_68060 is
- turned on, these instructions won't be used. This code will still
- run on a 68030 and 68881/2. */
-#define MASK_68060 (1<<4)
-#define TARGET_68060 (target_flags & MASK_68060)
-
-/* Compile for mcf5200 */
-#define MASK_5200 (1<<5)
-#define TARGET_5200 (target_flags & MASK_5200)
-
-/* Build for ColdFire v3 */
-#define MASK_CFV3 (1<<6)
-#define TARGET_CFV3 (target_flags & MASK_CFV3)
-
-/* Build for ColdFire v4 */
-#define MASK_CFV4 (1<<7)
-#define TARGET_CFV4 (target_flags & MASK_CFV4)
-
-/* Compile for ColdFire 528x */
-#define MASK_528x (1<<8)
-#define TARGET_528x (target_flags & MASK_528x)
-
-/* Divide support for ColdFire */
-#define MASK_CF_HWDIV (1<<9)
-#define TARGET_CF_HWDIV (target_flags & MASK_CF_HWDIV)
-
-/* Compile 68881 insns for floating point (not library calls). */
-#define MASK_68881 (1<<10)
-#define TARGET_68881 (target_flags & MASK_68881)
-
-/* Compile using 68020 bit-field insns. */
-#define MASK_BITFIELD (1<<11)
-#define TARGET_BITFIELD (target_flags & MASK_BITFIELD)
-
-/* Compile with 16-bit `int'. */
-#define MASK_SHORT (1<<12)
-#define TARGET_SHORT (target_flags & MASK_SHORT)
-
-/* Align ints to a word boundary. This breaks compatibility with the
- published ABI's for structures containing ints, but produces faster
- code on cpus with 32-bit busses (020, 030, 040, 060, CPU32+, ColdFire).
- It's required for ColdFire cpus without a misalignment module. */
-#define MASK_ALIGN_INT (1<<13)
-#define TARGET_ALIGN_INT (target_flags & MASK_ALIGN_INT)
-
-/* Use PC-relative addressing modes (without using a global offset table).
- The m68000 supports 16-bit PC-relative addressing.
- The m68020 supports 32-bit PC-relative addressing
- (using outer displacements).
-
- Under this model, all SYMBOL_REFs (and CONSTs) and LABEL_REFs are
- treated as all containing an implicit PC-relative component, and hence
- cannot be used directly as addresses for memory writes. See the comments
- in m68k.c for more information. */
-#define MASK_PCREL (1<<14)
-#define TARGET_PCREL (target_flags & MASK_PCREL)
-
-/* Relax strict alignment. */
-#define MASK_NO_STRICT_ALIGNMENT (1<<15)
-#define TARGET_STRICT_ALIGNMENT (~target_flags & MASK_NO_STRICT_ALIGNMENT)
-
-/* Compile using rtd insn calling sequence.
- This will not work unless you use prototypes at least
- for all functions that can take varying numbers of args. */
-#define MASK_RTD (1<<16)
-#define TARGET_RTD (target_flags & MASK_RTD)
-
-/* Support A5 relative data separate from text.
- * This option implies -fPIC, however it inhibits the generation of the
- * A5 save/restore in functions and the loading of a5 with a got pointer.
- */
-#define MASK_SEP_DATA (1<<17)
-#define TARGET_SEP_DATA (target_flags & MASK_SEP_DATA)
-
-/* Compile using library ID based shared libraries.
- * Set a specific ID using the -mshared-library-id=xxx option.
- */
-#define MASK_ID_SHARED_LIBRARY (1<<18)
-#define TARGET_ID_SHARED_LIBRARY (target_flags & MASK_ID_SHARED_LIBRARY)
-
-/* Compile for a CPU32. A 68020 without bitfields is a good
- heuristic for a CPU32. */
-#define TARGET_CPU32 (TARGET_68020 && !TARGET_BITFIELD)
-
-/* Is the target a ColdFire? */
-#define MASK_COLDFIRE (MASK_5200|MASK_528x|MASK_CFV3|MASK_CFV4)
-#define TARGET_COLDFIRE (target_flags & MASK_COLDFIRE)
-
-/* Which bits can be set by specifying a ColdFire */
-#define MASK_ALL_CF_BITS (MASK_COLDFIRE|MASK_CF_HWDIV)
-
-#define TARGET_SWITCHES \
- { { "68020", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY), \
- N_("Generate code for a 68020") }, \
- { "c68020", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY), \
- N_("Generate code for a 68020") }, \
- { "68020", (MASK_68020|MASK_BITFIELD), "" }, \
- { "c68020", (MASK_68020|MASK_BITFIELD), "" }, \
- { "68000", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
- |MASK_68020|MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 68000") }, \
- { "c68000", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
- |MASK_68020|MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 68000") }, \
- { "bitfield", MASK_BITFIELD, \
- N_("Use the bit-field instructions") }, \
- { "nobitfield", - MASK_BITFIELD, \
- N_("Do not use the bit-field instructions") }, \
- { "short", MASK_SHORT, \
- N_("Consider type `int' to be 16 bits wide") }, \
- { "noshort", - MASK_SHORT, \
- N_("Consider type `int' to be 32 bits wide") }, \
- { "68881", MASK_68881, "" }, \
- { "soft-float", - (MASK_68040_ONLY|MASK_68881), \
- N_("Generate code with library calls for floating point") }, \
- { "68020-40", -(MASK_ALL_CF_BITS|MASK_68060|MASK_68040_ONLY), \
- N_("Generate code for a 68040, without any new instructions") }, \
- { "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040), ""},\
- { "68020-60", -(MASK_ALL_CF_BITS|MASK_68040_ONLY), \
- N_("Generate code for a 68060, without any new instructions") }, \
- { "68020-60", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040 \
- |MASK_68060), "" }, \
- { "68030", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY), \
- N_("Generate code for a 68030") }, \
- { "68030", (MASK_68020|MASK_68030|MASK_BITFIELD), "" }, \
- { "68040", - (MASK_ALL_CF_BITS|MASK_68060), \
- N_("Generate code for a 68040") }, \
- { "68040", (MASK_68020|MASK_68881|MASK_BITFIELD \
- |MASK_68040_ONLY|MASK_68040), "" }, \
- { "68060", - (MASK_ALL_CF_BITS|MASK_68040), \
- N_("Generate code for a 68060") }, \
- { "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
- |MASK_68040_ONLY|MASK_68060), "" }, \
- { "5200", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 520X") }, \
- { "5200", (MASK_5200), "" }, \
- { "5206e", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 5206e") }, \
- { "5206e", (MASK_5200|MASK_CF_HWDIV), "" }, \
- { "528x", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 528x") }, \
- { "528x", (MASK_528x|MASK_CF_HWDIV), "" }, \
- { "5307", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 5307") }, \
- { "5307", (MASK_CFV3|MASK_CF_HWDIV), "" }, \
- { "5407", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 5407") }, \
- { "5407", (MASK_CFV4|MASK_CF_HWDIV), "" }, \
- { "68851", 0, \
- N_("Generate code for a 68851") }, \
- { "no-68851", 0, \
- N_("Do no generate code for a 68851") }, \
- { "68302", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
- |MASK_68020|MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 68302") }, \
- { "68332", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a 68332") }, \
- { "68332", MASK_68020, "" }, \
- { "cpu32", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
- |MASK_BITFIELD|MASK_68881), \
- N_("Generate code for a cpu32") }, \
- { "cpu32", MASK_68020, "" }, \
- { "align-int", MASK_ALIGN_INT, \
- N_("Align variables on a 32-bit boundary") }, \
- { "no-align-int", -MASK_ALIGN_INT, \
- N_("Align variables on a 16-bit boundary") }, \
- { "sep-data", MASK_SEP_DATA, \
- N_("Enable separate data segment") }, \
- { "no-sep-data", -MASK_SEP_DATA, \
- N_("Disable separate data segment") }, \
- { "id-shared-library", MASK_ID_SHARED_LIBRARY, \
- N_("Enable ID based shared library") }, \
- { "no-id-shared-library", -MASK_ID_SHARED_LIBRARY, \
- N_("Disable ID based shared library") }, \
- { "pcrel", MASK_PCREL, \
- N_("Generate pc-relative code") }, \
- { "strict-align", -MASK_NO_STRICT_ALIGNMENT, \
- N_("Do not use unaligned memory references") }, \
- { "no-strict-align", MASK_NO_STRICT_ALIGNMENT, \
- N_("Use unaligned memory references") }, \
- { "rtd", MASK_RTD, \
- N_("Use different calling convention using 'rtd'") }, \
- { "nortd", - MASK_RTD, \
- N_("Use normal calling convention") }, \
- SUBTARGET_SWITCHES \
- { "", TARGET_DEFAULT, "" }}
-/* TARGET_DEFAULT is defined in m68k-none.h, netbsd.h, etc. */
-
-#define TARGET_OPTIONS \
-{ \
- { "shared-library-id=", &m68k_library_id_string, \
- N_("ID of shared library to build"), 0}, \
- SUBTARGET_OPTIONS \
-}