/* Definitions of target machine for GNU compiler.
Motorola 68HC11 and 68HC12.
- Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
+along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.
while (0)
/* As an embedded target, we have no libc. */
-#define inhibit_libc
+#ifndef inhibit_libc
+# define inhibit_libc
+#endif
/* Forward type declaration for prototypes definitions.
rtx_ptr is equivalent to rtx. Can't use the same name. */
N_("Auto pre/post decrement increment allowed")}, \
{ "noauto-incdec", - MASK_AUTO_INC_DEC, \
N_("Auto pre/post decrement increment not allowed")}, \
- { "inmax", MASK_MIN_MAX, \
+ { "inmax", MASK_MIN_MAX, \
N_("Min/max instructions allowed")}, \
- { "nominmax", MASK_MIN_MAX, \
+ { "nominmax", - MASK_MIN_MAX, \
N_("Min/max instructions not allowed")}, \
{ "long-calls", MASK_LONG_CALLS, \
N_("Use call and rtc for function calls and returns")}, \
N_("Use jsr and rts for function calls and returns")}, \
{ "relax", MASK_NO_DIRECT_MODE, \
N_("Do not use direct addressing mode for soft registers")},\
+ { "norelax", -MASK_NO_DIRECT_MODE, \
+ N_("Use direct addressing mode for soft registers")}, \
{ "68hc11", MASK_M6811, \
N_("Compile for a 68HC11")}, \
{ "68hc12", MASK_M6812, \
by appending `-m' to the specified name. */
#define TARGET_OPTIONS \
{ { "reg-alloc=", &m68hc11_reg_alloc_order, \
- N_("Specify the register allocation order")}, \
+ N_("Specify the register allocation order"), 0}, \
{ "soft-reg-count=", &m68hc11_soft_reg_count, \
- N_("Indicate the number of soft registers available") }, \
+ N_("Indicate the number of soft registers available"), 0}, \
SUBTARGET_OPTIONS \
}
D_OR_S_REGS, /* 16-bit soft register or D register */
X_OR_S_REGS, /* 16-bit soft register or X register */
Y_OR_S_REGS, /* 16-bit soft register or Y register */
+ Z_OR_S_REGS, /* 16-bit soft register or Z register */
SP_OR_S_REGS, /* 16-bit soft register or SP register */
D_OR_X_OR_S_REGS, /* 16-bit soft register or D or X register */
D_OR_Y_OR_S_REGS, /* 16-bit soft register or D or Y register */
"D_OR_S_REGS", \
"X_OR_S_REGS", \
"Y_OR_S_REGS", \
+ "Z_OR_S_REGS", \
"SP_OR_S_REGS", \
"D_OR_X_OR_S_REGS", \
"D_OR_Y_OR_S_REGS", \
/* D_OR_S_REGS */ { 0xFFFFDE02, 0x00007FFF }, /* D _.D */ \
/* X_OR_S_REGS */ { 0xFFFFDE01, 0x00007FFF }, /* X _.D */ \
/* Y_OR_S_REGS */ { 0xFFFFDE04, 0x00007FFF }, /* Y _.D */ \
+/* Z_OR_S_REGS */ { 0xFFFFDF00, 0x00007FFF }, /* Z _.D */ \
/* SP_OR_S_REGS */ { 0xFFFFDE08, 0x00007FFF }, /* SP _.D */ \
/* D_OR_X_OR_S_REGS */ { 0xFFFFDE03, 0x00007FFF }, /* D X _.D */ \
/* D_OR_Y_OR_S_REGS */ { 0xFFFFDE06, 0x00007FFF }, /* D Y _.D */ \
#define SMALL_REGISTER_CLASSES 1
+/* A C expression that is nonzero if hard register number REGNO2 can be
+ considered for use as a rename register for REGNO1 */
+
+#define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
+ m68hc11_hard_regno_rename_ok ((REGNO1), (REGNO2))
+
/* A C expression whose value is nonzero if pseudos that have been
assigned to registers of class CLASS would likely be spilled
because registers of CLASS are needed for spill registers.
&& VALUE == CONST0_RTX (GET_MODE (VALUE))) : 0)
/* 'U' represents certain kind of memory indexed operand for 68HC12.
- and any memory operand for 68HC11. */
+ and any memory operand for 68HC11.
+ 'R' represents indexed addressing mode or access to page0 for 68HC11.
+ For 68HC12, it represents any memory operand. */
#define EXTRA_CONSTRAINT(OP, C) \
((C) == 'U' ? m68hc11_small_indexed_indirect_p (OP, GET_MODE (OP)) \
: (C) == 'Q' ? m68hc11_symbolic_p (OP, GET_MODE (OP)) \
followed by "to". Eliminations of the same "from" register are listed
in order of preference.
- We have two registers that are eliminated on the 6811. The psuedo arg
+ We have two registers that are eliminated on the 6811. The pseudo arg
pointer and pseudo frame pointer registers can always be eliminated;
they are replaced with either the stack or the real frame pointer. */
\f
/* Passing Function Arguments on the Stack. */
-/* When a prototype says `char' or `short', really pass an `int'. */
-/* #define PROMOTE_PROTOTYPES */
-
/* If we generate an insn to push BYTES bytes, this says how many the
stack pointer really advances by. No rounding or alignment needed
for MC6811. */
The standard MC6811 call, with arg count word, includes popping the
args as part of the call template. */
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
-
-/* Nonzero if type TYPE should be returned in memory.
- Blocks and data types largers than 4 bytes cannot be returned
- in the register (D + X = 4). */
-#define RETURN_IN_MEMORY(TYPE) \
- ((TYPE_MODE (TYPE) == BLKmode) \
- ? (int_size_in_bytes (TYPE) > 4) \
- : (GET_MODE_SIZE (TYPE_MODE (TYPE)) > 4))
-
\f
/* Passing Arguments in Registers. */
int nregs;
} CUMULATIVE_ARGS;
-/* A C expression that indicates when an argument must be passed by reference.
- If nonzero for an argument, a copy of that argument is made in memory and a
- pointer to the argument is passed instead of the argument itself.
- The pointer is passed in whatever way is appropriate for passing a pointer
- to that type.
-
- 64-bit numbers are passed by reference. */
-#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
- m68hc11_function_arg_pass_by_reference (& (CUM), (MODE), (TYPE), (NAMED))
-
-
/* If defined, a C expression which determines whether, and in which direction,
to pad out an argument with extra space. The value should be of type
`enum direction': either `upward' to pad above the argument,
#define PAD_VARARGS_DOWN \
(m68hc11_function_arg_padding (TYPE_MODE (type), type) == downward)
-/* A C expression that indicates when it is the called function's
- responsibility to make a copy of arguments passed by invisible
- reference. Normally, the caller makes a copy and passes the
- address of the copy to the routine being called. When
- FUNCTION_ARG_CALLEE_COPIES is defined and is nonzero, the caller
- does not make a copy. Instead, it passes a pointer to the "live"
- value. The called function must not modify this value. If it can
- be determined that the value won't be modified, it need not make a
- copy; otherwise a copy must be made. */
-#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
- ((NAMED) && FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
-
/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
-#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
(m68hc11_init_cumulative_args (&CUM, FNTYPE, LIBNAME))
/* Update the data in CUM to advance over an argument of mode MODE and data
caller saving results in spill failure. */
#define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
-/* For an arg passed partly in registers and partly in memory,
- this is the number of registers used.
- For args passed entirely in registers or entirely in memory, zero.
-
- Passing an arg partly in register and memory does not work at all.
- Don't do that. */
-#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
-
/* 1 if N is a possible register number for function argument passing.
D is for 16-bit values, X is for 32-bit (X+D). */
#define FUNCTION_ARG_REGNO_P(N) \
The high part is passed in X and the low part in D.
For GCC, the register number must be HARD_X_REGNUM. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), \
+ gen_rtx_REG (TYPE_MODE (VALTYPE), \
((TYPE_MODE (VALTYPE) == BLKmode \
|| GET_MODE_SIZE (TYPE_MODE (VALTYPE)) <= 2) \
? HARD_D_REGNUM : HARD_X_REGNUM))
#define LIBCALL_VALUE(MODE) \
- gen_rtx (REG, MODE, \
+ gen_rtx_REG (MODE, \
(((MODE) == BLKmode || GET_MODE_SIZE (MODE) <= 2) \
? HARD_D_REGNUM : HARD_X_REGNUM))
#define FUNCTION_VALUE_REGNO_P(N) \
((N) == HARD_D_REGNUM || (N) == HARD_X_REGNUM)
-/* Register in which address to store a structure value is passed to a
- function. */
-#define STRUCT_VALUE_REGNUM HARD_D_REGNUM
-
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in functions
that have frame pointers. No definition is equivalent to always zero. */
m68hc11_initialize_trampoline ((TRAMP), (FNADDR), (CXT))
\f
-/* `INIT_TARGET_OPTABS'
- Define this macro as a C statement that declares additional library
- routines renames existing ones. `init_optabs' calls this macro
- after initializing all the normal library routines.
-
- Overrides the memcpy */
-
-#define INIT_TARGET_OPTABS \
-do \
- { \
- memcpy_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__memcpy"); \
- memcmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__memcmp"); \
- memset_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__memset"); \
- } \
-while (0)
-
-\f
/* Addressing modes, and classification of registers for them. */
/* The 68HC12 has all the post/pre increment/decrement modes. */
macro is used in only one place: `find_reloads_address' in reload.c.
For M68HC11, we handle large displacements of a base register
- by splitting the addend accors an addhi3 insn.
+ by splitting the addend across an addhi3 insn.
For M68HC12, the 64K offset range is available.
*/
#define TARGET_ASM_CONSTRUCTOR m68hc11_asm_out_constructor
#define TARGET_ASM_DESTRUCTOR m68hc11_asm_out_destructor
-/* This is how to begin an assembly language file. Most svr4 assemblers want
- at least a .file directive to come first, and some want to see a .version
- directive come right after that. Here we just establish a default
- which generates only the .file directive. If you need a .version
- directive for any specific target, you should override this definition
- in the target-specific file which includes this one. */
-
-#undef ASM_FILE_START
-#define ASM_FILE_START(FILE) \
- m68hc11_asm_file_start ((FILE), main_input_filename)
-
/* Comment character */
#define ASM_COMMENT_START ";"
fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
putc ('\n', FILE); \
\
- if (TARGET_M6812 && current_function_far) \
+ if (current_function_far) \
{ \
fprintf (FILE, "\t.far\t"); \
assemble_name (FILE, NAME); \
{ \
fprintf (FILE, "\t.interrupt\t"); \
assemble_name (FILE, NAME); \
- putc ('\b', FILE); \
+ putc ('\n', FILE); \
} \
ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
ASM_OUTPUT_LABEL(FILE, NAME); \
\f
/* Assembler Commands for Exception Regions. */
-/* Default values provided by GCC should be ok. Assumming that DWARF-2
+/* Default values provided by GCC should be ok. Assuming that DWARF-2
frame unwind info is ok for this platform. */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+/* For the support of memory banks we need addresses that indicate
+ the page number. */
+#define DWARF2_ADDR_SIZE 4
+
+/* SCz 2003-07-08: Don't use as dwarf2 .file/.loc directives because
+ the linker is doing relaxation and it does not adjust the debug_line
+ sections when it shrinks the code. This results in invalid addresses
+ when debugging. This does not bless too much the HC11/HC12 as most
+ applications are embedded and small, hence a reasonable debug info.
+ This problem is known for binutils 2.13, 2.14 and mainline. */
+#undef HAVE_AS_DWARF2_DEBUG_LINE
+
/* The prefix for local labels. You should be able to define this as
an empty string, or any arbitrary string (such as ".", ".L%", etc)
without having to make any other changes to account for the specific
\f
/* Miscellaneous Parameters. */
-/* Define the codes that are matched by predicates in m68hc11.c. */
-#define PREDICATE_CODES \
-{"stack_register_operand", {SUBREG, REG}}, \
-{"d_register_operand", {SUBREG, REG}}, \
-{"hard_addr_reg_operand", {SUBREG, REG}}, \
-{"hard_reg_operand", {SUBREG, REG}}, \
-{"m68hc11_logical_operator", {AND, IOR, XOR}}, \
-{"m68hc11_arith_operator", {AND, IOR, XOR, PLUS, MINUS, \
- ASHIFT, ASHIFTRT, LSHIFTRT, \
- ROTATE, ROTATERT }}, \
-{"m68hc11_non_shift_operator", {AND, IOR, XOR, PLUS, MINUS}}, \
-{"m68hc11_unary_operator", {NEG, NOT, SIGN_EXTEND, ZERO_EXTEND}}, \
-{"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\
-{"non_push_operand", {SUBREG, REG, MEM}}, \
-{"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \
-{"tst_operand", {SUBREG, REG, MEM}}, \
-{"cmp_operand", {SUBREG, REG, MEM, SYMBOL_REF, LABEL_REF, \
- CONST_INT, CONST_DOUBLE}},
-
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE Pmode
purposes) so give the MEM rtx a byte's mode. */
#define FUNCTION_MODE QImode
-/* Allow $ in identifiers */
-#define DOLLARS_IN_IDENTIFIERS 1
-
-/* Machine-dependent reorg pass.
- Specific optimizations are defined here:
- - this pass changes the Z register into either X or Y
- (it preserves X/Y previous values in a memory slot in page0).
-
- When this pass is finished, the global variable
- 'z_replacement_completed' is set to 2. */
-#define MACHINE_DEPENDENT_REORG(X) m68hc11_reorg (X)
-
extern int debug_m6811;
extern int z_replacement_completed;
extern int current_function_interrupt;
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