PR target/43707

[pf3gnuchains/gcc-fork.git] / gcc / config / i386 / i386.md

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b53c01d..25daeff 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -9560,17 +9560,23 @@
   ""
   "ix86_expand_binary_operator (ASHIFT, <MODE>mode, operands); DONE;")
 
-(define_insn_and_split "*ashl<mode>3_doubleword"
+(define_insn "*ashl<mode>3_doubleword"
   [(set (match_operand:DWI 0 "register_operand" "=&r,r")
        (ashift:DWI (match_operand:DWI 1 "reg_or_pm1_operand" "n,0")
                    (match_operand:QI 2 "nonmemory_operand" "<S>c,<S>c")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)"
+  ""
   "#"
+  [(set_attr "type" "multi")])
+
+(define_split
+  [(set (match_operand:DWI 0 "register_operand" "")
+       (ashift:DWI (match_operand:DWI 1 "nonmemory_operand" "")
+                   (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC FLAGS_REG))]
   "(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
   [(const_int 0)]
-  "ix86_split_ashl (operands, NULL_RTX, <MODE>mode); DONE;"
-  [(set_attr "type" "multi")])
+  "ix86_split_ashl (operands, NULL_RTX, <MODE>mode); DONE;")
 
 ;; By default we don't ask for a scratch register, because when DWImode
 ;; values are manipulated, registers are already at a premium.  But if