/* Subroutines for insn-output.c for Intel X86.
- Copyright (C) 1988, 92, 94-97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
#include "except.h"
#include "function.h"
#include "recog.h"
+#include "expr.h"
+#include "toplev.h"
#if HAVE_STDLIB_H
#include <stdlib.h>
i386_align_loops, MAX_CODE_ALIGN);
}
else
+#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
+ i386_align_loops = 4;
+#else
i386_align_loops = 2;
+#endif
/* Validate -malign-jumps= value, or provide default. */
if (i386_align_jumps_string)
i386_align_jumps, MAX_CODE_ALIGN);
}
else
+#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
+ i386_align_jumps = 4;
+#else
i386_align_jumps = def_align;
+#endif
/* Validate -malign-functions= value, or provide default. */
if (i386_align_funcs_string)
static int pic_label_no = 0;
/* This function generates code for -fpic that loads %ebx with
- with the return address of the caller and then returns. */
+ the return address of the caller and then returns. */
void
asm_output_function_prefix (file, name)
if (pic_label_rtx == 0)
{
pic_label_rtx = gen_label_rtx ();
- sprintf (pic_label_name, "LPR%d", pic_label_no++);
+ ASM_GENERATE_INTERNAL_LABEL (pic_label_name, "LPR", pic_label_no++);
LABEL_NAME (pic_label_rtx) = pic_label_name;
}
if (pic_label_rtx == 0)
{
pic_label_rtx = gen_label_rtx ();
- sprintf (pic_label_name, "LPR%d", pic_label_no++);
+ ASM_GENERATE_INTERNAL_LABEL (pic_label_name, "LPR", pic_label_no++);
LABEL_NAME (pic_label_rtx) = pic_label_name;
}
}
else
{
- output_asm_insn (AS1 (call,%P1), xops);
+ output_asm_insn (AS1 (call,%X1), xops);
output_asm_insn ("addl $_GLOBAL_OFFSET_TABLE_,%0", xops);
pic_label_rtx = 0;
}
assemble_name (asm_out_file, buf);
}
- if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
+ if (code == 'X')
+ ; /* No suffix, dammit. */
+ else if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
fprintf (file, "@GOTOFF(%%ebx)");
else if (code == 'P')
fprintf (file, "@PLT");
return;
case GE:
- fputs ("ge", file);
+ if (cc_prev_status.flags & CC_NO_OVERFLOW)
+ fputs ("ns", file);
+ else
+ fputs ("ge", file);
return;
case GT:
return;
case LT:
- fputs ("l", file);
+ if (cc_prev_status.flags & CC_NO_OVERFLOW)
+ fputs ("s", file);
+ else
+ fputs ("l", file);
return;
case GEU:
case 'h':
case 'y':
case 'P':
+ case 'X':
break;
case 'J':
\f
/* Set the cc_status for the results of an insn whose pattern is EXP.
On the 80386, we assume that only test and compare insns, as well
- as SI, HI, & DI mode ADD, SUB, NEG, AND, IOR, XOR, ASHIFT,
+ as SI, HI, & DI mode ADD, SUB, NEG, AND, IOR, XOR, BSF, ASHIFT,
ASHIFTRT, and LSHIFTRT instructions set the condition codes usefully.
Also, we assume that jumps, moves and sCOND don't affect the condition
codes. All else clobbers the condition codes, by assumption.
if (stack_regs_mentioned_p (SET_SRC (XVECEXP (exp, 0, 0))))
{
cc_status.flags |= CC_IN_80387;
- if (TARGET_CMOVE && stack_regs_mentioned_p
+ if (0 && TARGET_CMOVE && stack_regs_mentioned_p
(XEXP (SET_SRC (XVECEXP (exp, 0, 0)), 1)))
cc_status.flags |= CC_FCOMI;
}
}
if (find_regno_note (insn, REG_DEAD, REGNO (operands[2])))
- return strcat (buf, AS2 (p,%2,%0));
+ {
+ if (STACK_TOP_P (operands[0]))
+ return strcat (buf, AS2 (p,%0,%2));
+ else
+ return strcat (buf, AS2 (p,%2,%0));
+ }
if (STACK_TOP_P (operands[0]))
return strcat (buf, AS2C (%y2,%0));
abort ();
if (find_regno_note (insn, REG_DEAD, REGNO (operands[2])))
- return strcat (buf, AS2 (rp,%2,%0));
+ {
+ if (STACK_TOP_P (operands[0]))
+ return strcat (buf, AS2 (p,%0,%2));
+ else
+ return strcat (buf, AS2 (rp,%2,%0));
+ }
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
- return strcat (buf, AS2 (p,%1,%0));
+ {
+ if (STACK_TOP_P (operands[0]))
+ return strcat (buf, AS2 (rp,%0,%1));
+ else
+ return strcat (buf, AS2 (p,%1,%0));
+ }
if (STACK_TOP_P (operands[0]))
{
int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
rtx xops[2];
- if (! STACK_TOP_P (operands[1])
- || (GET_MODE (operands[0]) == DImode && ! stack_top_dies))
+ if (! STACK_TOP_P (operands[1]))
abort ();
xops[0] = GEN_INT (12);
{
if (stack_top_dies)
output_asm_insn (AS1 (fistp%z0,%0), operands);
+ else if (GET_MODE (operands[0]) == DImode && ! stack_top_dies)
+ {
+ /* There is no DImode version of this without a stack pop, so
+ we must emulate it. It doesn't matter much what the second
+ instruction is, because the value being pushed on the FP stack
+ is not used except for the following stack popping store.
+ This case can only happen without optimization, so it doesn't
+ matter that it is inefficient. */
+ output_asm_insn (AS1 (fistp%z0,%0), operands);
+ output_asm_insn (AS1 (fild%z0,%0), operands);
+ }
else
output_asm_insn (AS1 (fist%z0,%0), operands);
}
int unordered_compare = GET_MODE (SET_SRC (body)) == CCFPEQmode;
rtx tmp;
- if (TARGET_CMOVE && STACK_REG_P (operands[1]))
+ if (0 && TARGET_CMOVE && STACK_REG_P (operands[1]))
{
cc_status.flags |= CC_FCOMI;
cc_prev_status.flags &= ~CC_TEST_AX;
return "";
}
+
+char *
+output_fp_conditional_move (which_alternative, operands)
+ int which_alternative;
+ rtx operands[];
+{
+ int code = GET_CODE (operands[1]);
+
+ /* This is very tricky. We have to do it right. For a code segement
+ like:
+
+ int foo;
+ double bar;
+ ....
+ foo = foo - x;
+ if (foo >= 0)
+ bar = y;
+
+ final_scan_insn () may delete the insn which sets CC. We have to
+ tell final_scan_insn () if it should be reinserted. When CODE is
+ GT or LE, we have to check the CC_NO_OVERFLOW bit and return
+ NULL_PTR to tell final to reinsert the test insn because the
+ conditional move cannot be handled properly without it. */
+ if ((code == GT || code == LE)
+ && (cc_prev_status.flags & CC_NO_OVERFLOW))
+ return NULL_PTR;
+
+ switch (which_alternative)
+ {
+ case 0:
+ /* r <- cond ? arg : r */
+ output_asm_insn (AS2 (fcmov%F1,%2,%0), operands);
+ break;
+
+ case 1:
+ /* r <- cond ? r : arg */
+ output_asm_insn (AS2 (fcmov%f1,%3,%0), operands);
+ break;
+
+ case 2:
+ /* r <- cond ? r : arg */
+ output_asm_insn (AS2 (fcmov%F1,%2,%0), operands);
+ output_asm_insn (AS2 (fcmov%f1,%3,%0), operands);
+ break;
+
+ default:
+ abort ();
+ }
+
+ return "";
+}
+
+char *
+output_int_conditional_move (which_alternative, operands)
+ int which_alternative;
+ rtx operands[];
+{
+ int code = GET_CODE (operands[1]);
+ enum machine_mode mode;
+ rtx xops[4];
+
+ /* This is very tricky. We have to do it right. For a code segement
+ like:
+
+ int foo, bar;
+ ....
+ foo = foo - x;
+ if (foo >= 0)
+ bar = y;
+
+ final_scan_insn () may delete the insn which sets CC. We have to
+ tell final_scan_insn () if it should be reinserted. When CODE is
+ GT or LE, we have to check the CC_NO_OVERFLOW bit and return
+ NULL_PTR to tell final to reinsert the test insn because the
+ conditional move cannot be handled properly without it. */
+ if ((code == GT || code == LE)
+ && (cc_prev_status.flags & CC_NO_OVERFLOW))
+ return NULL_PTR;
+
+ mode = GET_MODE (operands [0]);
+ if (mode == DImode)
+ {
+ xops [0] = gen_rtx_SUBREG (SImode, operands [0], 1);
+ xops [1] = operands [1];
+ xops [2] = gen_rtx_SUBREG (SImode, operands [2], 1);
+ xops [3] = gen_rtx_SUBREG (SImode, operands [3], 1);
+ }
+
+ switch (which_alternative)
+ {
+ case 0:
+ /* r <- cond ? arg : r */
+ output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
+ if (mode == DImode)
+ output_asm_insn (AS2 (cmov%C1,%2,%0), xops);
+ break;
+
+ case 1:
+ /* r <- cond ? r : arg */
+ output_asm_insn (AS2 (cmov%c1,%3,%0), operands);
+ if (mode == DImode)
+ output_asm_insn (AS2 (cmov%c1,%3,%0), xops);
+ break;
+
+ case 2:
+ /* rm <- cond ? arg1 : arg2 */
+ output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
+ output_asm_insn (AS2 (cmov%c1,%3,%0), operands);
+ if (mode == DImode)
+ {
+ output_asm_insn (AS2 (cmov%C1,%2,%0), xops);
+ output_asm_insn (AS2 (cmov%c1,%3,%0), xops);
+ }
+ break;
+
+ default:
+ abort ();
+ }
+
+ return "";
+}
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