/* Definitions of target machine for GNU compiler. System/370 version.
- Copyright (C) 1989, 1993, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000
+ Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
- Modified for C/370 MVS by Dave Pitts (dpitts@nyx.cs.du.edu)
+ Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
+ Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
This file is part of GNU CC.
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-#ifdef sun
-#include <sys/types.h>
-#include <ctype.h>
-#endif
-#include <time.h>
-
-#define TARGET_VERSION printf (" (370/MVS)");
-
-/* Names to predefine in the preprocessor for this target machine. */
-
-#define CPP_PREDEFINES "-DGCC -Dgcc -DMVS -Dmvs -Asystem(mvs) -Acpu(i370) -Amachine(i370)"
-
+#ifndef GCC_I370_H
+#define GCC_I370_H
/* Run-time compilation parameters selecting different hardware subsets. */
extern int target_flags;
extern int mvs_page_num, function_base_page;
-/* True if a label has been emitted. */
-
-extern int mvs_label_emitted;
-
/* The name of the current function. */
extern char *mvs_function_name;
extern int mvs_function_name_length;
-/* The amount of space used for outgoing arguments. */
-
-extern int current_function_outgoing_args_size;
-
/* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
these are more than twice as fast as load-op-store.
On 3090 don't use this since load-op-store is much faster. */
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
-{ { "char-instructions", 1}, \
- { "no-char-instructions", -1}, \
- { "", TARGET_DEFAULT} }
+{ { "char-instructions", 1, N_("Generate char instructions")}, \
+ { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
+ { "", TARGET_DEFAULT, 0} }
/* To use IBM supplied macro function prologue and epilogue, define the
following to 1. Should only be needed if IBM changes the definition
#define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
/* Define character mapping for cross-compiling. */
+/* but only define it if really needed, since otherwise it will break builds */
-#define TARGET_EBCDIC 1
-
+#ifdef TARGET_EBCDIC
#ifdef HOST_EBCDIC
#define MAP_CHARACTER(c) ((char)(c))
#else
#define MAP_CHARACTER(c) ((char)mvs_map_char (c))
#endif
+#endif
+
+#ifdef TARGET_HLASM
+/* HLASM requires #pragma map. */
+#define REGISTER_TARGET_PRAGMAS(PFILE) \
+ cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
+#endif /* TARGET_HLASM */
/* Define maximum length of page minus page escape overhead. */
#define MAX_MVS_PAGE_LENGTH 4080
-/* Define if special allocation order desired. */
+/* Define special register allocation order desired.
+ Don't fiddle with this. I did, and I got all sorts of register
+ spill errors when compiling even relatively simple programs...
+ I have no clue why ...
+ E.g. this one is bad:
+ { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
+ */
#define REG_ALLOC_ORDER \
{ 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
#define BASE_REGISTER 3
#define PAGE_REGISTER 4
+#ifdef TARGET_HLASM
/* 1 for registers that have pervasive standard uses and are not available
- for the register allocator. On the 370 under C/370, R13 is stack (DSA)
- pointer, R12 is the TCA pointer, R3 is the base register, R4 is the page
- origin table pointer and R11 is the arg pointer. */
+ for the register allocator. These are registers that must have fixed,
+ valid values stored in them for the entire length of the subroutine call,
+ and must not in any way be moved around, jiggered with, etc. That is,
+ they must never be clobbered, and, if clobbered, the register allocator
+ will never restore them back.
+
+ We use five registers in this special way:
+ -- R3 which is used as the base register
+ -- R4 the page origin table pointer used to load R3,
+ -- R11 the arg pointer.
+ -- R12 the TCA pointer
+ -- R13 the stack (DSA) pointer
+
+ A fifth register is also exceptional: R14 is used in many branch
+ instructions to hold the target of the branch. Technically, this
+ does not qualify R14 as a register with a long-term meaning; it should
+ be enough, theoretically, to note that these instructions clobber
+ R14, and let the compiler deal with that. In practice, however,
+ the "clobber" directive acts as a barrier to optimization, and the
+ optimizer appears to be unable to perform optimizations around branches.
+ Thus, a much better strategy appears to give R14 a pervasive use;
+ this eliminates it from the register pool witout hurting optimization.
+
+ There are other registers which have special meanings, but its OK
+ for them to get clobbered, since other allocator config below will
+ make sure that they always have the right value. These are for
+ example:
+ -- R1 the returned structure pointer.
+ -- R10 the static chain reg.
+ -- R15 holds the value a subroutine returns.
+
+ Notice that it is *almost* safe to mark R11 as available to the allocator.
+ By marking it as a call_used_register, in most cases, the compiler
+ can handle it being clobbered. However, there are a few rare
+ circumstances where the register allocator will allocate r11 and
+ also try to use it as the arg pointer ... thus it must be marked fixed.
+ I think this is a bug, but I can't track it down...
+ */
#define FIXED_REGISTERS \
{ 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
saved.
The latter must include the registers where values are returned
and the register where structure-value addresses are passed.
- NOTE: all floating registers are undefined across calls. */
+ NOTE: all floating registers are undefined across calls.
+*/
#define CALL_USED_REGISTERS \
{ 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
This is ordinarily the length in words of a value of mode MODE
- but can be less for certain modes in special long registers. */
+ but can be less for certain modes in special long registers.
+ Note that DCmode (complex double) needs two regs.
+*/
+#endif /* TARGET_HLASM */
+
+/* ================= */
+#ifdef TARGET_ELF_ABI
+/* The Linux/ELF ABI uses the same register layout as the
+ * the MVS/OE version, with the following exceptions:
+ * -- r12 (rtca) is not used.
+ */
+
+#define FIXED_REGISTERS \
+{ 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
+/*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
+
+#define CALL_USED_REGISTERS \
+{ 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
+/*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
+
+#endif /* TARGET_ELF_ABI */
+/* ================= */
+
#define HARD_REGNO_NREGS(REGNO, MODE) \
- ((REGNO) > 15 ? 1 : (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
+ ((REGNO) > 15 ? \
+ ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
+ (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
even registers can hold DI. The floating point registers can hold
- either SF or DF. */
+ either SF, DF, SC or DC. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
- ((REGNO) < 16 ? ((REGNO) & 1) == 0 || (MODE) != DImode \
- : (MODE) == SFmode || (MODE) == DFmode)
+ ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
+ (((MODE) != DImode) && ((MODE) != DFmode))) \
+ : ((MODE) == SFmode || (MODE) == DFmode) || \
+ (MODE) == SCmode || (MODE) == DCmode)
/* Value is 1 if it is a good idea to tie two pseudo registers when one has
mode MODE1 and one has mode MODE2.
#define ARG_POINTER_REGNUM 11
-/* Register in which static-chain is passed to a function. */
+/* R10 is register in which static-chain is passed to a function.
+ Static-chaining is done when a nested function references as a global
+ a stack variable of its parent: e.g.
+ int parent_func (int arg) {
+ int x; // x is in parents stack
+ void child_func (void) { x++: } // child references x as global var
+ ...
+ }
+ */
#define STATIC_CHAIN_REGNUM 10
-/* Register in which address to store a structure value is passed to
- a function. */
+/* R1 is register in which address to store a structure value is passed to
+ a function. This is used only when returning 64-bit long-long in a 32-bit arch
+ and when calling functions that return structs by value. e.g.
+ typedef struct A_s { int a,b,c; } A_t;
+ A_t fun_returns_value (void) {
+ A_t a; a.a=1; a.b=2 a.c=3;
+ return a;
+ }
+ In the above, the storage for the return value is in the callers stack, and
+ the R1 points at that mem location.
+ */
#define STRUCT_VALUE_REGNUM 1
/* Define which registers fit in which classes. This is an initializer for
a vector of HARD_REG_SET of length N_REG_CLASSES. */
-#define REG_CLASS_CONTENTS {0, 0x0fffe, 0x0ffff, 0xf0000, 0xfffff}
+#define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
/* The same information, inverted:
Return the class number of the smallest class containing
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
+/* see recog.c for details */
+#define EXTRA_CONSTRAINT(OP,C) \
+ ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
+ (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
+
/* Given an rtx X being reloaded into a reg required to be in class CLASS,
return the class of reg to actually use. In general this is just CLASS;
but on some machines in some cases it is preferable to use a more
- restrictive class. */
+ restrictive class.
+
+ XXX We reload CONST_INT's into ADDR not DATA regs because on certain
+ rare occasions when lots of egisters are spilled, reload() will try
+ to put a const int into r0 and then use r0 as an index register.
+*/
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
(GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
- GET_CODE(X) == CONST_INT ? DATA_REGS : \
+ GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
GET_CODE(X) == LABEL_REF || \
GET_CODE(X) == SYMBOL_REF || \
GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
/* Return the maximum number of consecutive registers needed to represent
- mode MODE in a register of class CLASS. */
+ mode MODE in a register of class CLASS.
+ Note that DCmode (complex double) needs two regs.
+*/
#define CLASS_MAX_NREGS(CLASS, MODE) \
- ((CLASS) == FP_REGS ? 1 : \
+ ((CLASS) == FP_REGS ? \
+ ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
(GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack makes the stack pointer a
smaller address. */
+/* ------------------------------------------------------------------- */
+/* ================= */
+#ifdef TARGET_HLASM
/* #define STACK_GROWS_DOWNWARD */
/* Define this if the nominal address of the stack frame is at the
/* If we generate an insn to push BYTES bytes, this says how many the stack
pointer really advances by. On the 370, we have no push instruction. */
+#endif /* TARGET_HLASM */
+
+/* ================= */
+#ifdef TARGET_ELF_ABI
+
+/* With ELF/Linux, stack is placed at large virtual addrs and grows down.
+ But we want the compiler to generate posistive displacements from the
+ stack pointer, and so we make the frame lie above the stack. */
+
+#define STACK_GROWS_DOWNWARD
+/* #define FRAME_GROWS_DOWNWARD */
+
+/* Offset within stack frame to start allocating local variables at.
+ This is the offset to the BEGINNING of the first local allocated. */
+
+#define STARTING_FRAME_OFFSET \
+ (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
+
+#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
+
+#endif /* TARGET_ELF_ABI */
+/* ================= */
+
/* #define PUSH_ROUNDING(BYTES) */
/* Accumulate the outgoing argument count so we can request the right
DSA size and determine stack offset. */
-#define ACCUMULATE_OUTGOING_ARGS
+#define ACCUMULATE_OUTGOING_ARGS 1
/* Define offset from stack pointer, to location where a parm can be
pushed. */
a function whose data type is FNTYPE.
For a library call, FNTYPE is 0. */
-#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME) ((CUM) = 0)
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
/* Update the data in CUM to advance over an argument of mode MODE and
data type TYPE. (TYPE is null for libcalls where that information
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
-/* Define how to find the value returned by a function. VALTYPE is the
- data type of the value (as a tree).
+/* The FUNCTION_VALUE macro defines how to find the value returned by a
+ function. VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its FUNCTION_DECL;
- otherwise, FUNC is 15. */
+ otherwise, FUNC is NULL.
-#define RET_REG(MODE) ((MODE) == DFmode || (MODE) == SFmode ? 16 : 15)
+ On the 370 the return value is in R15 or R16. However,
+ DImode (64-bit ints) scalars need to get returned on the stack,
+ with r15 pointing to the location. To accomplish this, we define
+ the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
+ and the DImode scalars.
+ */
-/* On the 370 the return value is in R15 or R16. */
+#define RET_REG(MODE) \
+ (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx(REG, TYPE_MODE (VALTYPE), RET_REG(TYPE_MODE(VALTYPE)))
+ gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
+
+#define RETURN_IN_MEMORY(VALTYPE) \
+ ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
/* Define how to find the value returned by a library function assuming
the value has mode MODE. */
-#define LIBCALL_VALUE(MODE) gen_rtx(REG, MODE, RET_REG(MODE))
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
/* 1 if N is a possible register number for a function value.
On the 370 under C/370, R15 and R16 are thus used. */
#define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
-/* This macro generates the assembly code for function entry.
- All of the C/370 environment is preserved. */
-
-#if MACROPROLOGUE == 1
-#define FUNCTION_PROLOGUE(FILE, LSIZE) \
-{ \
- fprintf (FILE, "\tEDCPRLG USRDSAL=%d,BASEREG=%d\n", \
- STACK_POINTER_OFFSET + LSIZE + \
- current_function_outgoing_args_size, BASE_REGISTER); \
- fprintf (FILE, "PG%d\tEQU\t*\n", mvs_page_num ); \
- fprintf (FILE, "\tLR\t11,1\n"); \
- fprintf (FILE, "\tL\t%d,=A(PGT%d)\n", PAGE_REGISTER, mvs_page_num); \
- mvs_page_code = 6; \
- mvs_page_lit = 4; \
- mvs_check_page (FILE, 0, 0); \
- function_base_page = mvs_page_num; \
-}
-#else /* MACROPROLOGUE != 1 */
-#define FUNCTION_PROLOGUE(FILE, LSIZE) \
-{ \
- static int function_label_index = 1; \
- static int function_first = 0; \
- static int function_year, function_month, function_day; \
- static int function_hour, function_minute, function_second; \
- int i; \
- if (!function_first) \
- { \
- struct tm *function_time; \
- time_t lcltime; \
- time (&lcltime); \
- function_time = localtime (&lcltime); \
- function_year = function_time->tm_year + 1900; \
- function_month = function_time->tm_mon + 1; \
- function_day = function_time->tm_mday; \
- function_hour = function_time->tm_hour; \
- function_minute = function_time->tm_min; \
- function_second = function_time->tm_sec; \
- } \
- fprintf (FILE, "$DSD%03d\tDSECT\n", function_label_index); \
- fprintf (FILE, "\tDS\tD\n"); \
- fprintf (FILE, "\tDS\tCL(120+%d)\n", STACK_POINTER_OFFSET + LSIZE \
- + current_function_outgoing_args_size); \
- fprintf (FILE, "\tORG\t$DSD%03d\n", function_label_index); \
- fprintf (FILE, "\tDS\tCL(120+8)\n"); \
- fprintf (FILE, "\tORG\n"); \
- fprintf (FILE, "\tDS\t0D\n"); \
- fprintf (FILE, "$DSL%03d\tEQU\t*-$DSD%03d-8\n", function_label_index, \
- function_label_index); \
- fprintf (FILE, "\tDS\t0H\n"); \
- assemble_name (FILE, mvs_function_name); \
- fprintf (FILE, "\tCSECT\n"); \
- fprintf (FILE, "\tUSING\t*,15\n"); \
- fprintf (FILE, "\tB\tFPL%03d\n", function_label_index); \
- fprintf (FILE, "\tDC\tAL1(FPL%03d+4-*)\n", function_label_index + 1); \
- fprintf (FILE, "\tDC\tX'CE',X'A0',AL1(16)\n"); \
- fprintf (FILE, "\tDC\tAL4($PPA%03d)\n",function_label_index); \
- fprintf (FILE, "\tDC\tAL4(0)\n"); \
- fprintf (FILE, "\tDC\tAL4($DSL%03d)\n", function_label_index); \
- fprintf (FILE, "FPL%03d\tEQU\t*\n", function_label_index + 1); \
- fprintf (FILE, "\tDC\tAL2(%d),C'%s'\n", strlen (mvs_function_name), \
- mvs_function_name); \
- fprintf (FILE, "$PPA%03d\tDS\t0F\n", function_label_index); \
- fprintf (FILE, "\tDC\tX'03',X'00',X'33',X'00'\n"); \
- fprintf (FILE, "\tDC\tV(CEESTART),A(0)\n"); \
- fprintf (FILE, "\tDC\tA($TIM%03d)\n", function_label_index); \
- fprintf (FILE, "$TIM%03d\tDS\t0F\n", function_label_index); \
- fprintf (FILE, "\tDC\tCL4'%d',CL4'%02d%02d',CL6'%02d%02d00'\n", \
- function_year, function_month, function_day, \
- function_hour, function_minute, function_second); \
- fprintf (FILE, "\tDC\tCL2'01',CL4'0100'\n"); \
- fprintf (FILE, "FPL%03d\tDS\t0H\n", function_label_index); \
- fprintf (FILE, "\tSTM\t14,12,12(13)\n"); \
- fprintf (FILE, "\tL\t2,76(,13)\n"); \
- fprintf (FILE, "\tL\t0,16(,15)\n"); \
- fprintf (FILE, "\tALR\t0,2\n"); \
- fprintf (FILE, "\tCL\t0,12(,12)\n"); \
- fprintf (FILE, "\tBNH\t*+10\n"); \
- fprintf (FILE, "\tL\t15,116(,12)\n"); \
- fprintf (FILE, "\tBALR\t14,15\n"); \
- fprintf (FILE, "\tL\t15,72(,13)\n"); \
- fprintf (FILE, "\tSTM\t15,0,72(2)\n"); \
- fprintf (FILE, "\tMVI\t0(2),X'10'\n"); \
- fprintf (FILE, "\tST\t2,8(,13)\n "); \
- fprintf (FILE, "\tST\t13,4(,2)\n "); \
- fprintf (FILE, "\tLR\t13,2\n"); \
- fprintf (FILE, "\tDROP\t15\n"); \
- fprintf (FILE, "\tBALR\t%d,0\n", BASE_REGISTER); \
- fprintf (FILE, "PG%d\tEQU\t*\n", mvs_page_num ); \
- fprintf (FILE, "\tUSING\t*,%d\n", BASE_REGISTER); \
- fprintf (FILE, "\tLR\t11,1\n"); \
- fprintf (FILE, "\tL\t%d,=A(PGT%d)\n", PAGE_REGISTER, mvs_page_num); \
- mvs_page_code = 4; \
- mvs_page_lit = 4; \
- mvs_check_page (FILE, 0, 0); \
- function_base_page = mvs_page_num; \
- function_first = 1; \
- function_label_index += 2; \
-}
-#endif /* MACROPROLOGUE */
-
-#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
-{ \
- if (strlen (NAME) * 2 > mvs_function_name_length) \
- { \
- if (mvs_function_name) \
- free (mvs_function_name); \
- mvs_function_name = 0; \
- } \
- if (!mvs_function_name) \
- { \
- mvs_function_name_length = strlen (NAME) * 2; \
- mvs_function_name = (char *) malloc (mvs_function_name_length); \
- if (mvs_function_name == 0) \
- { \
- fatal ("virtual memory exceeded"); \
- abort (); \
- } \
- } \
- if (!strcmp (NAME, "main")) \
- strcpy (mvs_function_name, "gccmain"); \
- else \
- strcpy (mvs_function_name, NAME); \
- fprintf (FILE, "\tDS\t0F\n"); \
- assemble_name (FILE, mvs_function_name); \
- fputs ("\tCSECT\n", FILE); \
-}
-
-/* This macro generates the assembly code for function exit, on machines
- that need it. If FUNCTION_EPILOGUE is not defined then individual
- return instructions are generated for each return statement. Args are
- same as for FUNCTION_PROLOGUE.
-
- The function epilogue should not depend on the current stack pointer!
- It should use the frame pointer only. This is mandatory because
- of alloca; we also take advantage of it to omit stack adjustments
- before returning. */
-
-#if MACROEPILOGUE == 1
-#define FUNCTION_EPILOGUE(FILE, LSIZE) \
-{ \
- int i; \
- check_label_emit(); \
- mvs_check_page (FILE,14,0); \
- fprintf (FILE, "\tEDCEPIL\n"); \
- mvs_page_num++; \
- fprintf (FILE, "\tDS\t0F\n" ); \
- fprintf (FILE, "\tLTORG\n"); \
- fprintf (FILE, "\tDS\t0F\n"); \
- fprintf (FILE, "PGT%d\tEQU\t*\n", function_base_page); \
- mvs_free_label(); \
- for ( i = function_base_page; i < mvs_page_num; i++ ) \
- fprintf (FILE, "\tDC\tA(PG%d)\n", i); \
-}
-#else /* MACROEPILOGUE != 1 */
-#define FUNCTION_EPILOGUE(FILE, LSIZE) \
-{ \
- int i; \
- check_label_emit(); \
- mvs_check_page (FILE,14,0); \
- fprintf (FILE, "\tL\t13,4(,13)\n"); \
- fprintf (FILE, "\tL\t14,12(,13)\n"); \
- fprintf (FILE, "\tLM\t2,12,28(13)\n"); \
- fprintf (FILE, "\tBALR\t1,14\n"); \
- fprintf (FILE, "\tDC\tA("); \
- mvs_page_num++; \
- assemble_name (FILE, mvs_function_name); \
- fprintf (FILE, ")\n" ); \
- fprintf (FILE, "\tDS\t0F\n" ); \
- fprintf (FILE, "\tLTORG\n"); \
- fprintf (FILE, "\tDS\t0F\n"); \
- fprintf (FILE, "PGT%d\tEQU\t*\n", function_base_page); \
- mvs_free_label(); \
- for ( i = function_base_page; i < mvs_page_num; i++ ) \
- fprintf (FILE, "\tDC\tA(PG%d)\n", i); \
-}
-#endif /* MACROEPILOGUE */
-
/* Output assembler code for a block containing the constant parts of a
trampoline, leaving space for the variable parts.
BR 15
X DS 0F
Y DS 0F */
+/*
+ I am confused as to why this emitting raw binary, instead of instructions ...
+ see for example, rs6000/rs000.c for an example of a different way to
+ do this ... especially since BASR should probably be substituted for BALR.
+ */
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
- ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x05E0)); \
- ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x5800 | \
- STATIC_CHAIN_REGNUM << 4)); \
- ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00A)); \
- ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x58F0)); \
- ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00E)); \
- ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x07FF)); \
- ASM_OUTPUT_SHORT (FILE, const0_rtx); \
- ASM_OUTPUT_SHORT (FILE, const0_rtx); \
- ASM_OUTPUT_SHORT (FILE, const0_rtx); \
- ASM_OUTPUT_SHORT (FILE, const0_rtx); \
+ assemble_aligned_integer (2, GEN_INT (0x05E0)); \
+ assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
+ assemble_aligned_integer (2, GEN_INT (0xE00A)); \
+ assemble_aligned_integer (2, GEN_INT (0x58F0)); \
+ assemble_aligned_integer (2, GEN_INT (0xE00E)); \
+ assemble_aligned_integer (2, GEN_INT (0x07FF)); \
+ assemble_aligned_integer (2, const0_rtx); \
+ assemble_aligned_integer (2, const0_rtx); \
+ assemble_aligned_integer (2, const0_rtx); \
+ assemble_aligned_integer (2, const0_rtx); \
}
/* Length in units of the trampoline for entering a nested function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
}
-/* Output assembler code to FILE to increment profiler label # LABELNO
- for profiling a function entry. */
-
-#define FUNCTION_PROFILER(FILE, LABELNO) \
- fprintf (FILE, "Error: No profiling available.\n")
-
/* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
pointer does not matter (provided there is a frame pointer). */
that wants to use this address.
The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
- except for CONSTANT_ADDRESS_P which is actually machine-independent. */
+ except for CONSTANT_ADDRESS_P which is actually machine-independent.
+*/
#define COUNT_REGS(X, REGS, FAIL) \
- if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
- REGS += 1; \
+ if (REG_P (X)) { \
+ if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
+ else goto FAIL; \
+ } \
else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
goto FAIL;
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
-/* Try machine-dependent ways of modifying an illegitimate address
+/* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
+ Try machine-dependent ways of modifying an illegitimate address
to be legitimate. If we find one, return the new, valid address.
- This macro is used in only one place: `memory_address' in explow.c. */
+ This macro is used in only one place: `memory_address' in explow.c.
+
+ Several comments:
+ (1) It's not obvious that this macro results in better code
+ than its omission does. For historical reasons we leave it in.
+
+ (2) This macro may be (???) implicated in the accidental promotion
+ or RS operand to RX operands, which bombs out any RS, SI, SS
+ instruction that was expecting a simple address. Note that
+ this occurs fairly rarely ...
+
+ (3) There is a bug somewhere that causes either r4 to be spilled,
+ or causes r0 to be used as a base register. Changeing the macro
+ below will make the bug move around, but will not make it go away
+ ... Note that this is a rare bug ...
+
+ */
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
{ \
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
- (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
- copy_to_mode_reg (SImode, XEXP (X, 1))); \
+ (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
+ copy_to_mode_reg (SImode, XEXP (X, 1))); \
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
- (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
- copy_to_mode_reg (SImode, XEXP (X, 0))); \
+ (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
+ copy_to_mode_reg (SImode, XEXP (X, 0))); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
- (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
- force_operand (XEXP (X, 0), 0)); \
+ (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
+ force_operand (XEXP (X, 0), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
- (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
- force_operand (XEXP (X, 1), 0)); \
+ (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
+ force_operand (XEXP (X, 1), 0)); \
if (memory_address_p (MODE, X)) \
goto WIN; \
}
/* Define this if zero-extension is slow (more than one real instruction). */
-#define SLOW_ZERO_EXTEND
+#define SLOW_ZERO_EXTEND 1
/* Nonzero if access to memory by bytes is slow and undesirable. */
/* We assume that the store-condition-codes instructions store 0 for false
and some other value for true. This is the value stored for true. */
-/* #define STORE_FLAG_VALUE -1 */
+/* #define STORE_FLAG_VALUE (-1) */
/* When a prototype says `char' or `short', really pass an `int'. */
-#define PROMOTE_PROTOTYPES
+#define PROMOTE_PROTOTYPES 1
/* Don't perform CSE on function addresses. */
case CONST_DOUBLE: \
return 4;
+/* A C statement (sans semicolon) to update the integer variable COST
+ based on the relationship between INSN that is dependent on
+ DEP_INSN through the dependence LINK. The default is to make no
+ adjustment to COST. This can be used for example to specify to
+ the scheduler that an output- or anti-dependence does not incur
+ the same cost as a data-dependence.
+
+ We will want to use this to indicate that there is a cost associated
+ with the loading, followed by use of base registers ...
+#define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
+ */
+
/* Tell final.c how to eliminate redundant test instructions. */
/* Here we define machine-dependent flags and fields in cc_status
On the 370, load insns do not alter the cc's. However, in some
cases these instructions can make it possibly invalid to use the
saved cc's. In those cases we clear out some or all of the saved
- cc's so they won't be used. */
+ cc's so they won't be used.
+
+ Note that only some arith instructions set the CC. These include
+ add, subtract, complement, various shifts. Note that multiply
+ and divide do *not* set set the CC. Therefore, in the code below,
+ don't set the status for MUL, DIV, etc.
+
+ Note that the bitwise ops set the condition code, but not in a
+ way that we can make use of it. So we treat these as clobbering,
+ rather than setting the CC. These are clobbered in the individual
+ instruction patterns that use them. Use CC_STATUS_INIT to clobber.
+*/
#define NOTICE_UPDATE_CC(EXP, INSN) \
{ \
cc_status.value2 = 0; \
switch (GET_CODE (XEXP (exp, 1))) \
{ \
- case PLUS: case MINUS: case MULT: /* case UMULT: */ \
- case DIV: case UDIV: case NEG: case ASHIFT: \
- case ASHIFTRT: case AND: case IOR: case XOR: \
- case ABS: case NOT: \
+ case PLUS: case MINUS: case NEG: \
+ case NOT: case ABS: \
CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
+ \
+ /* mult and div don't set any cc codes !! */ \
+ case MULT: /* case UMULT: */ case DIV: case UDIV: \
+ /* and, or and xor set the cc's the wrong way !! */ \
+ case AND: case IOR: case XOR: \
+ /* some shifts set the CC some don't. */ \
+ case ASHIFT: case ASHIFTRT: \
+ do {} while (0); \
+ default: \
+ break; \
} \
} \
} \
#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
{ if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
+/* ------------------------------------------ */
/* Control the assembler format that we output. */
+/* Define standard character escape sequences for non-ASCII targets
+ only. */
+
+#ifdef TARGET_EBCDIC
+#define TARGET_ESC 39
+#define TARGET_BELL 47
+#define TARGET_BS 22
+#define TARGET_TAB 5
+#define TARGET_NEWLINE 21
+#define TARGET_VT 11
+#define TARGET_FF 12
+#define TARGET_CR 13
+#endif
+
+/* ======================================================== */
+
+#ifdef TARGET_HLASM
#define TEXT_SECTION_ASM_OP "* Program text area"
#define DATA_SECTION_ASM_OP "* Program data area"
#define INIT_SECTION_ASM_OP "* Program initialization area"
+#define SHARED_SECTION_ASM_OP "* Program shared data"
#define CTOR_LIST_BEGIN /* NO OP */
#define CTOR_LIST_END /* NO OP */
+#define MAX_MVS_LABEL_SIZE 8
/* How to refer to registers in assembler output. This sequence is
indexed by compiler's hard-register-number (see above). */
"0", "2", "4", "6" \
}
-/* How to renumber registers for dbx and gdb. */
-
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define ASM_FILE_START(FILE) \
+{ fputs ("\tRMODE\tANY\n", FILE); \
+ fputs ("\tCSECT\n", FILE); }
-#define ASM_FILE_START(FILE) fputs ("\tCSECT\n", FILE);
#define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
-#define ASM_IDENTIFY_GCC(FILE)
#define ASM_COMMENT_START "*"
#define ASM_APP_OFF ""
#define ASM_APP_ON ""
#define ASM_OUTPUT_LABEL(FILE, NAME) \
{ assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
-#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) /* NO OP */
+#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
+{ \
+ char temp[MAX_MVS_LABEL_SIZE + 1]; \
+ if (mvs_check_alias (NAME, temp) == 2) \
+ { \
+ fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
+ } \
+}
#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
-{ fputs ("\tENTRY\t", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE); }
+{ \
+ char temp[MAX_MVS_LABEL_SIZE + 1]; \
+ if (mvs_check_alias (NAME, temp) == 2) \
+ { \
+ fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
+ } \
+ fputs ("\tENTRY\t", FILE); \
+ assemble_name (FILE, NAME); \
+ fputs ("\n", FILE); \
+}
/* MVS externals are limited to 8 characters, upper case only.
The '_' is mapped to '@', except for MVS functions, then '#'. */
-#define MAX_MVS_LABEL_SIZE 8
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
{ \
char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
- if (strlen (NAME) > MAX_MVS_LABEL_SIZE) \
- { \
- strncpy (temp, NAME, MAX_MVS_LABEL_SIZE); \
- temp[MAX_MVS_LABEL_SIZE] = '\0'; \
- } \
- else \
- strcpy (temp,NAME); \
+ if (!mvs_get_alias (NAME, temp)) \
+ strcpy (temp, NAME); \
if (!strcmp (temp,"main")) \
strcpy (temp,"gccmain"); \
if (mvs_function_check (temp)) \
else \
ch = '@'; \
for (bp = temp; *bp; bp++) \
- { \
- if (islower (*bp)) *bp = toupper (*bp); \
- if (*bp == '_') *bp = ch; \
- } \
+ *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
fprintf (FILE, "%s", temp); \
}
if (!strcmp (PREFIX,"L")) \
{ \
mvs_add_label(NUM); \
- mvs_label_emitted = 1; \
} \
fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
}
-/* Generate case label. */
+/* Generate case label. For HLASM we can change to the data CSECT
+ and put the vectors out of the code body. The assembler just
+ concatenates CSECTs with the same name. */
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
- fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
+ fprintf (FILE, "\tDS\t0F\n"); \
+ fprintf (FILE,"\tCSECT\n"); \
+ fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
+
+/* Put the CSECT back to the code body */
+
+#define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
+ assemble_name (FILE, mvs_function_name); \
+ fputs ("\tCSECT\n", FILE);
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
- mvs_check_page (FILE, 4, 0); \
fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
/* This is how to output an element of a case-vector that is relative. */
-#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
- mvs_check_page (FILE, 4, 0); \
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
/* This is how to output an insn to push a register on the stack.
- It need not be very fast code. */
+ It need not be very fast code.
+ Right now, PUSH & POP are used only when profiling is enabled,
+ and then, only to push the static chain reg and the function struct
+ value reg, and only if those are used. Since profiling is not
+ supported anyway, punt on this. */
#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
mvs_check_page (FILE, 8, 4); \
reg_names[REGNO], STACK_POINTER_OFFSET)
/* This is how to output an assembler line defining a `double' constant. */
-
#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
/* This is how to output an assembler line defining a `float' constant. */
-
#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
fprintf (FILE, "\tDC\tE'%.9G'\n", (VALUE))
-/* This outputs an integer, if not a CONST_INT must be address constant. */
-
-#define ASM_OUTPUT_INT(FILE, EXP) \
-{ \
- if (GET_CODE (EXP) == CONST_INT) \
- { \
- fprintf (FILE, "\tDC\tF'"); \
- output_addr_const (FILE, EXP); \
- fprintf (FILE, "'\n"); \
- } \
- else \
- { \
- fprintf (FILE, "\tDC\tA("); \
- output_addr_const (FILE, EXP); \
- fprintf (FILE, ")\n"); \
- } \
-}
-
-/* This outputs a short integer. */
-
-#define ASM_OUTPUT_SHORT(FILE, EXP) \
-{ \
- fprintf (FILE, "\tDC\tX'%04X'\n", INTVAL(EXP) & 0xFFFF); \
-}
-
-/* This outputs a byte sized integer. */
-
-#define ASM_OUTPUT_CHAR(FILE, EXP) \
- fprintf (FILE, "\tDC\tX'%02X'\n", INTVAL (EXP) )
-
-#define ASM_OUTPUT_BYTE(FILE, VALUE) \
- fprintf (FILE, "\tDC\tX'%02X'\n", VALUE)
-
/* This outputs a text string. The string are chopped up to fit into
an 80 byte record. Also, control and special characters, interpreted
by the IBM assembler, are output numerically. */
#define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
{ \
- int i, j; \
- int c; \
- for (j = 0, i = 0; i < LEN; j++, i++) \
+ size_t i, limit = (LEN); \
+ int j; \
+ for (j = 0, i = 0; i < limit; j++, i++) \
{ \
- c = PTR[i]; \
- if (iscntrl (c) || c == '&') \
+ int c = (PTR)[i]; \
+ if (ISCNTRL (c) || c == '&') \
{ \
if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
fprintf (FILE, "'\n"); \
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
{ \
+ char temp[MAX_MVS_LABEL_SIZE + 1]; \
+ if (mvs_check_alias(NAME, temp) == 2) \
+ { \
+ fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
+ } \
fputs ("\tENTRY\t", FILE); \
assemble_name (FILE, NAME); \
fputs ("\n", FILE); \
sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
}
-/* Define the parentheses used to group arithmetic operations
- in assembler code. */
-
-#define ASM_OPEN_PAREN "("
-#define ASM_CLOSE_PAREN ")"
-
-/* Define results of standard character escape sequences. */
-
-#define TARGET_BELL 47
-#define TARGET_BS 22
-#define TARGET_TAB 5
-#define TARGET_NEWLINE 21
-#define TARGET_VT 11
-#define TARGET_FF 12
-#define TARGET_CR 13
-
-/* Print operand X (an rtx) in assembler syntax to file FILE.
+/* Print operand XV (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
- For `%' followed by punctuation, CODE is the punctuation and X is null. */
+ For `%' followed by punctuation, CODE is the punctuation and XV is null. */
-#define PRINT_OPERAND(FILE, X, CODE) \
+#define PRINT_OPERAND(FILE, XV, CODE) \
{ \
- switch (GET_CODE (X)) \
+ switch (GET_CODE (XV)) \
{ \
static char curreg[4]; \
case REG: \
if (CODE == 'N') \
- strcpy (curreg, reg_names[REGNO (X) + 1]); \
+ strcpy (curreg, reg_names[REGNO (XV) + 1]); \
else \
- strcpy (curreg, reg_names[REGNO (X)]); \
+ strcpy (curreg, reg_names[REGNO (XV)]); \
fprintf (FILE, "%s", curreg); \
break; \
case MEM: \
{ \
- rtx addr = XEXP (X, 0); \
+ rtx addr = XEXP (XV, 0); \
if (CODE == 'O') \
{ \
if (GET_CODE (addr) == PLUS) \
fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
} \
else \
- output_address (XEXP (X, 0)); \
+ output_address (XEXP (XV, 0)); \
} \
break; \
case SYMBOL_REF: \
case LABEL_REF: \
mvs_page_lit += 4; \
- if (SYMBOL_REF_FLAG (X)) fprintf (FILE, "=V("); \
- else fprintf (FILE, "=A("); \
- output_addr_const (FILE, X); \
+ if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
+ else fprintf (FILE, "=A("); \
+ output_addr_const (FILE, XV); \
fprintf (FILE, ")"); \
break; \
case CONST_INT: \
if (CODE == 'B') \
- fprintf (FILE, "%d", INTVAL (X) & 0xff); \
+ fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
else if (CODE == 'X') \
- fprintf (FILE, "%02X", INTVAL (X) & 0xff); \
+ fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
else if (CODE == 'h') \
- fprintf (FILE, "%d", (INTVAL (X) << 16) >> 16); \
+ fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
else if (CODE == 'H') \
{ \
mvs_page_lit += 2; \
- fprintf (FILE, "=H'%d'", (INTVAL (X) << 16) >> 16); \
+ fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
+ } \
+ else if (CODE == 'K') \
+ { \
+ /* auto sign-extension of signed 16-bit to signed 32-bit */ \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
+ } \
+ else if (CODE == 'W') \
+ { \
+ /* hand-built sign-extension of signed 32-bit to 64-bit */ \
+ mvs_page_lit += 8; \
+ if (0 <= INTVAL (XV)) { \
+ fprintf (FILE, "=XL8'00000000"); \
+ } else { \
+ fprintf (FILE, "=XL8'FFFFFFFF"); \
+ } \
+ fprintf (FILE, "%08X'", INTVAL (XV)); \
} \
else \
{ \
mvs_page_lit += 4; \
- fprintf (FILE, "=F'%d'", INTVAL (X)); \
+ fprintf (FILE, "=F'%d'", INTVAL (XV)); \
} \
break; \
case CONST_DOUBLE: \
- if (GET_MODE (X) == DImode) \
+ if (GET_MODE (XV) == DImode) \
{ \
if (CODE == 'M') \
{ \
mvs_page_lit += 4; \
- fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (X)); \
+ fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
} \
else if (CODE == 'L') \
{ \
mvs_page_lit += 4; \
- fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (X)); \
+ fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
} \
else \
{ \
mvs_page_lit += 8; \
- fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (X), \
- CONST_DOUBLE_HIGH (X)); \
+ fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
+ CONST_DOUBLE_HIGH (XV)); \
} \
} \
else \
{ \
+ /* hack alert -- this prints wildly incorrect values */ \
+ /* when run in cross-compiler mode. See ELF section */ \
+ /* for suggested fix */ \
union { double d; int i[2]; } u; \
- u.i[0] = CONST_DOUBLE_LOW (X); \
- u.i[1] = CONST_DOUBLE_HIGH (X); \
- if (GET_MODE (X) == SFmode) \
+ u.i[0] = CONST_DOUBLE_LOW (XV); \
+ u.i[1] = CONST_DOUBLE_HIGH (XV); \
+ if (GET_MODE (XV) == SFmode) \
{ \
mvs_page_lit += 4; \
fprintf (FILE, "=E'%.9G'", u.d); \
} \
break; \
case CONST: \
- if (GET_CODE (XEXP (X, 0)) == PLUS \
- && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
+ if (GET_CODE (XEXP (XV, 0)) == PLUS \
+ && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
{ \
mvs_page_lit += 4; \
- if (SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))) \
+ if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
{ \
fprintf (FILE, "=V("); \
ASM_OUTPUT_LABELREF (FILE, \
- XSTR (XEXP (XEXP (X, 0), 0), 0)); \
+ XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
- INTVAL (XEXP (XEXP (X, 0), 1))); \
+ INTVAL (XEXP (XEXP (XV, 0), 1))); \
} \
else \
{ \
fprintf (FILE, "=A("); \
- output_addr_const (FILE, X); \
+ output_addr_const (FILE, XV); \
fprintf (FILE, ")"); \
} \
} \
{ \
mvs_page_lit += 4; \
fprintf (FILE, "=F'"); \
- output_addr_const (FILE, X); \
+ output_addr_const (FILE, XV); \
fprintf (FILE, "'"); \
} \
break; \
break; \
} \
}
+
+#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
+{ \
+ if (strlen (NAME) + 1 > mvs_function_name_length) \
+ { \
+ if (mvs_function_name) \
+ free (mvs_function_name); \
+ mvs_function_name = 0; \
+ } \
+ if (!mvs_function_name) \
+ { \
+ mvs_function_name_length = strlen (NAME) * 2 + 1; \
+ mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
+ } \
+ if (!strcmp (NAME, "main")) \
+ strcpy (mvs_function_name, "gccmain"); \
+ else \
+ strcpy (mvs_function_name, NAME); \
+ fprintf (FILE, "\tDS\t0F\n"); \
+ assemble_name (FILE, mvs_function_name); \
+ fputs ("\tRMODE\tANY\n", FILE); \
+ assemble_name (FILE, mvs_function_name); \
+ fputs ("\tCSECT\n", FILE); \
+}
+
+/* Output assembler code to FILE to increment profiler label # LABELNO
+ for profiling a function entry. */
+
+#define FUNCTION_PROFILER(FILE, LABELNO) \
+ fprintf (FILE, "Error: No profiling available.\n")
+
+#endif /* TARGET_HLASM */
+
+/* ======================================================== */
+
+#ifdef TARGET_ELF_ABI
+
+/* How to refer to registers in assembler output. This sequence is
+ indexed by compiler's hard-register-number (see above). */
+
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "f0", "f2", "f4", "f6" \
+}
+
+/* Print operand XV (an rtx) in assembler syntax to file FILE.
+ CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
+ For `%' followed by punctuation, CODE is the punctuation and XV is null. */
+
+#define PRINT_OPERAND(FILE, XV, CODE) \
+{ \
+ switch (GET_CODE (XV)) \
+ { \
+ static char curreg[4]; \
+ case REG: \
+ if (CODE == 'N') \
+ strcpy (curreg, reg_names[REGNO (XV) + 1]); \
+ else \
+ strcpy (curreg, reg_names[REGNO (XV)]); \
+ fprintf (FILE, "%s", curreg); \
+ break; \
+ case MEM: \
+ { \
+ rtx addr = XEXP (XV, 0); \
+ if (CODE == 'O') \
+ { \
+ if (GET_CODE (addr) == PLUS) \
+ fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
+ else \
+ fprintf (FILE, "0"); \
+ } \
+ else if (CODE == 'R') \
+ { \
+ if (GET_CODE (addr) == PLUS) \
+ fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
+ else \
+ fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
+ } \
+ else \
+ output_address (XEXP (XV, 0)); \
+ } \
+ break; \
+ case SYMBOL_REF: \
+ case LABEL_REF: \
+ mvs_page_lit += 4; \
+ if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
+ else fprintf (FILE, "=A("); \
+ output_addr_const (FILE, XV); \
+ fprintf (FILE, ")"); \
+ break; \
+ case CONST_INT: \
+ if (CODE == 'B') \
+ fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
+ else if (CODE == 'X') \
+ fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
+ else if (CODE == 'h') \
+ fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
+ else if (CODE == 'H') \
+ { \
+ mvs_page_lit += 2; \
+ fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
+ } \
+ else if (CODE == 'K') \
+ { \
+ /* auto sign-extension of signed 16-bit to signed 32-bit */ \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
+ } \
+ else if (CODE == 'W') \
+ { \
+ /* hand-built sign-extension of signed 32-bit to 64-bit */ \
+ mvs_page_lit += 8; \
+ if (0 <= INTVAL (XV)) { \
+ fprintf (FILE, "=XL8'00000000"); \
+ } else { \
+ fprintf (FILE, "=XL8'FFFFFFFF"); \
+ } \
+ fprintf (FILE, "%08X'", INTVAL (XV)); \
+ } \
+ else \
+ { \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=F'%d'", INTVAL (XV)); \
+ } \
+ break; \
+ case CONST_DOUBLE: \
+ if (GET_MODE (XV) == DImode) \
+ { \
+ if (CODE == 'M') \
+ { \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
+ } \
+ else if (CODE == 'L') \
+ { \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
+ } \
+ else \
+ { \
+ mvs_page_lit += 8; \
+ fprintf (FILE, "=yyyyXL8'%08X%08X'", \
+ CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
+ } \
+ } \
+ else \
+ { \
+ char buf[50]; \
+ REAL_VALUE_TYPE rval; \
+ REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
+ REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
+ if (GET_MODE (XV) == SFmode) \
+ { \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=E'%s'", buf); \
+ } \
+ else \
+ if (GET_MODE (XV) == DFmode) \
+ { \
+ mvs_page_lit += 8; \
+ fprintf (FILE, "=D'%s'", buf); \
+ } \
+ else /* VOIDmode !?!? strange but true ... */ \
+ { \
+ mvs_page_lit += 8; \
+ fprintf (FILE, "=XL8'%08X%08X'", \
+ CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
+ } \
+ } \
+ break; \
+ case CONST: \
+ if (GET_CODE (XEXP (XV, 0)) == PLUS \
+ && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
+ { \
+ mvs_page_lit += 4; \
+ if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
+ { \
+ fprintf (FILE, "=V("); \
+ ASM_OUTPUT_LABELREF (FILE, \
+ XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
+ fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
+ INTVAL (XEXP (XEXP (XV, 0), 1))); \
+ } \
+ else \
+ { \
+ fprintf (FILE, "=A("); \
+ output_addr_const (FILE, XV); \
+ fprintf (FILE, ")"); \
+ } \
+ } \
+ else \
+ { \
+ mvs_page_lit += 4; \
+ fprintf (FILE, "=bogus_bad_F'"); \
+ output_addr_const (FILE, XV); \
+ fprintf (FILE, "'"); \
+/* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
+/* but its somehow fundamentally broken, I can't make any sense out of it */ \
+debug_rtx (XV); \
+abort(); \
+ } \
+ break; \
+ default: \
+ abort(); \
+ } \
+}
+
+#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
+{ \
+ rtx breg, xreg, offset, plus; \
+ \
+ switch (GET_CODE (ADDR)) \
+ { \
+ case REG: \
+ fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
+ break; \
+ case PLUS: \
+ breg = 0; \
+ xreg = 0; \
+ offset = 0; \
+ if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
+ { \
+ if (GET_CODE (XEXP (ADDR, 1)) == REG) \
+ breg = XEXP (ADDR, 1); \
+ else \
+ offset = XEXP (ADDR, 1); \
+ plus = XEXP (ADDR, 0); \
+ } \
+ else \
+ { \
+ if (GET_CODE (XEXP (ADDR, 0)) == REG) \
+ breg = XEXP (ADDR, 0); \
+ else \
+ offset = XEXP (ADDR, 0); \
+ plus = XEXP (ADDR, 1); \
+ } \
+ if (GET_CODE (plus) == PLUS) \
+ { \
+ if (GET_CODE (XEXP (plus, 0)) == REG) \
+ { \
+ if (breg) \
+ xreg = XEXP (plus, 0); \
+ else \
+ breg = XEXP (plus, 0); \
+ } \
+ else \
+ { \
+ offset = XEXP (plus, 0); \
+ } \
+ if (GET_CODE (XEXP (plus, 1)) == REG) \
+ { \
+ if (breg) \
+ xreg = XEXP (plus, 1); \
+ else \
+ breg = XEXP (plus, 1); \
+ } \
+ else \
+ { \
+ offset = XEXP (plus, 1); \
+ } \
+ } \
+ else if (GET_CODE (plus) == REG) \
+ { \
+ if (breg) \
+ xreg = plus; \
+ else \
+ breg = plus; \
+ } \
+ else \
+ { \
+ offset = plus; \
+ } \
+ if (offset) \
+ { \
+ if (GET_CODE (offset) == LABEL_REF) \
+ fprintf (FILE, "L%d", \
+ CODE_LABEL_NUMBER (XEXP (offset, 0))); \
+ else \
+ output_addr_const (FILE, offset); \
+ } \
+ else \
+ fprintf (FILE, "0"); \
+ if (xreg) \
+ fprintf (FILE, "(%s,%s)", \
+ reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
+ else \
+ fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
+ break; \
+ default: \
+ mvs_page_lit += 4; \
+ if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
+ else fprintf (FILE, "=A("); \
+ output_addr_const (FILE, ADDR); \
+ fprintf (FILE, ")"); \
+ break; \
+ } \
+}
+
+/* Output assembler code to FILE to increment profiler label # LABELNO
+ for profiling a function entry. */
+/* Make it a no-op for now, so we can at least compile glibc */
+#define FUNCTION_PROFILER(FILE, LABELNO) { \
+ mvs_check_page (FILE, 24, 4); \
+ fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
+ fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
+ fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
+ fprintf (FILE, "\tA\tr1,0(r2)\n"); \
+ fprintf (FILE, "\tST\tr1,0(r2)\n"); \
+ fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
+}
+
+/* Don't bother to output .extern pseudo-ops. They are not needed by
+ ELF assemblers. */
+
+#undef ASM_OUTPUT_EXTERNAL
+
+#define ASM_DOUBLE "\t.double"
+
+/* Argument to the flt pt. macros is a REAL_VALUE_TYPE which
+ may or may not be a float/double, depending on whther we
+ are running in cross-compiler mode. */
+/* This is how to output an assembler line defining a `double' constant. */
+#define ASM_OUTPUT_DOUBLE(FILE, RVAL) { \
+ char buf[50]; \
+ REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DOUBLE_HEX, buf); \
+ fprintf (FILE, "\tDC\tD'%s'\n", buf); \
+}
+
+/* This is how to output an assembler line defining a `float' constant. */
+#define ASM_OUTPUT_FLOAT(FILE, RVAL) { \
+ char buf[50]; \
+ REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DEC, buf); \
+ fprintf (FILE, "\tDC\tE'%s'\n", buf); \
+}
+
+
+/* This is how to output the definition of a user-level label named NAME,
+ such as the label on a static function or variable NAME. */
+#define ASM_OUTPUT_LABEL(FILE,NAME) \
+ (assemble_name (FILE, NAME), fputs (":\n", FILE))
+
+/* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
+
+/* Generate internal label. Since we can branch here from off page, we
+ must reload the base register. Note that internal labels are generated
+ for loops, goto's and case labels. */
+#undef ASM_OUTPUT_INTERNAL_LABEL
+#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
+{ \
+ if (!strcmp (PREFIX,"L")) \
+ { \
+ mvs_add_label(NUM); \
+ } \
+ fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
+}
+
+/* let config/svr4.h define this ...
+ * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
+ * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
+ */
+
+/* This is how to output an element of a case-vector that is absolute. */
+#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
+ mvs_check_page (FILE, 4, 0); \
+ fprintf (FILE, "\t.long\t.L%d\n", VALUE)
+
+/* This is how to output an element of a case-vector that is relative. */
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
+ mvs_check_page (FILE, 4, 0); \
+ fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
+
+/* Right now, PUSH & POP are used only when profiling is enabled,
+ and then, only to push the static chain reg and the function struct
+ value reg, and only if those are used by the function being profiled.
+ We don't need this for profiling, so punt. */
+#define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
+#define ASM_OUTPUT_REG_POP(FILE, REGNO)
+
+
+/* Indicate that jump tables go in the text section. This is
+ necessary when compiling PIC code. */
+#define JUMP_TABLES_IN_TEXT_SECTION 1
+
+/* Define macro used to output shift-double opcodes when the shift
+ count is in %cl. Some assemblers require %cl as an argument;
+ some don't.
+
+ GAS requires the %cl argument, so override i386/unix.h. */
+
+#undef SHIFT_DOUBLE_OMITS_COUNT
+#define SHIFT_DOUBLE_OMITS_COUNT 0
+
+#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
+( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
+ sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
+
+/* Allow #sccs in preprocessor. */
+#define SCCS_DIRECTIVE
+
+ /* Implicit library calls should use memcpy, not bcopy, etc. */
+#define TARGET_MEM_FUNCTIONS
+
+/* Output before read-only data. */
+#define TEXT_SECTION_ASM_OP "\t.text"
+
+/* Output before writable (initialized) data. */
+#define DATA_SECTION_ASM_OP "\t.data"
+
+/* Output before writable (uninitialized) data. */
+#define BSS_SECTION_ASM_OP "\t.bss"
+
+/* In the past there was confusion as to what the argument to .align was
+ in GAS. For the last several years the rule has been this: for a.out
+ file formats that argument is LOG, and for all other file formats the
+ argument is 1<<LOG.
+
+ However, GAS now has .p2align and .balign pseudo-ops so to remove any
+ doubt or guess work, and since this file is used for both a.out and other
+ file formats, we use one of them. */
+
+#define ASM_OUTPUT_ALIGN(FILE,LOG) \
+ if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
+
+/* This is how to output a command to make the user-level label named NAME
+ defined for reference from other files. */
+
+#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
+ (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
+
+/* This says how to output an assembler line
+ to define a global common symbol. */
+
+#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
+( fputs (".comm ", (FILE)), \
+ assemble_name ((FILE), (NAME)), \
+ fprintf ((FILE), ",%u\n", (ROUNDED)))
+
+/* This says how to output an assembler line
+ to define a local common symbol. */
+
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
+( fputs (".lcomm ", (FILE)), \
+ assemble_name ((FILE), (NAME)), \
+ fprintf ((FILE), ",%u\n", (ROUNDED)))
+
+#endif /* TARGET_ELF_ABI */
+#endif /* ! GCC_I370_H */
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