- Conditional instructions are scheduled on the assumption that
they will be executed. This is usually a good thing, since it
- tends to avoid unncessary stalls in the conditional code.
+ tends to avoid unnecessary stalls in the conditional code.
But we want to pack conditional instructions as tightly as
possible, in order to optimize the case where they aren't
executed.
rtx reg;
int i;
- /* ACCs and ACCGs are implicity global registers if media instrinsics
+ /* ACCs and ACCGs are implicity global registers if media intrinsics
are being used. We set up this lazily to avoid creating lots of
- unncessary call_insn rtl in non-media code. */
+ unnecessary call_insn rtl in non-media code. */
for (i = 0; i <= ACC_MASK; i++)
if ((i & ACC_MASK) == i)
global_regs[i + ACC_FIRST] = global_regs[i + ACCG_FIRST] = 1;
}
/* IACCs are implicity global registers. We set up this lazily to
- avoid creating lots of unncessary call_insn rtl when IACCs aren't
+ avoid creating lots of unnecessary call_insn rtl when IACCs aren't
being used. */
regno = INTVAL (op) + IACC_FIRST;
for (i = 0; i < HARD_REGNO_NREGS (regno, mode); i++)