&& (TARGET_DEFAULT & MASK_APCS_FRAME))
warning (0, "-g with -mno-apcs-frame may not give sensible debugging");
- /* If stack checking is disabled, we can use r10 as the PIC register,
- which keeps r9 available. */
- if (flag_pic && TARGET_SINGLE_PIC_BASE)
- arm_pic_register = TARGET_APCS_STACK ? 9 : 10;
-
if (TARGET_APCS_FLOAT)
warning (0, "passing floating point arguments in fp regs not yet supported");
ARM_DOUBLEWORD_ALIGN ? "8, 32 or 64": "8 or 32");
}
+ /* If stack checking is disabled, we can use r10 as the PIC register,
+ which keeps r9 available. The EABI specifies r9 as the PIC register. */
+ if (flag_pic && TARGET_SINGLE_PIC_BASE)
+ arm_pic_register = (TARGET_APCS_STACK || TARGET_AAPCS_BASED) ? 9 : 10;
+
if (arm_pic_register_string != NULL)
{
int pic_register = decode_reg_name (arm_pic_register_string);
return 0;
}
-/* Return nonzero if a 32 bit "long_call" should be generated for
+/* Return nonzero if a 32-bit "long_call" should be generated for
this call. We generate a long_call if the function:
a. has an __attribute__((long call))
&& thumb_legitimate_offset_p (mode, INTVAL (XEXP (x, 1))))
return 1;
- /* REG+const has 10 bit offset for SP, but only SImode and
+ /* REG+const has 10-bit offset for SP, but only SImode and
larger is supported. */
/* ??? Should probably check for DI/DFmode overflow here
just like GO_IF_LEGITIMATE_OFFSET does. */
HOST_WIDE_INT mask, base, index;
rtx base_reg;
- /* ldr and ldrb can use a 12 bit index, ldrsb and the rest can only
- use a 8 bit index. So let's use a 12 bit index for SImode only and
+ /* ldr and ldrb can use a 12-bit index, ldrsb and the rest can only
+ use a 8-bit index. So let's use a 12-bit index for SImode only and
hope that arm_gen_constant will enable ldrb to use more bits. */
bits = (mode == SImode) ? 12 : 8;
mask = (1 << bits) - 1;
switch (modesize)
{
case 1:
- /* Round up size of TBB table to a haflword boundary. */
+ /* Round up size of TBB table to a halfword boundary. */
size = (size + 1) & ~(HOST_WIDE_INT)1;
break;
case 2:
/* USE and CLOBBER aren't really insns, so just skip them. */
if (GET_CODE (body) == USE
|| GET_CODE (body) == CLOBBER)
- {
- arm_condexec_count++;
- continue;
- }
+ continue;
/* ??? Recognize conditional jumps, and combine them with IT blocks. */
if (GET_CODE (body) != COND_EXEC)
static rtx
arm_expand_binop_builtin (enum insn_code icode,
- tree arglist, rtx target)
+ tree exp, rtx target)
{
rtx pat;
- tree arg0 = TREE_VALUE (arglist);
- tree arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+ tree arg0 = CALL_EXPR_ARG (exp, 0);
+ tree arg1 = CALL_EXPR_ARG (exp, 1);
rtx op0 = expand_normal (arg0);
rtx op1 = expand_normal (arg1);
enum machine_mode tmode = insn_data[icode].operand[0].mode;
static rtx
arm_expand_unop_builtin (enum insn_code icode,
- tree arglist, rtx target, int do_load)
+ tree exp, rtx target, int do_load)
{
rtx pat;
- tree arg0 = TREE_VALUE (arglist);
+ tree arg0 = CALL_EXPR_ARG (exp, 0);
rtx op0 = expand_normal (arg0);
enum machine_mode tmode = insn_data[icode].operand[0].mode;
enum machine_mode mode0 = insn_data[icode].operand[1].mode;
{
const struct builtin_description * d;
enum insn_code icode;
- tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
- tree arglist = TREE_OPERAND (exp, 1);
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
tree arg0;
tree arg1;
tree arg2;
: fcode == ARM_BUILTIN_TEXTRMUH ? CODE_FOR_iwmmxt_textrmuh
: CODE_FOR_iwmmxt_textrmw);
- arg0 = TREE_VALUE (arglist);
- arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
op0 = expand_normal (arg0);
op1 = expand_normal (arg1);
tmode = insn_data[icode].operand[0].mode;
icode = (fcode == ARM_BUILTIN_TINSRB ? CODE_FOR_iwmmxt_tinsrb
: fcode == ARM_BUILTIN_TINSRH ? CODE_FOR_iwmmxt_tinsrh
: CODE_FOR_iwmmxt_tinsrw);
- arg0 = TREE_VALUE (arglist);
- arg1 = TREE_VALUE (TREE_CHAIN (arglist));
- arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ arg2 = CALL_EXPR_ARG (exp, 2);
op0 = expand_normal (arg0);
op1 = expand_normal (arg1);
op2 = expand_normal (arg2);
return target;
case ARM_BUILTIN_SETWCX:
- arg0 = TREE_VALUE (arglist);
- arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
op0 = force_reg (SImode, expand_normal (arg0));
op1 = expand_normal (arg1);
emit_insn (gen_iwmmxt_tmcr (op1, op0));
return 0;
case ARM_BUILTIN_GETWCX:
- arg0 = TREE_VALUE (arglist);
+ arg0 = CALL_EXPR_ARG (exp, 0);
op0 = expand_normal (arg0);
target = gen_reg_rtx (SImode);
emit_insn (gen_iwmmxt_tmrc (target, op0));
case ARM_BUILTIN_WSHUFH:
icode = CODE_FOR_iwmmxt_wshufh;
- arg0 = TREE_VALUE (arglist);
- arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
op0 = expand_normal (arg0);
op1 = expand_normal (arg1);
tmode = insn_data[icode].operand[0].mode;
return target;
case ARM_BUILTIN_WSADB:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadb, arglist, target);
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadb, exp, target);
case ARM_BUILTIN_WSADH:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadh, arglist, target);
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadh, exp, target);
case ARM_BUILTIN_WSADBZ:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadbz, arglist, target);
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadbz, exp, target);
case ARM_BUILTIN_WSADHZ:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadhz, arglist, target);
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadhz, exp, target);
/* Several three-argument builtins. */
case ARM_BUILTIN_WMACS:
: fcode == ARM_BUILTIN_TMIATB ? CODE_FOR_iwmmxt_tmiatb
: fcode == ARM_BUILTIN_TMIATT ? CODE_FOR_iwmmxt_tmiatt
: CODE_FOR_iwmmxt_walign);
- arg0 = TREE_VALUE (arglist);
- arg1 = TREE_VALUE (TREE_CHAIN (arglist));
- arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ arg2 = CALL_EXPR_ARG (exp, 2);
op0 = expand_normal (arg0);
op1 = expand_normal (arg1);
op2 = expand_normal (arg2);
for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++)
if (d->code == (const enum arm_builtins) fcode)
- return arm_expand_binop_builtin (d->icode, arglist, target);
+ return arm_expand_binop_builtin (d->icode, exp, target);
for (i = 0, d = bdesc_1arg; i < ARRAY_SIZE (bdesc_1arg); i++, d++)
if (d->code == (const enum arm_builtins) fcode)
- return arm_expand_unop_builtin (d->icode, arglist, target, 0);
+ return arm_expand_unop_builtin (d->icode, exp, target, 0);
/* @@@ Should really do something sensible here. */
return NULL_RTX;
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