GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 2, or (at your option) any later
+Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to the Free
-Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
-02110-1301, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
/* This module is essentially the "combiner" phase of the U. of Arizona
Portable Optimizer, but redone to work on our list-structured
#include "timevar.h"
#include "tree-pass.h"
#include "df.h"
+#include "cgraph.h"
/* Number of attempts to combine instructions in this function. */
static rtx i2mod_new_rhs;
\f
-/* Maximum register number, which is the size of the tables below. */
-
-static unsigned int combine_max_regno;
-
-struct reg_stat {
+typedef struct reg_stat_struct {
/* Record last point of death of (hard or pseudo) register n. */
rtx last_death;
value. */
ENUM_BITFIELD(machine_mode) truncated_to_mode : 8;
-};
+} reg_stat_type;
+
+DEF_VEC_O(reg_stat_type);
+DEF_VEC_ALLOC_O(reg_stat_type,heap);
-static struct reg_stat *reg_stat;
+static VEC(reg_stat_type,heap) *reg_stat;
/* Record the luid of the last insn that invalidated memory
(anything that writes memory, and subroutine calls, but not pushes). */
static int n_occurrences;
-static rtx reg_nonzero_bits_for_combine (rtx, enum machine_mode, rtx,
+static rtx reg_nonzero_bits_for_combine (const_rtx, enum machine_mode, const_rtx,
enum machine_mode,
unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT *);
-static rtx reg_num_sign_bit_copies_for_combine (rtx, enum machine_mode, rtx,
+static rtx reg_num_sign_bit_copies_for_combine (const_rtx, enum machine_mode, const_rtx,
enum machine_mode,
unsigned int, unsigned int *);
static void do_SUBST (rtx *, rtx);
static void do_SUBST_INT (int *, int);
static void init_reg_last (void);
static void setup_incoming_promotions (rtx);
-static void set_nonzero_bits_and_sign_copies (rtx, rtx, void *);
+static void set_nonzero_bits_and_sign_copies (rtx, const_rtx, void *);
static int cant_combine_insn_p (rtx);
static int can_combine_p (rtx, rtx, rtx, rtx, rtx *, rtx *);
static int combinable_i3pat (rtx, rtx *, rtx, rtx, int, rtx *);
static rtx simplify_set (rtx);
static rtx simplify_logical (rtx);
static rtx expand_compound_operation (rtx);
-static rtx expand_field_assignment (rtx);
+static const_rtx expand_field_assignment (const_rtx);
static rtx make_extraction (enum machine_mode, rtx, HOST_WIDE_INT,
rtx, unsigned HOST_WIDE_INT, int, int, int);
static rtx extract_left_shift (rtx, int);
static void update_table_tick (rtx);
static void record_value_for_reg (rtx, rtx, rtx);
static void check_conversions (rtx, rtx);
-static void record_dead_and_set_regs_1 (rtx, rtx, void *);
+static void record_dead_and_set_regs_1 (rtx, const_rtx, void *);
static void record_dead_and_set_regs (rtx);
static int get_last_value_validate (rtx *, rtx, int, int);
-static rtx get_last_value (rtx);
-static int use_crosses_set_p (rtx, int);
-static void reg_dead_at_p_1 (rtx, rtx, void *);
+static rtx get_last_value (const_rtx);
+static int use_crosses_set_p (const_rtx, int);
+static void reg_dead_at_p_1 (rtx, const_rtx, void *);
static int reg_dead_at_p (rtx, rtx);
static void move_deaths (rtx, rtx, int, rtx, rtx *);
static int reg_bitfield_target_p (rtx, rtx);
static int unmentioned_reg_p_1 (rtx *, void *);
static bool unmentioned_reg_p (rtx, rtx);
static void record_truncated_value (rtx);
-static bool reg_truncated_to_mode (enum machine_mode, rtx);
+static bool reg_truncated_to_mode (enum machine_mode, const_rtx);
static rtx gen_lowpart_or_truncate (enum machine_mode, rtx);
\f
static const struct rtl_hooks combine_rtl_hooks = RTL_HOOKS_INITIALIZER;
\f
+/* Try to split PATTERN found in INSN. This returns NULL_RTX if
+ PATTERN can not be split. Otherwise, it returns an insn sequence.
+ This is a wrapper around split_insns which ensures that the
+ reg_stat vector is made larger if the splitter creates a new
+ register. */
+
+static rtx
+combine_split_insns (rtx pattern, rtx insn)
+{
+ rtx ret;
+ unsigned int nregs;
+
+ ret = split_insns (pattern, insn);
+ nregs = max_reg_num ();
+ if (nregs > VEC_length (reg_stat_type, reg_stat))
+ VEC_safe_grow_cleared (reg_stat_type, heap, reg_stat, nregs);
+ return ret;
+}
+
/* This is used by find_single_use to locate an rtx in LOC that
contains exactly one use of DEST, which is typically either a REG
or CC0. It returns a pointer to the innermost rtx expression
combine_extras = 0;
combine_successes = 0;
- combine_max_regno = nregs;
-
rtl_hooks = combine_rtl_hooks;
- reg_stat = XCNEWVEC (struct reg_stat, nregs);
+ VEC_safe_grow_cleared (reg_stat_type, heap, reg_stat, nregs);
init_recog_no_volatile ();
/* Clean up. */
free (uid_log_links);
free (uid_insn_cost);
- free (reg_stat);
+ VEC_free (reg_stat_type, heap, reg_stat);
{
struct undo *undo, *next;
init_reg_last (void)
{
unsigned int i;
- for (i = 0; i < combine_max_regno; i++)
- memset (reg_stat + i, 0, offsetof (struct reg_stat, sign_bit_copies));
+ reg_stat_type *p;
+
+ for (i = 0; VEC_iterate (reg_stat_type, reg_stat, i, p); ++i)
+ memset (p, 0, offsetof (reg_stat_type, sign_bit_copies));
}
\f
/* Set up any promoted values for incoming argument registers. */
setup_incoming_promotions (rtx first)
{
tree arg;
+ bool strictly_local = false;
if (!targetm.calls.promote_function_args (TREE_TYPE (cfun->decl)))
return;
arg = TREE_CHAIN (arg))
{
rtx reg = DECL_INCOMING_RTL (arg);
+ int uns1, uns3;
+ enum machine_mode mode1, mode2, mode3, mode4;
+ /* Only continue if the incoming argument is in a register. */
if (!REG_P (reg))
continue;
- if (TYPE_MODE (DECL_ARG_TYPE (arg)) == TYPE_MODE (TREE_TYPE (arg)))
- {
- enum machine_mode mode = TYPE_MODE (TREE_TYPE (arg));
- int uns = TYPE_UNSIGNED (TREE_TYPE (arg));
-
- mode = promote_mode (TREE_TYPE (arg), mode, &uns, 1);
- if (mode == GET_MODE (reg) && mode != DECL_MODE (arg))
- {
- rtx x;
- x = gen_rtx_CLOBBER (DECL_MODE (arg), const0_rtx);
- x = gen_rtx_fmt_e ((uns ? ZERO_EXTEND : SIGN_EXTEND), mode, x);
- record_value_for_reg (reg, first, x);
- }
+ /* Determine, if possible, whether all call sites of the current
+ function lie within the current compilation unit. (This does
+ take into account the exporting of a function via taking its
+ address, and so forth.) */
+ if (flag_unit_at_a_time)
+ strictly_local = cgraph_local_info (current_function_decl)->local;
+
+ /* The mode and signedness of the argument before any promotions happen
+ (equal to the mode of the pseudo holding it at that stage). */
+ mode1 = TYPE_MODE (TREE_TYPE (arg));
+ uns1 = TYPE_UNSIGNED (TREE_TYPE (arg));
+
+ /* The mode and signedness of the argument after any source language and
+ TARGET_PROMOTE_PROTOTYPES-driven promotions. */
+ mode2 = TYPE_MODE (DECL_ARG_TYPE (arg));
+ uns3 = TYPE_UNSIGNED (DECL_ARG_TYPE (arg));
+
+ /* The mode and signedness of the argument as it is actually passed,
+ after any TARGET_PROMOTE_FUNCTION_ARGS-driven ABI promotions. */
+ mode3 = promote_mode (DECL_ARG_TYPE (arg), mode2, &uns3, 1);
+
+ /* The mode of the register in which the argument is being passed. */
+ mode4 = GET_MODE (reg);
+
+ /* Eliminate sign extensions in the callee when possible. Only
+ do this when:
+ (a) the mode of the register is the same as the mode of
+ the argument as it is passed; and
+ (b) the signedness does not change across any of the promotions; and
+ (c) when no language-level promotions (which we cannot guarantee
+ will have been done by an external caller) are necessary,
+ unless we know that this function is only ever called from
+ the current compilation unit -- all of whose call sites will
+ do the mode1 --> mode2 promotion. */
+ if (mode3 == mode4
+ && uns1 == uns3
+ && (mode1 == mode2 || strictly_local))
+ {
+ /* Record that the value was promoted from mode1 to mode3,
+ so that any sign extension at the head of the current
+ function may be eliminated. */
+ rtx x;
+ x = gen_rtx_CLOBBER (mode1, const0_rtx);
+ x = gen_rtx_fmt_e ((uns3 ? ZERO_EXTEND : SIGN_EXTEND), mode3, x);
+ record_value_for_reg (reg, first, x);
}
}
}
-\f
+
/* Called via note_stores. If X is a pseudo that is narrower than
HOST_BITS_PER_WIDE_INT and is being set, record what bits are known zero.
by any set of X. */
static void
-set_nonzero_bits_and_sign_copies (rtx x, rtx set, void *data)
+set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
{
rtx insn = (rtx) data;
unsigned int num;
(DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), REGNO (x))
&& GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT)
{
+ reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
+
if (set == 0 || GET_CODE (set) == CLOBBER)
{
- reg_stat[REGNO (x)].nonzero_bits = GET_MODE_MASK (GET_MODE (x));
- reg_stat[REGNO (x)].sign_bit_copies = 1;
+ rsp->nonzero_bits = GET_MODE_MASK (GET_MODE (x));
+ rsp->sign_bit_copies = 1;
return;
}
}
if (!link)
{
- reg_stat[REGNO (x)].nonzero_bits = GET_MODE_MASK (GET_MODE (x));
- reg_stat[REGNO (x)].sign_bit_copies = 1;
+ rsp->nonzero_bits = GET_MODE_MASK (GET_MODE (x));
+ rsp->sign_bit_copies = 1;
return;
}
}
#endif
/* Don't call nonzero_bits if it cannot change anything. */
- if (reg_stat[REGNO (x)].nonzero_bits != ~(unsigned HOST_WIDE_INT) 0)
- reg_stat[REGNO (x)].nonzero_bits
- |= nonzero_bits (src, nonzero_bits_mode);
+ if (rsp->nonzero_bits != ~(unsigned HOST_WIDE_INT) 0)
+ rsp->nonzero_bits |= nonzero_bits (src, nonzero_bits_mode);
num = num_sign_bit_copies (SET_SRC (set), GET_MODE (x));
- if (reg_stat[REGNO (x)].sign_bit_copies == 0
- || reg_stat[REGNO (x)].sign_bit_copies > num)
- reg_stat[REGNO (x)].sign_bit_copies = num;
+ if (rsp->sign_bit_copies == 0
+ || rsp->sign_bit_copies > num)
+ rsp->sign_bit_copies = num;
}
else
{
- reg_stat[REGNO (x)].nonzero_bits = GET_MODE_MASK (GET_MODE (x));
- reg_stat[REGNO (x)].sign_bit_copies = 1;
+ rsp->nonzero_bits = GET_MODE_MASK (GET_MODE (x));
+ rsp->sign_bit_copies = 1;
}
}
}
rtx *pdest, rtx *psrc)
{
int i;
- rtx set = 0, src, dest;
+ const_rtx set = 0;
+ rtx src, dest;
rtx p;
#ifdef AUTO_INC_DEC
rtx link;
/* Called via note_stores by likely_spilled_retval_p. Remove from info->mask
hard registers that are known to be written to / clobbered in full. */
static void
-likely_spilled_retval_1 (rtx x, rtx set, void *data)
+likely_spilled_retval_1 (rtx x, const_rtx set, void *data)
{
struct likely_spilled_retval_info *info = data;
unsigned regno, nregs;
if (i1 && insn_code_number < 0 && GET_CODE (newpat) == SET
&& asm_noperands (newpat) < 0)
{
- rtx m_split, *split;
+ rtx parallel, m_split, *split;
/* See if the MD file can split NEWPAT. If it can't, see if letting it
use I2DEST as a scratch register will help. In the latter case,
convert I2DEST to the mode of the source of NEWPAT if we can. */
- m_split = split_insns (newpat, i3);
+ m_split = combine_split_insns (newpat, i3);
/* We can only use I2DEST as a scratch reg if it doesn't overlap any
inputs of NEWPAT. */
/* First try to split using the original register as a
scratch register. */
- m_split = split_insns (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (2, newpat,
- gen_rtx_CLOBBER (VOIDmode,
- i2dest))),
- i3);
+ parallel = gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2, newpat,
+ gen_rtx_CLOBBER (VOIDmode,
+ i2dest)));
+ m_split = combine_split_insns (parallel, i3);
/* If that didn't work, try changing the mode of I2DEST if
we can. */
ni2dest = regno_reg_rtx[REGNO (i2dest)];
}
- m_split = split_insns (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (2, newpat,
- gen_rtx_CLOBBER (VOIDmode,
- ni2dest))),
- i3);
+ parallel = (gen_rtx_PARALLEL
+ (VOIDmode,
+ gen_rtvec (2, newpat,
+ gen_rtx_CLOBBER (VOIDmode,
+ ni2dest))));
+ m_split = combine_split_insns (parallel, i3);
if (m_split == 0
&& REGNO (i2dest) >= FIRST_PSEUDO_REGISTER)
/* If recog_for_combine has discarded clobbers, try to use them
again for the split. */
if (m_split == 0 && newpat_vec_with_clobbers)
- m_split
- = split_insns (gen_rtx_PARALLEL (VOIDmode,
- newpat_vec_with_clobbers), i3);
+ {
+ parallel = gen_rtx_PARALLEL (VOIDmode, newpat_vec_with_clobbers);
+ m_split = combine_split_insns (parallel, i3);
+ }
if (m_split && NEXT_INSN (m_split) == NULL_RTX)
{
&& GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
&& ! (temp = SET_DEST (XVECEXP (newpat, 0, 1)),
(REG_P (temp)
- && reg_stat[REGNO (temp)].nonzero_bits != 0
+ && VEC_index (reg_stat_type, reg_stat,
+ REGNO (temp))->nonzero_bits != 0
&& GET_MODE_BITSIZE (GET_MODE (temp)) < BITS_PER_WORD
&& GET_MODE_BITSIZE (GET_MODE (temp)) < HOST_BITS_PER_INT
- && (reg_stat[REGNO (temp)].nonzero_bits
+ && (VEC_index (reg_stat_type, reg_stat,
+ REGNO (temp))->nonzero_bits
!= GET_MODE_MASK (word_mode))))
&& ! (GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) == SUBREG
&& (temp = SUBREG_REG (SET_DEST (XVECEXP (newpat, 0, 1))),
(REG_P (temp)
- && reg_stat[REGNO (temp)].nonzero_bits != 0
+ && VEC_index (reg_stat_type, reg_stat,
+ REGNO (temp))->nonzero_bits != 0
&& GET_MODE_BITSIZE (GET_MODE (temp)) < BITS_PER_WORD
&& GET_MODE_BITSIZE (GET_MODE (temp)) < HOST_BITS_PER_INT
- && (reg_stat[REGNO (temp)].nonzero_bits
+ && (VEC_index (reg_stat_type, reg_stat,
+ REGNO (temp))->nonzero_bits
!= GET_MODE_MASK (word_mode)))))
&& ! reg_overlap_mentioned_p (SET_DEST (XVECEXP (newpat, 0, 1)),
SET_SRC (XVECEXP (newpat, 0, 1)))
&& ! memory_address_p (GET_MODE (x), XEXP (x, 0)))
{
rtx reg = regno_reg_rtx[FIRST_PSEUDO_REGISTER];
- rtx seq = split_insns (gen_rtx_SET (VOIDmode, reg, XEXP (x, 0)),
- subst_insn);
+ rtx seq = combine_split_insns (gen_rtx_SET (VOIDmode, reg,
+ XEXP (x, 0)),
+ subst_insn);
/* This should have produced two insns, each of which sets our
placeholder. If the source of the second is a valid address,
}
}
+ /* Check if we are loading something from the constant pool via float
+ extension; in this case we would undo compress_float_constant
+ optimization and degenerate constant load to an immediate value. */
+ if (GET_CODE (x) == FLOAT_EXTEND
+ && MEM_P (XEXP (x, 0))
+ && MEM_READONLY_P (XEXP (x, 0)))
+ {
+ rtx tmp = avoid_constant_pool_reference (x);
+ if (x != tmp)
+ return x;
+ }
+
/* Try to simplify X. If the simplification changed the code, it is likely
that further simplification will help, so loop, but limit the number
of repetitions that will be performed. */
|| code == AND || code == IOR || code == XOR
|| code == SMAX || code == SMIN || code == UMAX || code == UMIN)
&& ((INTEGRAL_MODE_P (mode) && code != DIV)
- || (flag_unsafe_math_optimizations && FLOAT_MODE_P (mode))))
+ || (flag_associative_math && FLOAT_MODE_P (mode))))
{
if (GET_CODE (XEXP (x, 0)) == code)
{
}
/* Try simplify a*(b/c) as (a*b)/c. */
- if (FLOAT_MODE_P (mode) && flag_unsafe_math_optimizations
+ if (FLOAT_MODE_P (mode) && flag_associative_math
&& GET_CODE (XEXP (x, 0)) == DIV)
{
rtx tem = simplify_binary_operation (MULT, mode,
We half-heartedly support variable positions, but do not at all
support variable lengths. */
-static rtx
-expand_field_assignment (rtx x)
+static const_rtx
+expand_field_assignment (const_rtx x)
{
rtx inner;
rtx pos; /* Always counts from low bit. */
a shift, AND, or zero_extract, we can do better. */
static rtx
-reg_nonzero_bits_for_combine (rtx x, enum machine_mode mode,
- rtx known_x ATTRIBUTE_UNUSED,
+reg_nonzero_bits_for_combine (const_rtx x, enum machine_mode mode,
+ const_rtx known_x ATTRIBUTE_UNUSED,
enum machine_mode known_mode ATTRIBUTE_UNUSED,
unsigned HOST_WIDE_INT known_ret ATTRIBUTE_UNUSED,
unsigned HOST_WIDE_INT *nonzero)
{
rtx tem;
+ reg_stat_type *rsp;
/* If X is a register whose nonzero bits value is current, use it.
Otherwise, if X is a register whose value we can find, use that
value. Otherwise, use the previously-computed global nonzero bits
for this register. */
- if (reg_stat[REGNO (x)].last_set_value != 0
- && (reg_stat[REGNO (x)].last_set_mode == mode
- || (GET_MODE_CLASS (reg_stat[REGNO (x)].last_set_mode) == MODE_INT
+ rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
+ if (rsp->last_set_value != 0
+ && (rsp->last_set_mode == mode
+ || (GET_MODE_CLASS (rsp->last_set_mode) == MODE_INT
&& GET_MODE_CLASS (mode) == MODE_INT))
- && ((reg_stat[REGNO (x)].last_set_label >= label_tick_ebb_start
- && reg_stat[REGNO (x)].last_set_label < label_tick)
- || (reg_stat[REGNO (x)].last_set_label == label_tick
- && DF_INSN_LUID (reg_stat[REGNO (x)].last_set) < subst_low_luid)
+ && ((rsp->last_set_label >= label_tick_ebb_start
+ && rsp->last_set_label < label_tick)
+ || (rsp->last_set_label == label_tick
+ && DF_INSN_LUID (rsp->last_set) < subst_low_luid)
|| (REGNO (x) >= FIRST_PSEUDO_REGISTER
&& REG_N_SETS (REGNO (x)) == 1
&& !REGNO_REG_SET_P
(DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), REGNO (x)))))
{
- *nonzero &= reg_stat[REGNO (x)].last_set_nonzero_bits;
+ *nonzero &= rsp->last_set_nonzero_bits;
return NULL;
}
#endif
return tem;
}
- else if (nonzero_sign_valid && reg_stat[REGNO (x)].nonzero_bits)
+ else if (nonzero_sign_valid && rsp->nonzero_bits)
{
- unsigned HOST_WIDE_INT mask = reg_stat[REGNO (x)].nonzero_bits;
+ unsigned HOST_WIDE_INT mask = rsp->nonzero_bits;
if (GET_MODE_BITSIZE (GET_MODE (x)) < GET_MODE_BITSIZE (mode))
/* We don't know anything about the upper bits. */
be between 1 and the number of bits in MODE. */
static rtx
-reg_num_sign_bit_copies_for_combine (rtx x, enum machine_mode mode,
- rtx known_x ATTRIBUTE_UNUSED,
+reg_num_sign_bit_copies_for_combine (const_rtx x, enum machine_mode mode,
+ const_rtx known_x ATTRIBUTE_UNUSED,
enum machine_mode known_mode
ATTRIBUTE_UNUSED,
unsigned int known_ret ATTRIBUTE_UNUSED,
unsigned int *result)
{
rtx tem;
-
- if (reg_stat[REGNO (x)].last_set_value != 0
- && reg_stat[REGNO (x)].last_set_mode == mode
- && ((reg_stat[REGNO (x)].last_set_label >= label_tick_ebb_start
- && reg_stat[REGNO (x)].last_set_label < label_tick)
- || (reg_stat[REGNO (x)].last_set_label == label_tick
- && DF_INSN_LUID (reg_stat[REGNO (x)].last_set) < subst_low_luid)
+ reg_stat_type *rsp;
+
+ rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
+ if (rsp->last_set_value != 0
+ && rsp->last_set_mode == mode
+ && ((rsp->last_set_label >= label_tick_ebb_start
+ && rsp->last_set_label < label_tick)
+ || (rsp->last_set_label == label_tick
+ && DF_INSN_LUID (rsp->last_set) < subst_low_luid)
|| (REGNO (x) >= FIRST_PSEUDO_REGISTER
&& REG_N_SETS (REGNO (x)) == 1
&& !REGNO_REG_SET_P
(DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), REGNO (x)))))
{
- *result = reg_stat[REGNO (x)].last_set_sign_bit_copies;
+ *result = rsp->last_set_sign_bit_copies;
return NULL;
}
if (tem != 0)
return tem;
- if (nonzero_sign_valid && reg_stat[REGNO (x)].sign_bit_copies != 0
+ if (nonzero_sign_valid && rsp->sign_bit_copies != 0
&& GET_MODE_BITSIZE (GET_MODE (x)) == GET_MODE_BITSIZE (mode))
- *result = reg_stat[REGNO (x)].sign_bit_copies;
+ *result = rsp->sign_bit_copies;
return NULL;
}
implies that it must be called from a define_split. */
unsigned int
-extended_count (rtx x, enum machine_mode mode, int unsignedp)
+extended_count (const_rtx x, enum machine_mode mode, int unsignedp)
{
if (nonzero_sign_valid == 0)
return 0;
REG_NOTES (insn) = 0;
insn_code_number = recog (pat, insn, &num_clobbers_to_add);
+ if (dump_file && (dump_flags & TDF_DETAILS))
+ {
+ if (insn_code_number < 0)
+ fputs ("Failed to match this instruction:\n", dump_file);
+ else
+ fputs ("Successfully matched this instruction:\n", dump_file);
+ print_rtl_single (dump_file, pat);
+ }
/* If it isn't, there is the possibility that we previously had an insn
that clobbered some register as a side effect, but the combined
PATTERN (insn) = pat;
insn_code_number = recog (pat, insn, &num_clobbers_to_add);
+ if (dump_file && (dump_flags & TDF_DETAILS))
+ {
+ if (insn_code_number < 0)
+ fputs ("Failed to match this instruction:\n", dump_file);
+ else
+ fputs ("Successfully matched this instruction:\n", dump_file);
+ print_rtl_single (dump_file, pat);
+ }
}
PATTERN (insn) = old_pat;
REG_NOTES (insn) = old_notes;
&& ((unsigned HOST_WIDE_INT) const_op
< (((unsigned HOST_WIDE_INT) 1
<< (GET_MODE_BITSIZE (mode) - 1))))
- && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
{
op0 = XEXP (op0, 0);
continue;
&& (unsigned_comparison_p || equality_comparison_p)
&& (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
&& ((unsigned HOST_WIDE_INT) const_op < GET_MODE_MASK (mode))
- && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
+ && optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
{
op0 = XEXP (op0, 0);
continue;
unsigned int r;
for (r = regno; r < endregno; r++)
- reg_stat[r].last_set_table_tick = label_tick;
+ {
+ reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, r);
+ rsp->last_set_table_tick = label_tick;
+ }
return;
}
unsigned int regno = REGNO (reg);
unsigned int endregno = END_REGNO (reg);
unsigned int i;
+ reg_stat_type *rsp;
/* If VALUE contains REG and we have a previous value for REG, substitute
the previous value. */
register. */
for (i = regno; i < endregno; i++)
{
+ rsp = VEC_index (reg_stat_type, reg_stat, i);
+
if (insn)
- reg_stat[i].last_set = insn;
+ rsp->last_set = insn;
- reg_stat[i].last_set_value = 0;
- reg_stat[i].last_set_mode = 0;
- reg_stat[i].last_set_nonzero_bits = 0;
- reg_stat[i].last_set_sign_bit_copies = 0;
- reg_stat[i].last_death = 0;
- reg_stat[i].truncated_to_mode = 0;
+ rsp->last_set_value = 0;
+ rsp->last_set_mode = 0;
+ rsp->last_set_nonzero_bits = 0;
+ rsp->last_set_sign_bit_copies = 0;
+ rsp->last_death = 0;
+ rsp->truncated_to_mode = 0;
}
/* Mark registers that are being referenced in this value. */
for (i = regno; i < endregno; i++)
{
- reg_stat[i].last_set_label = label_tick;
+ rsp = VEC_index (reg_stat_type, reg_stat, i);
+ rsp->last_set_label = label_tick;
if (!insn
- || (value && reg_stat[i].last_set_table_tick >= label_tick_ebb_start))
- reg_stat[i].last_set_invalid = 1;
+ || (value && rsp->last_set_table_tick >= label_tick_ebb_start))
+ rsp->last_set_invalid = 1;
else
- reg_stat[i].last_set_invalid = 0;
+ rsp->last_set_invalid = 0;
}
/* The value being assigned might refer to X (like in "x++;"). In that
case, we must replace it with (clobber (const_int 0)) to prevent
infinite loops. */
+ rsp = VEC_index (reg_stat_type, reg_stat, regno);
if (value && ! get_last_value_validate (&value, insn,
- reg_stat[regno].last_set_label, 0))
+ rsp->last_set_label, 0))
{
value = copy_rtx (value);
if (! get_last_value_validate (&value, insn,
- reg_stat[regno].last_set_label, 1))
+ rsp->last_set_label, 1))
value = 0;
}
/* For the main register being modified, update the value, the mode, the
nonzero bits, and the number of sign bit copies. */
- reg_stat[regno].last_set_value = value;
+ rsp->last_set_value = value;
if (value)
{
enum machine_mode mode = GET_MODE (reg);
subst_low_luid = DF_INSN_LUID (insn);
- reg_stat[regno].last_set_mode = mode;
+ rsp->last_set_mode = mode;
if (GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
mode = nonzero_bits_mode;
- reg_stat[regno].last_set_nonzero_bits = nonzero_bits (value, mode);
- reg_stat[regno].last_set_sign_bit_copies
+ rsp->last_set_nonzero_bits = nonzero_bits (value, mode);
+ rsp->last_set_sign_bit_copies
= num_sign_bit_copies (value, GET_MODE (reg));
}
}
set is occurring. */
static void
-record_dead_and_set_regs_1 (rtx dest, rtx setter, void *data)
+record_dead_and_set_regs_1 (rtx dest, const_rtx setter, void *data)
{
rtx record_dead_insn = (rtx) data;
unsigned int endregno = END_REGNO (XEXP (link, 0));
for (i = regno; i < endregno; i++)
- reg_stat[i].last_death = insn;
+ {
+ reg_stat_type *rsp;
+
+ rsp = VEC_index (reg_stat_type, reg_stat, i);
+ rsp->last_death = insn;
+ }
}
else if (REG_NOTE_KIND (link) == REG_INC)
record_value_for_reg (XEXP (link, 0), insn, NULL_RTX);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
{
- reg_stat[i].last_set_invalid = 1;
- reg_stat[i].last_set = insn;
- reg_stat[i].last_set_value = 0;
- reg_stat[i].last_set_mode = 0;
- reg_stat[i].last_set_nonzero_bits = 0;
- reg_stat[i].last_set_sign_bit_copies = 0;
- reg_stat[i].last_death = 0;
- reg_stat[i].truncated_to_mode = 0;
+ reg_stat_type *rsp;
+
+ rsp = VEC_index (reg_stat_type, reg_stat, i);
+ rsp->last_set_invalid = 1;
+ rsp->last_set = insn;
+ rsp->last_set_value = 0;
+ rsp->last_set_mode = 0;
+ rsp->last_set_nonzero_bits = 0;
+ rsp->last_set_sign_bit_copies = 0;
+ rsp->last_death = 0;
+ rsp->truncated_to_mode = 0;
}
last_call_luid = mem_last_set = DF_INSN_LUID (insn);
for (links = LOG_LINKS (insn); links;)
{
+ reg_stat_type *rsp;
+
insn = XEXP (links, 0);
set = single_set (insn);
continue;
}
- if (reg_stat[regno].last_set == insn)
+ rsp = VEC_index (reg_stat_type, reg_stat, regno);
+ if (rsp->last_set == insn)
{
if (SUBREG_PROMOTED_UNSIGNED_P (subreg) > 0)
- reg_stat[regno].last_set_nonzero_bits &= GET_MODE_MASK (mode);
+ rsp->last_set_nonzero_bits &= GET_MODE_MASK (mode);
}
if (REG_P (SET_SRC (set)))
an explicit truncation. */
static bool
-reg_truncated_to_mode (enum machine_mode mode, rtx x)
+reg_truncated_to_mode (enum machine_mode mode, const_rtx x)
{
- enum machine_mode truncated = reg_stat[REGNO (x)].truncated_to_mode;
+ reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
+ enum machine_mode truncated = rsp->truncated_to_mode;
if (truncated == 0
- || reg_stat[REGNO (x)].truncation_label < label_tick_ebb_start)
+ || rsp->truncation_label < label_tick_ebb_start)
return false;
if (GET_MODE_SIZE (truncated) <= GET_MODE_SIZE (mode))
return true;
record_truncated_value (rtx x)
{
enum machine_mode truncated_mode;
+ reg_stat_type *rsp;
if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)))
{
else
return;
- if (reg_stat[REGNO (x)].truncated_to_mode == 0
- || reg_stat[REGNO (x)].truncation_label < label_tick_ebb_start
+ rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
+ if (rsp->truncated_to_mode == 0
+ || rsp->truncation_label < label_tick_ebb_start
|| (GET_MODE_SIZE (truncated_mode)
- < GET_MODE_SIZE (reg_stat[REGNO (x)].truncated_to_mode)))
+ < GET_MODE_SIZE (rsp->truncated_to_mode)))
{
- reg_stat[REGNO (x)].truncated_to_mode = truncated_mode;
- reg_stat[REGNO (x)].truncation_label = label_tick;
+ rsp->truncated_to_mode = truncated_mode;
+ rsp->truncation_label = label_tick;
}
}
unsigned int j;
for (j = regno; j < endregno; j++)
- if (reg_stat[j].last_set_invalid
- /* If this is a pseudo-register that was only set once and not
- live at the beginning of the function, it is always valid. */
- || (! (regno >= FIRST_PSEUDO_REGISTER
- && REG_N_SETS (regno) == 1
- && !REGNO_REG_SET_P
- (DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), regno))
- && reg_stat[j].last_set_label > tick))
+ {
+ reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, j);
+ if (rsp->last_set_invalid
+ /* If this is a pseudo-register that was only set once and not
+ live at the beginning of the function, it is always valid. */
+ || (! (regno >= FIRST_PSEUDO_REGISTER
+ && REG_N_SETS (regno) == 1
+ && (!REGNO_REG_SET_P
+ (DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), regno)))
+ && rsp->last_set_label > tick))
{
if (replace)
*loc = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
return replace;
}
+ }
return 1;
}
is known longer known reliably. */
static rtx
-get_last_value (rtx x)
+get_last_value (const_rtx x)
{
unsigned int regno;
rtx value;
+ reg_stat_type *rsp;
/* If this is a non-paradoxical SUBREG, get the value of its operand and
then convert it to the desired mode. If this is a paradoxical SUBREG,
return 0;
regno = REGNO (x);
- value = reg_stat[regno].last_set_value;
+ rsp = VEC_index (reg_stat_type, reg_stat, regno);
+ value = rsp->last_set_value;
/* If we don't have a value, or if it isn't for this basic block and
it's either a hard register, set more than once, or it's a live
block. */
if (value == 0
- || (reg_stat[regno].last_set_label < label_tick_ebb_start
+ || (rsp->last_set_label < label_tick_ebb_start
&& (regno < FIRST_PSEUDO_REGISTER
|| REG_N_SETS (regno) != 1
|| REGNO_REG_SET_P
/* If the value was set in a later insn than the ones we are processing,
we can't use it even if the register was only set once. */
- if (reg_stat[regno].last_set_label == label_tick
- && DF_INSN_LUID (reg_stat[regno].last_set) >= subst_low_luid)
+ if (rsp->last_set_label == label_tick
+ && DF_INSN_LUID (rsp->last_set) >= subst_low_luid)
return 0;
/* If the value has all its registers valid, return it. */
- if (get_last_value_validate (&value, reg_stat[regno].last_set,
- reg_stat[regno].last_set_label, 0))
+ if (get_last_value_validate (&value, rsp->last_set,
+ rsp->last_set_label, 0))
return value;
/* Otherwise, make a copy and replace any invalid register with
(clobber (const_int 0)). If that fails for some reason, return 0. */
value = copy_rtx (value);
- if (get_last_value_validate (&value, reg_stat[regno].last_set,
- reg_stat[regno].last_set_label, 1))
+ if (get_last_value_validate (&value, rsp->last_set,
+ rsp->last_set_label, 1))
return value;
return 0;
that is set in an instruction more recent than FROM_LUID. */
static int
-use_crosses_set_p (rtx x, int from_luid)
+use_crosses_set_p (const_rtx x, int from_luid)
{
const char *fmt;
int i;
return 1;
#endif
for (; regno < endreg; regno++)
- if (reg_stat[regno].last_set
- && reg_stat[regno].last_set_label == label_tick
- && DF_INSN_LUID (reg_stat[regno].last_set) > from_luid)
- return 1;
+ {
+ reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, regno);
+ if (rsp->last_set
+ && rsp->last_set_label == label_tick
+ && DF_INSN_LUID (rsp->last_set) > from_luid)
+ return 1;
+ }
return 0;
}
reg_dead_flag to 1 if X is a CLOBBER and to -1 it is a SET. */
static void
-reg_dead_at_p_1 (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED)
+reg_dead_at_p_1 (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
{
unsigned int regno, endregno;
if (code == REG)
{
unsigned int regno = REGNO (x);
- rtx where_dead = reg_stat[regno].last_death;
+ rtx where_dead = VEC_index (reg_stat_type, reg_stat, regno)->last_death;
/* Don't move the register if it gets killed in between from and to. */
if (maybe_kill_insn && reg_set_p (x, maybe_kill_insn)
}
break;
- case REG_LABEL:
+ case REG_LABEL_TARGET:
+ case REG_LABEL_OPERAND:
/* This can show up in several ways -- either directly in the
pattern, or hidden off in the constant pool with (or without?)
a REG_EQUAL note. */
place = i2;
}
- /* Don't attach REG_LABEL note to a JUMP_INSN. Add
- a JUMP_LABEL instead or decrement LABEL_NUSES. */
- if (place && JUMP_P (place))
+ /* For REG_LABEL_TARGET on a JUMP_P, we prefer to put the note
+ as a JUMP_LABEL or decrement LABEL_NUSES if it's already
+ there. */
+ if (place && JUMP_P (place)
+ && REG_NOTE_KIND (note) == REG_LABEL_TARGET
+ && (JUMP_LABEL (place) == NULL
+ || JUMP_LABEL (place) == XEXP (note, 0)))
{
rtx label = JUMP_LABEL (place);
if (!label)
JUMP_LABEL (place) = XEXP (note, 0);
- else
- {
- gcc_assert (label == XEXP (note, 0));
- if (LABEL_P (label))
- LABEL_NUSES (label)--;
- }
- place = 0;
+ else if (LABEL_P (label))
+ LABEL_NUSES (label)--;
}
- if (place2 && JUMP_P (place2))
+
+ if (place2 && JUMP_P (place2)
+ && REG_NOTE_KIND (note) == REG_LABEL_TARGET
+ && (JUMP_LABEL (place2) == NULL
+ || JUMP_LABEL (place2) == XEXP (note, 0)))
{
rtx label = JUMP_LABEL (place2);
if (!label)
JUMP_LABEL (place2) = XEXP (note, 0);
- else
- {
- gcc_assert (label == XEXP (note, 0));
- if (LABEL_P (label))
- LABEL_NUSES (label)--;
- }
+ else if (LABEL_P (label))
+ LABEL_NUSES (label)--;
place2 = 0;
}
break;
if (place && REG_NOTE_KIND (note) == REG_DEAD)
{
unsigned int regno = REGNO (XEXP (note, 0));
-
+ reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, regno);
if (dead_or_set_p (place, XEXP (note, 0))
|| reg_bitfield_target_p (XEXP (note, 0), PATTERN (place)))
/* Unless the register previously died in PLACE, clear
last_death. [I no longer understand why this is
being done.] */
- if (reg_stat[regno].last_death != place)
- reg_stat[regno].last_death = 0;
+ if (rsp->last_death != place)
+ rsp->last_death = 0;
place = 0;
}
else
- reg_stat[regno].last_death = place;
+ rsp->last_death = place;
/* If this is a death note for a hard reg that is occupying
multiple registers, ensure that we are still using all
0, /* properties_destroyed */
0, /* todo_flags_start */
TODO_dump_func |
- TODO_df_finish |
+ TODO_df_finish | TODO_verify_rtl_sharing |
TODO_ggc_collect, /* todo_flags_finish */
'c' /* letter */
};
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