&& TEST_HARD_REG_BIT (all_btrs, REGNO (dest)))
{
gcc_assert (!btr_referenced_p (src, NULL));
-
+
if (!check_const || CONSTANT_P (src))
{
if (regno)
int new_block = new_bb->index;
gcc_assert (dominated_by_p (CDI_DOMINATORS, head_bb, new_bb));
-
+
IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[head_bb->index]);
bitmap_set_bit (live_range, new_block);
/* A previous btr migration could have caused a register to be
- live just at the end of new_block which we need in full, so
- use trs_live_at_end even if full_range is set. */
+ live just at the end of new_block which we need in full, so
+ use trs_live_at_end even if full_range is set. */
IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live_at_end[new_block]);
if (full_range)
IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[new_block]);
insp = BB_END (b);
for (insp = BB_END (b); ! INSN_P (insp); insp = PREV_INSN (insp))
gcc_assert (insp != BB_HEAD (b));
-
+
if (JUMP_P (insp) || can_throw_internal (insp))
insp = PREV_INSN (insp);
}
/* Try to move the instruction that sets the target register into
basic block TRY. */
int try_freq = basic_block_freq (try);
+ edge_iterator ei;
+ edge e;
+
+ /* If TRY has abnormal edges, skip it. */
+ FOR_EACH_EDGE (e, ei, try->succs)
+ if (e->flags & EDGE_COMPLEX)
+ break;
+ if (e)
+ continue;
if (dump_file)
fprintf (dump_file, "trying block %d ...", try->index);
&& !warned)
{
warning (0, "branch target register load optimization is not intended "
- "to be run twice");
+ "to be run twice");
warned = 1;
}
NULL, /* sub */
NULL, /* next */
0, /* static_pass_number */
- 0, /* tv_id */
+ 0, /* tv_id */
0, /* properties_required */
0, /* properties_provided */
0, /* properties_destroyed */