/* Perform branch target register load optimizations.
- Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
+ Copyright (C) 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
This file is part of GCC.
#include "flags.h"
#include "insn-attr.h"
#include "function.h"
+#include "except.h"
#include "tm_p.h"
/* Target register optimizations - these are performed after reload. */
migrating branch target load instructions. */
static struct obstack migrate_btrl_obstack;
-/* Basic block dominator information used when migrating PT instructions. */
-static dominance_info dom;
-
/* Array indexed by basic block number, giving the set of registers
live in that block. */
static HARD_REG_SET *btrs_live;
+/* Array indexed by basic block number, giving the set of registers live at
+ the end of that block, including any uses by a final jump insn, if any. */
+static HARD_REG_SET *btrs_live_at_end;
+
/* Set of all target registers that we are willing to allocate. */
static HARD_REG_SET all_btrs;
-/* Return an estimate of the frequency of execution of block bb.
- If we have a profiling count available, we could use it here. */
+/* Return an estimate of the frequency of execution of block bb. */
static int
basic_block_freq (basic_block bb)
{
if (GET_CODE (x) != REG)
return 0;
regno = REGNO (x);
- for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1; i >= 0; i--)
+ for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--)
if (TEST_HARD_REG_BIT (all_btrs, regno+i))
{
btr_reference_found = px;
fibheap_insert (all_btr_defs, -this->cost, this);
- if (rtl_dump_file)
- fprintf (rtl_dump_file,
+ if (dump_file)
+ fprintf (dump_file,
"Found target reg definition: sets %u { bb %d, insn %d }%s priority %d\n",
dest_reg, bb->index, INSN_UID (insn), (this->group ? "" : ":not const"),
this->cost);
user->n_reaching_defs = 0;
user->first_reaching_def = -1;
- if (rtl_dump_file)
+ if (dump_file)
{
- fprintf (rtl_dump_file, "Uses target reg: { bb %d, insn %d }",
+ fprintf (dump_file, "Uses target reg: { bb %d, insn %d }",
bb->index, INSN_UID (insn));
if (user->use)
- fprintf (rtl_dump_file, ": unambiguous use of reg %d\n",
+ fprintf (dump_file, ": unambiguous use of reg %d\n",
REGNO (user->use));
}
int reg;
for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++)
if (TEST_HARD_REG_BIT (s, reg))
- fprintf (rtl_dump_file, " %d", reg);
+ fprintf (dump_file, " %d", reg);
}
/* Write the set of target regs live in block BB to the dump file. */
static void
dump_btrs_live (int bb)
{
- fprintf (rtl_dump_file, "BB%d live:", bb);
+ fprintf (dump_file, "BB%d live:", bb);
dump_hard_reg_set (btrs_live[bb]);
- fprintf (rtl_dump_file, "\n");
+ fprintf (dump_file, "\n");
}
/* REGNO is the number of a branch target register that is being used or
if (GET_CODE (dest) != REG)
return;
regno = REGNO (dest);
- end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (dest));
+ end_regno = regno + hard_regno_nregs[regno][GET_MODE (dest)];
for (; regno < end_regno; regno++)
if (TEST_HARD_REG_BIT (all_btrs, regno))
{
btr_def defs_this_bb = NULL;
rtx insn;
rtx last;
+ int can_throw = 0;
info.users_this_bb = NULL;
info.bb_gen = bb_gen[i];
call_used_reg_set);
clobbered = &call_saved;
}
-
+
for (regno = first_btr; regno <= last_btr; regno++)
if (TEST_HARD_REG_BIT (*clobbered, regno))
note_btr_set (regno_reg_rtx[regno], NULL_RTX, &info);
COPY_HARD_REG_SET (btrs_live[i], info.btrs_live_in_block);
COPY_HARD_REG_SET (btrs_written[i], info.btrs_written_in_block);
- if (rtl_dump_file)
+
+ REG_SET_TO_HARD_REG_SET (btrs_live_at_end[i], bb->global_live_at_end);
+ /* If this block ends in a jump insn, add any uses or even clobbers
+ of branch target registers that it might have. */
+ for (insn = BB_END (bb); insn != BB_HEAD (bb) && ! INSN_P (insn); )
+ insn = PREV_INSN (insn);
+ /* ??? for the fall-through edge, it would make sense to insert the
+ btr set on the edge, but that would require to split the block
+ early on so that we can distinguish between dominance from the fall
+ through edge - which can use the call-clobbered registers - from
+ dominance by the throw edge. */
+ if (can_throw_internal (insn))
+ {
+ HARD_REG_SET tmp;
+
+ COPY_HARD_REG_SET (tmp, call_used_reg_set);
+ AND_HARD_REG_SET (tmp, all_btrs);
+ IOR_HARD_REG_SET (btrs_live_at_end[i], tmp);
+ can_throw = 1;
+ }
+ if (can_throw || GET_CODE (insn) == JUMP_INSN)
+ {
+ int regno;
+
+ for (regno = first_btr; regno <= last_btr; regno++)
+ if (refers_to_regno_p (regno, regno+1, insn, NULL))
+ SET_HARD_REG_BIT (btrs_live_at_end[i], regno);
+ }
+
+ if (dump_file)
dump_btrs_live(i);
}
}
/* We now know that def reaches user. */
- if (rtl_dump_file)
- fprintf (rtl_dump_file,
+ if (dump_file)
+ fprintf (dump_file,
"Def in insn %d reaches use in insn %d\n",
uid, insn_uid);
def->has_ambiguous_use = 1;
def_array[user->first_reaching_def]
->has_ambiguous_use = 1;
- if (rtl_dump_file)
- fprintf (rtl_dump_file,
+ if (dump_file)
+ fprintf (dump_file,
"(use %d has multiple reaching defs)\n",
insn_uid);
}
|| !block_at_edge_of_live_range_p (bb, def))
{
CLEAR_HARD_REG_BIT (btrs_live[bb], def->btr);
- if (rtl_dump_file)
+ CLEAR_HARD_REG_BIT (btrs_live_at_end[bb], def->btr);
+ if (dump_file)
dump_btrs_live (bb);
}
});
(def->live_range, 0, bb,
{
SET_HARD_REG_BIT (btrs_live[bb], def->btr);
- if (rtl_dump_file)
+ SET_HARD_REG_BIT (btrs_live_at_end[bb], def->btr);
+ if (dump_file)
dump_btrs_live (bb);
});
}
tos = worklist = xmalloc (sizeof (basic_block) * (n_basic_blocks + 1));
- if (dominated_by_p (dom, new_bb, head_bb))
+ if (dominated_by_p (CDI_DOMINATORS, new_bb, head_bb))
*tos++ = new_bb;
- else if (dominated_by_p (dom, head_bb, new_bb))
+ else if (dominated_by_p (CDI_DOMINATORS, head_bb, new_bb))
{
edge e;
int new_block = new_bb->index;
bitmap_set_bit (live_range, new_block);
- IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[new_block]);
- if (rtl_dump_file)
+ if (flag_btr_bb_exclusive)
+ IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[new_block]);
+ else
{
- fprintf (rtl_dump_file,
- "Adding block %d to live range\n", new_block);
- fprintf (rtl_dump_file,"Now live btrs are ");
+ IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live_at_end[new_block]);
+ IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[head_bb->index]);
+ }
+ if (dump_file)
+ {
+ fprintf (dump_file,
+ "Adding end of block %d and rest of %d to live range\n",
+ new_block, head_bb->index);
+ fprintf (dump_file,"Now live btrs are ");
dump_hard_reg_set (*btrs_live_in_range);
- fprintf (rtl_dump_file, "\n");
+ fprintf (dump_file, "\n");
}
for (e = head_bb->pred; e; e = e->pred_next)
*tos++ = e->src;
bitmap_set_bit (live_range, bb->index);
IOR_HARD_REG_SET (*btrs_live_in_range,
btrs_live[bb->index]);
- if (rtl_dump_file)
+ if (dump_file)
{
- fprintf (rtl_dump_file,
+ fprintf (dump_file,
"Adding block %d to live range\n", bb->index);
- fprintf (rtl_dump_file,"Now live btrs are ");
+ fprintf (dump_file,"Now live btrs are ");
dump_hard_reg_set (*btrs_live_in_range);
- fprintf (rtl_dump_file, "\n");
+ fprintf (dump_file, "\n");
}
for (e = bb->pred; e != NULL; e = e->pred_next)
def->live_range = BITMAP_XMALLOC ();
bitmap_set_bit (def->live_range, def->bb->index);
- COPY_HARD_REG_SET (*btrs_live_in_range, btrs_live[def->bb->index]);
+ if (flag_btr_bb_exclusive)
+ COPY_HARD_REG_SET (*btrs_live_in_range, btrs_live[def->bb->index]);
+ else
+ COPY_HARD_REG_SET (*btrs_live_in_range,
+ btrs_live_at_end[def->bb->index]);
for (user = def->uses; user != NULL; user = user->next)
augment_live_range (def->live_range, btrs_live_in_range,
of other PT instructions may have affected it.
*/
int bb;
+ int def_bb = def->bb->index;
CLEAR_HARD_REG_SET (*btrs_live_in_range);
- EXECUTE_IF_SET_IN_BITMAP
- (def->live_range, 0, bb,
- {
- IOR_HARD_REG_SET (*btrs_live_in_range,
- btrs_live[bb]);
- });
+ if (flag_btr_bb_exclusive)
+ EXECUTE_IF_SET_IN_BITMAP
+ (def->live_range, 0, bb,
+ {
+ IOR_HARD_REG_SET (*btrs_live_in_range, btrs_live[bb]);
+ });
+ else
+ EXECUTE_IF_SET_IN_BITMAP
+ (def->live_range, 0, bb,
+ {
+ IOR_HARD_REG_SET (*btrs_live_in_range,
+ (def_bb == bb
+ ? btrs_live_at_end : btrs_live) [bb]);
+ });
}
if (!def->other_btr_uses_before_def &&
!def->other_btr_uses_after_use)
if (other_def != def
&& other_def->uses != NULL
&& ! other_def->has_ambiguous_use
- && dominated_by_p (dom, other_def->bb, def->bb))
+ && dominated_by_p (CDI_DOMINATORS, other_def->bb, def->bb))
{
/* def->bb dominates the other def, so def and other_def could
be combined. */
if (btr != -1)
{
/* We can combine them. */
- if (rtl_dump_file)
- fprintf (rtl_dump_file,
+ if (dump_file)
+ fprintf (dump_file,
"Combining def in insn %d with def in insn %d\n",
INSN_UID (other_def->insn), INSN_UID (def->insn));
btr_user user;
rtx set;
- if (rtl_dump_file)
- fprintf(rtl_dump_file, "migrating to basic block %d, using reg %d\n",
+ if (dump_file)
+ fprintf(dump_file, "migrating to basic block %d, using reg %d\n",
new_def_bb->index, btr);
clear_btr_from_live_range (def);
def->bb = new_def_bb;
def->luid = 0;
def->cost = basic_block_freq (new_def_bb);
- def->other_btr_uses_before_def = 0;
+ def->other_btr_uses_before_def
+ = TEST_HARD_REG_BIT (btrs_live[b->index], btr) ? 1 : 0;
bitmap_copy (def->live_range, live_range);
combine_btr_defs (def, btrs_live_in_range);
btr = def->btr;
its basic block. */
/* ?? some assertions to check that insp is sensible? */
+ if (def->other_btr_uses_before_def)
+ {
+ insp = BB_END (b);
+ for (insp = BB_END (b); ! INSN_P (insp); insp = PREV_INSN (insp))
+ if (insp == BB_HEAD (b))
+ abort ();
+ if (GET_CODE (insp) == JUMP_INSN || can_throw_internal (insp))
+ insp = PREV_INSN (insp);
+ }
+
set = single_set (old_insn);
src = SET_SRC (set);
btr_mode = GET_MODE (SET_DEST (set));
- btr_rtx = gen_rtx (REG, btr_mode, btr);
+ btr_rtx = gen_rtx_REG (btr_mode, btr);
new_insn = gen_move_insn (btr_rtx, src);
regs_ever_live[btr] = 1;
- if (rtl_dump_file)
- fprintf (rtl_dump_file, "New pt is insn %d, inserted after insn %d\n",
+ if (dump_file)
+ fprintf (dump_file, "New pt is insn %d, inserted after insn %d\n",
INSN_UID (def->insn), INSN_UID (insp));
/* Delete the old target register initialization. */
|| GET_MODE (user->use) == VOIDmode)
replacement_rtx = btr_rtx;
else
- replacement_rtx = gen_rtx (REG, GET_MODE (user->use), btr);
+ replacement_rtx = gen_rtx_REG (GET_MODE (user->use), btr);
replace_rtx (user->insn, user->use, replacement_rtx);
user->use = replacement_rtx;
}
btr_user user;
int def_latency = 1;
- if (rtl_dump_file)
- fprintf (rtl_dump_file,
+ if (dump_file)
+ fprintf (dump_file,
"Attempting to migrate pt from insn %d (cost = %d, min_cost = %d) ... ",
INSN_UID (def->insn), def->cost, min_cost);
if (!def->group || def->has_ambiguous_use)
/* These defs are not migratable. */
{
- if (rtl_dump_file)
- fprintf (rtl_dump_file, "it's not migratable\n");
+ if (dump_file)
+ fprintf (dump_file, "it's not migratable\n");
return 0;
}
no need to consider it further.
*/
{
- if (rtl_dump_file)
- fprintf (rtl_dump_file, "it's already combined with another pt\n");
+ if (dump_file)
+ fprintf (dump_file, "it's already combined with another pt\n");
return 0;
}
bitmap_copy (live_range, def->live_range);
#ifdef INSN_SCHEDULING
- if ((*targetm.sched.use_dfa_pipeline_interface) ())
+ if (targetm.sched.use_dfa_pipeline_interface ())
def_latency = insn_default_latency (def->insn);
else
def_latency = result_ready_cost (def->insn);
def_basic_block_freq = basic_block_freq (def->bb);
- for (try = get_immediate_dominator (dom, def->bb);
+ for (try = get_immediate_dominator (CDI_DOMINATORS, def->bb);
!give_up && try && try != ENTRY_BLOCK_PTR && def->cost >= min_cost;
- try = get_immediate_dominator (dom, try))
+ try = get_immediate_dominator (CDI_DOMINATORS, try))
{
/* Try to move the instruction that sets the target register into
basic block TRY. */
int try_freq = basic_block_freq (try);
- if (rtl_dump_file)
- fprintf (rtl_dump_file, "trying block %d ...", try->index);
+ if (dump_file)
+ fprintf (dump_file, "trying block %d ...", try->index);
if (try_freq < def_basic_block_freq
|| (try_freq == def_basic_block_freq && btr_used_near_def))
{
int btr;
augment_live_range (live_range, &btrs_live_in_range, def->bb, try);
- if (rtl_dump_file)
+ if (dump_file)
{
- fprintf (rtl_dump_file, "Now btrs live in range are: ");
+ fprintf (dump_file, "Now btrs live in range are: ");
dump_hard_reg_set (btrs_live_in_range);
- fprintf (rtl_dump_file, "\n");
+ fprintf (dump_file, "\n");
}
btr = choose_btr (btrs_live_in_range);
if (btr != -1)
/* There are no free target registers available to move
this far forward, so give up */
give_up = 1;
- if (rtl_dump_file)
- fprintf (rtl_dump_file,
+ if (dump_file)
+ fprintf (dump_file,
"giving up because there are no free target registers\n");
}
if (!def_moved)
{
give_up = 1;
- if (rtl_dump_file)
- fprintf (rtl_dump_file, "failed to move\n");
+ if (dump_file)
+ fprintf (dump_file, "failed to move\n");
}
BITMAP_XFREE (live_range);
return !give_up;
int reg;
gcc_obstack_init (&migrate_btrl_obstack);
- if (rtl_dump_file)
+ if (dump_file)
{
int i;
for (i = 0; i < n_basic_blocks; i++)
{
basic_block bb = BASIC_BLOCK (i);
- fprintf(rtl_dump_file,
+ fprintf(dump_file,
"Basic block %d: count = " HOST_WIDEST_INT_PRINT_DEC
" loop-depth = %d idom = %d\n",
i, (HOST_WIDEST_INT) bb->count, bb->loop_depth,
- get_immediate_dominator (dom, bb)->index);
+ get_immediate_dominator (CDI_DOMINATORS, bb)->index);
}
}
}
btrs_live = xcalloc (n_basic_blocks, sizeof (HARD_REG_SET));
+ btrs_live_at_end = xcalloc (n_basic_blocks, sizeof (HARD_REG_SET));
build_btr_def_use_webs (all_btr_defs);
while (!fibheap_empty (all_btr_defs))
{
- btr_def def =
- (btr_def) fibheap_extract_min (all_btr_defs);
+ btr_def def = fibheap_extract_min (all_btr_defs);
int min_cost = -fibheap_min_key (all_btr_defs);
if (migrate_btr_def (def, min_cost))
{
fibheap_insert (all_btr_defs, -def->cost, (void *) def);
- if (rtl_dump_file)
+ if (dump_file)
{
- fprintf (rtl_dump_file,
+ fprintf (dump_file,
"Putting insn %d back on queue with priority %d\n",
INSN_UID (def->insn), def->cost);
}
}
free (btrs_live);
+ free (btrs_live_at_end);
obstack_free (&migrate_btrl_obstack, NULL);
fibheap_delete (all_btr_defs);
}
void
-branch_target_load_optimize (rtx insns, bool after_prologue_epilogue_gen)
+branch_target_load_optimize (bool after_prologue_epilogue_gen)
{
- enum reg_class class = (*targetm.branch_target_register_class) ();
+ enum reg_class class = targetm.branch_target_register_class ();
if (class != NO_REGS)
{
/* Initialize issue_rate. */
if (targetm.sched.issue_rate)
- issue_rate = (*targetm.sched.issue_rate) ();
+ issue_rate = targetm.sched.issue_rate ();
else
issue_rate = 1;
cleanup_cfg (optimize ? CLEANUP_EXPENSIVE : 0);
#endif
- life_analysis (insns, NULL, 0);
+ life_analysis (NULL, 0);
/* Dominator info is also needed for migrate_btr_def. */
- dom = calculate_dominance_info (CDI_DOMINATORS);
+ calculate_dominance_info (CDI_DOMINATORS);
migrate_btr_defs (class,
- ((*targetm.branch_target_register_callee_saved)
+ (targetm.branch_target_register_callee_saved
(after_prologue_epilogue_gen)));
- free_dominance_info (dom);
+ free_dominance_info (CDI_DOMINATORS);
update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES,
PROP_DEATH_NOTES | PROP_REG_INFO);
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