+2003-06-19 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * hooks.h (hook_reg_class_void_no_regs): Only declare if tm.h
+ has been included.
+
+2003-06-18 James A Morrison <ja2morri@student.math.uwaterloo.ca>
+
+ * config/sparc/sparc.c: Update copyright year.
+
+2003-06-19 David Edelsohn <edelsohn@gnu.org>
+
+ * config/rs6000/rs6000.c (init_cumulative_args): Limit CALL_LIBCALL
+ to ABI_V4.
+
+2003-06-18 Joseph S. Myers <jsm@polyomino.org.uk>
+
+ PR bootstrap/4068
+ * config/i386/liunx.h: Don't include sys/ucontext.h for glibc 2.0.
+
+2003-06-19 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/h8300/h8300.c (TARGET_INITIALIZER and friends): Move
+ to the end of the file. Remove unnecessary prototypes.
+
+2003-06-19 Hans-Peter Nilsson <hp@axis.com>
+
+ * bt-load.c (migrate_btr_def) [INSN_SCHEDULING]: Conditionalize
+ calls to insn_default_latency and result_ready_cost. Initialize
+ def_latency to 1.
+
+2003-06-18 Richard Henderson <rth@redhat.com>
+
+ * config/ia64/unwind-ia64.c (_Unwind_GetCFA): New.
+ (_Unwind_FindEnclosingFunction): Implement.
+
+2003-06-18 Kazu Hirata <kazu@cs.umass.edu>
+
+ * toplev.c (rest_of_handle_sched): Hide the entire function if
+ INSN_SCHEDULING is not defined.
+ (rest_of_compilation): Call rest_of_handle_sched() only when
+ INSN_SCHEDULING is defined.
+
+2003-06-18 Stephen Clarke <stephen.clarke@superh.com>
+ J"orn Rennecke <joern.rennecke@superh.com>
+
+ * bt-load.c: New file.
+ * Makefile.in (OBJS): Include bt-load.o
+ (bt-load.o): Add dependencies.
+ * flags.h (flag_branch_target_load_optimize): Declare.
+ (flag_branch_target_load_optimize2): Likewise.
+ * hooks.c (hook_reg_class_void_no_regs): New function.
+ (hook_bool_bool_false): Likewise.
+ * hooks.h (hook_reg_class_void_no_regs, hook_bool_bool_false): Declare.
+ * rtl.h (branch_target_load_optimize): Declare.
+ * target-def.h (TARGET_BRANCH_TARGET_REGISTER_CLASS): Define.
+ (TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
+ (TARGET_INITIALIZER): Include these.
+ * target.h (struct gcc_target): Add branch_target_register_class
+ and branch_target_register_callee_saved members.
+ * toplev.c (enum dump_file_index): Add DFI_branch_target_load
+ (dump_file) Add "tars" entry.
+ (flag_branch_target_load_optimize): New variable.
+ (flag_branch_target_load_optimize2): Likewise.
+ (lang_independent_options): Add entries for new options.
+ (rest_of_compilation): Call branch_target_load_optimize.
+ * doc/tm.texi (TARGET_BRANCH_TARGET_REGISTER_CLASS): Document.
+ (TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
+ * doc/invoke.texi: Document -fbranch-target-load-optimize and
+ -fbranch-target-load-optimize2.
+ * rtl.h (epilogue_completed): Declare.
+ * recog.c (epilogue_completed): New variable.
+ * toplev.c (rest_of_compilation): Set it.
+ * flow.c (mark_regs_live_at_end): Use it.
+ * config/ia64/ia64.c (ia64_output_mi_thunk): Set it.
+ * config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise.
+ * config/sh/sh.c (sh_output_mi_thunk): Likewise.
+ * config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
+
+ * sh.c (shmedia_space_reserved_for_target_registers): New variable.
+ (sh_target_reg_class): New function.
+ (sh_optimize_target_register_callee_saved): Likwise.
+ (shmedia_target_regs_stack_space): Likewise.
+ (shmedia_reserve_space_for_target_registers_p): Likewise.
+ (shmedia_target_regs_stack_adjust): Likewise.
+ (TARGET_BRANCH_TARGET_REGISTER_CLASS): Override.
+ (TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
+ (calc_live_regs): If flag_branch_target_load_optimize2 and
+ TARGET_SAVE_ALL_TARGET_REGS is enabled, and we have space reserved
+ for target registers, make sure that we save all target registers.
+ (sh_expand_prologue, sh_expand_epilogue): Take target register
+ optimizations into account. Collapse stack adjustments if that
+ is beneficial.
+ (initial_elimination_offset): Reserve space for target registers
+ if necessary.
+ * sh.h (SAVE_ALL_TR_BIT, TARGET_SAVE_ALL_TARGET_REGS): Define.
+ (OPTIMIZATION_OPTIONS): Enable flag_branch_target_load_optimize.
+
+2003-06-18 Nick Clifton <nickc@redhat.com>
+
+ * config.gcc: Add an extra_header for ARM targets.
+ Support configuring with --with-cpu=iwmmxt.
+ * doc/invoke.texi: Document new value for -mcpu= ARM switch.
+ * config/arm/aof.h (REGISTER_NAMES): Add iwmmxt register
+ names. Fix formatting.
+ * config/arm/aout.h (REGISTER_NAMES): Add iwmmxt register
+ names.
+ * config/arm/arm-protos.h (arm_emit_vector_const): New
+ prototype.
+ (arm_output_load_gr): New prototype.
+ * config/arm/arm.c (extra_reg_names1): Delete.
+ (TARGET_INIT_BUILTINS, TARGET_EXPAND_BUILTIN, FL_IWMMXT,
+ * arch_is_iwmmxt): Define.
+ (all_cores, all_architecture): Add entry for iwmmxt.
+ (arm_override_options): Add support for iwmmxt.
+ (use_return_insn, arm_function_arg, arm_legitimate_index_p,
+ arm_print_value, arm_rtx_costs_1, output_move_double,
+ arm_compute_save_reg_mask, arm_output_epilogue,
+ arm_get_frame_size, arm_expand_prologue, arm_print_operand,
+ arm_assemble_integer, arm_hard_regno_ok, arm_regno_class):
+ Likewise.
+ (arm_init_cumulative_args): Count iwmmxt registers.
+ (arm_function_ok_for_sibcall): Return false of sibcall_blocked
+ has been set.
+ (struct minipool_node): Add fix_size field.
+ (add_minipool_forward_ref): Add support for 8-byte aligning of
+ the pool.
+ (add_minipool_backward_ref, add_minipool_offsets,
+ dump_minipool, push_minipool_fix): Likewise.
+ (struct builtin_description): New struct.
+ (builtin_description): New array of iwmmxt builtin functions.
+ (arm_init_iwmmxt_builtins): New function.
+ (arm_init_builtins): New function.
+ (safe_vector_operand): New function.
+ (arm_expand_binop_builtin): New function.
+ (arm_expand_unop_builtin): New function.
+ (arm_expand_builtin): New function.
+ (arm_emit_vector_const): New function.
+ (arm_output_load_gr): New function.
+ * config/arm/arm.h (TARGET_CPU_iwmmxt, TARGET_IWMMXT,
+ TARGET_REALLY_IWMMXT, arm_arch_iwmmxt, IWMMXT_ALIGNMENT,
+ TYPE_NEEDS_IWMMXT_ALIGNMENT, ADJUST_FIELD_ALIGN,
+ DATA_ALIGNMENT, LOCAL_ALIGNMENT, VECTOR_MODE_SUPPORTED_P): Define.
+ (BIGGEST_ALIGNMENT): Set to 64 if ATPCS support is enabled.
+ (CPP_CPU_ARCH_SPEC): Add entries for iwmmxt.
+ (FIXED_REGISTERS, CALL_USED_REGISTERS, REG_ALLOC_ORDER,
+ reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS,
+ REG_CLASS_FOR_LETTER): Add iwmmxt registers.
+ (SUBTARGET_CONDITIONAL_REGISTER_USAGE): Disable iwmmxt
+ registers unless the iwmmxt target is selected.
+ (FIRST_IWMMXT_GR_REGNUM, LAST_IWMMXT_GR_REGNUM,
+ FIRST_IWMMXT_REGNUM, LAST_IWMMXT_REGNUM, IS_IWMMXT_REGNUM,
+ IS_IWMMXT_GR_REGNUM): Define.
+ (FIRST_PSEUDO_REGISTER): Bump to 63.
+ (struct machine_function): Add sibcall_blocked field.
+ (Struct CUMULATIVE_ARGS): Add iwmmxt_nregs, named_count and
+ nargs fields.
+ (enum arm_builtins): New enum list.
+ * config/arm/arm.md (UNSPEC_WSHUFH, UNSPEC_WACC,
+ UNSPEC_TMOVMSK, UNSPEC_WSAD, UNSPEC_WSADZ, UNSPEC_WMACS,
+ UNSPEC_WMACU, UNSPEC_WMACSZ, UNSPEC_WMACUZ, UNSPEC_CLRDI,
+ UNSPEC_WMADDS, UNSPEC_WMADDU): New unspecs.
+ (VUNSPEC_TMRC, VUNSPEC_TMCR, VUNSPEC_ALIGN8, VUNSPEC_WCMP_EQ,
+ VUNSPEC_WCMP_GTU, VUNSPEC_WCMP_GT): New vunspecs.
+ (movv2si, movv4hi, movv8qi): New expands for vector moves.
+ Include iwmmxt.md.
+ * config/arm/t-xscale-elf (MULTILIB_OPITONS): Add iwmmxt
+ multilib.
+ (MULTILIB_DIRNAMES, MULTILIB_REDUNDANT_DIRS): Likewise.
+ * config/arm/mmintrin.h: New ARM specific header file.
+ * config/arm/iwmmx.md: New iWMMXt specific machine patterns.
+
2003-06-18 J"orn Rennecke <joern.rennecke@superh.com>
* toplev.c (Remaining -d letters summary): Update.
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