+2007-09-21 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/t-sde (TARGET_LIBGCC2_CFLAGS): Delete.
+
+2007-09-20 Nigel Stephens <nigel@mips.com>
+ Chao-ying Fu <fu@mips.com>
+
+ * c-decl.c (finish_declspecs): When _Sat is used without
+ _Fract or _Accum, set the default type to cts_fract.
+ This avoids a warning of "type defaults to int".
+
+2007-09-20 Joseph Myers <joseph@codesourcery.com>
+
+ * c-decl.c (check_bitfield_type_and_width): Don't allow _Bool
+ bit-fields wider than one bit.
+
+2007-09-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/33316
+ * dwarf2out.c (modified_type_die): Handle TYPE_DECL with NULL
+ DECL_NAME.
+ * dbxout.c (dbxout_type): Likewise.
+
+ PR c/33238
+ PR c/27301
+ * gimplify.c (gimplify_vla_decl): New function.
+ (gimplify_decl_expr): Move VLA decl handling to gimplify_vla_decl.
+ Call it.
+ (gimplify_target_expr): Handle variable length TARGET_EXPRs.
+
+2007-09-20 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * doc/invoke.texi (-minterlink-mips16): Document.
+ * config/mips/mips.opt (minterlink-mips16): New option.
+ * config/mips/mips.c (mips_function_ok_for_sibcall): Handle
+ -minterlink-mips16
+
+2007-09-20 Joseph Myers <joseph@codesourcery.com>
+
+ * doc/extend.texi (Attribute Syntax): Remove old speculative
+ future direction.
+
+2007-09-20 Mark Shinwell <shinwell@codesourcery.com>
+
+ * combine.c: Include cgraph.h.
+ (setup_incoming_promotions): Rework to allow more aggressive
+ elimination of sign extensions when all call sites of the
+ current function are known to lie within the current unit.
+
+2007-09-20 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * dse.c (find_shift_sequence): No-op rework of control flow.
+
+2007-09-19 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/mips.c (build_mips16_call_stub): Tidy. Fix second
+ GPR for DCmode on 64-bit targets. Remove redundant fallback.
+
+2007-09-19 Andrew Pinski <andrew_pinski@playstation.sony.com>
+
+ * cfgexpand.c (dump_stack_var_partition): Use the correct
+ index for the offset.
+
+2007-09-19 Joseph Myers <joseph@codesourcery.com>
+
+ * config/mips/sde.h: Switch to GPLv3.
+
+2007-09-19 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-sra.c (decide_block_copy): Decide if there are groups.
+
+2007-09-19 Roman Zippel <zippel@linux-m68k.org>
+
+ * config/m68k/m68k.c (output_move_himode): Remove jump table
+ recognition.
+ config/m68k/m68k.md (lea): Likewise.
+ * config/m68k/m68k.c (print_operand_address): Use simple pc
+ relative addressing.
+
+2007-09-19 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * doc/tm.texi (IS_ASM_LOGICAL_LINE_SEPARATOR): Document new argument.
+ * final.c (IS_ASM_LOGICAL_LINE_SEPARATOR): Provide two-argument default
+ definition.
+ (asm_insn_count): Pass template as second argument to it.
+ * config/avr/avr.h (IS_ASM_LOGICAL_LINE_SEPARATOR): Likewise.
+ * config/pa/pa.h (IS_ASM_LOGICAL_LINE_SEPARATOR): Likewise.
+ * config/stormy16/stormy16.h (IS_ASM_LOGICAL_LINE_SEPARATOR): Likewise.
+ * config/cris/cris.h (IS_ASM_LOGICAL_LINE_SEPARATOR): Likewise.
+ * config/sh/sh.c (IS_ASM_LOGICAL_LINE_SEPARATOR): Likewise.
+ (sh_insn_length_adjustment): Pass template as second argument to it.
+ * config/bfin/bfin.h (IS_ASM_LOGICAL_LINE_SEPARATOR): New macro.
+
+ * config/bfin/bfin.md (define_asm_attributes): New.
+
+2007-09-19 Jie Zhang <jie.zhang@analog.com>
+
+ * config.gcc (bfin*-linux-uclibc*): Add ./linux-sysroot-suffix.h
+ to tm_file.
+ * config/bfin/print-sysroot-suffix.sh: New.
+ * config/bfin/t-bfin-elf (EXTRA_PARTS): Remove.
+ (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES,
+ MULTILIB_EXCEPTIONS): Redefine with new multilibs.
+ * config/bfin/t-bfin-uclinux (EXTRA_PARTS): Remove.
+ (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES,
+ MULTILIB_EXCEPTIONS): Redefine with new multilibs.
+ * config/bfin/t-bfin-linux (EXTRA_PARTS): Remove.
+ (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES,
+ MULTILIB_EXCEPTIONS): Redefine with new multilibs.
+ (linux-sysroot-suffix.h): New target.
+ * config/bfin/bfin.opt (mcsync-anomaly): Use Var instead of Mask.
+ (mspecld-anomaly): Likewise.
+ * config/bfin/bfin-protos.h (enum bfin_cpu_type): Renamed from
+ (enum bfin_cpu): ... this. Add BFIN_CPU_BF522, BFIN_CPU_BF525,
+ BFIN_CPU_BF527, BFIN_CPU_BF538, BFIN_CPU_BF539, BFIN_CPU_BF542,
+ BFIN_CPU_BF544, BFIN_CPU_BF548, and BFIN_CPU_BF549.
+ (bfin_si_revision): Declare.
+ (bfin_workarounds): Declare.
+ (WA_SPECULATIVE_LOADS): Define.
+ (ENABLE_WA_SPECULATIVE_LOADS): Define.
+ (WA_SPECULATIVE_SYNCS): Define.
+ (ENABLE_WA_SPECULATIVE_SYNCS): Define.
+ * config/bfin/elf.h (STARTFILE_SPEC): Rename crt532.o to basiccrt.o.
+ (LIB_SPEC): Add %s to the linker scripts.
+ Use proper linker script for bf522, bf525, bf527,
+ bf538, bf539, bf542, bf544, bf548, and bf549.
+ * config/bfin/bfin.c (bfin_si_revision): Define.
+ (bfin_workarounds): Define.
+ (struct bfin_cpu): New.
+ (bfin_cpus): New.
+ (bfin_handle_option): Handle silicon revision part of -mcpu option.
+ (override_options): Set bfin_workarounds.
+ (length_for_loop): Replace TARGET_CSYNC_ANOMALY with
+ ENABLE_WA_SPECULATIVE_SYNCS, TARGET_SPECLD_ANOMALY with
+ ENABLE_WA_SPECULATIVE_LOADS.
+ (bfin_reorg): Likewise.
+ * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
+ macros for bf522, bf525, bf527, bf538, bf539,
+ bf542, bf544, bf548, and bf549.
+ Define __SILICON_REVISION__ and __WORKAROUND_* macros if needed.
+ Don't define __ID_SHARED_LIB__ when -msep-data.
+ (TARGET_DEFAULT): Define as 0.
+ (DRIVER_SELF_SPECS): Add -mcpu=bf532 if no -mcpu option.
+ * doc/invoke.texi (Blackfin Options): Document silicon
+ revision part of -mcpu option and it now accepts bf522, bf525,
+ bf527, bf538, bf539, bf542, bf544, bf548, and bf549.
+
+2007-09-18 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * alias.c (memory_modified_1): Deconstify.
+ (memory_modified_in_insn_p): Don't use const_note_stores.
+ * rtl.h (const_note_stores): Delete.
+ * rtlanal.c (const_note_stores): Likewise.
+
+2007-09-18 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * dse.c (find_shift_sequence): Temporarily revert to forbidding
+ word shifts.
+
+2007-09-18 Rask Ingemann Lambertsen <rask@sygehus.dk>
+
+ PR target/33388
+ PR target/33397
+ * config/fr30/fr30.md (addsi3): Check REG_P() before calling REGNO().
+ (addsi_small_int): Likewise.
+ (addsi_big_int): Use rtx_equal_p() instead of REGNO() comparison.
+ (one_cmplsi2): Likewise.
+ (negsi2): Delete.
+ (enter_func): Expand insn using hard_frame_pointer_rtx and
+ stack_pointer_rtx.
+ (*enter_func): New.
+ * config/fr30/fr30.c (fr30_expand_prologue): Check for
+ hard_frame_pointer_rtx instead of using REGNO() check.
+ Properly sign extend GEN_INT() argument.
+
+2007-09-18 Roman Zippel <zippel@linux-m68k.org>
+
+ * config/m68k/m68k.c (override_options): Remove USE_GAS,
+ use %. syntax.
+ (output_dbcc_and_branch, output_scc_di): Replace all jbcc
+ alternatives with just jcc.
+ * config/m68k/m68k.md (addsi_lshrsi_31, beq0_di, bne0_di,
+ bge0_di, blt0_di, bgtu, bltu, bgeu, bleu, bgtu_rev,
+ bltu_rev, bgeu_rev, bleu_rev, jump, dbne_hi, dbne_si,
+ dbge_hi, dbge_si): Likewise.
+
+2007-09-18 Roman Zippel <zippel@linux-m68k.org>
+
+ * config/m68k/m68k.md (beq, bne, bgt, blt, bge, ble, bordered,
+ bunordered, buneq, bunge, bungt, bunle, bunlt, bltgt, beq_rev,
+ bne_rev, bgt_rev, blt_rev, bge_rev, ble_rev, bordered_rev,
+ bunordered_rev, buneq_rev, bunge_rev, bungt_rev, bunle_rev,
+ bunlt_rev, bltgt_rev): Replace all fbcc with fjcc.
+
+2007-09-18 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * config/m68k/m68k-devices.def (51qe): New device.
+ * config/m68k/m68k.c (FL_FOR_isa_c): Remove division unit. Add it
+ to all uses of FL_FOR_isa_c for compatibility.
+ (all_microarchs): Add cfv1 microarchitecture.
+ (m68k_handle_option): Handle m51qe option.
+ * config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Handle 51QE.
+ (TUNE_CFV1): New macro.
+ (enum uarch_type): Add ucfv1.
+ * doc/invoke.texi: Document 51qe device and cfv1 microarchitecture.
+
+2007-09-18 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/31863
+ * tree-ssa-structalias.c (create_variable_info_for): Always
+ free the fieldstack.
+
+2007-09-18 Dorit Nuzman <dorit@il.ibm.com>
+
+ * opts.c (decode_options): Enable vectorization under -O3.
+
+2007-09-18 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/33340
+ * tree-ssa-sccvn.c (set_ssa_val_to): Do not set values to
+ SSA_NAMEs that occur in abnormal PHI nodes.
+
+2007-09-17 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * tree-cfg.c (is_ctrl_altering_stmt, tree_block_ends_with_call_p):
+ Don't use const_get_call_expr_in.
+ * tree-gimple.c (const_get_call_expr_in): Delete.
+ * tree-gimple.h (const_get_call_expr_in): Likewise.
+
+2007-09-18 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * df-scan.c (df_notes_rescan): Do nothing if the instruction does
+ not yet have a basic block.
+ * dse.c (find_shift_sequence): Don't set DF_NO_INSN_RESCAN.
+
+2007-09-18 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/mips.c (mips_file_start): Add ".previous" directives
+ to both ".section"s.
+
+2007-09-17 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/mips.c (mips_output_mi_thunk): Use
+ mips_function_ok_for_sibcall and const_call_insn_operand
+ to determine if a direct sibcall is allowed. Use
+ mips_classify_symbol to determine a global pointer is needed.
+
+2007-09-17 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/mips.md (*clear_upper32): Use "W" as the memory operand.
+
+2007-09-17 Chao-ying Fu <fu@mips.com>
+ Nigel Stephens <nigel@mips.com>
+
+ * config/fixed-bit.h: New file.
+ * config/fixed-bit.c: New file.
+ * doc/libgcc.texi (Fixed-point fractional library routines): New node.
+
+2007-09-18 Jakub Jelinek <jakub@redhat.com>
+
+ * c-format.h (format_kind_info): Add alloc_char field.
+ * c-format.c (scanf_flag_specs): Add 'm'.
+ (scanf_flag_pairs): Add 'a', 'm' pair.
+ (scan_char_table): Allow 'm' modifier for c, s, [, C and S.
+ (format_types_orig): Add alloc_char fields.
+ (check_format_info_main): Rename aflag to alloc_flag.
+ Handle fki->alloc_char. modifier after width and before length
+ modifiers. Move FMT_FLAG_SCANF_A_KLUDGE handling before
+ length modifiers as well.
+ * config/sol2-c.c (solaris_format_types): Add alloc_char field.
+
+ PR middle-end/33423
+ * builtins.c (expand_builtin_memory_chk): Handle COMPOUND_EXPRs
+ returned by build_call_expr.
+
+2007-09-17 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-sra.c (maybe_lookup_element_for_expr) <COMPONENT_REF>: Return
+ NULL for variable-sized records too.
+ (sra_walk_expr) <COMPONENT_REF>: Stop at variable-sized records too.
+
+2007-09-17 Tom Tromey <tromey@redhat.com>
+
+ * c-decl.c (pushdecl): Don't set DECL_LANG_SPECIFIC.
+ (c_builtin_function): Likewise.
+ (grokdeclarator): Likewise.
+
+2007-09-17 Zdenek Dvorak <ook@ucw.cz>
+
+ PR rtl-optimization/26449
+ * loop-invariant.c (move_invariant_reg): Do not use force_operand.
+ (seq_insns_valid_p): Removed.
+
+2007-09-17 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-nomudflap.c (gate_mudflap): New static function.
+ (pass_mudflap_1): Use it as gate function.
+ (pass_mudflap_2): Likewise.
+
+2007-09-17 Jan Hubicka <jh@suse.cz>
+
+ PR middle-end/33348
+ PR target/33406
+ * loop-invariant.c (move_invariant_reg): Unshare sequence.
+
+2007-09-17 Victor Kaplansky <victork@il.ibm.com>
+
+ PR tree-optimization/33319
+ * tree-vect-analyze.c (vect_same_range_drs): New.
+ (vect_vfa_range_equal): New.
+ (vect_is_duplicate_ddr): Removed.
+ (vect_mark_for_runtime_alias_test): Do not perform marking when
+ optimizing for size or max_param for alias checking is zero.
+ Move the function before vect_analyze_data_ref_dependence.
+ (vect_analyze_data_ref_dependence): Add call to
+ vect_mark_for_runtime_alias_test in two cases when dependence
+ is not clear.
+ (vect_analyze_data_ref_dependences): Do not call to
+ vect_mark_for_runtime_alias_test.
+ (vect_prune_runtime_alias_test_list): New.
+ (vect_analyze_loop): Add call to vect_prune_runtime_alias_test_list.
+ * tree-vect-transform.c (vect_estimate_min_profitable_iters):
+ Update vec_outside_cost.
+ (vect_vfa_segment_size): More compact code, use TYPE_SIZE_UNIT.
+ (vect_create_cond_for_alias_checks): Build the base address of data
+ reference from DR_GROUP_FIRST_DR.
+ (vect_loop_versioning): New.
+ (vect_transform_loop): Add a call to vect_loop_versioning.
+ Remove factored out code.
+
+2007-09-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ PR middle-end/33273
+ * expr.c (store_expr): Call adjust_address to change mode of dest_mem
+ to BLKmode.
+
+2007-09-16 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * dse.c (find_shift_sequence): Allow word as well as subword shifts.
+ Do the tentative shift expansion with the DF_NO_INSN_RESCAN flag set.
+ Fix the call to insn_rtx_cost. Skip access sizes that require a
+ real truncation of the store register. Use convert_move instead
+ of gen_lowpart when narrowing the result.
+ (replace_read): Use convert_move instead of gen_lowpart when
+ narrowing the store rhs.
+
+2007-09-16 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/mips.md (SHORT): Fix long line.
+ (SUBDI): New mode iterator. Extend the shift-and-truncate insns
+ to QImode and HImode.
+
+2007-09-16 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/mips.h (POINTERS_EXTEND_UNSIGNED): Define.
+
+2007-09-15 Zdenek Dvorak <ook@ucw.cz>
+
+ * tree-parloops.c: New file.
+ * tree-ssa-operands.h (free_stmt_operands): Declare.
+ * tree-ssa-loop-manip.c (split_loop_exit_edge): Return the new basic
+ block.
+ * tree-pass.h (pass_parallelize_loops): Declare.
+ * omp-low.c (expand_omp_parallel, expand_omp_for): Update SSA form for
+ virtual operands.
+ (build_omp_regions_1): Allow analysing just a single OMP region and
+ its subregions.
+ ( build_omp_regions_root, omp_expand_local): New functions.
+ (build_omp_regions): Add argument to build_omp_regions_1 call.
+ * builtins.def (DEF_GOMP_BUILTIN): Initialize OMP builtins when
+ autoparallelization is run.
+ * timevar.def (TV_TREE_PARALLELIZE_LOOPS): New.
+ * tree-ssa-loop.c (gate_tree_parallelize_loops, tree_parallelize_loops,
+ pass_parallelize_loops): New.
+ * common.opt (ftree-parallelize-loops): New.
+ * tree-flow.h (omp_expand_local, tree_duplicate_sese_tail,
+ parallelize_loops): Declare.
+ (add_phi_args_after_copy, split_loop_exit_edge): Declaration changed.
+ * Makefile.in (tree-parloops.o): Added.
+ * tree-cfg.c (add_phi_args_after_copy_edge, tree_duplicate_sese_tail):
+ New functions.
+ (add_phi_args_after_copy_bb): Use add_phi_args_after_copy_edge.
+ (add_phi_args_after_copy): Call add_phi_args_after_copy_edge for
+ one extra edge as well.
+ (tree_duplicate_sese_region): Add argument to add_phi_args_after_copy.
+ Use VEC_free to free doms vector.
+ (move_block_to_fn): Update loop info. Remove phi nodes for virtual
+ operands. Recompute operand caches in the new function.
+ (move_sese_region_to_fn): Update loop info.
+ * passes.c (init_optimization_passes): Add pass_parallelize_loops.
+ * tree-ssa-operands.c (free_stmt_operands): New function.
+
+ * doc/passes.texi: Document autoparallelization.
+ * doc/invoke.texi (-ftree-parallelize-loops): New option.
+
+2007-09-15 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ PR target/33062
+ * pa.c (function_value): Use GET_MODE_BITSIZE instead of TYPE_PRECISION.
+
+2007-09-15 Dorit Nuzman <dorit@il.ibm.com>
+
+ * tree-vect-transform.c (vect_get_vec_defs_for_stmt_copy): check if
+ the VEC is not NULL.
+ (vectorizable_type_demotion, vectorizable_type_promotion): Check that
+ get_vectype_for_scalar_type succeeded.
+ (vectorizable_conversion): Likewise.
+
+2007-09-14 Jan Hubicka <jh@suse.cz>
+
+ * config/i386/i386.md (*floatdi<mode>2_i387): Guard against
+ TARGET_64BIT.
+
+2007-09-14 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/33438
+ * config/i386/i386.md (fmodxf3): Copy operands[2] to temporary register
+ when operands[2] equals operands[1].
+ (remainderxf3): Ditto.
+
+2007-09-14 Sandra Loosemore <sandra@codesourcery.com>
+ Nigel Stephens <nigel@mips.com>
+
+ * doc/tm.texi (LIBGCC2_UNWIND_ATTRIBUTE): Document.
+ * unwind-generic.h (LIBGCC2_UNWIND_ATTRIBUTE): Define.
+ (_Unwind_RaiseException): Add LIBGCC2_UNWIND_ATTRIBUTE to
+ declaration.
+ (_Unwind_ForcedUnwind): Likewise.
+ (_Unwind_Resume): Likewise.
+ (_Unwind_Resume_or_Rethrow): Likewise.
+ (_Unwind_Backtrace): Likewise.
+ (_Unwind_SjLj_RaiseException): Likewise.
+ (_Unwind_SjLj_ForcedUnwind): Likewise.
+ (_Unwind_SjLj_Resume): Likewise.
+ (_Unwind_SjLj_Resume_or_Rethrow): Likewise.
+ * unwind.inc (_Unwind_RaiseException): Add LIBGCC2_UNWIND_ATTRIBUTE
+ to definition.
+ (_Unwind_ForcedUnwind): Likewise.
+ (_Unwind_Resume): Likewise.
+ (_Unwind_Resume_or_Rethrow): Likewise.
+ (_Unwind_Backtrace): Likewise.
+ * unwind-compat.c (_Unwind_Backtrace): Likewise.
+ (_Unwind_ForcedUnwind): Likewise.
+ (_Unwind_RaiseException): Likewise.
+ (_Unwind_Resume): Likewise.
+ (_Unwind_Resume_or_Rethrow): Likewise.
+
+ * config/mips/mips.h (LIBGCC2_UNWIND_ATTRIBUTE): Define to force
+ nomips16 mode when IN_LIBGCC2 with hard float.
+
+2007-09-14 Richard Sandiford <rsandifo@nildram.co.uk>
+
+ * config/mips/sdemtk.opt: Update to GPLv3.
+ * config/mips/sdemtk.h: Likewise.
+
+2007-09-14 Nigel Stephens <nigel@mips.com>
+
+ * config.gcc (mips*-*-linux*): Recognise mipsisa32r2 and set
+ MIPS_ISA_DEFAULT appropriately. Don't make soft-float the default
+ for mipsisa32-*-linux*.
+
+2007-09-14 Nigel Stephens <nigel@mips.com>
+ David Ung <davidu@mips.com>
+ Thiemo Seufer <ths@mips.com>
+ Richard Sandiford <richard@codesourcery.com>
+
+ * config.gcc (mips*-sde-elf*): Add support for the SDE C libraries.
+ * configure.ac: Add a mipssde threading type.
+ * configure: Regenerate.
+ * config/mips/sdemtk.h: New file.
+ * config/mips/t-sdemtk: Likewise.
+ * config/mips/sdemtk.opt: Likewise.
+ * gthr-mipssde.h: Likewise.
+ * config/mips/sde.h (FUNCTION_PROFILER): Move to config/mips/sdemtk.h.
+ * config/mips/mips.h (MIPS_SAVE_REG_FOR_PROFILING_P): New macro.
+ (MIPS_ICACHE_SYNC): New macro, split from ...
+ * config/mips/mips.md (clear_cache): ...here.
+ * config/mips/mips.c (mips_save_reg_p): Check
+ MIPS_SAVE_REG_FOR_PROFILING_P on profiled functions.
+ (build_mips16_function_stub): Use targetm.strip_name_encoding.
+ (build_mips16_call_stub): Likewise.
+
+2007-09-14 Richard Sandiford <richard@codesourcery.com>
+
+ * Makefile.in (stmp-int-hdrs): Depend on fixinc_list.
+
+2007-09-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/32337
+ * config/ia64/ia64.c (find_gr_spill): Don't decrement
+ current_frame_info.n_local_regs. Don't return emitted local
+ regs.
+ (ia64_compute_frame_size): Improve unwind hack to put
+ RP, PFS, FP in that order by allowing some of the registers
+ been already emitted, as long as they are emitted to the
+ desired register.
+
+2007-09-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
+ * config/spu/vmx2spu.h (vec_extract, vec_insert, vec_lvlx,
+ vec_lvlxl, vec_lvrx, vec_lvrxl, vec_promote, vec_splats,
+ vec_stvlx, vec_stvlxl, vec_stvrx, vec_stvrxl): New intrinsics.
+
+2007-09-13 Eric Christopher <echristo@apple.com>
+ Kenneth Zadeck <zadeck@naturalbridge.com>
+
+ * dse.c (find_shift_sequence): New function.
+ (replace_read): Add case to remove read if it requires shift.
+ * config/i386/i386.c (ix86_expand_prologue): Fixed typo in comment.
+
+2007-09-13 Tom Tromey <tromey@redhat.com>
+
+ * c-common.c (fname_as_string): Update.
+ * c-parser.c (c_parser) <lex_untranslated_string>: New field.
+ (c_lex_one_token): Update. Add 'parser' argument.
+ (c_parser_simple_asm_expr): Update.
+ (c_parser_attributes): Update.
+ (c_parser_asm_statement): Update.
+ (c_parser_asm_operands): Update.
+ (c_parser_peek_token): Update.
+ (c_parser_peek_2nd_token): Update.
+ * c-lex.c (c_lex_string_translate): Remove.
+ (c_lex_return_raw_strings): Likewise.
+ (c_lex_with_flags): Added 'lex_flags' argument.
+ (lex_string): Added 'translate' argument.
+ * c-pragma.h (c_lex_with_flags): Update.
+ (c_lex_string_translate, c_lex_return_raw_strings): Remove.
+ (C_LEX_STRING_NO_TRANSLATE): New define.
+ (C_LEX_RAW_STRINGS): Likewise.
+
+2007-09-13 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ From Jie Zhang:
+ * config/bfin/bfin.c (enum bfin_builtins): Add BFIN_BUILTIN_ONES,
+ BFIN_BUILTIN_CPLX_MUL_16_S40, BFIN_BUILTIN_CPLX_MAC_16_S40,
+ BFIN_BUILTIN_CPLX_MSU_16_S40, and BFIN_BUILTIN_CPLX_SQU.
+ (bfin_init_builtins): Initialize __builtin_bfin_ones,
+ __builtin_bfin_min_fr1x16, __builtin_bfin_max_fr1x16,
+ __builtin_bfin_min_fr1x32, __builtin_bfin_max_fr1x32,
+ __builtin_bfin_cmplx_add, __builtin_bfin_cmplx_sub,
+ __builtin_bfin_cmplx_mul_s40, __builtin_bfin_cmplx_mac_s40,
+ __builtin_bfin_cmplx_msu_s40 and __builtin_bfin_csqu_fr16.
+ (bdesc_1arg): Add __builtin_bfin_ones.
+ (bfin_expand_builtin): Expand __builtin_bfin_cmplx_mul_s40,
+ __builtin_bfin_cmplx_mac_s40, __builtin_bfin_cmplx_msu_s40,
+ and __builtin_bfin_csqu_fr16.
+ * config/bfin/bfin.md (UNSPEC_ONES): New constant.
+ (ones): New define_insn.
+ (ssaddhi3_parts): New define_insn.
+ (sssubhi3_parts): New define_insn.
+ (flag_mulhi_parts): New define_insn.
+
+2007-09-13 Seongbae Park <seongbae.park@gmail.com>
+
+ * common.opt (femit-class-debug-always): Turn off by default.
+
+2007-09-13 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin/bfin.md (reload_outpdi, reload_inpdi): New patterns.
+ * config/bfin/bfin.c (bfin_secondary_reload): Make sure we use them.
+
+2007-09-13 James E. Wilson <wilson@specifix.com>
+
+ PR tree-optimization/33389
+ * tree-ssa-operands.c (append_vuse): If ann->in_vdef_list true,
+ then set build_loads before returning.
+
+2007-09-13 Sandra Loosemore <sandra@codesourcery.com>
+ David Ung <davidu@mips.com>
+
+ * config/mips/mips.h (ASM_OUTPUT_REG_PUSH): Replace {d}subu with
+ {d}addiu and a negative immediate such that it works with MIPS16
+ instructions.
+
+2007-09-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR bootstrap/33418
+ * configure.ac (ld_vers): Support Linux linker.
+ * configure: Regenerated.
+
+2007-09-13 Richard Sandiford <richard@codesourcery.com>
+ Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/mips/mips.h (SYMBOL_FLAG_MIPS16_FUNC): Delete.
+ (SYMBOL_REF_MIPS16_FUNC_P): Delete.
+ * config/mips/mips.c (mips_attribute_table): Turn mips16 and
+ nomips16 into decl attributes.
+ (TARGET_INSERT_ATTRIBUTES): Override.
+ (TARGET_MERGE_DECL_ATTRIBUTES): Likewise.
+ (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Always return true.
+ (mips_mips16_type_p, mips_nomips16_type_p): Delete in favor of...
+ (mips_mips16_decl_p, mips_nomips16_decl_p): ...these new functions.
+ (mips_comp_type_attributes): Remove mips16 and nomips16 handling.
+ (mips_use_mips16_mode_p): Reimplement as a function that takes
+ a decl and considers only decl attributes. If the decl is nested
+ function, use its parent attributes.
+ (mips_function_ok_for_sibcall): Use mips_use_mips16_mode_p
+ instead of SYMBOL_REF_MIPS16_FUNC_P.
+ (mips_set_mips16_mode): Move call to sorry here from old
+ mips_use_mips16_mode_p.
+ (mflip_mips16_entry): New structure.
+ (mflip_mips16_htab): New variable.
+ (mflip_mips16_htab_hash, mflip_mips16_htab_eq): New functions.
+ (mflip_mips16_use_mips16_p, mips_insert_attributes): Likewise.
+ (mips_merge_decl_attributes): New function.
+ (mips_set_current_function): Reinstate call to mips_set_mips16_mode.
+ Use mips_use_mips16_mode_p.
+ (mips_output_mi_thunk): Use mips_use_mips16_mode_p instead of
+ SYMBOL_REF_MIPS16_FUNC_P.
+ (mips_encode_section_info): Don't set SYMBOL_FLAG_MIPS16_FUNC.
+
+2007-09-13 Richard Sandiford <richard@codesourcery.com>
+
+ * c-parser.c (c_parser_struct_declaration): Check for a null return.
+
+2007-09-13 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ PR driver/33309
+ * gcc.c (xputenv): Make argument const, and use CONST_CAST.
+
+2007-09-12 Michael Meissner <michael.meissner@amd.com>
+ Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+ Tony Linthicum <tony.linthicum@amd.com>
+
+ * tree.h (function_args_iterator): New type to iterate over
+ function arguments.
+ (FOREACH_FUNCTION_ARGS_PTR): Iterator macros for iterating over
+ function arguments providing a pointer to the argument.
+ (FOREACH_FUNCTION_ARGS): Iterator macros for iterating over
+ function arguments providing the argument.
+ (function_args_iter_init): Inline function to initialize
+ function_args_iterator.
+ (function_args_iter_cond_ptr): Inline function to return the next
+ pointer to hold the argument.
+ (function_args_iter_cond): Inline function to return the next
+ argument.
+ (function_args_iter_cond_next): Advance the function args
+ iterator.
+ (stdarg_p): New function, return true if variable argument
+ function.
+ (prototype_p): New function, return true if function is
+ prototyped.
+ (function_args_count): New function, count the number of arguments
+ of a function.
+
+ * tree.c (stdarg_p): New function, return true if variable
+ argument function.
+ (prototype_p): New function, return true if function is
+ prototyped.
+
+ * config/i386/i386.h (TARGET_SSE5): New macro for SSE5.
+ (TARGET_ROUND): New macro for the round/ptest instructions which
+ are shared between SSE4.1 and SSE5.
+ (OPTION_MASK_ISA_ROUND): Ditto.
+ (OPTION_ISA_ROUND): Ditto.
+ (TARGET_FUSED_MADD): New macro for -mfused-madd swtich.
+ (TARGET_CPU_CPP_BUILTINS): Add SSE5 support.
+
+ * config/i386/i386.opt (-msse5): New switch for SSE5 support.
+ (-mfused-madd): New switch to give users control over whether the
+ compiler optimizes to use the multiply/add SSE5 instructions.
+
+ * config/i386/i386.c (m_AMD_MULTIPLE): Rename from
+ m_ATHLON_K8_AMDFAM10, and change all uses.
+ (enum pta_flags): Add PTA_SSE5.
+ (ix86_handle_option): Turn off 3dnow if -msse5.
+ (override_options): Add SSE5 support.
+ (print_operand): %Y prints comparison codes for SSE5 com/pcom
+ instructions.
+ (ix86_expand_sse_movcc): Add SSE5 support.
+ (ix86_expand_sse5_unpack): New function to use pperm to unpack a
+ vector type to the next largest size.
+ (ix86_expand_sse5_pack): New function to use pperm to pack a
+ vector type to the next smallest size.
+ (IX86_BUILTIN_FMADDSS): New for SSE5 intrinsic.
+ (IX86_BUILTIN_FMADDSD): Ditto.
+ (IX86_BUILTIN_FMADDPS): Ditto.
+ (IX86_BUILTIN_FMADDPD): Ditto.
+ (IX86_BUILTIN_FMSUBSS): Ditto.
+ (IX86_BUILTIN_FMSUBSD): Ditto.
+ (IX86_BUILTIN_FMSUBPS): Ditto.
+ (IX86_BUILTIN_FMSUBPD): Ditto.
+ (IX86_BUILTIN_FNMADDSS): Ditto.
+ (IX86_BUILTIN_FNMADDSD): Ditto.
+ (IX86_BUILTIN_FNMADDPS): Ditto.
+ (IX86_BUILTIN_FNMADDPD): Ditto.
+ (IX86_BUILTIN_FNMSUBSS): Ditto.
+ (IX86_BUILTIN_FNMSUBSD): Ditto.
+ (IX86_BUILTIN_FNMSUBPS): Ditto.
+ (IX86_BUILTIN_FNMSUBPD): Ditto.
+ (IX86_BUILTIN_PCMOV_V2DI): Ditto.
+ (IX86_BUILTIN_PCMOV_V4SI): Ditto.
+ (IX86_BUILTIN_PCMOV_V8HI): Ditto.
+ (IX86_BUILTIN_PCMOV_V16QI): Ditto.
+ (IX86_BUILTIN_PCMOV_V4SF): Ditto.
+ (IX86_BUILTIN_PCMOV_V2DF): Ditto.
+ (IX86_BUILTIN_PPERM): Ditto.
+ (IX86_BUILTIN_PERMPS): Ditto.
+ (IX86_BUILTIN_PERMPD): Ditto.
+ (IX86_BUILTIN_PMACSSWW): Ditto.
+ (IX86_BUILTIN_PMACSWW): Ditto.
+ (IX86_BUILTIN_PMACSSWD): Ditto.
+ (IX86_BUILTIN_PMACSWD): Ditto.
+ (IX86_BUILTIN_PMACSSDD): Ditto.
+ (IX86_BUILTIN_PMACSDD): Ditto.
+ (IX86_BUILTIN_PMACSSDQL): Ditto.
+ (IX86_BUILTIN_PMACSSDQH): Ditto.
+ (IX86_BUILTIN_PMACSDQL): Ditto.
+ (IX86_BUILTIN_PMACSDQH): Ditto.
+ (IX86_BUILTIN_PMADCSSWD): Ditto.
+ (IX86_BUILTIN_PMADCSWD): Ditto.
+ (IX86_BUILTIN_PHADDBW): Ditto.
+ (IX86_BUILTIN_PHADDBD): Ditto.
+ (IX86_BUILTIN_PHADDBQ): Ditto.
+ (IX86_BUILTIN_PHADDWD): Ditto.
+ (IX86_BUILTIN_PHADDWQ): Ditto.
+ (IX86_BUILTIN_PHADDDQ): Ditto.
+ (IX86_BUILTIN_PHADDUBW): Ditto.
+ (IX86_BUILTIN_PHADDUBD): Ditto.
+ (IX86_BUILTIN_PHADDUBQ): Ditto.
+ (IX86_BUILTIN_PHADDUWD): Ditto.
+ (IX86_BUILTIN_PHADDUWQ): Ditto.
+ (IX86_BUILTIN_PHADDUDQ): Ditto.
+ (IX86_BUILTIN_PHSUBBW): Ditto.
+ (IX86_BUILTIN_PHSUBWD): Ditto.
+ (IX86_BUILTIN_PHSUBDQ): Ditto.
+ (IX86_BUILTIN_PROTB): Ditto.
+ (IX86_BUILTIN_PROTW): Ditto.
+ (IX86_BUILTIN_PROTD): Ditto.
+ (IX86_BUILTIN_PROTQ): Ditto.
+ (IX86_BUILTIN_PROTB_IMM): Ditto.
+ (IX86_BUILTIN_PROTW_IMM): Ditto.
+ (IX86_BUILTIN_PROTD_IMM): Ditto.
+ (IX86_BUILTIN_PROTQ_IMM): Ditto.
+ (IX86_BUILTIN_PSHLB): Ditto.
+ (IX86_BUILTIN_PSHLW): Ditto.
+ (IX86_BUILTIN_PSHLD): Ditto.
+ (IX86_BUILTIN_PSHLQ): Ditto.
+ (IX86_BUILTIN_PSHAB): Ditto.
+ (IX86_BUILTIN_PSHAW): Ditto.
+ (IX86_BUILTIN_PSHAD): Ditto.
+ (IX86_BUILTIN_PSHAQ): Ditto.
+ (IX86_BUILTIN_FRCZSS): Ditto.
+ (IX86_BUILTIN_FRCZSD): Ditto.
+ (IX86_BUILTIN_FRCZPS): Ditto.
+ (IX86_BUILTIN_FRCZPD): Ditto.
+ (IX86_BUILTIN_CVTPH2PS): Ditto.
+ (IX86_BUILTIN_CVTPS2PH): Ditto.
+ (IX86_BUILTIN_COMEQSS): Ditto.
+ (IX86_BUILTIN_COMNESS): Ditto.
+ (IX86_BUILTIN_COMLTSS): Ditto.
+ (IX86_BUILTIN_COMLESS): Ditto.
+ (IX86_BUILTIN_COMGTSS): Ditto.
+ (IX86_BUILTIN_COMGESS): Ditto.
+ (IX86_BUILTIN_COMUEQSS): Ditto.
+ (IX86_BUILTIN_COMUNESS): Ditto.
+ (IX86_BUILTIN_COMULTSS): Ditto.
+ (IX86_BUILTIN_COMULESS): Ditto.
+ (IX86_BUILTIN_COMUGTSS): Ditto.
+ (IX86_BUILTIN_COMUGESS): Ditto.
+ (IX86_BUILTIN_COMORDSS): Ditto.
+ (IX86_BUILTIN_COMUNORDSS): Ditto.
+ (IX86_BUILTIN_COMFALSESS): Ditto.
+ (IX86_BUILTIN_COMTRUESS): Ditto.
+ (IX86_BUILTIN_COMEQSD): Ditto.
+ (IX86_BUILTIN_COMNESD): Ditto.
+ (IX86_BUILTIN_COMLTSD): Ditto.
+ (IX86_BUILTIN_COMLESD): Ditto.
+ (IX86_BUILTIN_COMGTSD): Ditto.
+ (IX86_BUILTIN_COMGESD): Ditto.
+ (IX86_BUILTIN_COMUEQSD): Ditto.
+ (IX86_BUILTIN_COMUNESD): Ditto.
+ (IX86_BUILTIN_COMULTSD): Ditto.
+ (IX86_BUILTIN_COMULESD): Ditto.
+ (IX86_BUILTIN_COMUGTSD): Ditto.
+ (IX86_BUILTIN_COMUGESD): Ditto.
+ (IX86_BUILTIN_COMORDSD): Ditto.
+ (IX86_BUILTIN_COMUNORDSD): Ditto.
+ (IX86_BUILTIN_COMFALSESD): Ditto.
+ (IX86_BUILTIN_COMTRUESD): Ditto.
+ (IX86_BUILTIN_COMEQPS): Ditto.
+ (IX86_BUILTIN_COMNEPS): Ditto.
+ (IX86_BUILTIN_COMLTPS): Ditto.
+ (IX86_BUILTIN_COMLEPS): Ditto.
+ (IX86_BUILTIN_COMGTPS): Ditto.
+ (IX86_BUILTIN_COMGEPS): Ditto.
+ (IX86_BUILTIN_COMUEQPS): Ditto.
+ (IX86_BUILTIN_COMUNEPS): Ditto.
+ (IX86_BUILTIN_COMULTPS): Ditto.
+ (IX86_BUILTIN_COMULEPS): Ditto.
+ (IX86_BUILTIN_COMUGTPS): Ditto.
+ (IX86_BUILTIN_COMUGEPS): Ditto.
+ (IX86_BUILTIN_COMORDPS): Ditto.
+ (IX86_BUILTIN_COMUNORDPS): Ditto.
+ (IX86_BUILTIN_COMFALSEPS): Ditto.
+ (IX86_BUILTIN_COMTRUEPS): Ditto.
+ (IX86_BUILTIN_COMEQPD): Ditto.
+ (IX86_BUILTIN_COMNEPD): Ditto.
+ (IX86_BUILTIN_COMLTPD): Ditto.
+ (IX86_BUILTIN_COMLEPD): Ditto.
+ (IX86_BUILTIN_COMGTPD): Ditto.
+ (IX86_BUILTIN_COMGEPD): Ditto.
+ (IX86_BUILTIN_COMUEQPD): Ditto.
+ (IX86_BUILTIN_COMUNEPD): Ditto.
+ (IX86_BUILTIN_COMULTPD): Ditto.
+ (IX86_BUILTIN_COMULEPD): Ditto.
+ (IX86_BUILTIN_COMUGTPD): Ditto.
+ (IX86_BUILTIN_COMUGEPD): Ditto.
+ (IX86_BUILTIN_COMORDPD): Ditto.
+ (IX86_BUILTIN_COMUNORDPD): Ditto.
+ (IX86_BUILTIN_COMFALSEPD): Ditto.
+ (IX86_BUILTIN_COMTRUEPD): Ditto.
+ (IX86_BUILTIN_PCOMEQUB): Ditto.
+ (IX86_BUILTIN_PCOMNEUB): Ditto.
+ (IX86_BUILTIN_PCOMLTUB): Ditto.
+ (IX86_BUILTIN_PCOMLEUB): Ditto.
+ (IX86_BUILTIN_PCOMGTUB): Ditto.
+ (IX86_BUILTIN_PCOMGEUB): Ditto.
+ (IX86_BUILTIN_PCOMFALSEUB): Ditto.
+ (IX86_BUILTIN_PCOMTRUEUB): Ditto.
+ (IX86_BUILTIN_PCOMEQUW): Ditto.
+ (IX86_BUILTIN_PCOMNEUW): Ditto.
+ (IX86_BUILTIN_PCOMLTUW): Ditto.
+ (IX86_BUILTIN_PCOMLEUW): Ditto.
+ (IX86_BUILTIN_PCOMGTUW): Ditto.
+ (IX86_BUILTIN_PCOMGEUW): Ditto.
+ (IX86_BUILTIN_PCOMFALSEUW): Ditto.
+ (IX86_BUILTIN_PCOMTRUEUW): Ditto.
+ (IX86_BUILTIN_PCOMEQUD): Ditto.
+ (IX86_BUILTIN_PCOMNEUD): Ditto.
+ (IX86_BUILTIN_PCOMLTUD): Ditto.
+ (IX86_BUILTIN_PCOMLEUD): Ditto.
+ (IX86_BUILTIN_PCOMGTUD): Ditto.
+ (IX86_BUILTIN_PCOMGEUD): Ditto.
+ (IX86_BUILTIN_PCOMFALSEUD): Ditto.
+ (IX86_BUILTIN_PCOMTRUEUD): Ditto.
+ (IX86_BUILTIN_PCOMEQUQ): Ditto.
+ (IX86_BUILTIN_PCOMNEUQ): Ditto.
+ (IX86_BUILTIN_PCOMLTUQ): Ditto.
+ (IX86_BUILTIN_PCOMLEUQ): Ditto.
+ (IX86_BUILTIN_PCOMGTUQ): Ditto.
+ (IX86_BUILTIN_PCOMGEUQ): Ditto.
+ (IX86_BUILTIN_PCOMFALSEUQ): Ditto.
+ (IX86_BUILTIN_PCOMTRUEUQ): Ditto.
+ (IX86_BUILTIN_PCOMEQB): Ditto.
+ (IX86_BUILTIN_PCOMNEB): Ditto.
+ (IX86_BUILTIN_PCOMLTB): Ditto.
+ (IX86_BUILTIN_PCOMLEB): Ditto.
+ (IX86_BUILTIN_PCOMGTB): Ditto.
+ (IX86_BUILTIN_PCOMGEB): Ditto.
+ (IX86_BUILTIN_PCOMFALSEB): Ditto.
+ (IX86_BUILTIN_PCOMTRUEB): Ditto.
+ (IX86_BUILTIN_PCOMEQW): Ditto.
+ (IX86_BUILTIN_PCOMNEW): Ditto.
+ (IX86_BUILTIN_PCOMLTW): Ditto.
+ (IX86_BUILTIN_PCOMLEW): Ditto.
+ (IX86_BUILTIN_PCOMGTW): Ditto.
+ (IX86_BUILTIN_PCOMGEW): Ditto.
+ (IX86_BUILTIN_PCOMFALSEW): Ditto.
+ (IX86_BUILTIN_PCOMTRUEW): Ditto.
+ (IX86_BUILTIN_PCOMEQD): Ditto.
+ (IX86_BUILTIN_PCOMNED): Ditto.
+ (IX86_BUILTIN_PCOMLTD): Ditto.
+ (IX86_BUILTIN_PCOMLED): Ditto.
+ (IX86_BUILTIN_PCOMGTD): Ditto.
+ (IX86_BUILTIN_PCOMGED): Ditto.
+ (IX86_BUILTIN_PCOMFALSED): Ditto.
+ (IX86_BUILTIN_PCOMTRUED): Ditto.
+ (IX86_BUILTIN_PCOMEQQ): Ditto.
+ (IX86_BUILTIN_PCOMNEQ): Ditto.
+ (IX86_BUILTIN_PCOMLTQ): Ditto.
+ (IX86_BUILTIN_PCOMLEQ): Ditto.
+ (IX86_BUILTIN_PCOMGTQ): Ditto.
+ (IX86_BUILTIN_PCOMGEQ): Ditto.
+ (IX86_BUILTIN_PCOMFALSEQ): Ditto.
+ (IX86_BUILTIN_PCOMTRUEQ): Ditto.
+ (bdesc_ptest): Change OPTION_MASK_ISA_SSE4_1 to
+ OPTION_MASK_ISA_ROUND for instructions that are shared between
+ SSE4.1 and SSE5.
+ (bdesc_2arg): Ditto.
+ (bdesc_sse_3arg): Ditto.
+ (enum multi_arg_type): New enum for describing the various SSE5
+ intrinsic argument types.
+ (bdesc_multi_arg): New table for SSE5 intrinsics.
+ (ix86_init_mmx_sse_builtins): Add SSE5 intrinsic support.
+ (ix86_expand_multi_arg_builtin): New function for creating SSE5
+ intrinsics.
+ (ix86_expand_builtin): Add SSE5 intrinsic support.
+ (ix86_sse5_valid_op_p): New function to validate SSE5 3 and 4
+ operand instructions.
+ (ix86_expand_sse5_multiple_memory): New function to split the
+ second memory reference from SSE5 instructions.
+ (type_has_variadic_args_p): Delete in favor of stdarg_p.
+ (ix86_return_pops_args): Use stdarg_p to determine if the function
+ has variable arguments.
+ (ix86_setup_incoming_varargs): Ditto.
+ (x86_this_parameter): Ditto.
+
+ * config/i386/i386-protos.h (ix86_expand_sse5_unpack): Add
+ declaration.
+ (ix86_expand_sse5_pack): Ditto.
+ (ix86_sse5_valid_op_p): Ditto.
+ (ix86_expand_sse5_multiple_memory): Ditto.
+
+ * config/i386/i386.md (UNSPEC_SSE5_INTRINSIC): Add new UNSPEC
+ constant for SSE5 support.
+ (UNSPEC_SSE5_UNSIGNED_CMP): Ditto.
+ (UNSPEC_SSE5_TRUEFALSE): Ditto.
+ (UNSPEC_SSE5_PERMUTE): Ditto.
+ (UNSPEC_SSE5_ASHIFT): Ditto.
+ (UNSPEC_SSE5_LSHIFT): Ditto.
+ (UNSPEC_FRCZ): Ditto.
+ (UNSPEC_CVTPH2PS): Ditto.
+ (UNSPEC_CVTPS2PH): Ditto.
+ (PCOM_FALSE): Add new constant for true/false SSE5 comparisons.
+ (PCOM_TRUE): Ditto.
+ (COM_FALSE_S): Ditto.
+ (COM_FALSE_P): Ditto.
+ (COM_TRUE_S): Ditto.
+ (COM_TRUE_P): Ditto.
+ (type attribute): Add ssemuladd, sseiadd1, ssecvt1, sse4arg types.
+ (unit attribute): Add support for ssemuladd, ssecvt1, sseiadd1 sse4arg
+ types.
+ (memory attribute): Ditto.
+ (sse4_1_round<mode>2): Use TARGET_ROUND instead of TARGET_SSE4_1.
+ Use SSE4_1_ROUND_* constants instead of hard coded numbers.
+ (rint<mode>2): Use TARGET_ROUND instead of TARGET_SSE4_1.
+ (floor<mode>2): Ditto.
+ (ceil<mode>2): Ditto.
+ (btrunc<mode>2): Ditto.
+ (nearbyintdf2): Ditto.
+ (nearbyintsf2): Ditto.
+ (sse_setccsf): Disable if SSE5.
+ (sse_setccdf): Ditto.
+ (sse5_setcc<mode>): New support for SSE5 conditional move.
+ (sse5_pcmov_<mode>): Ditto.
+
+ * config/i386/sse.md (SSEMODE1248): New mode iterator for SSE5.
+ (SSEMODEF4): Ditto.
+ (SSEMODEF2P): Ditto.
+ (ssemodesuffixf4): New mode attribute for SSE5.
+ (ssemodesuffixf2s): Ditto.
+ (ssemodesuffixf2c): Ditto.
+ (sserotatemax): Ditto.
+ (ssescalarmode): Ditto.
+ (sse_maskcmpv4sf3): Disable if SSE5.
+ (sse_maskcmpv2df3): Ditto.
+ (sse_vmmaskcmpv4sf3): Ditto.
+ (sse5_fmadd<mode>4): Add SSE5 floating point multiply/add
+ instructions.
+ (sse5_vmfmadd<mode>4): Ditto.
+ (sse5_fmsub<mode>4): Ditto.
+ (sse5_vmfmsub<mode>4): Ditto.
+ (sse5_fnmadd<mode>4): Ditto.
+ (sse5_vmfnmadd<mode>4): Ditto.
+ (sse5_fnmsub<mode>4): Ditto.
+ (sse5_vmfnmsub<mode>4): Ditto.
+ (sse5i_fmadd<mode>4): Ditto.
+ (sse5i_fmsub<mode>4): Ditto.
+ (sse5i_fnmadd<mode>4): Ditto.
+ (sse5i_fnmsub<mode>4): Ditto.
+ (sse5i_vmfmadd<mode>4): Ditto.
+ (sse5i_vmfmsub<mode>4): Ditto.
+ (sse5i_vmfnmadd<mode>4): Ditto.
+ (sse5i_vmfnmsub<mode>4): Ditto.
+ (mulv16qi3): Add SSE5 support.
+ (mulv4si3): Ditto.
+ (sse5_mulv4si3): New insn for 32-bit multiply support on SSE5.
+ (sse2_mulv4si3): Disable if SSE5.
+ (sse4_1_roundpd): Use TARGET_ROUND instead of TARGET_SSE4_1.
+ (sse4_1_roundps): Ditto.
+ (sse4_1_roundsd): Ditto.
+ (sse4_1_roundss): Ditto.
+ (sse_maskcmpv4sf3): Disable if SSE5 so the SSE5 instruction will
+ be generated.
+ (sse_maskcmpsf3): Ditto.
+ (sse_vmmaskcmpv4sf3): Ditto.
+ (sse2_maskcmpv2df3): Ditto.
+ (sse2_maskcmpdf3): Ditto.
+ (sse2_vmmaskcmpv2df3): Ditto.
+ (sse2_eq<mode>3): Ditto.
+ (sse2_gt<mode>3): Ditto.
+ (sse5_pcmov_<mode>): Add SSE5 support.
+ (vec_unpacku_hi_v16qi): Ditto.
+ (vec_unpacks_hi_v16qi): Ditto.
+ (vec_unpacku_lo_v16qi): Ditto.
+ (vec_unpacks_lo_v16qi): Ditto.
+ (vec_unpacku_hi_v8hi): Ditto.
+ (vec_unpacks_hi_v8hi): Ditto.
+ (vec_unpacku_lo_v8hi): Ditto.
+ (vec_unpacks_lo_v8hi): Ditto.
+ (vec_unpacku_hi_v4si): Ditto.
+ (vec_unpacks_hi_v4si): Ditto.
+ (vec_unpacku_lo_v4si): Ditto.
+ (vec_unpacks_lo_v4si): Ditto.
+ (sse5_pmacsww): New SSE5 intrinsic insn.
+ (sse5_pmacssww): Ditto.
+ (sse5_pmacsdd): Ditto.
+ (sse5_pmacssdd): Ditto.
+ (sse5_pmacssdql): Ditto.
+ (sse5_pmacssdqh): Ditto.
+ (sse5_pmacsdqh): Ditto.
+ (sse5_pmacsswd): Ditto.
+ (sse5_pmacswd): Ditto.
+ (sse5_pmadcsswd): Ditto.
+ (sse5_pmadcswd): Ditto.
+ (sse5_pcmov_<move>): Conditional move support on SSE5.
+ (sse5_phaddbw): New SSE5 intrinsic insn.
+ (sse5_phaddbd): Ditto.
+ (sse5_phaddbq): Ditto.
+ (sse5_phaddwd): Ditto.
+ (sse5_phaddwq): Ditto.
+ (sse5_phadddq): Ditto.
+ (sse5_phaddubw): Ditto.
+ (sse5_phaddubd): Ditto.
+ (sse5_phaddubq): Ditto.
+ (sse5_phadduwd): Ditto.
+ (sse5_phadduwq): Ditto.
+ (sse5_phaddudq): Ditto.
+ (sse5_phsubbw): Ditto.
+ (sse5_phsubwd): Ditto.
+ (sse5_phsubdq): Ditto.
+ (sse5_pperm): Ditto.
+ (sse5_pperm_sign_v16qi_v8hi): New insns for pack/unpack with SSE5.
+ (sse5_pperm_zero_v16qi_v8hi): Ditto.
+ (sse5_pperm_sign_v8hi_v4si): Ditto.
+ (sse5_pperm_zero_v8hi_v4si): Ditto.
+ (sse5_pperm_sign_v4si_v2di): Ditto.
+ (sse5_pperm_sign_v4si_v2di): Ditto.
+ (sse5_pperm_pack_v2di_v4si): Ditto.
+ (sse5_pperm_pack_v4si_v8hi): Ditto.
+ (sse5_pperm_pack_v8hi_v16qi): Ditto.
+ (sse5_perm<mode>): New SSE5 intrinsic insn.
+ (rotl<mode>3): Ditto.
+ (sse5_rotl<mode>3): Ditto.
+ (sse5_ashl<mode>3): Ditto.
+ (sse5_lshl<mode>3): Ditto.
+ (sse5_frcz<mode>2): Ditto.
+ (sse5s_frcz<mode>2): Ditto.
+ (sse5_cvtph2ps): Ditto.
+ (sse5_cvtps2ph): Ditto.
+ (sse5_vmmaskcmp<mode>3): Ditto.
+ (sse5_com_tf<mode>3): Ditto.
+ (sse5_maskcmp<mode>3): Ditto.
+ (sse5_maskcmp_uns<mode>3): Ditto.
+ (sse5_maskcmp_uns2<mode>3): Ditto.
+ (sse5_pcom_tf<mode>3): Ditto.
+
+ * config/i386/predicates.md (const_0_to_31_operand): New predicate
+ to match 0..31.
+ (sse5_comparison_float_operator): New predicate to match the
+ comparison operators supported by the SSE5 com instruction.
+ (ix86_comparison_int_operator): New predicate to match just the
+ signed int comparisons.
+ (ix86_comparison_uns_operator): New predicate to match just the
+ unsigned int comparisons.
+
+ * doc/invoke.texi (-msse5): Add documentation.
+ (-mfused-madd): Ditto.
+
+ * doc/extend.texi (x86 intrinsics): Document new SSE5 intrinsics.
+
+ * config.gcc (i[34567]86-*-*): Include bmmintrin.h and
+ mmintrin-common.h.
+ (x86_64-*-*): Ditto.
+
+ * config/i386/cpuid.h (bit_SSE5): Define SSE5 bit.
+
+ * config/i386/bmmintrin.h: New file, provide common x86 compiler
+ intrinisics for SSE5.
+
+ * config/i386/smmintrin.h: Move instructions shared with SSE5 to
+ mmintrin-common.h.
+
+ * config/i386/mmintrin-common.h: New file, to contain common
+ instructions between SSE4.1 and SSE5.
+
+ * config/i386/netware.c (gen_stdcall_or_fastcall_decoration): Use
+ FOREACH_FUNCTION_ARGS to iterate over the argument list.
+ (gen_regparm_prefix): Ditto.
+
+ * config/i386/winnt.c (gen_stdcall_or_fastcall_suffix): Use
+ FOREACH_FUNCTION_ARGS to iterate over the argument list. Use
+ prototype_p to determine if a function is prototyped.
+
+2007-09-12 Janis Johnson <janis187@us.ibm.com>
+
+ * config/dfp-bit.c (dfp_conversion_exception): New function.
+ (DFP_TO_DFP) Add new variants to use direct conversions in decNumber.
+ (DFP_TO_INT): Ditto.
+ (INT_TO_DFP): Ditto.
+ * config/dfp-bit.h (DEC_FLOAT_FROM_INT, DEC_FLOAT_TO_INT): New.
+
+2007-09-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/32338
+ * config/ia64/ia64.c (ia64_expand_epilogue): Emit blockage
+ before sp restoration even when total_size is 0, but
+ frame_pointer_needed.
+
+2007-09-12 Bob Wilson <bob.wilson@acm.org>
+
+ * config/xtensa/xtensa.c (machine_function): Add vararg_a7_copy.
+ (xtensa_copy_incoming_a7): Use start_sequence instead of
+ push_to_sequence. Stash insns in vararg_a7_copy for builtin_saveregs.
+ (xtensa_builtin_saveregs): Place code from vararg_a7_copy at the start
+ of the saveregs sequence.
+
+2007-09-12 Richard Sandiford <richard@codesourcery.com>
+
+ * c-tree.h (grokfield): Add a "tree *" argument.
+ * c-decl.c (grokdeclarator): Take a pointer to the decl's attributes.
+ Chain nested decl attributes to it. Don't call decl_attributes here.
+ (groktypename): Pass grokdeclarator a pointer to the attribute list.
+ (start_decl, grokparm, push_parm_decl, start_function): Likewise.
+ (grokfield): Take a pointer to the decl's attributes and pass
+ it to grokdeclarator.
+ * c-parser.c (c_parser_struct_declaration): Update the calls to
+ grokfield. Call decl_attributes for anonymous struct and union
+ fields.
+
+2007-09-12 Jan Hubicka <jh@suse.cz>
+
+ * c-objc-common.h (LANG_HOOKS_CALLGRAPH_EXPAND_FUNCTION): Kill.
+
+2007-09-12 Ira Rosen <irar@il.ibm.com>
+
+ PR tree-optimization/32377
+ * tree-vect-analyze.c (vect_analyze_data_ref_dependence): Distinguish
+ between positive and negative dependence distance using DDR_REVERSED_P.
+
+2007-09-12 Dorit Nuzman <dorit@il.ibm.com>
+
+ PR tree-optimization/33373
+ * tree-vect-analyze (vect_determine_vectorization_factor): Call
+ TREE_INT_CST_LOW when comparing TYPE_SIZE_UNIT.
+
+2007-09-12 Jan Hubicka <jh@suse.cz>
+
+ PR target/33393
+ * i386.md (floatsisf2_mixed_memory, floatsisf2_sse_memory): Disable for
+ !SSE_MATH
+
+2007-09-12 Christian Bruel <christian.bruel@st.com>
+
+ * sh.h (SH_DBX_REGISTER_NUMBER): Added fpscr, fixed sr/gbr regs.
+ * linux-unwind.h (SH_DWARF_FRAME_GBR): fixed.
+
+2007-09-12 Ira Rosen <irar@il.ibm.com>
+
+ * tree-vect-transform.c (vect_get_slp_defs): Don't build a vector
+ for oprnd1 if not required.
+ (vectorizable_operation): Use scalar operand in SLP in case of
+ shift with scalar argument.
+
+2007-09-12 Ira Rosen <irar@il.ibm.com>
+
+ * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change default and minimum
+ to 1.
+
+2007-09-11 James E. Wilson <wilson@specifix.com>
+
+ * defaults.h (DWARF2_UNWIND_INFO): Don't define if
+ TARGET_UNWIND_INFO is defined.
+ * config/ia64/ia64.h (INCOMING_RETURN_ADDR_RTX): Delete undef
+ after definition.
+
+2007-09-12 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ * config/sh/sh.c (calc_live_regs): Use
+ current_function_saves_all_registers instead of
+ current_function_has_nonlocal_label.
+ (sh_allocate_initial_value): Likewise.
+ (sh_get_pr_initial_val): Likewise.
+ * config/sh/sh.h (SHMEDIA_REGS_STACK_ADJUST): Likewise.
+ * config/sh/sh.md (load_ra): Likewise.
+
+2007-09-12 Hans-Peter Nilsson <hp@axis.com>
+
+ * config/cris/t-linux (LIMITS_H_TEST): Only define if not inhibit_libc.
+
+ PR target/33360
+ * config/cris/cris.c (cris_expand_pic_call_address): Fix typo in
+ GET_CODE (x) == CONST_INT to CONST_INT_P (x) transformation.
+
+2007-09-12 Sa Liu <saliu@de.ibm.com>
+
+ * config/spu/spu.c (spu_emit_branch_or_set): Handle NaN values as
+ operands to DFmode GE or LE compares.
+
+2007-09-12 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin/bfin.h (enum reg_class, REG_CLASS_CONTENTS,
+ REG_CLASS_NAMES): Add P0REGS.
+ (REGNO_REG_CLASS): Return it where appropriate.
+ (REG_CLASS_FROM_CONSTRAINT): Add 'qA'.
+ (CLASS_LIKELY_SPILLED_P): P0REGS is likely_spilled.
+ * doc/md.texi (Blackfin family): Document 'q' constraints.
+
+2007-09-11 Steve Kenton <skenton@ou.edu>
+
+ * pa/linux-unwind.h: Guard with inhibit_libc.
+ * pa/hpux-unwind.h: Likewise.
+
2007-09-11 David Daney <ddaney@avtrex.com>
* doc/invoke.texi: Document new MIPS -mllsc and -mno-llsc options.
(lshr<mode>3): Ditto.
(ashl<mode>3): Ditto.
(vec_shl_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
- (vec_shr_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
-
+ (vec_shr_<mode>): Ditto.
* gcc/config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLL?128,
IX86_BUILTIN_PSRA*?128, IX86_BUILTIN_PSRL?128]: Convert op1 to SImode.
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